Amplification circuit

Abstract

Provided is an amplifier circuit capable of improving power efficiency and suppressing signal distortion. An amplifier circuit (10) is provided with: a carrier amplifier (11) and a peak amplifier (21); a phase shift line (42); a power combiner that combines the high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs the combined high-frequency signals from the third terminal of the power combiner; the carrier amplifier (11) is connected between the signal input terminal (120) and the first terminal, the peak amplifier (21) is connected between the signal input terminal (120) and one end of the phase shift line (42), the other end of the phase shift line (42) is connected to the second terminal, the signal output terminal (110) is connected to the third terminal, and the impedance element is a resistive element or a capacitor. One end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the signal output terminal (110).

Description

Technical Field

[0001] The invention relates to an amplifier circuit. Background Art

[0002] Patent document 1 discloses a Doherty amplifier circuit having a carrier amplifier and a peak amplifier. In the Doherty amplifier circuit, when the power level of the input signal increases, the peak amplifier operates to adjust the load impedance at the output end of the carrier amplifier. As a result, the efficiency and linearity of the Doherty amplifier circuit are improved.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2016-127568 Summary of the invention

[0006] Problem that the invention aims to solve

[0007] In the case of the Doherty amplifier circuit, when the peak amplifier operates, the carrier amplifier outputs a composite output signal of the carrier amplifier and the peak amplifier. However, there is a case where, due to the imperfect load impedance at the output end of the carrier amplifier, a portion of the output signal of the peak amplifier is not synthesized with the output signal of the carrier amplifier but leaks to the output terminal of the Doherty amplifier circuit alone. As a result, the power efficiency of the Doherty amplifier circuit is sometimes degraded, and the linearity of the gain is degraded, thereby generating signal distortion.

[0008] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a Doherty-type amplifier circuit capable of improving power efficiency and suppressing signal distortion.

[0009] Solutions for solving problems

[0010] In order to achieve the above-mentioned purpose, an amplifier circuit involved in one embodiment of the present invention comprises: an input terminal and an output terminal; a carrier amplifier and a peak amplifier; a first phase shift circuit; a power combiner, which combines high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs them from the third terminal of the power combiner; and an impedance element, which is a resistor element or a capacitor, wherein the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal, the output terminal is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the output terminal.

[0011] In addition, an amplifier circuit involved in one embodiment of the present invention includes: an input terminal and an output terminal; a carrier amplifier and a peak amplifier; a first phase shift circuit; a power combiner, which combines high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs them from the third terminal of the power combiner; and an impedance element, which is a resistor element or a capacitor, wherein the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal, the output terminal is connected to the third terminal, one end of the impedance element is connected to the first terminal, and the other end of the impedance element is connected to the output terminal.

[0012] In addition, an amplifier circuit involved in one embodiment of the present invention includes: an input terminal and an output terminal; a carrier amplifier and a peak amplifier; a first phase shift circuit; a power combiner, which combines high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs them from the third terminal of the power combiner; and an impedance element, which is a resistor element or a capacitor, wherein the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal, the output terminal is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the first terminal.

[0013] Effects of the Invention

[0014] According to the present invention, it is possible to provide a Doherty-type amplifier circuit capable of improving power efficiency and suppressing signal distortion. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a circuit configuration diagram of the amplifier circuit, high-frequency circuit, and communication device involved in Example 1.

[0016] Figure 2 is a circuit configuration diagram of an amplifier circuit according to a comparative example.

[0017] Figure 3 It is a graph schematically showing the gain and load impedance characteristics of the amplifier circuits according to the embodiment and the comparative example.

[0018] Figure 4 It is a circuit structure diagram of the amplifier circuit involved in Example 2.

[0019] Figure 5 It is a circuit structure diagram of the amplifier circuit involved in Example 3.

[0020] Figure 6 It is a circuit structure diagram of the amplifier circuit involved in Example 4.

[0021] Figure 7 This is a circuit configuration diagram of the amplifier circuit involved in Example 5. DETAILED DESCRIPTION

[0022] The following describes the embodiments of the present invention in detail. In addition, the embodiments described below all represent general or specific examples. The numerical values, shapes, materials, structural elements, configurations of structural elements, and connection methods shown in the following embodiments are examples, and their main purpose is not to limit the present invention. Regarding the structural elements in the following embodiments and modifications that are not recorded in the independent claims, they are described as arbitrary structural elements. In addition, the size or size ratio of the structural elements shown in the drawings is not necessarily strict. In each figure, the same figure mark is marked for substantially the same structure, and repeated descriptions are sometimes omitted or simplified.

[0023] In the following, terms such as parallel and perpendicular that indicate the relationship between elements, terms such as rectangular that indicate the shape of an element, and numerical ranges do not have strict meanings but also include substantially equivalent ranges, such as a difference of a few percent.

[0024] In the circuit structure of the present disclosure, "connection" includes not only direct connection using connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. "Connection between A and B" means connection between A and B and both A and B, including series connection to the path connecting A and B, and also includes parallel connection (shunt connection) between the path and the ground.

[0025] In the present disclosure, a “signal path” refers to a transmission line composed of a wiring through which a high-frequency signal propagates, an electrode directly connected to the wiring, and a terminal directly connected to the wiring or the electrode.

[0026] In addition, in the circuit connection structure of the present disclosure, "component (element) A is arranged in series on path B" means that both the signal input end and the signal output end of component (element) A are connected to the wiring, electrode or terminal constituting path B. In addition, "a plurality of paths are connected in parallel" means that one end of each of the plurality of paths is connected to the same wiring, electrode or terminal.

[0027] (Implementation Method)

[0028] [1. Circuit Configurations of Amplifier Circuit 10, High-Frequency Circuit 1, and Communication Device 4]

[0029] Reference Figure 1 The circuit configurations of the amplifier circuit 10 , the high-frequency circuit 1 , and the communication device 4 according to Example 1 of the present embodiment will be described. Figure 1It is a circuit configuration diagram of the amplifier circuit 10 , the high-frequency circuit 1 , and the communication device 4 according to the first embodiment.

[0030] [1.1 Circuit Configuration of Communication Device 4]

[0031] First, the circuit structure of the communication device 4 is described. Figure 1 As shown, the communication device 4 according to the first embodiment includes a high-frequency circuit 1 , an antenna 2 , and an RF signal processing circuit (RFIC) 3 .

[0032] The high-frequency circuit 1 transmits a high-frequency signal between the antenna 2 and the RFIC 3. The detailed circuit structure of the high-frequency circuit 1 will be described later.

[0033] The antenna 2 is connected to the antenna connection terminal 100 of the high frequency circuit 1 , transmits the high frequency signal output from the high frequency circuit 1 , and receives a high frequency signal from the outside and outputs it to the high frequency circuit 1 .

[0034] RFIC 3 is an example of a signal processing circuit that processes a high-frequency signal, and is connected to the signal input terminal 120 and the signal output terminal 130 of the high-frequency circuit 1. Specifically, RFIC 3 performs signal processing on the reception signal input through the reception path of the high-frequency circuit 1 by down-conversion, etc., and outputs the reception signal generated after the signal processing to the baseband signal processing circuit (BBIC, not shown). In addition, RFIC 3 performs signal processing on the transmission signal input from the BBIC by up-conversion, etc., and outputs the transmission signal generated after the signal processing to the transmission path of the high-frequency circuit 1. In addition, RFIC 3 has a control unit that controls the circuit components of the high-frequency circuit 1. In addition, part or all of the functions of RFIC 3 as a control unit can also be installed outside RFIC 3, for example, it can also be installed on the BBIC or the high-frequency circuit 1.

[0035] In addition, RFIC 3 also has a function as a control unit that controls the power supply voltage and bias voltage (or bias current) provided to each amplifier of the high-frequency circuit 1. Specifically, RFIC 3 outputs a control signal to the high-frequency circuit 1. The power supply voltage and bias voltage (or bias current) controlled by the control signal are provided to each amplifier of the high-frequency circuit 1.

[0036] In addition, in the communication device 4 according to the present embodiment, the antenna 2 is not an essential component.

[0037] [1.2 Circuit structure of high frequency circuit 1]

[0038] Next, the circuit structure of the high frequency circuit 1 is described. Figure 1As shown, the high-frequency circuit 1 includes an amplifier circuit 10 , filters 61 and 62 , a low-noise amplifier 31 , a capacitor 71 , an inductor 72 , an antenna connection terminal 100 , a signal input terminal 120 , and a signal output terminal 130 .

[0039] The filter 61 is connected between the signal output terminal 110 and the antenna connection terminal 100, and allows the transmission signal of the frequency band A to pass among the transmission signals amplified by the amplifier circuit 10. The filter 62 is connected between the low noise amplifier 31 and the antenna connection terminal 100, and allows the signal of the reception band of the frequency band A among the reception signals received by the antenna 2 to pass.

[0040] In addition, the filters 61 and 62 may constitute a duplexer for transmitting and receiving signals in the frequency band A, or may be a filter for transmitting in a time division duplex (TDD) manner. When the filters 61 and 62 are filters for TDD, a switch for switching between transmission and reception is configured in at least one of the front stage and the rear stage of the filter.

[0041] The low noise amplifier 31 is connected between the filter 62 and the signal output terminal 130 , and amplifies the reception signal of the frequency band A and outputs the amplified signal to the RFIC 3 .

[0042] The capacitor 71 is a circuit element for impedance matching arranged in series between the signal output terminal 110 and the filter 61. The capacitor 71 may be connected (arranged in shunt) between the path connecting the signal output terminal 110 and the filter 61 and the ground, or may not be present.

[0043] The inductor 72 is a circuit element for impedance matching connected (disposed in shunt) between the path connecting the filter 61 and the antenna connection terminal 100 and the ground. The inductor 72 may be disposed in series between the filter 61 and the antenna connection terminal 100, or may not be provided.

[0044] In addition, the high-frequency circuit 1 may also include a transmission circuit that transmits a transmission signal of a frequency band B different from the frequency band A to the antenna 2, and a reception circuit that transmits a reception signal of the frequency band B received from the antenna 2 to the RFIC 3. Furthermore, the high-frequency circuit 1 may also constitute a circuit that transmits and receives high-frequency signals of three or more frequency bands.

[0045] [1.3 Circuit Structure of Amplifier Circuit 10 According to Embodiment 1]

[0046] Next, the circuit configuration of the amplifier circuit 10 will be described in detail.

[0047] like Figure 1As shown, the amplifier circuit 10 includes a signal input terminal 120 and a signal output terminal 110 , a carrier amplifier 11 , a peak amplifier 21 , phase shift lines 41 and 42 , a distributor 50 , a transformer 80 , and a resistor 70 .

[0048] The signal input terminal 120 is an example of an input terminal, and is connected to the RFIC 3. The signal output terminal 110 is an example of an output terminal, and is connected to the antenna connection terminal 100 via the capacitor 71 and the filter 61. In addition, the signal input terminal 120, the signal output terminal 110, and the antenna connection terminal 100 can each be a metal conductor such as a metal electrode and a metal bump, or a point on a metal wiring.

[0049] The carrier amplifier 11 amplifies the high-frequency signal input to the carrier amplifier 11. The carrier amplifier 11 is, for example, a class A (or class AB) amplifier circuit that can amplify all power levels of the signal input to the carrier amplifier 11, and in particular, can perform efficient amplification in the low output region and the medium output region. The carrier amplifier 11 is, for example, an inverting amplifier that inverts the phase of the input signal and outputs it. The input end of the carrier amplifier is connected to the signal input terminal 120 via the distributor 50, and the output end is connected to the transformer 80.

[0050] The peak amplifier 21 amplifies the high-frequency signal input to the peak amplifier 21. The peak amplifier 21 is, for example, a class C amplifier circuit that can perform an amplification operation in a region where the power level of the signal input to the peak amplifier 21 is high. A bias voltage smaller than the bias voltage applied to the amplification transistor of the carrier amplifier 11 is applied to the amplification transistor of the peak amplifier 21. Accordingly, the higher the power level of the signal input to the peak amplifier 21, the lower the output impedance. As a result, the peak amplifier 21 can perform amplification operation with low distortion in a high output region. The peak amplifier 21 is, for example, an inverting amplifier that inverts the phase of the input signal and then outputs it. The input end of the peak amplifier 21 is connected to the phase shift line 41, and the output end is connected to the phase shift line 42.

[0051] The carrier amplifier 11 and the peak amplifier 21 each include an amplifier transistor. The amplifier transistor is, for example, a bipolar transistor such as a heterojunction bipolar transistor (HBT) or a field effect transistor such as a MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor).

[0052] The phase shift line 42 is an example of a first phase shift circuit, for example, a 1 / 4 wavelength transmission line. The phase shift line 42 delays the phase of the high frequency signal input from one end by 90° (1 / 4 wavelength) and then outputs it from the other end. In addition, the phase shift line 42 (first phase shift circuit) may not have a phase shift line, for example, it may be an inductor element arranged in series in the path connecting the peak amplifier 21 and the transformer 80, or a low-pass filter composed of an inductor and a capacitor. One end of the phase shift line 42 is connected to the output end of the peak amplifier 21, and the other end is connected to the transformer 80.

[0053] The phase shift line 41 is an example of a second phase shift circuit, for example, a 1 / 4 wavelength transmission line. The phase shift line 41 delays the phase of the high-frequency signal input from one end by 90° (1 / 4 wavelength) and then outputs it from the other end. In addition, the phase shift line 41 (second phase shift circuit) may not have a phase shift line, for example, it may be an inductor element arranged in series in the path connecting the distributor 50 and the peak amplifier 21, or a low-pass filter composed of an inductor and a capacitor. One end of the phase shift line 41 is connected to the signal input terminal 120 via the distributor 50, and the other end is connected to the input end of the peak amplifier 21.

[0054] The phase shift circuits 41 and 42 are not limited to those that strictly lag the phase of the input high-frequency signal of the frequency band A by 90°, and any circuit that lags the phase of the input high-frequency signal of the frequency band A by (90°±20°) may be used.

[0055] The transformer 80 is an example of a power combiner, and has a first terminal, a second terminal, and a third terminal ( Figure 1 (not shown in the figure), the high-frequency signals input to the first terminal and the second terminal are synthesized and output from the third terminal. The transformer 80 has a coil 801 (first coil) and a coil 802 (second coil) that are electromagnetically coupled to each other. One end of the coil 801 is connected to the output end of the carrier amplifier 11 via the first terminal, and the other end of the coil 801 is connected to the other end of the phase shift line 42 via the second terminal. One end of the coil 802 is connected to the signal output terminal 110 via the third terminal, and the other end of the coil 802 is connected to the ground. In addition, one end of the coil 801 may be the first terminal, the other end of the coil 801 may be the second terminal, and one end of the coil 802 may be the third terminal.

[0056] The distributor 50 is an example of a power distributor, and is connected between the signal input terminal 120 and the input end of the carrier amplifier 11 and the input end of the peak amplifier 21. The distributor 50 has a fourth terminal, a fifth terminal, and a sixth terminal ( Figure 1The high frequency signal input to the fourth terminal is power-divided at a predetermined distribution ratio, and one side of the high frequency signal obtained by the power distribution is output from the fifth terminal, and the other side of the high frequency signal obtained by the power distribution is output from the sixth terminal. The fourth terminal is connected to the signal input terminal 120, the fifth terminal is connected to the input end of the carrier amplifier 11, and the sixth terminal is connected to one end of the phase shift line 41.

[0057] The resistor element 70 is an example of a first resistor element and an example of an impedance element. One end of the resistor element 70 is connected to the other end (second terminal) of the coil 801, and the other end of the resistor element 70 is connected to the signal output terminal 110. The resistor element 70 is arranged in series in a bypass path different from the path connecting the second terminal, the coils 801 and 802, and the signal output terminal 110.

[0058] Here, the operation of a Doherty-type amplifier circuit including a carrier amplifier and a peak amplifier will be described with reference to an amplifier circuit 500 according to a comparative example.

[0059] The Doherty type amplifier circuit refers to an amplifier circuit that achieves high efficiency by using multiple amplifiers as carrier amplifiers and peak amplifiers. The carrier amplifier refers to an amplifier that operates regardless of whether the power of the high-frequency signal (input) is low or high in the Doherty type amplifier circuit. The peak amplifier refers to an amplifier that operates mainly when the power of the high-frequency signal (input) is high in the Doherty type amplifier circuit. Therefore, when the input power of the high-frequency signal is low, the high-frequency signal is mainly amplified by the carrier amplifier, and when the input power of the high-frequency signal is high, the high-frequency signal is amplified by the carrier amplifier and the peak amplifier and then synthesized. Through this action, in the Doherty type amplifier circuit, in the low output power region, the load impedance observed from the carrier amplifier increases, and the efficiency at low output power is improved. In addition, in the high output power region, the load impedance observed from the carrier amplifier decreases, and the linearity at high output power is improved.

[0060] Figure 2 is a circuit diagram of an amplifier circuit 500 according to a comparative example. The amplifier circuit 500 shown in the figure includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 43, and a distributor 50. The amplifier circuit 500 according to the comparative example is different in structure from the amplifier circuit 10 according to the first embodiment in that a phase shift line 43 is added instead of the phase shift line 42, and the transformer 80 is not configured.

[0061] First, the load impedance of the carrier amplifier 11 when the carrier amplifier 11 and the peak amplifier 21 are in operation (ON) (when a large signal is input) is impedance-converted by the phase shift line 43, thereby becoming smaller than the load impedance of the carrier amplifier 11 when the carrier amplifier 11 is in operation (ON) and the peak amplifier 21 is not in operation (OFF) (when a small signal is input). Therefore, when a large signal is input, the carrier amplifier 11 and the peak amplifier 21 are in operation, and a high-power signal can be output.

[0062] Next, when the carrier amplifier 11 is in operation (ON) and the peak amplifier 21 is not in operation (OFF) (when a small signal is input), the load impedance of the peak amplifier 21 becomes an open circuit state, and the load impedance of the carrier amplifier 11 becomes higher when a small signal is input than when a large signal is input. Therefore, when a small signal is input, the load impedance of the carrier amplifier 11 becomes higher, and the amplifier circuit 500 can operate with high efficiency.

[0063] However, when the carrier amplifier 11 and the peak amplifier 21 are operating (when a large signal is input), the carrier amplifier 11 has a finite impedance and does not have an ideal impedance, so a part of the output signal of the peak amplifier 21 may not be combined with the output signal of the carrier amplifier 11 but may leak to the signal output terminal 110 alone. As a result, the power efficiency of the amplifier circuit 500 may be degraded, and the linearity of the gain may be degraded, thereby causing signal distortion.

[0064] In contrast, in the amplifier circuit 10 involved in the present embodiment, a bypass path having a resistor element 70 is provided, and a signal transmitted in the bypass path is used to offset a signal leaking from the peak amplifier 21 to the signal output terminal 110 via the transformer 80, thereby suppressing distortion of the output signal caused by the operation of the peak amplifier 21.

[0065] Below, refer to Figure 1 The circuit state of the amplifier circuit 10 according to this embodiment will be described in detail.

[0066] like Figure 1As shown, first, a high-frequency main signal is input from the signal input terminal 120. It is assumed that the phase of the high-frequency main signal is 0° at the node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high-frequency main signal is power-divided by the distributor 50, so that it is output as a carrier main signal on the carrier amplifier 11 side and is output as a peak signal and a peak auxiliary signal on the peak amplifier 21 side. At the node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal does not change and is 0°. On the other hand, at the node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phase of the peak signal and the peak auxiliary signal is delayed by 90° by the phase shift line 41 and becomes -90°.

[0067] Next, the phase of the carrier main signal is inverted by the carrier amplifier 11, and becomes -180° at the node n3 on the path connecting the output end of the carrier amplifier 11 and the coil 801. On the other hand, the phases of the peak signal and the peak auxiliary signal are inverted by the peak amplifier 21, and become -270° at the node n5 at the output end of the peak amplifier 21, and become 0° at the node n6 at the other end of the coil 801 after being delayed by 90° by the phase shift circuit 42.

[0068] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the other end of the coil 801. The peak signal reaches the node n7 on the path connecting the coil 802 to the signal output terminal 110 via the coils 801 and 802. The peak auxiliary signal reaches the node n7 via the resistor element 70. Here, the peak signal is transmitted from the other end of the coil 801 to one end of the coil 802, so the phase of the peak signal is reversed and becomes -180° at the node n7. On the other hand, the peak auxiliary signal passes through the resistor element 70 and does not shift the phase, so it is 0° at the node n7. That is, at the node n7, the phases of the peak signal and the peak auxiliary signal are in an anti-phase relationship, so the peak signal and the peak auxiliary signal are roughly offset at the node n7.

[0069] Furthermore, the resistance value of the resistor 70 is determined so that the amplitude of the peak signal and the amplitude of the peak auxiliary signal become substantially equal at the node n7.

[0070] This can prevent a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110 alone.

[0071] Figure 31 is a graph schematically showing the characteristics of gain and load impedance of the amplifier circuit involved in Example 1 and the comparative example. The upper part of the figure shows the gain of the carrier amplifier 11 and the peak amplifier 21 corresponding to the output power of the amplifier circuit, and the lower part of the figure shows the load impedance at the output end of the carrier amplifier 11.

[0072] like Figure 3 As shown, in the region where the output power of the amplifier circuit is high, the peak amplifier 21 is in the ON state. At the same time, the load impedance of the carrier amplifier 11 decreases, and the carrier amplifier 11 can output a high-power signal.

[0073] In the amplifier circuit 500 according to the comparative example, the output signal of the peak amplifier 21 leaks alone to the signal output terminal 110, so the gain of the amplifier circuit 500 increases as the output power increases. Therefore, the linearity of the gain deteriorates and the signal distortion increases.

[0074] In contrast, according to the amplifier circuit 10 involved in this embodiment, it is possible to suppress the output signal of the peak amplifier 21 from leaking alone to the signal output terminal 110, so that the gain of the amplifier circuit 10 is approximately equal to the gain of the carrier amplifier 11, thereby maintaining the gain constant, thereby suppressing signal distortion.

[0075] [1.4 Circuit Configuration of Amplifier Circuit 10A According to Embodiment 2]

[0076] Next, the circuit configuration of the amplifier circuit 10A according to the second embodiment will be described in detail. Figure 4 1 is a circuit diagram of an amplifier circuit 10A according to Embodiment 2. As shown in the figure, the amplifier circuit 10A includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a resistor 73. The amplifier circuit 10A according to this embodiment is different from the amplifier circuit 10 according to Embodiment 1 in the structure of the transformer 81. Hereinafter, the description of the amplifier circuit 10A according to this embodiment, the same structure as the amplifier circuit 10 according to Embodiment 1 is omitted, and the description will be centered on the different structure.

[0077] The input end of the carrier amplifier 11 is connected to the signal input terminal 120 via the distributor 50, and the output end is connected to the transformer 81. The input end of the peak amplifier 21 is connected to the phase shift line 41, and the output end is connected to the phase shift line 42.

[0078] The phase shift line 42 is an example of a first phase shift circuit, such as a 1 / 4 wavelength transmission line. One end of the phase shift line 42 is connected to the output end of the peak amplifier 21, and the other end is connected to the transformer 81. One end of the phase shift line 41 is connected to the signal input terminal 120 via the distributor 50, and the other end is connected to the input end of the peak amplifier 21.

[0079] The transformer 81 is an example of a power combiner and has a first terminal, a second terminal, and a third terminal ( Figure 4 (not shown in the figure), the high-frequency signals input to the first terminal and the second terminal are synthesized and output from the third terminal. The transformer 81 has a coil 811 (second coil) and a coil 812 (first coil) that are electromagnetically coupled to each other. One end of the coil 811 and one end of the coil 812 are connected to the output end of the carrier amplifier 11 via the first terminal. The other end of the coil 812 is connected to the other end of the phase shift line 42 via the second terminal. The other end of the coil 811 is connected to the signal output terminal 110 via the third terminal. In addition, it is also possible that one end of the coil 811 and one end of the coil 812 are the first terminal, the other end of the coil 812 is the second terminal, and the other end of the coil 811 is the third terminal.

[0080] Furthermore, the power combiner may not be the transformer 81 but may be a transmission line transformer composed of two transmission lines electromagnetically coupled to each other.

[0081] The resistor element 73 is an example of a first resistor element and an example of an impedance element. One end of the resistor element 73 is connected to the other end (second terminal) of the coil 812, and the other end of the resistor element 73 is connected to the signal output terminal 110. The resistor element 73 is arranged in series in a bypass path different from the path connecting the second terminal, the coils 812 and 811, and the signal output terminal 110.

[0082] In the amplifier circuit 10A involved in this embodiment, a bypass path with a resistor element 73 is provided, and the signal transmitted in the above-mentioned bypass path is used to offset the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the transformer 81, thereby suppressing the distortion of the output signal caused by the operation of the peak amplifier 21.

[0083] Below, refer to Figure 4 The circuit state of the amplifier circuit 10A according to this embodiment will be described in detail.

[0084] like Figure 4As shown, first, a high-frequency main signal is input from the signal input terminal 120. It is assumed that the phase of the high-frequency main signal is 0° at the node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high-frequency main signal is power-divided by the distributor 50, so that it is output as a carrier main signal on the carrier amplifier 11 side and is output as a peak signal and a peak auxiliary signal on the peak amplifier 21 side. At the node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal does not change and is 0°. On the other hand, at the node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phase of the peak signal and the peak auxiliary signal is delayed by 90° by the phase shift line 41 and becomes -90°.

[0085] Next, the phase of the carrier main signal is inverted by the carrier amplifier 11, and becomes -180° at the node n3 on the path connecting the output end of the carrier amplifier 11 and the coil 811. On the other hand, the phases of the peak signal and the peak auxiliary signal are inverted by the peak amplifier 21, and become -270° at the node n5 at the output end of the peak amplifier 21, and become 0° at the node n6 at the other end of the coil 812 after being delayed by 90° by the phase shift circuit 42.

[0086] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the other end of the coil 812. The peak signal reaches the node n7 on the path connecting the coil 811 to the signal output terminal 110 via the coils 812 and 811. The peak auxiliary signal reaches the node n7 via the resistor element 73. Here, the peak signal is transmitted from the other end of the coil 812 to the other end of the coil 811, so the phase of the peak signal is reversed and becomes -180° at the node n7. On the other hand, the peak auxiliary signal passes through the resistor element 73 and does not shift the phase, so it is 0° at the node n7. That is, at the node n7, the phases of the peak signal and the peak auxiliary signal are in an anti-phase relationship, so the peak signal and the peak auxiliary signal are roughly offset at the node n7.

[0087] Furthermore, the resistance value of the resistor 73 is determined so that the amplitude of the peak signal and the amplitude of the peak auxiliary signal become substantially equal at the node n7.

[0088] This can suppress a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110. Therefore, it is possible to provide an amplifier circuit 10A in which power efficiency is improved and gain linearity is enhanced to suppress signal distortion.

[0089] [1.5 Circuit Configuration of Amplifier Circuit 10B According to Embodiment 3]

[0090] Next, the circuit configuration of the amplifier circuit 10B according to the third embodiment will be described in detail. Figure 5 1 is a circuit diagram of an amplifier circuit 10B according to the third embodiment. As shown in the figure, the amplifier circuit 10B includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a resistor 74. The amplifier circuit 10B according to the present embodiment is different from the amplifier circuit 10A according to the second embodiment in the connection structure of the resistor 74. Hereinafter, the description of the amplifier circuit 10B according to the present embodiment, which has the same structure as the amplifier circuit 10A according to the second embodiment, will be omitted, and the description will be centered on the different structures.

[0091] The resistor element 74 is an example of a first resistor element and an example of an impedance element. One end of the resistor element 74 is connected to one end of the coil 811 and one end of the coil 812 (first terminal), and the other end of the resistor element 74 is connected to the signal output terminal 110. The resistor element 74 is connected in parallel with the coil 811.

[0092] In the amplifier circuit 10B involved in this embodiment, a bypass path with a resistor element 74 is provided, and the signal transmitted in the above-mentioned bypass path is used to offset the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the coils 812 and 811, thereby suppressing the distortion of the output signal caused by the operation of the peak amplifier 21.

[0093] Below, refer to Figure 5 The circuit state of the amplifier circuit 10B according to this embodiment will be described in detail.

[0094] like Figure 5 As shown, first, a high-frequency main signal is input from the signal input terminal 120. It is assumed that the phase of the high-frequency main signal is 0° at the node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high-frequency main signal is power-divided by the distributor 50, so that it is output as a carrier main signal on the carrier amplifier 11 side and is output as a peak signal and a peak auxiliary signal on the peak amplifier 21 side. At the node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal does not change and is 0°. On the other hand, at the node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phase of the peak signal and the peak auxiliary signal is delayed by 90° by the phase shift line 41 and becomes -90°.

[0095] Next, the phase of the carrier main signal is inverted by the carrier amplifier 11, and becomes -180° at the node n3 on the path connecting the output end of the carrier amplifier 11 and the coil 811. On the other hand, the phases of the peak signal and the peak auxiliary signal are inverted by the peak amplifier 21, and become -270° at the node n5 at the output end of the peak amplifier 21, and become 0° at the node n6 at the other end of the coil 812 after being delayed by 90° by the phase shift circuit 42.

[0096] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the connection point between one end of the coil 812 and one end of the coil 811. The peak signal reaches the node n7 on the path connecting the coil 811 and the signal output terminal 110 via the coils 812 and 811. The peak auxiliary signal reaches the node n7 via the coil 812 and the resistor element 74. Here, the peak signal passes through the coils 812 and 811 that are electromagnetically coupled to each other, so the phase of the peak signal is reversed and becomes -180° at the node n7. On the other hand, the peak auxiliary signal passes through the coil 812 and the resistor element 74 that are not electromagnetically coupled to each other, and no phase shift occurs, so it is 0° at the node n7. That is, at the node n7, the phases of the peak signal and the peak auxiliary signal are in an anti-phase relationship, so the peak signal and the peak auxiliary signal are roughly offset at the node n7.

[0097] Furthermore, the resistance value of the resistor 74 is determined so that the amplitude of the peak signal and the amplitude of the peak auxiliary signal become substantially equal at the node n7.

[0098] This can suppress a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110. Therefore, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and gain linearity is enhanced to suppress signal distortion.

[0099] In addition, in the amplifier circuit 10B involved in this embodiment, a first capacitor may be arranged instead of the resistor 74. The first capacitor is an example of an impedance element, and one end of the first capacitor is connected to one end of the coil 811 and one end of the coil 812 (first terminal), and the other end of the first capacitor is connected to the signal output terminal 110. The first capacitor is connected in parallel with the coil 811.

[0100] This can suppress a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110. Therefore, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and gain linearity is enhanced to suppress signal distortion.

[0101] [1.6 Circuit Configuration of Amplifier Circuit 10C According to Embodiment 4]

[0102] Next, the circuit configuration of the amplifier circuit 10C according to the fourth embodiment will be described in detail. Figure 6 1 is a circuit diagram of an amplifier circuit 10C according to the fourth embodiment. As shown in the figure, the amplifier circuit 10C includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a resistor 75. The amplifier circuit 10C according to the present embodiment is different from the amplifier circuit 10A according to the second embodiment in the connection structure of the resistor 75. Hereinafter, the description of the amplifier circuit 10C according to the present embodiment will be omitted for the same structure as the amplifier circuit 10A according to the second embodiment, and the description will be centered on the different structure.

[0103] The resistor element 75 is an example of a first resistor element and an example of an impedance element. One end of the resistor element 75 is connected to the other end (second terminal) of the coil 812, and the other end of the resistor element 75 is connected to one end of the coil 811 and one end (first terminal) of the coil 812. The resistor element 75 is connected in parallel with the coil 812.

[0104] In the amplifier circuit 10C involved in this embodiment, a bypass path with a resistor element 75 is provided, and the signal transmitted in the above-mentioned bypass path is used to offset the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the coils 812 and 811, thereby suppressing the distortion of the output signal caused by the operation of the peak amplifier 21.

[0105] Below, refer to Figure 6 The circuit state of the amplifier circuit 10C according to this embodiment will be described in detail.

[0106] like Figure 6 As shown, first, a high-frequency main signal is input from the signal input terminal 120. It is assumed that the phase of the high-frequency main signal is 0° at the node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high-frequency main signal is power-divided by the distributor 50, so that it is output as a carrier main signal on the carrier amplifier 11 side and is output as a peak signal and a peak auxiliary signal on the peak amplifier 21 side. At the node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal does not change and is 0°. On the other hand, at the node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phase of the peak signal and the peak auxiliary signal is delayed by 90° by the phase shift line 41 and becomes -90°.

[0107] Next, the phase of the carrier main signal is inverted by the carrier amplifier 11, and becomes -180° at the node n3 on the path connecting the output end of the carrier amplifier 11 and the coil 811. On the other hand, the phases of the peak signal and the peak auxiliary signal are inverted by the peak amplifier 21, and become -270° at the node n5 at the output end of the peak amplifier 21, and become 0° at the node n6 at the other end of the coil 812 after being delayed by 90° by the phase shift circuit 42.

[0108] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at node n6. The peak signal reaches node n7 on the path connecting coil 811 to signal output terminal 110 via coils 812 and 811. The peak auxiliary signal reaches node n7 via resistor element 75 and coil 811. Here, the peak signal passes through coils 812 and coil 811 that are electromagnetically coupled to each other, so the phase of the peak signal is reversed and becomes -180° at node n7. On the other hand, the peak auxiliary signal passes through coil 811 and resistor element 75 that are not electromagnetically coupled to each other, and no phase shift occurs, so it is 0° at node n7. That is, at node n7, the phases of the peak signal and the peak auxiliary signal are in an anti-phase relationship, so the peak signal and the peak auxiliary signal are roughly offset at node n7.

[0109] Furthermore, the resistance value of the resistor 75 is determined so that the amplitude of the peak signal and the amplitude of the peak auxiliary signal become substantially equal at the node n7.

[0110] This can suppress a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110. Therefore, it is possible to provide an amplifier circuit 10C in which power efficiency is improved and gain linearity is enhanced to suppress signal distortion.

[0111] In addition, in the amplifier circuit 10C involved in this embodiment, a first capacitor may be configured instead of the resistor element 75. The first capacitor is an example of an impedance element, and one end of the first capacitor is connected to the other end (second terminal) of the coil 812, and the other end of the first capacitor is connected to one end of the coil 811 and one end (first terminal) of the coil 812. The first capacitor is connected in parallel with the coil 812.

[0112] This can suppress a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110. Therefore, it is possible to provide an amplifier circuit 10C in which power efficiency is improved and gain linearity is enhanced to suppress signal distortion.

[0113] [1.7 Circuit Configuration of Amplifier Circuit 10D According to Embodiment 5]

[0114] Next, the circuit configuration of the amplifier circuit 10D according to the fifth embodiment will be described in detail. Figure 7 1 is a circuit diagram of an amplifier circuit 10D according to Embodiment 5. As shown in the figure, the amplifier circuit 10D includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a capacitor 76. The amplifier circuit 10D according to this embodiment is different from the amplifier circuit 10A according to Embodiment 2 only in that the resistor 73 is replaced by a capacitor 76. Hereinafter, the description of the amplifier circuit 10D according to this embodiment will be omitted for the same configuration as the amplifier circuit 10A according to Embodiment 2, and the description will be centered on the different configurations.

[0115] The capacitor 76 is an example of a first capacitor and an example of an impedance element. One end of the capacitor 76 is connected to the other end (second terminal) of the coil 812, and the other end of the capacitor 76 is connected to the signal output terminal 110. The capacitor 76 is arranged in series in a bypass path different from the path connecting the second terminal, the coils 812 and 811, and the signal output terminal 110.

[0116] In the amplifier circuit 10D involved in this embodiment, a bypass path including a capacitor 76 is provided, and a signal transmitted in the bypass path is used to offset a signal leaking from the peak amplifier 21 to the signal output terminal 110 via the transformer 81, thereby suppressing distortion of the output signal caused by the operation of the peak amplifier 21.

[0117] Below, refer to Figure 7 The circuit state of the amplifier circuit 10D according to this embodiment will be described in detail.

[0118] like Figure 7 As shown, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the other end of the coil 812. The peak signal reaches the node n7 on the path connecting the coil 811 and the signal output terminal 110 via the coils 812 and 811. The peak auxiliary signal reaches the node n7 via the capacitor 76. Here, the peak signal is transmitted from the other end of the coil 812 to the other end of the coil 811, so the phase of the peak signal is reversed and becomes -180° at the node n7. On the other hand, the peak auxiliary signal passes through the capacitor 76 and does not shift the phase, so it is 0° at the node n7. That is, at the node n7, the phases of the peak signal and the peak auxiliary signal are in an anti-phase relationship, so the peak signal and the peak auxiliary signal are roughly offset at the node n7.

[0119] Furthermore, the capacitance value of the capacitor 76 is determined so that the amplitude of the peak signal and the amplitude of the peak auxiliary signal become substantially equal at the node n7.

[0120] This can suppress a part of the output signal of the peak amplifier 21 from leaking to the signal output terminal 110. Therefore, it is possible to provide an amplifier circuit 10D in which power efficiency is improved and gain linearity is enhanced to suppress signal distortion.

[0121] [2. Effects, etc.]

[0122] As described above, the amplifier circuit 10 according to the first embodiment, the amplifier circuit 10A according to the second embodiment, and the amplifier circuit 10D according to the fifth embodiment include: the signal input terminal 120 and the signal output terminal 110; the carrier amplifier 11 and the peak amplifier 21; the phase shift line 42; a power combiner that combines high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs the combined signals from the third terminal of the power combiner; and an impedance element that is a resistor or a capacitor, wherein the carrier amplifier 11 is connected between the signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, the signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the signal output terminal 110.

[0123] According to this, by providing a bypass path having an impedance element, the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the power combiner is offset by the signal transmitted in the bypass path, thereby suppressing the distortion of the output signal caused by the operation of the peak amplifier 21. Therefore, it is possible to provide the amplifier circuits 10, 10A, and 10D in which the power efficiency is improved and the linearity of the gain is improved to suppress the signal distortion.

[0124] Furthermore, for example, in the amplifier circuits 10 , 10A, and 10D, the carrier amplifier 11 and the peak amplifier 21 are each an inverting amplifier, and the phase shift circuit 42 is a phase shift circuit that delays the input signal by 90°.

[0125] Thus, it is possible to provide the Doherty type amplifier circuits 10 , 10A, and 10D having improved efficiency in a low output power region and improved linearity in a high output power region.

[0126] In addition, for example, in the amplifier circuit 10, the power combiner is a transformer 80 having coils 801 and 802, one end of the coil 801 is connected to the first terminal, the other end of the coil 801 is connected to the second terminal, one end of the coil 802 is connected to the third terminal, and the other end of the coil 802 is connected to the ground.

[0127] According to this, it is possible to provide the amplifier circuit 10 in which the power efficiency is improved and the signal distortion is suppressed.

[0128] In addition, for example, in amplifier circuits 10A and 10D, the power combiner is a transformer 81 having coils 811 and 812, one end of coil 811 and one end of coil 812 are connected to the first terminal, the other end of coil 812 is connected to the second terminal, and the other end of coil 811 is connected to the third terminal.

[0129] Thus, it is possible to provide amplifier circuits 10A and 10D in which power efficiency is improved and signal distortion is suppressed.

[0130] In addition, the amplifier circuit 10B involved in Example 3 includes: a signal input terminal 120 and a signal output terminal 110; a carrier amplifier 11 and a peak amplifier 21; a phase shift line 42; a power combiner, which combines the high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs them from the third terminal of the power combiner; and an impedance element, which is a resistor element or a capacitor, wherein the carrier amplifier 11 is connected between the signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, the signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the first terminal, and the other end of the impedance element is connected to the signal output terminal 110.

[0131] According to this, by providing a bypass path having an impedance element, the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the power combiner is offset by the signal transmitted in the bypass path, thereby suppressing the distortion of the output signal caused by the operation of the peak amplifier 21. Therefore, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and gain linearity is improved to suppress signal distortion.

[0132] Furthermore, for example, in the amplifier circuit 10B, the carrier amplifier 11 and the peak amplifier 21 are each an inverting amplifier, and the phase shift circuit 42 is a phase shift circuit that delays the input signal by 90°.

[0133] According to this, it is possible to provide a Doherty type amplifier circuit 10B having improved efficiency in a low output power region and improved linearity in a high output power region.

[0134] In addition, for example, in the amplifier circuit 10B, the power combiner is a transformer 81 having coils 811 and 812, one end of the coil 811 and one end of the coil 812 are connected to the first terminal, the other end of the coil 812 is connected to the second terminal, and the other end of the coil 811 is connected to the third terminal.

[0135] According to this, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and signal distortion is suppressed.

[0136] In addition, the amplifier circuit 10C involved in Example 4 includes: a signal input terminal 120 and a signal output terminal 110; a carrier amplifier 11 and a peak amplifier 21; a phase shift line 42; a power combiner that combines high-frequency signals input to the first terminal and the second terminal of the power combiner and outputs the combined signals from the third terminal of the power combiner; and an impedance element that is a resistor element or a capacitor, wherein the carrier amplifier 11 is connected between the signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, the signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the first terminal.

[0137] According to this, by providing a bypass path having an impedance element, the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the power combiner is offset by the signal transmitted in the bypass path, thereby suppressing the distortion of the output signal caused by the operation of the peak amplifier 21. Therefore, it is possible to provide an amplifier circuit 10C in which the power efficiency is improved and the linearity of the gain is improved to suppress the signal distortion.

[0138] Furthermore, for example, in the amplifier circuit 10C, the carrier amplifier 11 and the peak amplifier 21 are each an inverting amplifier, and the phase shift circuit 42 is a phase shift circuit that delays the input signal by 90°.

[0139] According to this, it is possible to provide a Doherty type amplifier circuit 10C having improved efficiency in a low output power region and improved linearity in a high output power region.

[0140] In addition, for example, in the amplifier circuit 10C, the power combiner is a transformer 81 having coils 811 and 812, one end of the coil 811 and one end of the coil 812 are connected to the first terminal, the other end of the coil 812 is connected to the second terminal, and the other end of the coil 811 is connected to the third terminal.

[0141] According to this, it is possible to provide an amplifier circuit 10C in which power efficiency is improved and signal distortion is suppressed.

[0142] In addition, for example, the amplifier circuits 10, 10A, 10B, 10C and 10D further include: a distributor 50 connected between the signal input terminal 120 and the input end of the carrier amplifier 11 and the input end of the peak amplifier 21; and a phase shift line 41 connected between the signal input terminal 120 and the input end of the peak amplifier 21.

[0143] According to this, the input high-frequency signal can be divided into two high-frequency signals having a predetermined phase difference.

[0144] In addition, for example, in the amplifier circuits 10 , 10A, 10B, 10C, and 10D, the phase shift circuit 41 is a phase shift circuit that delays the input signal by 90°.

[0145] According to this, the input high-frequency signal can be divided into two high-frequency signals having a phase difference of 90°.

[0146] (Other Implementations, etc.)

[0147] In the above, the amplifier circuit involved in the implementation mode of the present invention is described by listing the embodiments, but the amplifier circuit involved in the present invention is not limited to the above embodiments. Other embodiments implemented by combining any structural elements in the above embodiments, modified examples obtained by implementing various modifications that can be thought of by those skilled in the art without departing from the scope of the present invention to the above embodiments, and various devices in which the above amplifier circuit is built-in are also included in the present invention.

[0148] Furthermore, for example, in the amplifier circuit, high-frequency circuit, and communication device according to the above-described embodiments, other circuit elements and wirings may be inserted between paths connecting the circuit elements and signal paths disclosed in the drawings.

[0149] The features of the amplifier circuit described based on the above-mentioned embodiments are shown below.

[0150] <1>

[0151] An amplifier circuit comprising:

[0152] Input terminals and output terminals;

[0153] Carrier amplifier and peak amplifier;

[0154] A first phase shift circuit;

[0155] a power combiner that combines high-frequency signals input to a first terminal and a second terminal of the power combiner and outputs the combined signals from a third terminal of the power combiner; and

[0156] an impedance element, which is a resistor or a capacitor,

[0157] The carrier amplifier is connected between the input terminal and the first terminal.

[0158] The peak amplifier is connected between the input terminal and one end of the first phase shift circuit.

[0159] The other end of the first phase shift circuit is connected to the second terminal,

[0160] The output terminal is connected to the third terminal,

[0161] One end of the impedance element is connected to the second terminal,

[0162] The other end of the impedance element is connected to the output terminal.

[0163] <2>

[0164] according to <1> The amplifier circuit, wherein:

[0165] The carrier amplifier and the peak amplifier are each an inverting amplifier,

[0166] The first phase shift circuit is a phase shift circuit that delays the input signal by 90°.

[0167] <3>

[0168] according to <1> or <2> The amplifier circuit, wherein:

[0169] The power combiner is a transformer having a first coil and a second coil,

[0170] One end of the first coil is connected to the first terminal,

[0171] The other end of the first coil is connected to the second terminal,

[0172] One end of the second coil is connected to the third terminal,

[0173] The other end of the second coil is connected to the ground.

[0174] <4>

[0175] according to <1> or <2> The amplifier circuit, wherein:

[0176] The power combiner is a transformer having a first coil and a second coil,

[0177] One end of the first coil and one end of the second coil are connected to the first terminal,

[0178] The other end of the first coil is connected to the second terminal,

[0179] The other end of the second coil is connected to the third terminal.

[0180] <5>

[0181] An amplifier circuit comprising:

[0182] Input terminals and output terminals;

[0183] Carrier amplifier and peak amplifier;

[0184] A first phase shift circuit;

[0185] a power combiner that combines high-frequency signals input to a first terminal and a second terminal of the power combiner and outputs the combined signals from a third terminal of the power combiner; and

[0186] an impedance element, which is a resistor or a capacitor,

[0187] The carrier amplifier is connected between the input terminal and the first terminal.

[0188] The peak amplifier is connected between the input terminal and one end of the first phase shift circuit.

[0189] The other end of the first phase shift circuit is connected to the second terminal,

[0190] The output terminal is connected to the third terminal,

[0191] One end of the impedance element is connected to the first terminal,

[0192] The other end of the impedance element is connected to the output terminal.

[0193] <6>

[0194] according to <5> The amplifier circuit, wherein:

[0195] The carrier amplifier and the peak amplifier are each an inverting amplifier,

[0196] The first phase shift circuit is a phase shift circuit that delays the input signal by 90°.

[0197] <7>

[0198] according to <5> or <6> The amplifier circuit, wherein:

[0199] The power combiner is a transformer having a first coil and a second coil,

[0200] One end of the first coil and one end of the second coil are connected to the first terminal,

[0201] The other end of the first coil is connected to the second terminal,

[0202] The other end of the second coil is connected to the third terminal.

[0203] <8>

[0204] An amplifier circuit comprising:

[0205] Input terminals and output terminals;

[0206] Carrier amplifier and peak amplifier;

[0207] a first phase shift circuit;

[0208] a power combiner that combines high-frequency signals input to a first terminal and a second terminal of the power combiner and outputs the combined signals from a third terminal of the power combiner; and

[0209] an impedance element, which is a resistor or a capacitor,

[0210] The carrier amplifier is connected between the input terminal and the first terminal.

[0211] The peak amplifier is connected between the input terminal and one end of the first phase shift circuit.

[0212] The other end of the first phase shift circuit is connected to the second terminal,

[0213] The output terminal is connected to the third terminal,

[0214] One end of the impedance element is connected to the second terminal,

[0215] The other end of the impedance element is connected to the first terminal.

[0216] <9>

[0217] according to <8> The amplifier circuit, wherein:

[0218] The carrier amplifier and the peak amplifier are each an inverting amplifier,

[0219] The first phase shift circuit is a phase shift circuit that delays the input signal by 90°.

[0220] <10>

[0221] according to <8> or <9> The amplifier circuit, wherein:

[0222] The power combiner is a transformer having a first coil and a second coil,

[0223] One end of the first coil and one end of the second coil are connected to the first terminal,

[0224] The other end of the first coil is connected to the second terminal,

[0225] The other end of the second coil is connected to the third terminal.

[0226] <11>

[0227] according to <1> to <10> The amplifier circuit according to any one of the preceding claims further comprises:

[0228] a power divider connected between the input terminal and the input end of the carrier amplifier and the input end of the peak amplifier; and

[0229] The second phase shift circuit is connected between the input terminal and the input end of the peak amplifier.

[0230] <12>

[0231] according to <11> The amplifier circuit, wherein:

[0232] The second phase shift circuit is a phase shift circuit that delays the input signal by 90°.

[0233] Industrial Applicability

[0234] The present invention can be widely used in communication devices such as mobile phones as an amplifier circuit arranged in a front end portion supporting multiple frequency bands.

[0235] Description of Reference Numerals

[0236] 1: high frequency circuit; 2: antenna; 3: RF signal processing circuit (RFIC); 4: communication device; 10, 10A, 10B, 10C, 10D, 500: amplifier circuit; 11: carrier amplifier; 21: peak amplifier; 31: low noise amplifier; 41, 42, 43: phase shift line; 50: distributor; 61, 62: filter; 70, 73, 74, 75: resistor element; 71, 76: capacitor; 72: inductor; 80, 81: transformer; 100: antenna connection terminal; 110, 130: signal output terminal; 120: signal input terminal; 801, 802, 811, 812: coil.

Claims

1. An amplifier circuit comprising: Input terminals and output terminals; Carrier amplifier and peak amplifier; a first phase shift circuit; a power combiner that combines high-frequency signals input to a first terminal and a second terminal of the power combiner and outputs the combined signals from a third terminal of the power combiner; and an impedance element, which is a resistor or a capacitor, in, The carrier amplifier is connected between the input terminal and the first terminal. The peak amplifier is connected between the input terminal and one end of the first phase shift circuit. The other end of the first phase shift circuit is connected to the second terminal, The output terminal is connected to the third terminal, One end of the impedance element is connected to the second terminal, The other end of the impedance element is connected to the output terminal.

2. The amplifier circuit according to claim 1, wherein: The carrier amplifier and the peak amplifier are each an inverting amplifier, The first phase shift circuit is a phase shift circuit that delays the input signal by 90°.

3. The amplifier circuit according to claim 1 or 2, wherein: The power combiner is a transformer having a first coil and a second coil, One end of the first coil is connected to the first terminal, The other end of the first coil is connected to the second terminal, One end of the second coil is connected to the third terminal, The other end of the second coil is connected to the ground.

4. The amplifier circuit according to claim 1 or 2, wherein: The power combiner is a transformer having a first coil and a second coil, One end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal.

5. An amplifier circuit comprising: Input terminals and output terminals; Carrier amplifier and peak amplifier; a first phase shift circuit; a power combiner that combines high-frequency signals input to a first terminal and a second terminal of the power combiner and outputs the combined signals from a third terminal of the power combiner; and an impedance element, which is a resistor or a capacitor, in, The carrier amplifier is connected between the input terminal and the first terminal. The peak amplifier is connected between the input terminal and one end of the first phase shift circuit. The other end of the first phase shift circuit is connected to the second terminal, The output terminal is connected to the third terminal, One end of the impedance element is connected to the first terminal, The other end of the impedance element is connected to the output terminal.

6. The amplifier circuit according to claim 5, wherein: The carrier amplifier and the peak amplifier are each an inverting amplifier, The first phase shift circuit is a phase shift circuit that delays the input signal by 90°.

7. The amplifier circuit according to claim 5 or 6, wherein: The power combiner is a transformer having a first coil and a second coil, One end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal.

8. An amplifier circuit comprising: Input terminals and output terminals; Carrier amplifier and peak amplifier; a first phase shift circuit; a power combiner that combines high-frequency signals input to a first terminal and a second terminal of the power combiner and outputs the combined signals from a third terminal of the power combiner; and an impedance element, which is a resistor or a capacitor, in, The carrier amplifier is connected between the input terminal and the first terminal. The peak amplifier is connected between the input terminal and one end of the first phase shift circuit. The other end of the first phase shift circuit is connected to the second terminal, The output terminal is connected to the third terminal, One end of the impedance element is connected to the second terminal, The other end of the impedance element is connected to the first terminal.

9. The amplifier circuit according to claim 8, wherein: The carrier amplifier and the peak amplifier are each an inverting amplifier, The first phase shift circuit is a phase shift circuit that delays the input signal by 90°.

10. The amplifier circuit according to claim 8 or 9, wherein: The power combiner is a transformer having a first coil and a second coil, One end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal.

11. The amplifier circuit according to any one of claims 1 to 10, further comprising: a power divider connected between the input terminal and the input end of the carrier amplifier and the input end of the peak amplifier; and The second phase shift circuit is connected between the input terminal and the input end of the peak amplifier.

12. The amplifier circuit according to claim 11, wherein: The second phase shift circuit is a phase shift circuit that delays the input signal by 90°.

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