Semiconductor device including memory cell having selector

Abstract

The invention relates to a semiconductor device including a memory cell having a selector. A semiconductor device includes a plurality of memory cells. Each memory cell includes: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; and a selector layer interposed between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer including an insulating material layer doped with a dopant, in which at least one of the first electrode layer and the second electrode layer includes a first sub-electrode layer and a second sub-electrode layer, the second sub-electrode layer is interposed between the first sub-electrode layer and the selector layer, and the second sub-electrode layer includes a material having a work function greater than a work function of the first sub-electrode layer.

Description

[0001] Priority claims and cross-references to related applications

[0002] This patent document claims priority to Korean Patent Application No. 10-2023-0084254, filed on June 29, 2023, which is incorporated herein by reference in its entirety. Technical Field

[0003] The present patent document relates to semiconductor technology, and in particular, to a semiconductor device including a memory cell having a selector. Background Art

[0004] Recently, as electronic devices tend toward miniaturization, low power consumption, high performance, multi-functions, etc., semiconductor devices capable of storing information in various electronic devices such as computers, portable communication devices, etc. have been required in the art, and research has been conducted on semiconductor devices. Such semiconductor devices include semiconductor devices that can store data using characteristics of switching between different resistance states according to applied voltage or current, for example, RRAM (resistive random access memory), PRAM (phase change random access memory), FRAM (ferroelectric random access memory), MRAM (magnetic random access memory), electric fuses (E-fuse), etc. Summary of the invention

[0005] In one embodiment, a semiconductor device may include a plurality of memory cells. Each memory cell may include: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; a selector layer inserted between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer including an insulating material layer doped with a dopant, wherein at least one of the first electrode layer and the second electrode layer includes a first sub-electrode layer and a second sub-electrode layer, the second sub-electrode layer is inserted between the first sub-electrode layer and the selector layer, and the second sub-electrode layer includes a material having a work function greater than a work function of the first sub-electrode layer.

[0006] In another embodiment, a semiconductor device may include a plurality of memory cells. Each memory cell may include: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; a selector layer inserted between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer including an insulating material layer doped with a dopant; a material layer located at at least one of a first position or a second position, the first position being between the first electrode layer and the selector layer, the second position being between the second electrode layer and the selector layer, and the material layer having a band gap smaller than a band gap of the insulating material layer.

[0007] In another embodiment, a semiconductor device may include a plurality of memory cells. Each memory cell may include: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; and a selector layer inserted between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer including an insulating material layer doped with a dopant, wherein at least one of the first electrode layer and the second electrode layer includes a first sub-electrode layer and a second sub-electrode layer, the second sub-electrode layer is inserted between the first sub-electrode layer and the selector layer, and at least one of a density, a mass of a constituent element, or a size of the constituent element of the second sub-electrode layer is greater than a density, a mass of a constituent element, or a size of the constituent element of the first sub-electrode layer, respectively. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a perspective view illustrating a semiconductor device according to an embodiment of the present disclosure.

[0009] Figure 2 It is shown Figure 1 A cross-sectional view of one example of a selector portion of a memory cell of a semiconductor device.

[0010] Figure 3A is an energy band diagram illustrating the operation of the selector portion of the comparative example.

[0011] Figure 3B is an energy band diagram illustrating the operation of the selector portion of the present embodiment.

[0012] Figure 4A and Figure 4B is a diagram used to form Figure 2 A cross-sectional view of the methods in the selector section.

[0013] Figure 5 : is a diagram showing the effective thickness and leakage current characteristics of the selector portion in the present embodiment and the comparative example.

[0014] Figure 6 : is a diagram showing the sheet resistance of the electrode of the selector portion and the sheet resistance of the selector portion as a whole in the present embodiment and the comparative example.

[0015] Figure 7 : is a view showing the roughness of the selector portion in the present embodiment and the comparative example.

[0016] Figure 8 It is a graphic Figure 1 FIG. 1 is a cross-sectional view of another example of a selector portion of a memory cell of a semiconductor device.

[0017] Fig. 9 It is a graphic Figure 1 FIG. 1 is a cross-sectional view of another example of a selector portion of a memory cell of a semiconductor device.

[0018] Fig.10 is a cross-sectional view illustrating a selector portion according to another embodiment of the present disclosure.

[0019] Fig.11 It is a graphic Fig.10 Band diagram of the operation of the selector part.

[0020] Fig.12 is a cross-sectional view illustrating a selector portion according to another embodiment of the present disclosure.

[0021] Fig.13 It is a graphic Fig.12 Band diagram of the operation of the selector part. DETAILED DESCRIPTION

[0022] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0023] The drawings are not necessarily drawn to scale. In some instances, the proportions of at least some structures in the drawings may have been exaggerated in order to clearly illustrate certain features of the described embodiments. When a specific example is presented in a drawing or description with two or more layers in a multilayer structure, the relative positioning relationship of such layers as shown or the order in which the layers are arranged reflect the specific implementation of the described or illustrated example, and different relative positioning relationships or the order in which the layers are arranged may be possible. In addition, the described or illustrated examples of multilayer structures may not reflect all layers present in the particular multilayer structure (for example, one or more additional layers may be present between two illustrated layers). As a specific example, when the first layer in the described or illustrated multilayer structure is referred to as being "on" or "above" the second layer or "on" or "above" the substrate, the first layer may be formed directly on the second layer or substrate, but may also represent a structure in which one or more other intermediate layers may be present between the first layer and the second layer or substrate.

[0024] Figure 1 is a perspective view illustrating a semiconductor device according to one example for implementing one embodiment of the present disclosure.

[0025] refer to Figure 1The semiconductor device of this embodiment may include: a substrate 100; a plurality of first conductive lines 110, which are arranged above the substrate 100 and extend in a first direction to be parallel to each other; a plurality of second conductive lines 170, which are arranged above the first conductive lines 110 and extend in a second direction intersecting the first direction to be parallel to each other; and a plurality of memory cells MC, which are respectively inserted between the first conductive lines 110 and the second conductive lines 170 and overlap with the intersection area of ​​the first conductive lines 110 and the second conductive lines 170.

[0026] The substrate 100 may include a semiconductor material such as silicon. In addition, the substrate 100 may include any desired substructures (not shown). As an example, the substrate 100 may include an integrated circuit for driving the first conductive line 110 and / or the second conductive line 170 .

[0027] The first conductive line 110 and the second conductive line 170 may be connected to both ends of the memory cell MC, respectively. One of the first conductive line 110 and the second conductive line 170 may be used as a word line, and the other may be used as a bit line. Each of the first conductive line 110 and the second conductive line 170 may include at least one of various conductive materials, such as metals such as platinum (Pt), tungsten (W), aluminum (Al), copper (Cu), tantalum (Ta), or titanium (Ti), metal nitrides such as titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN), or a combination thereof, and may have a single-layer structure or a multi-layer structure.

[0028] The memory cell MC may have a columnar shape so as to overlap the intersection region between the first conductive line 110 and the second conductive line 170. In one example, the memory cell MC may have a square columnar shape in which both side walls in the first direction are aligned with both side walls of the second conductive line 170, and both side walls in the second direction are aligned with both side walls of the first conductive line 110. However, the present disclosure is not limited thereto, and the planar shape of the memory cell MC may be variously modified, such as a circular shape, an elliptical shape, a polygonal shape, or other shapes, as long as the memory cell MC overlaps the intersection region between the first conductive line 110 and the second conductive line 170.

[0029] The memory cell MC may include a first electrode layer 120, a selector layer 130, a second electrode layer 140, a memory layer 150, and a third electrode layer 160. The first electrode layer 120, the selector layer 130, and the second electrode layer 140 may form a selector portion SP, and the second electrode layer 140, the memory layer 150, and the third electrode layer 160 may form a memory portion MP. The selector portion SP and the memory portion MP may share the second electrode layer 140. Therefore, the second electrode layer 140 forms a memory portion together with the memory layer 150 and the third electrode layer 160. At the same time, the second electrode layer 140 forms a selector portion SP together with the first electrode layer 120 and the selector layer 130.

[0030] The first electrode layer 120 and the third electrode layer 160 may be located at the bottom and the top of the memory cell MC, respectively, and may be used as a path for transmitting voltage or current. The second electrode layer 140 may physically separate the selector layer 130 and the memory layer 150, but electrically connect the selector layer 130 and the memory layer 150, thereby serving as a path for transmitting voltage or current between the selector layer 130 and the memory layer 150. Each of the first electrode layer 120, the second electrode layer 140, and the third electrode layer 160 may independently include at least one of various conductive materials, for example: metals such as platinum (Pt), tungsten (W), aluminum (Al), copper (Cu), tantalum (Ta), or titanium (Ti), metal nitrides such as titanium nitride (TiN), tantalum nitride (TaN), or tungsten nitride (WN), carbon, or a combination thereof. In particular, as will be described later with reference to Figure 2 As described in the example in , the first electrode layer 120 may include a double-layer structure in which the first sub-electrode layer 121 and the second sub-electrode layer 123 are stacked.

[0031] The memory layer 150 may be used to store data in various ways. As an example, the memory layer 150 may include a variable resistance layer that stores different data by switching between different resistance states depending on a voltage or current supplied through its top and bottom. The variable resistance layer may include at least one of various materials used in RRAM, PRAM, FRAM, MRAM, etc., such as metal oxides as transition metal oxides or perovskite-based materials, phase change materials such as chalcogenide-based materials, ferroelectric materials, or ferromagnetic materials, and may have a single-layer structure or a multi-layer structure.

[0032] The selector layer 130 can control access to the memory layer 150, and can prevent and / or reduce current leakage that may occur between memory cells MC that share the first conductive line 110 or the second conductive line 170. For this purpose, the selector layer 130 can have a threshold switching characteristic. Therefore, when the amplitude of the voltage supplied to the top and bottom thereof is less than a predetermined threshold voltage, the selector layer 130 can block the current or make the current hardly flow, and when the amplitude of the voltage supplied to the top and bottom thereof is higher than the threshold voltage, the selector layer 130 can allow the current to flow quickly. Therefore, the selector layer 130 can be turned on at a voltage equal to or higher than the threshold voltage, and can be turned off at a voltage lower than the threshold voltage.

[0033] The selector layer 130 may include a diode, an OTS (Operational Threshold Switching) material such as a chalcogenide-based material, an MIEC (Mixed Ion Electronic Conductivity) material such as a metal-containing chalcogenide-based material, a NbO 2 or VO 2 MIT (Metal Insulator Transition) materials or SiO 2 or Al 2 O 3 A tunneling insulating material with a relatively wide band gap.

[0034] In some embodiments, the selector layer 130 may include an insulating material layer doped with a dopant. Here, the insulating material layer may include a silicon-containing insulating material (such as silicon oxide, silicon nitride, or silicon oxynitride), an insulating metal oxide, an insulating metal nitride, or a combination thereof. Deep traps may exist within the insulating material layer, and the deep traps have an energy level closer to the energy level of the valence band than the energy level of the conduction band of the insulating material layer. Dopants may be used to generate shallow traps that provide paths for the movement of conductive carriers such as electrons or holes within the insulating material layer. Shallow traps may have an energy level that is smaller than the work function of either the first electrode layer 120 or the second electrode layer 140 and closer to the energy level of the conduction band than the energy level of the valence band of the insulating material layer. In one example, when the insulating material layer includes silicon, the dopant may include a metal having a different valence from silicon, such as gallium (Ga), boron (B), indium (In), phosphorus (P), arsenic (As), antimony (Sb), germanium (Ge), carbon (C), tungsten (W), or a combination thereof. Alternatively, when the insulating material layer includes a metal, the dopant may include another metal or silicon having a different valence from the metal. In one example, the selector layer 130 may include arsenic (As)-doped silicon oxide, such as arsenic (As)-doped silicon dioxide (SiO 2). When a voltage higher than the threshold voltage is applied to the selector layer 130, carriers trapped in the deep traps may jump to shallow traps by thermal emission or tunneling, and then, the carriers may move through the shallow traps, thereby generating a conductive path connecting the first electrode layer 120 and the second electrode layer 140. Therefore, an on-state in which current flows through the selector layer 130 may be achieved. On the other hand, when no voltage is applied to the selector layer 130 or a voltage less than the threshold voltage is applied to the selector layer 130, a phenomenon in which carriers jump to shallow traps may be reduced or prevented, and the conductive path may be disconnected. Therefore, an off-state in which no current flows through the selector layer 130 may be achieved.

[0035] In the present embodiment, the memory cell MC includes a stacked structure of a first electrode layer 120, a selector layer 130, a second electrode layer 140, a memory layer 150, and a third electrode layer 160, but the present disclosure is not limited thereto, and the layer structure of the memory cell MC may be modified in various ways. For example, at least one of the first electrode layer 120, the second electrode layer 140, and the third electrode layer 160 may be omitted. In one example, the upper and lower positions of the selector layer 130 and the memory layer 150 may be reversed with each other. In one example, the memory cell MC may further include one or more layers (not shown) to improve the characteristics of the semiconductor device or facilitate the manufacturing process.

[0036] In a semiconductor device, various embodiments may be applied to improve the characteristics of the selector layer 130. For example, in order to improve the characteristics of the selector layer 130, various embodiments may be suggested regarding the material, structure, or other properties of the first electrode layer 120 and / or the second electrode layer 140 that are in contact with and / or connected to the selector layer 130. Figure 2 Detailed description is given in FIG.

[0037] Figure 2 It is shown Figure 1 A cross-sectional view of one example of a selector portion of a memory cell of a semiconductor device.

[0038] refer to Figure 2 In the present embodiment, the first electrode layer 120 may include a stacked structure of a first sub-electrode layer 121 and a second sub-electrode layer 123. The second sub-electrode layer 123 may be inserted between the first sub-electrode layer 121 and the selector layer 130, and thus, the second sub-electrode layer 123 may be positioned closer to the selector layer 130 than the first sub-electrode layer 121.

[0039] The second sub-electrode layer 123 may include a material having a work function greater than that of the first sub-electrode layer 121. As an example, the first sub-electrode layer 121 may include titanium nitride (TiN) having a work function of approximately 4.5 eV, and the second sub-electrode layer 123 may include molybdenum (Mo), molybdenum nitride (MoN), molybdenum oxide (MoO), or a combination thereof having a work function of approximately 5.0 eV. In this case, the amount of carriers moving from the first electrode layer 120 to the selector layer 130 may increase, and thus the density of carriers in the selector layer 130 may increase. As a result, the selector layer 130 may become easier to turn on. Therefore, the magnitude of the threshold voltage of the selector layer 130 required to turn on the selector layer may be reduced. In some embodiments, the speed of the turn-on operation of the selector layer 130 may be increased. By way of example, this will refer to Figure 3A and Figure 3B to describe.

[0040] Figure 3A is one example of an energy band diagram illustrating the operation of the selector portion of the comparative example, and Figure 3B is a diagram illustrating the selector portion of this embodiment (for example, Figure 2 The selector portion of the comparative example may include a first electrode layer 12, a second electrode layer 14, and a selector layer 13 therebetween. Here, the first electrode layer 12 may have a Figure 2 The second electrode layer 14 and the selector layer 13 may be formed of the same material as the first sub-electrode layer 121 (eg, titanium nitride). Figure 2 The second electrode layer 140 and the selector layer 130 are substantially the same. The selector layer 13 and the selector layer 130 may include an insulating material layer doped with a dopant, such as arsenic-doped silicon dioxide.

[0041] refer to Figure 3A When a voltage is applied to the selector layer 13 through the first electrode layer 12 and the second electrode layer 14, carriers C such as electrons or holes may be injected from the first electrode layer 12 to the selector layer 13 and may be trapped in the deep traps T 1 When the voltage applied to the selector layer 13 is greater than the threshold voltage, the deep trap T 1 The carriers C in the trap can jump to the shallow trap T 2 , and through the shallow trap T 2 The first electrode layer 12 and the second electrode layer 14 are moved to form a conductive path in the selector layer 13 that connects the first electrode layer 12 and the second electrode layer 14 .

[0042] Similarly, refer to Figure 3BWhen a voltage is applied to the selector layer 130 through the first electrode layer 120 and the second electrode layer 140, carriers C may be injected from the first electrode layer 120 to the selector layer 130 and may be trapped in the deep traps T 1 When the voltage applied to the selector layer 130 is greater than the threshold voltage, the deep trap T 1 The carriers C in the 2 , and through the shallow trap T 2 Move, forming a conductive path connecting the first electrode layer 120 and the second electrode layer 140 in the selector layer 130.

[0043] In the comparative example, the carriers C may be injected by directly exceeding the difference between the Fermi level Ef of the first electrode layer 12 and the valence band Ev of the insulating material layer forming the selector layer 13. On the other hand, in the present embodiment, since the work function of the second sub-electrode layer 123 is greater than the work function of the first sub-electrode layer 121, the Fermi level Ef of the second sub-electrode layer 123 may move further toward the valence band Ev of the insulating material layer forming the selector layer 130 compared to the first sub-electrode layer 121. Therefore, in the present embodiment, the carriers C may be injected by gradually exceeding the difference in the Fermi level Ef between the first sub-electrode layer 121 and the second sub-electrode layer 123, and the difference between the Fermi level Ef of the second sub-electrode layer 123 and the valence band Ev of the insulating material layer forming the selector layer 130. In this case, the movement of the carriers C from the first electrode layer 120 to the selector layer 130 may be easier than in the comparative example, and thus be captured in the deep traps T of the selector layer 130. 1 The density of carriers C in the selector layer 130 can be increased. As a result, compared with the comparative example, the carriers C are removed from the deep traps T of the selector layer 130. 1 To shallow trap T 2 The movement of can become easier, so the threshold voltage for turning on the selector layer 130 can be reduced, or the turning-on operation speed of the selector layer 130 can be increased.

[0044] Return to reference Figure 2 , the density of the second sub-electrode layer 123 may be greater than the density of the first sub-electrode layer 121. In this case, the phenomenon of degradation of the characteristics of the selector layer 130 due to diffusion of dopants in the selector layer 130 to the outside may be reduced and / or prevented. In addition, the mass and / or size of at least one of the constituent elements of the second sub-electrode layer 123 may be greater than the mass and / or size of at least one of the constituent elements of the first sub-electrode layer 121. In this case, in the process of implanting dopant ions into the insulating material layer to form the selector layer 130 (see the process described later in this patent document), Figure 4A), the dopant may be uniformly distributed within the insulating material layer, thereby improving the characteristics of the selector layer 130. This may be because during the ion implantation process, the dopant cannot penetrate the second sub-electrode layer 123 having a constituent element of relatively large mass and / or size, and is reflected from the second sub-electrode layer 123. If the second sub-electrode layer 123 is omitted, during the ion implantation process, the dopant may penetrate into the first sub-electrode layer 121 having a constituent element of relatively small mass and / or size, and thus the dopant within the insulating material layer may be unevenly distributed. When the first sub-electrode layer 121 includes titanium nitride and the second sub-electrode layer 123 includes molybdenum, these conditions that the density of the second sub-electrode layer 123, the mass of the constituent element, and the size of the constituent element are greater than the density, the mass of the constituent element, and the size of the constituent element of the first sub-electrode layer 121 may be satisfied. However, the present disclosure is not limited to this, and the above advantages can be obtained when at least one of the density, mass of the constituent elements and the size of the constituent elements of the second sub-electrode layer 123 is greater than at least one of the density, mass of the constituent elements and the size of the constituent elements of the first sub-electrode layer 121.

[0045] The first thickness T1 of the first sub-electrode layer 121 and the second thickness T2 of the second sub-electrode layer 123 may be substantially the same as each other. For example, the first thickness T1 may have a value ranging from 90% to 110% of the second thickness T2.

[0046] As discussed above, when the first electrode layer 120 includes a stacked structure of the first sub-electrode layer 121 and the second sub-electrode layer 123 and the work function of the second sub-electrode layer 123 is greater than the work function of the first sub-electrode layer 121, carrier injection into the selector layer 130 may be facilitated. In addition, when the first electrode layer 120 includes a stacked structure of the first sub-electrode layer 121 and the second sub-electrode layer 123 and at least one of the density, mass of the constituent elements, and size of the constituent elements of the second sub-electrode layer 123 is greater than at least one of the density, mass of the constituent elements, and size of the constituent elements of the first sub-electrode layer 121, sufficient dopants may be uniformly present in the selector layer 130, and thus the characteristics of the selector layer 130 may be improved.

[0047] Figure 4A and Figure 4B is a diagram used to form Figure 2 A cross-sectional view of an example of a selector portion of a method.

[0048] refer to Figure 4A , the first sub-electrode layer 121 may be formed over a lower structure (not shown). The first sub-electrode layer 121 may be formed using at least one of various deposition methods. In one example, the first sub-electrode layer 121 may include titanium nitride formed by a physical vapor deposition (PVD) method.

[0049] Subsequently, the second sub-electrode layer 123 may be formed over the first sub-electrode layer 121. At least one of various deposition methods may be used to form the second sub-electrode layer 123. For example, the second sub-electrode layer 123 may include molybdenum formed by an atomic layer deposition (ALD) method.

[0050] The second sub-electrode layer 123 may have substantially the same thickness as the first sub-electrode layer 121 .

[0051] Subsequently, an insulating material layer 131 may be formed over the second sub-electrode layer 123. As described above, the insulating material layer 131 may include a silicon-containing insulating material (such as silicon oxide, silicon nitride, or silicon oxynitride), an insulating metal oxide, an insulating metal nitride, or a combination thereof, and may be deposited in various ways. In one example, the insulating material layer 131 may include silicon dioxide.

[0052] Subsequently, by performing ion implantation (see arrows) toward the insulating material layer 131, the dopant 133 may be doped into the insulating material layer 131. Figure 4B The results are shown in .

[0053] refer to Figure 4B , the selector layer 130 may be formed by doping the insulating material layer 131 with a dopant 133. As described above, the dopant 133 may include an element having a different valence from the constituent elements of the insulating material layer 131, and may form a shallow trap in the insulating material layer 131. For example, the dopant 133 may include gallium (Ga) and boron (B), indium (In), phosphorus (P), arsenic (As), antimony (Sb), germanium (Ge), carbon (C), tungsten (W), or silicon (Si). Figure 4A During the ion implantation process, the dopant 133 cannot penetrate the second sub-electrode layer 123 having a large density, mass of constituent elements, and large size of constituent elements, so a sufficient amount of the dopant 133 can exist in the selector layer 130 and the dopant 133 can be uniformly distributed.

[0054] Subsequently, although not shown, a selector portion may be formed by forming a second electrode layer over the selector layer 130 .

[0055] Figure 5 : is a diagram showing the effective thickness and leakage current characteristics of the selector portion in one example and a comparative example for realizing the present embodiment. More specifically, Figure 5The first case (see ①) may correspond to the present embodiment, and shows the effective thickness Eot (effective oxide thickness) and the leakage current characteristic NI when the selector layer is formed by forming arsenic-doped silicon dioxide above the stacked structure of the TiN electrode layer and the Mo electrode layer. The second case (see ②) is a comparative example among the comparative examples, and shows the effective thickness Eot and the leakage current characteristic NI when the selector layer is formed by forming arsenic-doped silicon dioxide above the TiN electrode layer. The third case (see ③) is another comparative example among the comparative examples, and shows the effective thickness Eot and the leakage current characteristic NI when the selector layer is formed by forming arsenic-doped silicon dioxide above the Mo electrode layer.

[0056] refer to Figure 5 , it can be seen that the effective thickness of the selector part in the first case is greater than that in the second and third cases, and therefore, the leakage current of the selector part in the first case is less than that in the second and third cases. Therefore, according to the present embodiment, the threshold voltage can be lowered and the operating speed of the selector part can be increased while reducing the leakage current.

[0057] Figure 6 1 is a diagram showing an example of the sheet resistance of the electrode of the selector portion and the sheet resistance of the selector portion as a whole in the present embodiment and the comparative example. Figure 6 In the first case (see ①), the second case (see ②) and the third case (see ③) Figure 5 The same as those described in .

[0058] refer to Figure 6 , it can be seen that the sheet resistance Rs of the electrode of the selector part or the selector part in the first case is smaller than the sheet resistance Rs in the second case and the third case. Therefore, according to the present embodiment, the sheet resistance Rs of the selector part can be reduced, and therefore, the threshold voltage can be reduced and the operation speed of the selector part can be increased.

[0059] Figure 7 is a view showing the roughness of the selector portion in one exemplary implementation of the present embodiment and a comparative example. Figure 7 In the first case (see ①), the second case (see ②) and the third case (see ③) Figure 5 The same as those described in .

[0060] refer to Figure 7 , it can be seen that there is no significant difference in the roughness between the first case, the second case, and the third case. Therefore, even according to this embodiment, the roughness does not deteriorate.

[0061] Figure 8 It is a graphic Figure 1 1 is a cross-sectional view of another example of a selector portion of a memory cell of a semiconductor device of the present invention. The description will focus on the differences from the above-described embodiment.

[0062] refer to Figure 8 In the present embodiment, not only the first electrode layer 120 but also the second electrode layer 140 may have a double-layer structure. Therefore, the second electrode layer 140 may include a stacked structure of a third sub-electrode layer 141 and a fourth sub-electrode layer 143. The third sub-electrode layer 141 may be inserted between the fourth sub-electrode layer 143 and the selector layer 130, and therefore, the third sub-electrode layer 141 may be positioned closer to the selector layer 130 than the fourth sub-electrode layer 143.

[0063] The third sub-electrode layer 141 may include substantially the same material as the second sub-electrode layer 123, and the fourth sub-electrode layer 143 may include substantially the same material as the first sub-electrode layer 121. For example, the third sub-electrode layer 141 may include molybdenum, and the fourth sub-electrode layer 143 may include titanium nitride. Therefore, the work function, density, mass of constituent elements, and / or size of constituent elements of the third sub-electrode layer 141 may be greater than the work function, density, mass of constituent elements, and / or size of constituent elements of the fourth sub-electrode layer 143, respectively. In this case, diffusion of dopants in the selector layer 130 to the outside may be further prevented and / or reduced.

[0064] In some embodiments, the third sub-electrode layer 141 may have substantially the same thickness as the second sub-electrode layer 123, and the fourth sub-electrode layer 143 may have substantially the same thickness as the first sub-electrode layer 121. Therefore, the first and second sub-electrode layers 121 and 123 and the third and fourth sub-electrode layers 141 and 143 may be symmetrical to each other with the selector layer 130 interposed therebetween.

[0065] Fig. 9 It is a graphic Figure 1 1 is a cross-sectional view of another example of a selector portion of a memory cell of a semiconductor device of the present invention. The description will focus on the differences from the above-described embodiment.

[0066] refer to Fig. 9 In this embodiment, the adhesive layer 125 may be interposed between the first electrode layer 120 and the selector layer 130 .

[0067] The adhesive layer 125 may be used to improve the adhesion characteristics between the first electrode layer 120 (particularly the second sub-electrode layer 123) and the selector layer 130. The adhesive layer 125 may include at least one of various materials containing non-conductive elements, such as SiB, SiCN, SiO 2 , SiN, SiBN or a combination thereof. When the adhesive layer 125 includes a non-conductive element, even if the constituent elements of the adhesive layer 125 are present in the selector layer 130 formed by the ion implantation process, the constituent elements of the adhesive layer 125 may not participate in the operation of the selector layer 130. In one example, the adhesive layer 125 may include silicon nitride (SiN). The thickness T3 of the adhesive layer 125 may be less than the thickness T1 of the first sub-electrode layer 121 and / or the thickness T3 of the second sub-electrode layer 123.

[0068] In addition, although not shown, an adhesive layer may be further interposed between the second electrode layer 140 and the selector layer 130 .

[0069] In the above embodiment, the electrode layer connected to the selector layer is formed to have a double layer having different work functions to increase the amount of carriers injected into the selector layer, but the present disclosure is not limited thereto. By inserting a material layer having a smaller band gap than the insulating material layer forming the selector layer between the selector layer and the electrode layer, the amount of carriers injected into the selector layer can be increased. This will be referred to below. Figures 10 to 13 Explain exemplarily.

[0070] Fig.10 is a cross-sectional view illustrating a selector portion according to an example for implementing another embodiment of the present disclosure.

[0071] refer to Fig.10 The selector portion of this embodiment may include a first electrode layer 220 , a selector layer 230 , a second electrode layer 240 , and a material layer 225 inserted between the selector layer 230 and the first electrode layer 220 .

[0072] and Figure 2 Unlike the above-mentioned embodiments, the first electrode layer 220 may have a single-layer structure. For example, the first electrode layer 220 may include titanium nitride. The first electrode layer 220 may be formed of the same material and / or the same thickness as the second electrode layer 240, or include the same material and / or the same thickness as the second electrode layer 240. The second electrode layer 240 and the selector layer 230 may be connected to Figure 2 The second electrode layer 140 and the selector layer 130 of the embodiment of FIG. 1 are substantially the same.

[0073] The material layer 225 may include any material having a band gap smaller than the band gap of the insulating material layer forming the selector layer 230. As an example, when the insulating material layer forming the selector layer 230 is silicon dioxide, the material layer 225 may include an insulating material or a semiconductor material having a band gap smaller than that of silicon dioxide, for example, Ta. 2 O 5 、ZrO 2 , HfO 2 , Y 2 O 3 、SiN、SrTiO 3 Or other materials. In addition, the material layer 225 may have a thickness thinner than the thickness of the first electrode layer 220, the second electrode layer 240, and the selector layer 230. Although not shown, the material layer 225 may be further inserted between the second electrode layer 240 and the selector layer 230. In this case, the amount of carriers moving from the first electrode layer 220 to the selector layer 230 may increase, and thus the density of carriers in the selector layer 230 may increase. As a result, the selector layer 230 may be more easily turned on. By way of example, this will refer to Fig.11 to describe.

[0074] Fig.11 It is a graphic Fig.10 Band diagram of the operation of the selector part.

[0075] refer to Fig.11 When a voltage is applied to the selector layer 230 through the first electrode layer 220 and the second electrode layer 240, carriers C may be injected from the first electrode layer 220 into the selector layer 230 to be captured in the deep traps T 1 When the voltage applied to the selector layer 230 is greater than the threshold voltage, the deep trap T 1 The carriers C in the 2 , and can be achieved through the shallow trap T 2 The first electrode layer 220 and the second electrode layer 240 are moved, thereby forming a conductive path in the selector layer 230 connecting the first electrode layer 220 and the second electrode layer 240 .

[0076] Here, the band gap of the material layer 225 may be smaller than the band gap of the insulating material layer forming the selector layer 230, and thus the energy of the valence band of the material layer 225 may be greater than the energy of the valence band of the insulating material layer forming the selector layer 230. Therefore, the carriers C may be injected into the selector layer by gradually exceeding the difference between the Fermi level Ef of the first electrode layer 220 and the valence band of the material layer 225, and the difference between the valence band of the material layer 225 and the valence band of the insulating material layer forming the selector layer 230. In this case, compared with the case where the material layer 225 is omitted, the movement of the carriers C from the first electrode layer 220 to the selector layer 230 becomes easier, and therefore, the carriers C are trapped in the deep traps T 1 The density of carriers C in the deep trap T can be increased. As a result, compared with the case where the material layer 225 is omitted, the carriers C are removed from the deep trap T 1 To shallow trap T 2 The movement of can become easier, and thus, the threshold voltage for turning on the selector layer 230 can be reduced, and the turning-on operation speed of the selector layer 230 can be increased.

[0077] Fig.12 is a cross-sectional view illustrating a selector portion according to an example for implementing another embodiment of the present disclosure.

[0078] refer to Fig.12 The selector portion of this embodiment may include a first electrode layer 220, a selector layer 230, a second electrode layer 240, and a material layer 225 inserted between the selector layer 230 and the first electrode layer 220. Here, the first electrode layer 220 may include a stacked structure of a first sub-electrode layer 221 and a second sub-electrode layer 223, which is substantially the same as Figure 2 In this case, the amount of carriers moving from the first electrode layer 220 to the selector layer 230 can be increased, and thus the density of carriers in the selector layer 230 can be increased. As a result, the selector layer 230 can be turned on more easily. By way of example, this will refer to Fig.13 Here, the material layer 225 may have a thickness thinner than that of the first sub-electrode layer 221 and the second sub-electrode layer 223 .

[0079] Fig.13 It is a graphic Fig.12 An example of a band diagram of the operation of the selector portion.

[0080] refer to Fig.13 When a voltage is applied to the selector layer 230 through the first electrode layer 220 and the second electrode layer 240, carriers C may be injected from the first electrode layer 220 into the selector layer 230 to be captured in the deep traps T 1When the voltage applied to the selector layer 230 is greater than the threshold voltage, the deep trap T 1 The carriers C in the 2 , and can be achieved through the shallow trap T 2 The first electrode layer 220 and the second electrode layer 240 are moved to form a conductive path in the selector layer 230 connecting the first electrode layer 220 and the second electrode layer 240 .

[0081] Here, since the work function of the second sub-electrode layer 223 is greater than the work function of the first sub-electrode layer 221, the Fermi level Ef of the second sub-electrode layer 223 may be further moved toward the valence band Ev of the insulating material layer forming the selector layer 230 compared to the first sub-electrode layer 221. In addition, since the band gap of the material layer 225 is smaller than the band gap of the insulating material layer forming the selector layer 230, the energy of the valence band of the material layer 225 may be greater than the energy of the valence band of the insulating material layer forming the selector layer 230. Therefore, in the present embodiment, the carriers C may be injected by gradually exceeding the difference in the Fermi level Ef between the first sub-electrode layer 221 and the second sub-electrode layer 223, the difference between the Fermi level Ef of the second sub-electrode layer 223 and the valence band of the material layer 225, and the difference between the valence band of the material layer 225 and the valence band of the insulating material layer forming the selector layer 230. In this case, compared with the case where the material layer 225 and / or the second sub-electrode layer 223 are omitted, the carriers C can be more easily moved from the first electrode layer 220 to the selector layer 230, and thus be trapped in the deep traps T 1 As a result, compared with the case where the material layer 225 and / or the second sub-electrode layer 223 are omitted, the carriers C are moved from the deep trap T 1 To shallow trap T 2 The movement of can become easier, the threshold voltage for turning on the selector layer 230 can be reduced, and the turning-on operation speed of the selector layer 230 can be increased.

[0082] According to the above embodiments of the present disclosure, it may be possible to provide a semiconductor device capable of improving characteristics of a selector of a memory cell.

[0083] Although various embodiments have been described for illustrative purposes, it will be apparent to those skilled in the art that various changes and modifications may be made to the disclosed examples or embodiments and / or other embodiments based on what is described and / or illustrated in this patent document.

Claims

1. A semiconductor device comprising a plurality of memory cells for storing data, each memory cell of the plurality of memory cells comprising: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; a selector layer interposed between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer comprising an insulating material layer doped with a dopant, At least one of the first electrode layer and the second electrode layer includes a first sub-electrode layer and a second sub-electrode layer, the second sub-electrode layer is inserted between the first sub-electrode layer and the selector layer, and the second sub-electrode layer includes a material having a work function greater than that of the first sub-electrode layer.

2. A semiconductor device according to claim 1, wherein at least one of the density of the second sub-electrode layer, the mass of the constituent elements of the second sub-electrode layer, or the size of the constituent elements of the second sub-electrode layer is respectively greater than the density of the first sub-electrode layer, the mass of the constituent elements of the first sub-electrode layer, or the size of the constituent elements of the first sub-electrode layer.

3. The semiconductor device according to claim 1, wherein the first sub-electrode layer comprises titanium nitride, and The second sub-electrode layer includes molybdenum. 4 . The semiconductor device according to claim 1 , wherein a thickness of the first sub-electrode layer has a value of 90% to 110% of a thickness of the second sub-electrode layer.

5. The semiconductor device of claim 1 , wherein the dopant forms a shallow trap within the insulating material layer, the shallow trap having an energy level closer to a conduction band of the insulating material layer than a valence band of the insulating material layer, and A movement path for conductive carriers is formed by the shallow traps. 6 . The semiconductor device of claim 1 , wherein the selector layer comprises arsenic-doped silicon oxide.

7. The semiconductor device according to claim 1, further comprising: An adhesive layer is interposed between the second sub-electrode layer and the selector layer.

8. The semiconductor device according to claim 1, further comprising: A material layer is interposed between the second sub-electrode layer and the selector layer and has a band gap smaller than a band gap of the insulating material layer. 9 . The semiconductor device according to claim 8 , wherein a thickness of the material layer is smaller than a thickness of the first sub-electrode layer, a thickness of the second sub-electrode layer, or a thickness of the selector layer. 10 . The semiconductor device according to claim 8 , wherein the material layer comprises an insulating material or a semiconductor material.

11. A semiconductor device comprising a plurality of memory cells for storing data, each memory cell of the plurality of memory cells comprising: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; a selector layer interposed between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer comprising an insulating material layer doped with a dopant; A material layer located at at least one of a first position or a second position, wherein the first position is between the first electrode layer and the selector layer, and the second position is between the second electrode layer and the selector layer, and the material layer has a band gap smaller than a band gap of the insulating material layer. 12 . The semiconductor device according to claim 11 , wherein a thickness of the material layer is smaller than a thickness of the first electrode layer or a thickness of the second electrode layer. The semiconductor device according to claim 11 , wherein the material layer comprises an insulating material or a semiconductor material.

14. The semiconductor device of claim 11 , wherein the dopant forms a shallow trap within the insulating material layer, the shallow trap having an energy level closer to a conduction band of the insulating material layer than a valence band of the insulating material layer, and A movement path for conductive carriers is formed by the shallow traps.

15. The semiconductor device of claim 11, wherein the selector layer comprises arsenic-doped silicon oxide.

16. A semiconductor device comprising a plurality of memory cells for storing data, each memory cell of the plurality of memory cells comprising: a first electrode layer; a second electrode layer; a memory layer electrically connected to the second electrode layer and configured to store data; as well as a selector layer interposed between the first electrode layer and the second electrode layer and configured to control access to the memory layer, the selector layer comprising an insulating material layer doped with a dopant, wherein at least one of the first electrode layer and the second electrode layer includes a first sub-electrode layer and a second sub-electrode layer, the second sub-electrode layer being interposed between the first sub-electrode layer and the selector layer, and At least one of the density of the second sub-electrode layer, the mass of the constituent elements of the second sub-electrode layer, or the size of the constituent elements of the second sub-electrode layer is respectively greater than the density of the first sub-electrode layer, the mass of the constituent elements of the first sub-electrode layer, or the size of the constituent elements of the first sub-electrode layer.

17. The semiconductor device according to claim 16, wherein the first sub-electrode layer comprises titanium nitride, and The second sub-electrode layer includes molybdenum. 18 . The semiconductor device according to claim 16 , wherein a thickness of the first sub-electrode layer has a value of 90% to 110% of a thickness of the second sub-electrode layer.

19. The semiconductor device according to claim 16, further comprising: An adhesive layer is interposed between the second sub-electrode layer and the selector layer.

20. The semiconductor device according to claim 16, further comprising: A material layer is interposed between the second sub-electrode layer and the selector layer and has a band gap smaller than a band gap of the insulating material layer.

Images