A new semiconductor test probe manufacturing process

Abstract

The present invention provides a novel semiconductor test probe manufacturing process, comprising: coating a first photoresist layer on a silicon substrate, performing photolithography and developing; growing a metal layer on the silicon substrate by an electroplating method; removing the first photoresist layer and then cleaning; growing a silicon oxide layer on the silicon substrate and the metal layer; coating a second photoresist layer, performing photolithography and developing to form a probe crossbeam etching position; dry etching the silicon oxide layer below the probe crossbeam etching position; partially dry etching the metal layer below the probe crossbeam etching position to form a probe crossbeam; removing the second photoresist layer and then cleaning; removing the silicon oxide layer and then cleaning; coating a third photoresist layer, performing photolithography and developing to form a probe needle angle etching position; partially etching the metal layer below the probe needle angle etching position to form a probe needle tip; removing the third photoresist layer and then cleaning. The present invention provides a novel semiconductor test probe manufacturing process, which simplifies the process flow and can well control the probe tip angle.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a novel manufacturing process for a semiconductor test probe. Background Art

[0002] A probe card is a key device used for electronic testing and analysis. It consists of multiple probes that can test and analyze the electrical performance of a circuit or device by contacting the contact points of the circuit or device to be tested. Probe cards are widely used in the research and development and manufacturing of integrated circuits, PCB circuits, new electronic devices, and other fields.

[0003] MEMS probe card is a new type of probe card manufactured using micro-electromechanical system (MEMS) technology. It has the following main features: (1) Ultra-high probe density. MEMS probes use micromachining technology to integrate more than 100k needles in a probe card to meet the testing needs of electronic devices; (2) Excellent contact performance. The MEMS probe tip has a fine shape and the tip diameter can be as small as a few microns. Within a tiny contact area, the MEMS probe can provide stable and reliable contact force and electrical contact, greatly improving the test accuracy; (3) Integrated manufacturing. The entire MEMS probe array can be manufactured using batch micromachining, which improves the consistency and reliability of the probe array; (4) Tiny size.

[0004] The specific process of the current MEMS probe manufacturing method is: first coat a layer of oxide on the silicon substrate and then clean it, then apply glue, photolithography, and develop to obtain the pattern, dry etch the silicon substrate and clean it to obtain the groove morphology, then optimize its needle angle through wet etching, and then use physical vapor deposition to perform multiple physical coatings on the groove, and then apply glue, photolithography, and develop to obtain the pattern after cleaning, and then perform chemical electroplating to fill the groove with metal, and then perform multiple chemical grinding, bond a layer of glass on the front side, and finally dry etch the back side to remove the silicon material near the metal, and then remove the original bonded glass to obtain the probe. However, the existing manufacturing process is too many, the production capacity is low, and the angle of the probe tip is difficult to control, which affects the probe yield. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a novel semiconductor test probe manufacturing process, simplify the process flow, improve production capacity, and be able to well control the probe tip angle and improve the probe yield.

[0006] In order to solve the above technical problems, an embodiment of the present invention provides a novel semiconductor test probe manufacturing process, comprising the following steps:

[0007] Step 1, coating a first photoresist layer on a silicon substrate, photolithography and developing a first preset position of the first photoresist layer to form a probe growth position;

[0008] Step 2, growing a metal layer on the silicon substrate at the probe growth position by electroplating;

[0009] Step 3, removing the first photoresist layer and then cleaning;

[0010] Step 4, growing a silicon oxide layer on the silicon substrate and the metal layer;

[0011] Step 5, coating a second photoresist layer on the silicon oxide layer, photolithography and developing a second preset position of the second photoresist layer to form an etched position of the probe beam;

[0012] Step 6, dry etching the silicon oxide layer directly below the etching position of the probe beam;

[0013] Step 7, partially dry-etching the metal layer directly below the etching position of the probe beam to form a probe beam;

[0014] Step 8, removing the second photoresist layer and then cleaning;

[0015] Step 9, removing the silicon oxide layer and then cleaning;

[0016] Step 10, coating a third photoresist layer on the silicon substrate and the metal layer, photolithography and developing a third preset position of the third photoresist layer to form a probe needle corner etching position;

[0017] Step 11, partially etching the metal layer directly below the probe needle corner etching position to form a probe needle tip;

[0018] Step 12, removing the third photoresist layer and then cleaning.

[0019] As a further improvement of the embodiment of the present invention, in step 9, the silicon oxide layer is dry-etched to remove the silicon oxide layer.

[0020] As a further improvement of the embodiment of the present invention, in step 11, according to the preset needle angle, a dry etching trench process is used to partially etch the metal layer below the probe needle angle etching position to form a probe needle.

[0021] As a further improvement of the embodiment of the present invention, in step 4, a silicon oxide layer is grown on the silicon substrate and the metal layer using chemical vapor deposition equipment.

[0022] As a further improvement of the embodiment of the present invention, in step 6, step 7 and step 11, dry etching is performed using a dry etcher.

[0023] As a further improvement of the embodiment of the present invention, in step 3, step 8 and step 12, a photoresist remover is used to remove the photoresist layer.

[0024] As a further improvement of the embodiment of the present invention, in step 1, the bottom surface of the probe growth position is the top surface of the silicon substrate, and the surrounding of the probe growth position is the first photoresist layer;

[0025] In step 2, the metal layer fills the probe growth position.

[0026] As a further improvement of the embodiment of the present invention, in step 4, the silicon oxide layer covers the entire top surface of the silicon substrate and the entire top surface of the metal layer;

[0027] In step 5, the second photoresist layer covers the entire top surface of the silicon oxide layer; and the etching position of the probe beam is located directly above the metal layer.

[0028] As a further improvement of the embodiment of the present invention, in step 10, the third photoresist layer covers the entire top surface of the silicon substrate and the entire top surface of the metal layer; and the probe needle corner etching position is located directly above the metal layer.

[0029] As a further improvement of the embodiment of the present invention, the process omits the bonding process step, omits the physical vapor deposition step, and omits the chemical mechanical polishing step.

[0030] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0031] The embodiment of the present invention provides a novel semiconductor test probe manufacturing process, which eliminates multiple wet etching steps, bonding process steps, physical vapor deposition steps, chemical mechanical polishing steps, simplifies the process flow, improves production capacity, and saves costs. In this embodiment, a metal layer is first plated on a silicon substrate, and then the metal layer is etched by a dry etching method to form a probe. When dry etching the metal layer, the probe tip angle can be better controlled, the uniformity of the probe is improved, and the probe yield is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 The figure is a flow chart of a novel semiconductor test probe manufacturing process according to an embodiment of the present invention.

[0033] The figure includes: silicon substrate 1, first photoresist layer 2, probe growth position 21, metal layer 3, silicon oxide layer 4, second photoresist layer 5, probe beam etching position 51, third photoresist layer 6, probe needle corner etching position 61, probe beam 71, and probe needle head 72. DETAILED DESCRIPTION

[0034] The technical solution of the present invention is described in detail below with reference to the accompanying drawings.

[0035] The terms "first", "second", "third", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order.

[0036] The embodiment of the present invention provides a novel semiconductor test probe manufacturing process, such as Figure 1 As shown, the following steps are included:

[0037] Step 1, coating a first photoresist layer 2 on a silicon substrate 1, performing photolithography and development on a first preset position of the first photoresist layer 2, and forming a probe growth position 21. The bottom surface of the probe growth position 21 is the top surface of the silicon substrate 1, and the first photoresist layer 2 is surrounded by the probe growth position 21.

[0038] Step 2: grow a metal layer 3 on the silicon substrate 1 at the probe growth position 21 by using an electroplating method. The metal layer 3 fills the probe growth position 21 .

[0039] Due to the existence of the first photoresist layer 2 , the metal layer 3 is grown only at the probe growth position 21 during electroplating.

[0040] Step 3, using a photoresist remover to remove the first photoresist layer 2 and then clean it.

[0041] Step 4: using chemical vapor deposition equipment to deposit a silicon oxide layer 4 on the silicon substrate 1 and the metal layer 3. Preferably, the silicon oxide layer 4 covers the entire top surface of the silicon substrate 1 and the entire top surface of the metal layer 3.

[0042] Step 5: coating a second photoresist layer 5 on the silicon oxide layer 4 , photolithography and developing the second preset position of the second photoresist layer 5 , and forming a probe beam etching position 51 .

[0043] Preferably, the second photoresist layer 5 covers the entire top surface of the silicon oxide layer 4 ; the probe beam etching position 51 is located directly above the metal layer 3 , and the probe beam etching position 51 is only a portion of the second photoresist layer 5 located above the metal layer.

[0044] Step 6: dry-etch the silicon oxide layer below the probe beam etching position 51. Specifically, a dry etching machine is used to completely etch away the silicon oxide layer below the probe beam etching position 51.

[0045] Step 7, partially dry-etching the metal layer below the probe beam etching position 51 to form the probe beam 71. Specifically, a dry etcher is used to etch away part of the metal layer below the probe beam etching position 51, leaving part of the thickness to form the probe beam 71.

[0046] Since the metal layer needs to be dry-etched for a long time to form the probe beam 71, if only one photoresistor layer is coated on the metal layer 3 and the silicon substrate 1, the blocking ability of the photoresistor layer is limited and cannot effectively protect the silicon substrate and the metal layer outside the probe beam. In the above steps 4 to 7, a silicon oxide layer 4 is first plated on the silicon substrate 1 and the metal layer 3, and then a second photoresist layer 5 is coated on the silicon oxide layer 4. Due to the presence of the silicon oxide layer 4 and the second photoresist layer 5, the dry etcher only etches the metal layer directly below the probe beam etching position 51. Compared with a single photoresist layer, the anti-blocking ability is enhanced to protect the silicon substrate and the metal layer below the double layer of the second photoresist layer 5 and the silicon oxide layer 4.

[0047] Step 8, using a photoresist remover to remove the second photoresist layer 5 and then cleaning.

[0048] Step 9: Use a dry etching machine to completely etch away the silicon oxide layer 4, thereby removing the silicon oxide layer 4 and then cleaning.

[0049] Step 10, coating a third photoresist layer 6 on the silicon substrate 1 and the metal layer 2, performing photolithography and developing on the third preset position of the third photoresist layer, and forming a probe needle corner etching position 61. The probe needle corner etching position 61 is located in the upper side circumference of the unetched portion of the metal layer 3. Preferably, the third photoresist layer 6 covers the entire top surface of the silicon substrate 1 and the entire top surface of the metal layer 3; the probe needle corner etching position 61 is located directly above the metal layer 3.

[0050] Step 11, partially etching the metal layer below the probe needle corner etching position 61 to form a probe needle head 72. Specifically, according to the preset needle head angle, a dry etcher is used to partially etch the metal layer below the probe needle corner etching position 61 using a trench process to form a probe needle head 72. The probe needle head 72 prepared in this step and the probe beam 71 prepared in step 7 form an integrated structure.

[0051] The third photoresist layer 6 protects the metal layer and silicon substrate 1 below the third photoresist layer 6, preventing the metal layer and silicon substrate 1 below the third photoresist layer 6 from being etched by the dry etcher. The dry etcher only partially etches the metal layer directly below the probe corner etching position 61.

[0052] Step 12, using a photoresist remover to remove the third photoresist layer 6 and then cleaning.

[0053] The novel semiconductor test probe manufacturing process of this embodiment first plates a metal layer on a silicon substrate, and then uses a dry etching method to etch the metal layer to form a probe, eliminating multiple wet etching steps, bonding process steps, physical vapor coating steps, and chemical mechanical polishing steps, simplifying the process flow, improving production capacity, and saving costs. The method of this embodiment uses a dry etching groove process to etch the metal layer, which can better control the probe tip angle, improve the uniformity of the probe, and improve the probe yield.

[0054] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A novel semiconductor test probe manufacturing process, characterized in that: The following steps are involved: Step 1, coating a first photoresist layer (2) on a silicon substrate (1), photolithography and developing a first preset position of the first photoresist layer (2) to form a probe growth position (21); Step 2, growing a metal layer (3) on the silicon substrate (1) at the probe growth position (21) by electroplating; Step 3, removing the first photoresist layer (2) and then cleaning; Step 4, growing a silicon oxide layer (4) on the silicon substrate (1) and the metal layer (3); Step 5, coating a second photoresist layer (5) on the silicon oxide layer (4), photolithography and developing a second preset position of the second photoresist layer (5) to form a probe beam etching position (51); Step 6, dry etching the silicon oxide layer directly below the probe beam etching position (51); Step 7, partially dry-etching the metal layer directly below the probe beam etching position (51) to form a probe beam (71); Step 8, removing the second photoresist layer (5) and then cleaning; Step 9, removing the silicon oxide layer (4) and then cleaning; Step 10, coating a third photoresist layer (6) on the silicon substrate (1) and the metal layer (3), photolithography and developing a third preset position of the third photoresist layer (6), to form a probe needle corner etching position (61); Step 11, partially etching the metal layer directly below the probe needle corner etching position (61) to form a probe needle tip (72); Step 12, removing the third photoresist layer (6) and then cleaning.

2. The novel semiconductor test probe manufacturing process according to claim 1 is characterized in that: In the step 9, the silicon oxide layer (4) is dry-etched to remove the silicon oxide layer (4).

3. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In the step 11, according to the preset needle tip angle, a dry etching trench process is used to partially etch the metal layer below the probe needle angle etching position (61) to form a probe needle tip (72).

4. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In the step 4, a silicon oxide layer (4) is grown on the silicon substrate (1) and the metal layer (3) using chemical vapor deposition equipment.

5. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In step 6, step 7 and step 11, dry etching is performed using a dry etcher.

6. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In step 3, step 8 and step 12, a photoresist remover is used to remove the photoresist layer.

7. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In the step 1, the bottom surface of the probe growth position (21) is the top surface of the silicon substrate (1), and the surrounding of the probe growth position (21) is the first photoresist layer (2); In the step 2, the metal layer (3) fills the probe growth position (21).

8. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In the step 4, the silicon oxide layer (4) covers the entire top surface of the silicon substrate (1) and the entire top surface of the metal layer (3); In step 5, the second photoresist layer (5) covers the entire top surface of the silicon oxide layer (4); and the probe beam etching position (51) is located directly above the metal layer (3).

9. The novel semiconductor test probe manufacturing process according to claim 1, characterized in that: In the step 10, the third photoresist layer (6) covers the entire top surface of the silicon substrate (1) and the entire top surface of the metal layer (3); and the probe needle corner etching position (61) is located directly above the metal layer (3).

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