Methods, devices, and power conversion equipment for testing the health of switching devices
By pre-charging the inverter and rectifier circuits and changing the state of the switching devices, combined with bus voltage and output voltage detection, the circuit operation problems caused by device abnormalities were solved, enabling timely abnormal detection and repair, and ensuring normal circuit operation.
Patent Information
- Application Number
- CN202411255081.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-09
- Publication Date
- 2026-01-06
- Estimated Expiration
- 2044-09-09
AI Technical Summary
In inverter and rectifier circuits, device malfunctions can cause the circuits to malfunction, and existing technologies struggle to detect these malfunctions in a timely and effective manner.
By pre-charging the bus of the circuit under test to the initial bus voltage, the operating state of the switching device is changed according to a preset rule, so that the expected output voltage alternates between the first preset voltage and the second preset voltage. The real-time bus voltage and output voltage are measured, and the presence of any abnormality in the switching device is determined based on these voltages.
It can detect abnormal states of switching devices in a timely manner, ensure the normal operation of the circuit, prevent the circuit from being impacted by device malfunctions, and support timely repair or replacement.
Smart Images

Figure CN119247118B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power system technology, specifically to a method, apparatus, and power conversion equipment for detecting the health of switching devices. Background Technology
[0002] An inverter circuit is a converter circuit that transforms direct current (DC) electrical energy into alternating current (AC) electrical energy. When the AC side is connected to the power grid (i.e., the AC side has a power source), it is called an active inverter; when the AC side is directly connected to the load, it is called a passive inverter.
[0003] Inverter circuits have a wide range of applications. For example, batteries, dry cell batteries, and solar cells are all DC power sources. When these power sources need to supply power to AC loads, inverter circuits are required to convert DC power into AC power. Furthermore, inverter circuits are the core component of power electronic devices such as frequency converters for AC motor speed control, uninterruptible power supplies (UPS), and induction heating power supplies.
[0004] A rectifier circuit is the counterpart to an inverter circuit. A rectifier circuit is a converter circuit that transforms alternating current (AC) electrical energy into direct current (DC) electrical energy. Rectifier circuits also have a wide range of applications.
[0005] However, in inverter and rectifier circuits, if components malfunction, the circuits will fail to operate normally. Therefore, how to detect component malfunctions in a timely and effective manner has become a technical problem that needs to be solved. Summary of the Invention
[0006] In view of this, embodiments of this application provide a method, apparatus, and power conversion device for detecting the health status of switching devices, which can effectively detect abnormal states of switching devices and ensure the normal operation of the circuit.
[0007] The technical solution of this application embodiment is implemented as follows:
[0008] This application provides a method for detecting the health of switching devices, comprising: pre-charging the bus of the circuit under test to an initial bus voltage; changing the operating state of each switching device in the circuit under test according to a preset rule, so that the expected output voltage alternately jumps between a first preset voltage and a second preset voltage, and measuring the real-time bus voltage and output voltage; wherein, the preset rule is formulated based on the position of the switching device in the circuit under test; the preset rule represents the order in which the operating states of each switching device are changed; and determining whether the switching device is abnormal based on the real-time bus voltage and output voltage.
[0009] In the above scheme, changing the operating state of each of the switching devices in the circuit under test according to the preset rules includes: starting from the initial state, changing the operating state of each of the switching devices in the circuit under test according to the preset rules; wherein, in the initial state, each of the switching devices is in the off state.
[0010] In the above scheme, determining whether the switching device in the circuit under test is abnormal based on the real-time bus voltage and the output voltage includes: if the real-time bus voltage is inconsistent with the initial bus voltage, then the switching device is determined to be abnormal; and / or, if the real-time output voltage is inconsistent with the expected output voltage, then the switching device is determined to be abnormal.
[0011] In the above scheme, the preset rules include: positive half-cycle detection for the positive half-cycle circuit and negative half-cycle detection for the negative half-cycle circuit; based on the real-time bus voltage and the output voltage, determining whether the switching device is abnormal includes: when performing the positive half-cycle detection on the circuit under test, determining whether the switching device on the positive half-cycle circuit is abnormal; wherein, in the positive half-cycle detection, the output voltage is greater than or equal to 0; and / or, when performing the negative half-cycle detection on the circuit under test, determining whether the switching device on the negative half-cycle circuit is abnormal; wherein, in the negative half-cycle detection, the output voltage is less than or equal to 0.
[0012] In the above scheme, the initial bus voltage is determined based on the maximum withstand voltage of each switching device in the circuit under test; the second preset voltage is the initial bus voltage, and the expected output voltage is determined based on the initial bus voltage.
[0013] In the above scheme, the circuit under test includes: a T-type three-level single-phase inverter circuit; the T-type three-level single-phase inverter circuit includes: a first switch, a second switch, a third switch, and a fourth switch; wherein, the first switch and the second switch are connected in series; the third switch and the fourth switch are connected in series; one end of the third switch is connected to the connection point of the first switch and the second switch.
[0014] The positive half-cycle detection includes: turning off all the switches of the T-type three-level single-phase inverter circuit and measuring the bus voltage and the output voltage; turning on the first switch and measuring the bus voltage and the output voltage; turning off the first switch, turning on the third switch, and measuring the bus voltage and the output voltage.
[0015] The negative half-cycle detection includes: turning off all the switches of the T-type three-level single-phase inverter circuit and measuring the bus voltage and the output voltage; turning on the second switch and measuring the bus voltage and the output voltage; turning off the first switch, turning on the fourth switch, and measuring the bus voltage and the output voltage.
[0016] In the above scheme, the circuit under test includes: a type I three-level single-phase inverter circuit; the type I three-level single-phase inverter circuit includes: a fifth switch, a sixth switch, a seventh switch, and an eighth switch connected in series.
[0017] The positive half-cycle detection includes: turning off all switches of the type I three-level single-phase inverter circuit and measuring the bus voltage and the output voltage; turning on the fifth switch and measuring the bus voltage and the output voltage; turning on the sixth switch and measuring the bus voltage and the output voltage; turning off the fifth switch, turning on the seventh switch, and measuring the bus voltage and the output voltage.
[0018] The negative half-cycle detection includes: turning off all the switches of the type I three-level single-phase inverter circuit and measuring the bus voltage and the output voltage; turning on the eighth switch and measuring the bus voltage and the output voltage; turning on the seventh switch and measuring the bus voltage and the output voltage; turning off the eighth switch, turning on the sixth switch, and measuring the bus voltage and the output voltage.
[0019] This application embodiment also provides a device for detecting the health of switching devices, comprising: a pre-charging module configured to pre-charge the bus of the circuit under test to an initial bus voltage; an adjustment module configured to change the operating state of each switching device in the circuit under test according to a preset rule, so that the expected output voltage alternately jumps between a first preset voltage and a second preset voltage; wherein the preset rule is formulated based on the position of the switching device in the circuit under test; the preset rule represents the order in which the operating states of each switching device are changed; a measurement module configured to measure the real-time bus voltage and output voltage; and a judgment module configured to determine whether the switching device is abnormal based on the real-time bus voltage and output voltage.
[0020] In the above scheme, the judgment module is further configured to determine that the switching device is abnormal if the real-time bus voltage is inconsistent with the initial bus voltage; and / or, determine that the switching device is abnormal if the real-time output voltage is inconsistent with the expected output voltage.
[0021] This application also provides a power conversion device, including the device for detecting the health of switching devices described in the above solution.
[0022] Therefore, the embodiments of this application provide a method, apparatus, and power conversion device for detecting the health of switching devices. This device can change the operating state of each switching device in the circuit under test according to preset rules, and determine whether there is any abnormality in the switching devices based on real-time measured bus voltage and output voltage. This allows for timely repair or replacement of the switching devices, ensuring the normal operation of the circuit. Attached Figure Description
[0023] Figure 1 A schematic diagram of an optional implementation flow of the method for detecting the health of switching devices provided in the embodiments of this application;
[0024] Figure 2 A topology diagram of a T-type three-level single-phase inverter circuit provided in an embodiment of this application;
[0025] Figure 3 A topology diagram of a type I three-level single-phase inverter circuit provided in an embodiment of this application;
[0026] Figure 4 This is a topology diagram of a T-type three-level three-phase inverter circuit provided in an embodiment of this application;
[0027] Figure 5 A schematic diagram of an optional structure of the device for detecting the health of switching devices provided in the embodiments of this application;
[0028] Figure 6 This is a schematic diagram of an optional structure of the power conversion device provided in an embodiment of this application. Detailed Implementation
[0029] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application are further described in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0030] In the following description, references to "some embodiments" refer to a subset of all possible embodiments. It is understood that "some embodiments" may be the same or different subsets of all possible embodiments and may be combined with each other without conflict. The terms "first / second / third" are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first / second / third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used herein is for descriptive purposes only and is not intended to limit the scope of this application.
[0032] Figure 1 This application provides a schematic diagram of the implementation process of a method for detecting the health of a switching device, as illustrated in the embodiments below. Figure 1 As shown, the method includes steps S101 to S103.
[0033] S101. Precharge the bus of the circuit under test to the initial bus voltage.
[0034] In this embodiment of the application, when starting to test the switching devices in the circuit under test, the bus of the circuit under test needs to be pre-charged to the initial bus voltage. The initial bus voltage is determined based on the maximum withstand voltage of each switching device in the circuit under test.
[0035] In some embodiments of this application, the second preset voltage is the initial bus voltage, and the expected output voltage is determined based on the initial bus voltage.
[0036] refer to Figure 2 and Figure 3 Bus voltage includes positive bus voltage V bus+ and negative bus voltage V bus- Among them, the positive bus voltage V bus+ It needs to be pre-charged to a positive voltage, negative bus voltage V bus- It needs to be pre-charged to a negative voltage. For example, the positive bus voltage V can be... bus+ Precharge to 100V, and, reduce the negative bus voltage V bus- Precharge to -100V.
[0037] In this embodiment of the application, before the device is powered on, a small voltage can be used to precharge the bus of the circuit under test in the device, thereby detecting the devices in the circuit under test. In this way, abnormal states of devices can be detected in advance, and the impact on the circuit caused by device abnormalities can be prevented.
[0038] S102. According to the preset rules, change the working state of each switching device in the circuit under test so that the expected output voltage alternates between the first preset voltage and the second preset voltage, and measure the real-time bus voltage and output voltage.
[0039] In this embodiment, the preset rules are formulated based on the positions of the switching devices in the circuit under test. The preset rules characterize the order in which the operating states of each switching device are changed; that is, according to the preset rules, the operating states of each switching device will be changed in a specific order. In this way, the expected output voltage can alternately jump between a first preset voltage and a second preset voltage while the operating states of the switching devices change. In other words, each change in the operating state of a switching device causes a corresponding jump in the expected output voltage.
[0040] In some embodiments of this application, the first preset voltage can be 0, and the second preset voltage can be a positive initial bus voltage (100V) or a negative initial bus voltage (-100V). Thus, the expected output voltage can jump between 0 and 100V, or between 0 and -100V.
[0041] In some embodiments of this application, the operating state of each switching device in the circuit under test can be changed according to a preset rule, starting from an initial state; wherein, in the initial state, each switching device is in the off state.
[0042] In some embodiments of this application, the preset rules include: positive half-cycle detection for positive half-cycle circuits, and negative half-cycle detection for negative half-cycle circuits.
[0043] Among them, the positive half-cycle circuit is the positive bus voltage V bus+ The corresponding current path; during the positive half-cycle detection, the output voltage V ac It should be greater than or equal to 0. When performing positive half-cycle testing on the circuit under test, it can be determined whether there is any abnormality in the switching devices on the positive half-cycle circuit.
[0044] Correspondingly, the negative half-cycle circuit has a negative bus voltage V. bus- The corresponding current path; during the negative half-cycle detection, the output voltage V ac It should be less than or equal to 0. When performing negative half-cycle testing on the circuit under test, it can be determined whether there is any abnormality in the switching devices on the negative half-cycle circuit.
[0045] In some embodiments of this application, the circuit under test includes a T-type three-level single-phase inverter circuit. For example... Figure 2As shown, the T-type three-level single-phase inverter circuit includes: a first switch S11, a second switch S12, a third switch S13, and a fourth switch S14.
[0046] In this embodiment of the application, reference is made to Figure 2 The first switch S11 and the second switch S12 are connected in series. The third switch S13 and the fourth switch S14 are connected in series. One end of the third switch S13 is connected to the connection point of the first switch S11 and the second switch S12.
[0047] It should be noted that, for Figure 2 The circuit topology shown can be tested according to the steps shown in Table 1. Steps 1 to 3 in Table 1 are for... Figure 2 The positive half-cycle detection of the positive half-cycle circuit in Table 1, steps 4 to 6 are for... Figure 2 Negative half-cycle detection in the negative half-cycle circuit.
[0048] Table 1
[0049] step S11 S12 S13 S14 <![CDATA[Expected V ac > 1 closure closure closure closure 0V 2 Open closure closure closure 100V 3 closure closure Open closure 0V 4 closure closure closure closure 0V 5 closure Open closure closure -100V 6 closure closure closure Open 0V
[0050] In this embodiment of the application, steps 1 to 3 shown in Table 1 can be followed to complete the process. Figure 2 The positive half-cycle detection of the circuit is described in step 1, which shows the initial state of the positive half-cycle detection. Specifically, in step 1, the first switch S11, the second switch S12, the third switch S13, and the fourth switch S14 are all in the off state, allowing for the measurement of the real-time bus voltage V. bus+ and V bus- and output voltage V ac Then, step 2 can be executed to turn on the first switch S11, and at the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac Then, step 3 can be executed to turn off the first switch S11 and turn on the third switch S13. At the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac And that completes the task. Figure 2 Detection of the positive half-cycle of the circuit.
[0051] Accordingly, steps 4 to 6 shown in Table 1 can be followed to complete the process. Figure 2 The negative half-cycle detection circuit is described in step 4, which shows the initial state of the negative half-cycle detection. Specifically, in step 4, the first switch S11, the second switch S12, the third switch S13, and the fourth switch S14 are all in the off state, allowing for the measurement of the real-time bus voltage V.bus+ and V bus- and output voltage V ac Then, step 5 can be executed to turn on the second switch S12, and at the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac Then, step 6 can be executed to turn off the second switch S12 and turn on the fourth switch S14. At the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac And that completes the task. Figure 2 Detection of the negative half-cycle of the circuit.
[0052] It should be noted that for a T-type three-level single-phase inverter circuit, the positive half-cycle detection and negative half-cycle detection are relatively independent and can be performed separately or in any order. That is, you can execute only steps 1-3 shown in Table 1; or only steps 4-6 shown in Table 1; or you can execute steps 1-3 first, then steps 4-6; or you can execute steps 4-6 first, then steps 1-3. There are no restrictions here.
[0053] It should also be noted that if an abnormality occurs during the testing process, the testing can be stopped to confirm and resolve the abnormality. In other words, if an abnormality occurs while performing any step in Table 1, the execution of other steps in Table 1 can be stopped.
[0054] In some embodiments of this application, the circuit under test includes: a type I three-level single-phase inverter circuit. For example... Figure 3 As shown, the Type I three-level single-phase inverter circuit includes: the fifth switch S21, the sixth switch S22, the seventh switch S23, and the eighth switch S24 connected in series.
[0055] It should be noted that, for Figure 3 The circuit topology shown can be tested according to the steps shown in Table 2. Steps 1-4 in Table 2 are for... Figure 3 The positive half-cycle detection of the positive half-cycle circuit in Table 2, steps 5-8 are for... Figure 3 Negative half-cycle detection in the negative half-cycle circuit.
[0056] Table 2
[0057] step S21 S22 S23 S24 <![CDATA[Expected V ac > 1 closure closure closure closure 0V 2 Open closure closure closure 0V 3 Open Open closure closure 100V 4 closure Open Open closure 0V 5 closure closure closure closure 0V 6 closure closure closure Open 0V 7 closure closure Open Open -100V 8 closure Open Open closure 0V
[0058] In this embodiment of the application, steps 1 to 4 shown in Table 2 can be followed to complete the process. Figure 3The positive half-cycle detection of the circuit is described in step 1, which shows the initial state of the positive half-cycle detection. Specifically, in step 1, the fifth switch S21, the sixth switch S22, the seventh switch S23, and the eighth switch S24 are all in the off state, allowing for the measurement of the real-time bus voltage V. bus+ and V bus- and output voltage V ac Then, step 2 can be executed to turn on the fifth switch S21, and at the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac Then, step 3 can be executed to turn on the sixth switch S22, and at the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac Then, step 4 can be executed to turn off the fifth switch S21 and turn on the seventh switch S23. At the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac And that completes the task. Figure 3 Detection of the positive half-cycle of the circuit.
[0059] Accordingly, steps 5 to 8 shown in Table 2 can be followed to complete the process. Figure 3 The negative half-cycle detection circuit is described in step 5, which shows the initial state of the negative half-cycle detection. Specifically, in step 5, the fifth switch S21, the sixth switch S22, the seventh switch S23, and the eighth switch S24 are all in the off state, allowing for the measurement of the real-time bus voltage V. bus+ and V bus- and output voltage V ac Then, step 6 can be executed to turn on the eighth switch S24, and at the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac Then, step 7 can be executed to turn on the seventh switch S23, and at the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac Then, step 8 can be executed to turn off the eighth switch S24 and turn on the sixth switch S22. At the same time, the real-time bus voltage V can be measured. bus+ and V bus- and output voltage V ac And that completes the task. Figure 3 Detection of the negative half-cycle of the circuit.
[0060] It should be noted that for a Type I three-level single-phase inverter circuit, the positive half-cycle detection and negative half-cycle detection are relatively independent and can be performed separately or in any order. That is, you can execute only steps 1-4 shown in Table 2; or only steps 5-8 shown in Table 2; or you can execute steps 1-4 first, then steps 5-8; or you can execute steps 5-8 first, then steps 1-4. There are no restrictions here.
[0061] It should also be noted that if an abnormality occurs during the testing process, the testing can be stopped to confirm and resolve the abnormality. In other words, if an abnormality occurs while performing any step in Table 2, the execution of other steps in Table 2 can be stopped.
[0062] S103. Based on the real-time bus voltage and output voltage, determine whether there is any abnormality in the switching device.
[0063] In some embodiments of this application, the measured real-time bus voltage can be compared with the initial bus voltage during pre-charging; if the real-time bus voltage is inconsistent with the initial bus voltage, it is determined that there is an abnormality in the switching device.
[0064] In some embodiments of this application, the measured real-time output voltage can be compared with the expected output voltage; if the real-time output voltage is inconsistent with the expected output voltage, it is determined that there is an abnormality in the switching device.
[0065] It should be noted that Table 3 corresponds to Figure 2 And Table 1. Follow steps 1 to 6 as shown in Table 1. Figure 2 After testing the circuit topology, the rules shown in Table 3 can be used to determine whether there are any abnormalities in each switching device.
[0066] Table 3
[0067]
[0068] In this embodiment of the application, if the real-time output voltage V obtained in step 1 of Table 1... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 1 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If the voltage is not 0V, then, referring to Table 3, it can be determined that the first switch S11 is either broken down or driven constantly high, that is, the first switch S11 is short-circuited. If the real-time output voltage V obtained in step 2 of Table 1... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 2 is inconsistent, meaning it is inconsistent with the real-time output voltage V. acIf the voltage is not 100V, then, referring to Table 3, it can be determined that the drive of the first switching transistor S11 has failed, that is, the first switching transistor S11 is open-circuited.
[0069] If the real-time output voltage V obtained in step 4 of Table 1 is... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 4 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If the voltage is not 0V, then, referring to Table 3, it can be determined that the second switch S12 is either broken down or driven constantly high, that is, the second switch S12 is short-circuited. If the real-time output voltage V obtained in step 5 of Table 1... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 5 is inconsistent, meaning it is inconsistent with the real-time output voltage V. ac If the voltage is not -100V, then, referring to Table 3, it can be determined that the drive of the second switch S12 has failed, that is, the second switch S12 is open-circuited. At the same time, the abnormal real-time Vac voltage obtained in step 1 of Table 1 (e.g., -100V) can also be used to determine that the second switch S12 is short-circuited.
[0070] If the real-time positive bus voltage V obtained in step 2 of Table 1 bus+ The real-time positive bus voltage V obtained in step 2 is inconsistent with the initial positive bus voltage. bus+ If the voltage is not 100V, then, referring to Table 3, it can be determined that the third switch S13 is either broken down or driven constantly high, that is, the third switch S13 is short-circuited. If the real-time output voltage V obtained in step 3 of Table 1 is... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 3 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If the voltage is not 0V, then referring to Table 3, it can be determined that the drive of the third switch S13 has failed, that is, the third switch S13 is open-circuited. At the same time, the abnormal real-time Vac voltage obtained in step 6 of Table 1 can also be determined to be due to the open circuit of the diode connected in parallel with the third switch S13.
[0071] If the real-time negative bus voltage V obtained in step 5 of Table 1 bus- The real-time negative bus voltage V obtained in step 5 is inconsistent with the initial negative bus voltage. bus- If the voltage is not -100V, then, referring to Table 3, it can be determined that the fourth switch S14 is either broken down or driven constantly high, that is, the fourth switch S14 is short-circuited. If the real-time output voltage V obtained in step 6 of Table 1... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 6 is inconsistent, meaning it is inconsistent with the real-time output voltage V. acIf the voltage is not 0V, then referring to Table 3, it can be determined that the drive of the fourth switch S14 has failed, that is, the fourth switch S14 is open-circuited. At the same time, the abnormal real-time Vac voltage obtained in step 3 of Table 1 can also be determined to be due to the open circuit of the diode connected in parallel with the fourth switch S14.
[0072] It should be noted that Table 4 corresponds to Figure 3 And Table 2. Follow steps 1 to 8 as shown in Table 2. Figure 3 After testing the circuit topology, the rules shown in Table 4 can be used to determine whether there are any abnormalities in each switching device.
[0073] Table 4
[0074]
[0075] In this embodiment of the application, if the real-time positive bus voltage V obtained in step 4 of Table 2 is... bus+ The real-time positive bus voltage V obtained in step 4 is inconsistent with the initial positive bus voltage. bus+ If the voltage is not 100V, then, referring to Table 4, it can be determined that the fifth switch S21 is either broken down or driven constantly high, that is, the fifth switch S21 is short-circuited. If the real-time output voltage V obtained in step 3 of Table 2... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 3 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If the voltage is not 100V, then, referring to Table 4, it can be determined that the drive of the fifth switch S21 is faulty, that is, the fifth switch S21 is open-circuited.
[0076] If the real-time output voltage V obtained in step 2 of Table 2 is... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 2 is inconsistent, meaning it is inconsistent with the real-time output voltage V. ac If the voltage is not 0V, then referring to Table 4, it can be determined that the sixth switch S22 is either broken down or driven constantly high, that is, switch S22 is short-circuited. If the real-time output voltage V obtained in step 3 of Table 2... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 3 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If it is not 100V, then, referring to Table 4, it can also be determined that the drive of the sixth switch S22 is faulty, that is, the sixth switch S22 is open.
[0077] If the real-time output voltage V obtained in step 6 of Table 2 is... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 6 is inconsistent, meaning it is inconsistent with the real-time output voltage V. acIf the voltage is not 0V, then referring to Table 4, it can be determined that the seventh switch S23 is either broken down or driven constantly high, that is, the seventh switch S23 is short-circuited. If the real-time output voltage V obtained in step 7 of Table 2... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 7 is inconsistent, meaning it is inconsistent with the real-time output voltage V. ac If it is not -100V, then, referring to Table 4, it can be determined that the drive of the seventh switch S23 is faulty, that is, the seventh switch S23 is open.
[0078] If the real-time negative bus voltage V obtained in step 8 of Table 2 bus- The real-time negative bus voltage V obtained in step 8 is inconsistent with the initial negative bus voltage. bus- If the voltage is not -100V, then, referring to Table 4, it can be determined that the eighth switch S24 is either broken down or driven constantly high, that is, the eighth switch S24 is short-circuited. If the real-time output voltage V obtained in step 7 of Table 2... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 7 is inconsistent, meaning it is inconsistent with the real-time output voltage V. ac If it is not -100V, then, referring to Table 4, it can be determined that the drive of the eighth switch S24 is faulty, that is, the eighth switch S24 is open-circuited.
[0079] If the real-time positive bus voltage V obtained in step 2 of Table 2 bus+ The real-time positive bus voltage V obtained in step 2 is inconsistent with the initial positive bus voltage. bus+ If the voltage is not 100V, then, referring to Table 4, it can be determined that diode S25 is short-circuited. If the real-time output voltage V obtained in step 8 of Table 2... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 8 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If it is not 0V, then referring to Table 4, it can be determined that diode S25 is open.
[0080] If the real-time negative bus voltage V obtained in step 6 of Table 2 bus- The real-time negative bus voltage V obtained in step 6 is inconsistent with the initial negative bus voltage. bus- If it is not -100V, then, referring to Table 4, it can be determined that diode S26 is short-circuited. If the real-time output voltage V obtained in step 4 of Table 2... ac Compared with the expected output voltage (expected V) ac The output voltage V obtained in step 4 is inconsistent, that is, the real-time output voltage V is inconsistent. ac If it is not 0V, then referring to Table 4, it can be determined that diode S26 is open.
[0081] It should be noted that, Figure 4 The topology of a T-type three-level three-phase inverter circuit is shown. This T-type three-level three-phase inverter circuit is composed of three sets of T-type three-level single-phase inverter circuits superimposed; specifically, refer to... Figure 4 Switching devices VA1, VA2, VA3, and VA4 belong to Group 1 T-type three-level single-phase inverter circuit; switching devices VB1, VB2, VB3, and VB4 belong to Group 2 T-type three-level single-phase inverter circuit; and switching devices VC1, VC2, VC3, and VC4 belong to Group 3 T-type three-level single-phase inverter circuit. Therefore, for Figure 4 The detection performed by the circuit shown can be referred to Figure 2 The detection process of the circuit shown will not be described in detail here.
[0082] Correspondingly, for a type I three-level three-phase inverter circuit, it is also possible to refer to... Figure 3 The type I three-level single-phase inverter circuit shown is used for testing, and will not be described in detail here.
[0083] It should also be noted that the circuit under test in the embodiments of this application may include: an inverter circuit and / or a rectifier circuit. Since the rectifier circuit corresponds to the inverter circuit, the rectifier circuit is a converter circuit that can transform AC power into DC power; that is, the output terminal of the inverter circuit can be used as the input terminal of the rectifier circuit, and the input terminal of the inverter circuit can be used as the output terminal of the rectifier circuit. Therefore, for the testing of the rectifier circuit, the method for testing the inverter circuit (…) in the embodiments of this application can be referred to. Figures 2-4 The detection process of the circuit topology shown will not be described in detail here.
[0084] It should also be noted that the switching device in the embodiments of this application may include at least one of IGBT (Insulated-Gate Bipolar Transistor), MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and diode. For example, Figure 2 The switches S11, S12, S13, and S14 shown, and Figure 3 The switching transistors S21, S22, S23 and S24 shown can be IGBTs or MOSFETs; Figure 3 S25 and S26 shown can be diodes.
[0085] In this embodiment, the bus voltage can be used to detect the state of the device, thus enabling a more comprehensive detection of the status of the switching devices in the circuit under test.
[0086] It is understood that the detection method provided in this application can effectively detect abnormal states of switching devices, thereby enabling timely repair or replacement of the switching devices and ensuring the normal operation of the circuit. For example, the inverter circuit can be tested when the equipment is powered on. If there are no abnormalities in the components of the inverter circuit, the equipment can be powered on normally; if there are abnormalities in the components of the inverter circuit, the equipment needs to be stopped in time for repair or replacement.
[0087] In this embodiment of the application, before the device is powered on, a small voltage can be used to precharge the bus of the circuit under test in the device, thereby detecting the devices in the circuit under test. In this way, abnormal states of devices can be detected in advance, and the impact on the circuit caused by device abnormalities can be prevented.
[0088] Figure 5 This is a schematic diagram of the structural composition of a device for detecting the health status of a switching device provided in an embodiment of this application, as shown below. Figure 5 As shown, the switching device health detection device 200 includes: a pre-charging module 210, an adjustment module 220, a measurement module 230, and a judgment module 240.
[0089] The pre-charge module 210 is configured to pre-charge the bus of the circuit under test to an initial bus voltage. The adjustment module 220 is configured to change the operating state of each switching device in the circuit under test according to preset rules. The measurement module 230 is configured to measure the real-time bus voltage and output voltage. The judgment module 240 is configured to determine whether there is an abnormality in the switching devices based on the real-time bus voltage and output voltage.
[0090] In this embodiment, the preset rules are formulated based on the position of the switching devices in the circuit under test. The preset rules characterize the order in which the operating states of each switching device are changed. The preset rules include: positive half-cycle detection for the positive half-cycle circuit and negative half-cycle detection for the negative half-cycle circuit. Specifically, in the positive half-cycle detection, the output voltage is greater than or equal to 0; in the negative half-cycle detection, the output voltage is less than or equal to 0.
[0091] In some embodiments of this application, the determination module 240 is further configured to determine whether there is an abnormality in the switching device on the positive half-cycle circuit when the circuit under test is subjected to positive half-cycle detection; and / or, to determine whether there is an abnormality in the switching device on the negative half-cycle circuit when the circuit under test is subjected to negative half-cycle detection.
[0092] In some embodiments of this application, the adjustment module 220 is further configured to change the operating state of each switching device in the circuit under test according to a preset rule, starting from an initial state. In the initial state, all switching devices are in a closed state.
[0093] In some embodiments of this application, the judgment module 240 is further configured to determine that the switching device is abnormal if the real-time bus voltage is inconsistent with the initial bus voltage; and / or, determine that the switching device is abnormal if the real-time output voltage is inconsistent with the expected output voltage.
[0094] In some embodiments of this application, the initial bus voltage is determined based on the maximum withstand voltage of each switching device in the circuit under test. The second preset voltage is the initial bus voltage, and the expected output voltage is determined based on the initial bus voltage.
[0095] In some embodiments of this application, the switching device includes at least one of IGBT, MOSFET and diode.
[0096] Figure 6 This is a schematic diagram of the composition structure of a power conversion device provided in an embodiment of this application, as shown below. Figure 6 As shown, the power conversion device 300 includes: a detection device 200 for the health of switching devices.
[0097] In this embodiment of the application, reference is made to Figure 6 The power conversion device 300 also includes a circuit under test 100. The circuit under test 100 may include an inverter circuit and / or a rectifier circuit.
[0098] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above steps / processes do not imply a sequential order of execution; the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above embodiments of this application are merely descriptive and do not represent the superiority or inferiority of the embodiments.
[0099] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0100] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.
[0101] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.
[0102] Furthermore, in the various embodiments of this application, all functional units can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units. Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.
[0103] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium, including instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.
[0104] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.
Claims
1. A method of detecting the health of a switching device, characterized by, The method comprises: pre-charging a bus of a to-be-tested circuit to an initial bus voltage; changing working states of each switching device in the to-be-tested circuit according to a preset rule, so that an expected output voltage alternately jumps between a first preset voltage and a second preset voltage, and measuring a real-time bus voltage and an output voltage; wherein the preset rule is formulated according to positions of the switching devices in the to-be-tested circuit; the preset rule represents an order of changing the working states of each switching device; judging whether the switching device is abnormal based on the real-time bus voltage and the output voltage.
2. The method of claim 1, wherein The method of changing the working states of each switching device in the to-be-tested circuit according to the preset rule comprises: starting from an initial state, changing the working states of each switching device in the to-be-tested circuit according to the preset rule; wherein, in the initial state, each switching device is in a closed state.
3. The method of claim 1, wherein The method of judging whether the switching device in the to-be-tested circuit is abnormal based on the real-time bus voltage and the output voltage comprises: if the real-time bus voltage is inconsistent with the initial bus voltage, judging that the switching device is abnormal; and / or, if the real-time output voltage is inconsistent with the expected output voltage, judging that the switching device is abnormal.
4. The method of claim 1, wherein The preset rule comprises: positive half-cycle detection for a positive half-cycle circuit, and negative half-cycle detection for a negative half-cycle circuit; The method of judging whether the switching device is abnormal based on the real-time bus voltage and the output voltage comprises: in the case of performing the positive half-cycle detection on the to-be-tested circuit, judging whether the switching device on the positive half-cycle circuit is abnormal; wherein, in the positive half-cycle detection, the output voltage is greater than or equal to 0; and / or, in the case of performing the negative half-cycle detection on the to-be-tested circuit, judging whether the switching device on the negative half-cycle circuit is abnormal; wherein, in the negative half-cycle detection, the output voltage is less than or equal to 0.
5. The method of claim 1, wherein: the initial bus voltage is determined based on a maximum withstand voltage of each switching device in the to-be-tested circuit; the second preset voltage is the initial bus voltage, and the expected output voltage is determined according to the initial bus voltage.
6. The method of claim 4, wherein The to-be-tested circuit comprises a T-type three-level single-phase inverter circuit; the T-type three-level single-phase inverter circuit comprises a first switching tube, a second switching tube, a third switching tube, and a fourth switching tube; wherein, the first switching tube and the second switching tube are connected in series; the third switching tube and the fourth switching tube are connected in series; one end of the third switching tube is connected to a connection point of the first switching tube and the second switching tube; the positive half-cycle detection comprises: closing all switching tubes of the T-type three-level single-phase inverter circuit, and measuring the bus voltage and the output voltage; opening the first switching tube, and measuring the bus voltage and the output voltage; closing the first switching tube, opening the third switching tube, and measuring the bus voltage and the output voltage; The negative half-cycle detection comprises: closing all the switch tubes of the T-type three-level single-phase inverter circuit, and measuring the bus voltage and the output voltage; turning on the second switch tube, and measuring the bus voltage and the output voltage; closing the first switch tube, turning on the fourth switch tube, and measuring the bus voltage and the output voltage.
7. The method of claim 4, wherein the step of determining the health of the switching device comprises: The circuit to be detected comprises: an I-type three-level single-phase inverter circuit; the I-type three-level single-phase inverter circuit comprises: a fifth switch tube, a sixth switch tube, a seventh switch tube and an eighth switch tube connected in series. The positive half-cycle detection comprises: closing all the switch tubes of the I-type three-level single-phase inverter circuit, and measuring the bus voltage and the output voltage; turning on the fifth switch tube, and measuring the bus voltage and the output voltage; turning on the sixth switch tube, and measuring the bus voltage and the output voltage; closing the fifth switch tube, turning on the seventh switch tube, and measuring the bus voltage and the output voltage. The negative half-cycle detection comprises: closing all the switch tubes of the I-type three-level single-phase inverter circuit, and measuring the bus voltage and the output voltage; turning on the eighth switch tube, and measuring the bus voltage and the output voltage; turning on the seventh switch tube, and measuring the bus voltage and the output voltage; closing the eighth switch tube, turning on the sixth switch tube, and measuring the bus voltage and the output voltage.
8. A device for detecting the health of a switching device, characterized in that Comprise: a pre-charge module configured to pre-charge a bus of a circuit to be detected to an initial bus voltage; an adjustment module configured to change working states of each switch device in the circuit to be detected according to a preset rule, so that an expected output voltage alternately jumps between a first preset voltage and a second preset voltage; wherein the preset rule is made according to positions of the switch devices in the circuit to be detected; and the preset rule represents an order of changing the working states of each switch device; a measurement module configured to measure real-time bus voltage and output voltage; a judgment module configured to judge whether the switch device is abnormal based on the real-time bus voltage and the output voltage.
9. The switch device health degree detection apparatus according to claim 8, wherein the judgment module is further configured to judge that the switch device is abnormal if the real-time bus voltage is inconsistent with the initial bus voltage, and / or judge that the switch device is abnormal if the real-time output voltage is inconsistent with the expected output voltage.
10. A power conversion device, characterized by, Comprise: the switch device health degree detection apparatus of claim 8 or 9.
Citation Information
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