Sum-difference STAP angle measurement implementation method based on multi-core parallel architecture

Abstract

The invention relates to a multi-core parallel architecture sum-difference STAP angle measurement realization method, which comprises the following realization steps: in a space-time adaptive processing stage, only detecting the position of a distance unit of a target, carrying out interpolation operation on the distance unit of the target, then detecting the Doppler of the target, and carrying out full-dimensional sum-difference STAP angle measurement according to the Doppler of the target; the problem that the angle measurement error is large under the low pulse number is solved. In the STAP process, through a designed EDMA data transmission mode of a ping-pong-like structure, only first data access consumes time, and subsequent data access does not need to wait in situ in a time-consuming manner, so that the efficiency of data interaction between the DDR and the L2 as well as between the DDR and the MSM is greatly improved, and the STAP processing speed is improved. The method is better in universality, higher in STAP processing speed and more accurate in sum-difference angle measurement, and can be used for radar clutter suppression and target detection in radar signal processing.

Description

Technical Field

[0001] The present invention belongs to the field of radar technology, and further relates to a method for realizing angle measurement based on multi-core parallel architecture and space-time adaptive processing STAP (Space-Time Adaptive Processing) in the field of radar signal processing technology. The present invention can be used for radar to detect targets, and then suppress clutter by using two-dimensional joint processing of spatial information and time information. Background Art

[0002] When the moving platform radar is working downward, it faces a large amount of ground (sea) clutter with severe expansion of the Doppler spectrum. Weak target signals are often submerged in the clutter background, which seriously affects the radar's ability to detect low, slow and small targets. The sum-difference system STAP clutter suppression problem. As a result, the sum-difference STAP angle measurement algorithm began to appear, using the sum-difference beam as the spatial channel and using Doppler localization in the time domain for dimensionality reduction. It has the characteristics of low system complexity and high real-time performance, and has a good application prospect in engineering practice. At present, the sum-difference STAP theoretical technology is relatively mature, and the development of modern electronic technology has enabled the STAP algorithm to enter the practical application stage. Ideally, the STAP method has the best clutter suppression performance, but in engineering applications, the amount of STAP calculation increases exponentially with the number of pulses and channels, requiring the system to have super computing power. The high-performance multi-core digital signal processor DSP (Digital Signal Processor) that emerged is suitable for large-scale, high-speed data parallel processing. Nowadays, multi-core DSP has been widely used in signal processing of various radar detection platforms such as vehicle-mounted, ship-mounted, airborne, and space-based.

[0003] Xidian University has disclosed in its patent application "Localized Dimensionality Reduction Clutter Suppression Method for Dual-base Radar Based on MIMO" (patent application number: 201310243280, application date: 2013.06.19, application publication number: CN 103353591A) a method for reducing the computational complexity of radar ground clutter suppression and the requirement of clutter suppression on the number of independent and identically distributed clutter samples, thereby realizing real-time processing of ground target detection. The implementation steps of the method are as follows: first, matching filter the echo data; then, construct a localized dimension reduction matrix to reduce the dimension of the received data, and then estimate the clutter covariance matrix to obtain the optimal weight vector; finally, weighted clutter suppression is performed on the reduced-dimensional data. However, this method still has the disadvantage that, in the implementation process, since the localized dimensionality reduction matrix is ​​obtained by calculating the Kronecker product of the spatial domain dimensionality reduction matrix and the time domain dimensionality reduction matrix, the dimensionality of the dimensionality reduction matrix is ​​large and the calculation complexity is high, resulting in a long time-consuming DSP calculation, and it is difficult to meet the requirement of completing a frame of data processing within a coherent pulse accumulation time, resulting in a long output delay of the clutter suppression result and poor real-time performance.

[0004] Xidian University disclosed a space-time joint dimension reduction adaptive clutter suppression method for multi-core DSP in its patent application "Space-time joint dimension reduction adaptive clutter suppression method based on multi-core DSP" (patent application number: 202111457760.1, application date: 2021.12.02, application publication number: CN114185007A). The implementation steps of this method are to take advantage of the hardware advantage of DSP's expertise in fast Fourier transform FFT (fast Fourier transform) calculation. The signal processing board containing four DSPs is divided into two groups. The two groups of DSPs receive radar echo data in an alternating ping-pong manner through a field programmable gate array FPGA (FieldProgrammable GateArray) preprocessing board, perform spatial dimensionality reduction on the echo data, and suppress clutter through a distance dimension segmented sliding window, solving the problem that the space-time adaptive processing takes too long due to the large dimension of the previous dimension reduction matrix. However, the method still has the disadvantage that, in the implementation process, EDMA (Enhanced Direct Memory Access) is frequently used to transfer a small amount of data, resulting in low efficiency and longer time-consuming space-time adaptive processing. In addition, this method directly uses the constant false alarm rate CFAR (Constant False-Alarm Rate) result of STAP for sum-difference angle measurement. When the number of time-domain pulses of the radar is low, the information of the time-domain pulse cannot be fully utilized, which will increase the estimated target Doppler error and affect the accuracy of the subsequent sum-difference angle measurement. Summary of the invention

[0005] The purpose of the present invention is to propose a method for implementing sum-difference STAP angle measurement based on a multi-core parallel architecture in view of the shortcomings of the above-mentioned prior art, so as to solve the problem that when the number of radar time domain pulses is low, the error of sum-difference STAP angle measurement by DSP is relatively large, and the problem that when EDMA technology is used in space-time adaptive processing, the memory interaction efficiency of double data rate synchronous dynamic random access memory DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory), L2 SRAM (Static Random-Access Memory), MSM SRAM (Multicore Shared Memory SRAM) and the like in DSP is low and time-consuming.

[0006] The specific idea for achieving the purpose of the present invention is to write a sum-difference STAP angle measurement module, first perform STAP processing and detect the distance unit position of the target, perform interpolation operation on the target distance unit, and then determine the Doppler of the target, and perform sum-difference STAP angle measurement accordingly, which solves the problem that the error of sum-difference STAP angle measurement is relatively large when the number of radar time domain pulses is low in the prior art. In the process of signal processing, the present invention designs an EDMA data transmission method using a ping-pong buffer data structure, alternately moving data from DDR to the buffer, and solves the problem that the prior art uses EDMA technology in DSP during space-time adaptive processing. The memory interaction efficiency of DDR, L2, MSM and other memory in the DSP is low and time-consuming.

[0007] The present invention specifically comprises the following steps:

[0008] Step 1: The front-end antenna receives radar echo data and transmits it to DSP;

[0009] Step 2, DSP receives radar multi-beam data and radar parameters;

[0010] Step 3, constructing a ping-pong buffer data structure for EDMA transmission data;

[0011] Step 4, divide the STAP multi-core parallel tasks according to the number of Doppler channels of the radar multi-beam data;

[0012] Step 5, perform CFAR processing on the result after STAP clutter suppression to detect the distance position of the target;

[0013] Step 6: Perform sum and difference STAP angle measurement based on the CFAR detection results.

[0014] Compared with the prior art, the present invention has the following advantages:

[0015] First, the present invention detects the distance position of the target with the CFAR algorithm according to the STAP processing result, determines the Doppler of the target after interpolation operation on the target distance unit, and performs sum and difference STAP angle measurement and FFT interpolation processing accordingly, thereby improving the problem of low time domain resolution of the radar, making the present invention more accurate in estimating the target Doppler, thereby reducing the target angle estimation error.

[0016] Second, the present invention designs a ping-pong-like data structure, using the EDMA independent of the CPU background batch data transmission capability, while the current signal is being processed, the next data to be processed is transferred from the DDR to the buffer, so that the next signal processing does not need to wait for the data to be completed in situ, so that the present invention greatly improves the efficiency of data interaction between the DDR and L2 and MSM memory, thereby improving the space-time adaptive processing speed. At the same time, in order to prevent data competition between multiple cores and facilitate the rapid determination of the data to be processed, the multi-core task is divided according to the number of Doppler channels, and a multi-core parallel architecture is adopted, so that the EDMA utilization rate is higher and the signal processing speed is faster. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a flow chart of the present invention;

[0018] Figure 2 A schematic diagram of the structure of an EDMA ping-pong buffer area according to an embodiment of the present invention;

[0019] Figure 3 It is a flowchart of the STAP algorithm according to an embodiment of the present invention;

[0020] Figure 4 It is a flowchart of the sum and difference STAP angle measurement part of an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0022] Reference Figure 1 , the implementation steps of the embodiment of the present invention are further described in detail.

[0023] Step 1: The front-end antenna receives radar echo data and transmits it to the DSP.

[0024] Step 1.1, using a field programmable gate array FPGA, the radar echo data within a pulse repetition frequency interval is received in real time through the front-end antenna.

[0025] Step 1.2: The DSP signal processing board is connected to the FPGA through the SRIO bus to achieve high-speed data transmission between the FPGA and the DSP, and transmit the radar echo data from the FPGA to the DSP.

[0026] FPGA pre-processes the radar echo, and DSP performs STAP processing on the radar multi-beam data pre-processed by FPGA.

[0027] Step 2: DSP receives radar multi-beam data and radar parameters.

[0028] Step 2.1, sampling the radar echo of each receiving channel of the array radar antenna.

[0029] Step 2.2, beamforming is performed on the sampled radar echo data, and the obtained radar multi-beam data is formed into three beams of sum, difference and difference, so as to complete the spatial dimension reduction of the radar echo data.

[0030] In step 2.3, the FPGA sends the pre-processed radar multi-beam data and radar parameters to the DDR3 memory of the DSP in real time through the SRIO bus in units of one coherent pulse accumulation time.

[0031] In step 2.4, the DSP performs STAP processing on the data in the memory according to the radar parameters within a coherent pulse accumulation time.

[0032] Step 3: construct a ping-pong buffer data structure for EDMA data transmission.

[0033] The ping-pong buffer-like data structure is as follows: two buffers are opened in a memory area, and when one of the buffers is used for signal processing, EDMA writes data to the other buffer.

[0034] Reference Figure 2 , the working process of the EDMA ping-pong buffer of an embodiment of the present invention is further described.

[0035] EDMA is a technology used for fast data exchange in DSP, and has the ability to transfer bulk data in the background independent of the CPU. An A / B buffer area is opened in the MSM memory area. When data in A is taken out for signal processing, EDMA writes data to the B buffer. When data in B is taken out for signal processing, EDMA writes data to the A buffer. The signal processing time is much longer than the EDMA transmission time, so A and B receive data alternately to avoid waiting for data access to complete before signal processing.

[0036] By using a ping-pong buffer-like data structure to transmit data, the transmission characteristics of EDMA can be more fully utilized. Because EDMA does not occupy the CPU when transporting data, the CPU can continue to process the data that has been transmitted in the buffer. While the CPU is processing, EDMA prepares the next data to be processed in the background, avoiding the extra time spent by the CPU waiting for the data transmission to be completed. Taking the time taken to transport data each time as an example, assuming that the number of radar pulses is K and the number of distance units is L, the total time taken for data interaction in the prior art is KLt. However, the method of transmitting data using the ping-pong buffer-like data structure EDMA constructed by the present invention only consumes time for the first data transport, and subsequent data transport is completed during signal processing. The data interaction time taken by the method of the present invention is t. Obviously, the data interaction speed of the present invention is increased by KL times compared with the existing method, which greatly improves the efficiency of data interaction between different memories.

[0037] Step 4: Divide the STAP multi-core parallel tasks according to the number of Doppler channels of the radar multi-beam data.

[0038] In order to prevent data competition between multiple cores and facilitate rapid determination of data to be processed, multi-core task division is performed.

[0039] In step 4.1, each core writes the data to be detected into one buffer A of the two buffers.

[0040] Step 4.2: While the echo data in buffer A are being STAP processed, another buffer B is writing the data to be detected.

[0041] Step 4.3: while performing STAP processing on the echo data in buffer B, write the data to be detected into buffer A.

[0042] Step 4.4, determine whether there is any data that has not been written into the buffer, if so, execute step 4.5, otherwise, execute step 4.1.

[0043] Step 4.5, complete the division of STAP multi-core parallel tasks.

[0044] Reference Figure 3 , the STAP algorithm process of the embodiment of the present invention is further described:

[0045] First wait for EDMA to transfer data to the buffer area, and then read the buffer area data to perform STAP noise suppression.

[0046] Taking the combination of a beams and b Doppler channels as an example, the steps of STAP clutter suppression are as follows:

[0047] In the first step, the reduced-dimensional space-time steering vector S is calculated from the radar parameters.

[0048] In the second step, unselected data is selected from the data to be detected in the buffer as samples to be detected, and data of the same length before and after the samples to be detected are selected as training samples.

[0049] The third step is to calculate the covariance matrix R of the selected samples according to the following formula: X , whose dimensions are ab×ab:

[0050]

[0051] Among them, L t Indicates the length of the selected sample to be tested, X t represents the selected training sample, and the superscript H represents the conjugate transpose operation.

[0052] The fourth step is to calculate the covariance matrix R according to the following formula: X break down:

[0053] The TI official library function in DSP uses matrix decomposition to complete the matrix inversion operation. First, the covariance matrix R X Decomposed into the following form:

[0054] R X =P H LU

[0055] Among them, P: permutation matrix, L: lower triangular matrix, U: upper triangular matrix.

[0056] The fifth step is to calculate the covariance matrix R according to the following formula: X Find the inverse:

[0057] R XV =U -1 L -1 P

[0058] Among them, R XV Represents the covariance matrix R X The inverse matrix of , P represents the permutation matrix, L represents the lower triangular matrix, U represents the upper triangular matrix, and the superscript -1 represents the inverse operation.

[0059] Step 6: According to the following formula, based on the dimension-reduced space-time steering vector S and the inverse matrix R of the covariance matrix XV Calculate the optimal weight vector W opt :

[0060]

[0061] Step 7: According to the following formula, the optimal weight vector W opt After conjugate transposition, the data to be tested X c Multiply and calculate the clutter suppression Y output by the current range unit of the current Doppler channel out :

[0062]

[0063] Among them, W opt represents the optimal weight vector, X c Indicates the selected samples to be tested.

[0064] The eighth step is to determine whether all the data to be detected in the buffer have been selected. If so, execute the ninth step; otherwise, execute the second step.

[0065] The ninth step is to complete the STAP clutter suppression of all data to be detected.

[0066] Step 5: Perform CFAR processing on the result after STAP clutter suppression to detect the distance position of the target.

[0067] The steps of CFAR processing are as follows:

[0068] Step 5.1, calculate the result Y obtained after each STAP clutter suppression out Power P out ;

[0069] Step 5.2: Each P out and the background power P in the environment background In comparison;

[0070] Step 5.3, determine P out Is it greater than or equal to P background f0, where f0 represents the CFAR detection factor. If yes, then determine Y out If there is a target, the distance unit number of the current target is recorded; otherwise, it is determined that there is no target and the comparison is skipped for the next detection.

[0071] Step 6: Perform sum and difference STAP angle measurement based on the CFAR detection results.

[0072] Step 6.1, select the sum beam data from the sum and difference beams after beamforming, perform FFT interpolation processing on the target position of the sum beam data, and the interpolation multiple can be selected as any integer in the range of [2,10].

[0073] Step 6.2, taking the Doppler of the target peak position after FFT interpolation as the target Doppler value, and calculating the time domain steering vector based on it.

[0074] Step 6.3, combine all the training samples of the sum, difference and difference three-beam target position, calculate the adaptive processing weights, apply the weights to the target position, and obtain the output of the sum, difference and difference channels after clutter suppression.

[0075] Step 6.4, obtain the difference-sum ratio based on the output of the sum-difference channel after clutter suppression, and obtain the azimuth and pitch angle of the target position based on the slope of the angle detection curve.

[0076] Reference Figure 4 , the process of the sum and difference STAP angle measurement part of the embodiment of the present invention is further described.

[0077] The sum and difference beam data are sent from the upstream FPGA to the DSP, and the sum and difference channel weights w are obtained by using the half array method (symmetric inversion method). beam_sum 、w beam_diff_azi 、w beam_diff_ele , and apply the weights to the radar echo data to obtain the beam X beam_sum , azimuth difference beam X beam_diff_azi and elevation difference beam X beam_diff_ele .

[0078] The above sum and difference beams are rearranged and combined to become data

[0079] First, perform FFT interpolation processing on the sum beam target position. The interpolation multiple can be selected from 2 to 10. According to the CFAR result, the peak value after FFT interpolation is taken as the target Doppler value, and then the space-time steering vector S is calculated based on it.

[0080] Based on this, the units to be detected and training samples at the target location are obtained. The steps are the same as the STAP process. The adaptive weights are calculated by the inverse covariance matrix R -1 The sum and space-time steering vector S are obtained, and the sum and difference weights are respectively:

[0081] w sum =R -1 S0

[0082] w diff_azi =R -1 S1

[0083] w diff_ele =R -1 S2

[0084] Wherein, S0 is the sum beam steering vector, )1 is the azimuth difference beam steering vector, )2 is the elevation difference beam steering vector;

[0085] Apply adaptive weights to the above data, and use the three beams of sum, difference and difference to suppress clutter, and get the output of the sum, difference and difference channel after clutter suppression. Get the difference-sum ratio based on the output of the sum, difference and difference channel after clutter suppression, and then combine it with the slope of the angle detection curve to get the azimuth and elevation angle.

[0086] The effects of the present invention are further described below in conjunction with the simulation experiments of the present invention.

[0087] 1. Simulation experimental conditions.

[0088] The hardware platform of the simulation experiment of the present invention is as follows: the processor is Intel(R) Core(TM) i7-10700 CPU, the main frequency is 2.90GHz, the memory is 32GB, and the processor is TMDSEVM6678LRev.3B (8 cores).

[0089] The software for the simulation experiment of the present invention is: Windows 11 operating system, MATLAB R2023a, CodeComposer Studio 930.

[0090] 2. Analysis of simulation content and results.

[0091] There are two simulation experiments of the present invention. Simulation experiment 1 is a simulation of target angle estimation using the method of the present invention and the method of the prior art; and simulation experiment 2 is a simulation of the memory data interaction speed of the prior art and the present invention.

[0092] 2.1 Simulation Experiment 1, using the method of the present invention and two existing technologies, respectively simulates the target angle estimation.

[0093] The radar working wavelength configured in the simulation experiment 1 of the present invention is λ, which is 0.03m, the number of subarrays N is 16, the number of coherent pulses K is 8, the platform height is 25m, the platform speed is 20m / s, the target azimuth speed is 0, the radial speed is 10m / s, the pulse repetition frequency is 940Hz, the number of range gates L is 2048, the range gate width is 48m, the signal-to-noise ratio is 10dB, the noise-to-signal ratio is 30dB, the number of beams selected by JDL is 3, the number of Doppler channels is 3, the protection sample size is 4 range gates, and the training sample size is 36 range gates.

[0094] In simulation experiment 1, the two existing technologies used are:

[0095] Prior art 1 refers to a method disclosed in the patent document "Localized Dimensionality Reduction Clutter Suppression Method for Dual-base Radar Based on MIMO" (patent application number: 201310243280, application date: 2013.06.19, application publication number: CN 103353591 A) applied by Xidian University, which reduces the computational complexity of radar ground clutter suppression and the requirement of clutter suppression on the number of independent and identically distributed clutter samples, thereby realizing real-time processing of ground target detection.

[0096] Prior art 2 refers to a space-time joint dimensionality reduction adaptive clutter suppression method for multi-core DSP disclosed by Xidian University in its patent application document "Space-time joint dimensionality reduction adaptive clutter suppression method based on multi-core DSP" (patent application number: 202111457760.1, application date: 2021.12.02, application publication number: CN 114185007A).

[0097] In order to verify the effect of the simulation experiment of the present invention, the root mean square error (RMSE) is used to quantify and analyze the target angle estimation performance of the two prior arts and the present invention. The root mean square error of the target angle estimation value is defined as:

[0098]

[0099] Where M represents the number of Monte-Carlo experiments. represents the target angle estimated for the mth time, and θ represents the actual target angle: Assume that the number of independent Monte-Cano experiments is 100.

[0100] The root mean square errors of two prior arts and the present invention under the same experimental conditions are respectively given below.

[0101] Under the hardware and software experimental conditions and the simulated radar parameters, the existing technology is used to perform sum and difference STAP angle measurement, and the beam pointing is set to (0,0), (5,10), (20,15), (30,30), respectively. The first data in the brackets is the azimuth, and the second data in the brackets is the pitch angle, and the unit is angle °. Using two existing technologies and the method of the present invention, the target is placed near the beam pointing direction, and MATLAB simulation is simulated 100 times. The radar echo and the root mean square error of the angle measurement are calculated and plotted as Table 1.

[0102] Table 1 Comparison table of root mean square error between the prior art and the present invention ( / angle °)

[0103] 0,0 5,10 20,15 30,30 Prior art 0.36,0.60 0.14,0.42 0.15,0.34 0.39,0.47 The present invention 0.04,0.17 0.03,0.08 0.04,0.12 0.08,0.17

[0104] It can be seen from Table 1 that, compared with the prior art, under the same conditions, the angle measurement error of the present invention is significantly reduced, and it is closer to the real position of the target. This is because after FFT interpolation, the detected target Doppler value is closer to the real Doppler value, so the angle measurement result is more accurate.

[0105] 2.2 Simulation Experiment 2 is a simulation of the memory data interaction speed of the prior art and the present invention.

[0106] Further speed analysis was performed through DSP testing. Taking the data interaction of the STAP processing part as an example, the total time consumed by the entire STAP processing part using EDMA to move the data to be processed from DDR to the MSM memory was counted, and the time consumption comparison between the prior art and the technology of the present invention was plotted in Table 2.

[0107] The radar parameter conditions in simulation experiment 2 are the same as those in simulation experiment 1, and the DSP8 core is used as an example for signal processing. In simulation experiment 2, the two existing technologies used are the same as those in simulation experiment 1.

[0108] Table 2 Comparison of the data interaction time consumption between the prior art and the present invention

[0109] Time consumed (ms) Prior art 21.6193 Method of the present invention 0.0013

[0110] As shown in Table 2, the total time consumed by the prior art in transferring data from DDR using EDMA in the STAP processing part is 2.7024ms. However, the total time consumed by the present invention in transferring data from DDR using EDMA in the STAP processing part is only 0.0013ms; and the output results of the two are exactly the same, which shows that the present invention reduces the time consumed by transferring data from DDR to the memory to be processed by about KL / 8 times by using the EDMA algorithm without affecting the signal processing results.

[0111] In the above two simulation experiments, the radar parameters and radar data of the present invention are completely consistent with those of the prior art, so the target position output performance of the present invention is completely consistent with that of the prior art. Compared with the prior art, the total time consumed by EDMA to transfer the data to be processed from DDR to MSM memory is greatly reduced in the present invention. The prior art uses EDMA to transfer data from DDR3 and waits for the transmission to be completed each time, without utilizing the characteristic of EDMA being independent of the CPU, resulting in low transmission efficiency and a long time consumption for data interaction between different memories. The present invention designs a ping-pong-like data structure, utilizing the ability of EDMA to transmit batch data independently of the CPU background, and while the current signal is being processed, the next data to be processed is transferred from DDR to the buffer, so that the next signal processing does not need to wait in situ for the data to be completed, greatly improving the efficiency of data interaction between DDR and L2 and MSM memory, thereby improving the space-time adaptive processing speed.

[0112] In summary, the two simulation experiments of the present invention show that the present invention is a multi-core parallel architecture and difference STAP angle measurement implementation method, which not only solves the problem of large error in sum and difference STAP angle measurement under low time domain pulse number, but also solves the problem of extra time consumption of EDMA data transfer, and improves the parallel architecture and difference STAP angle measurement performance and signal processing speed. The implementation process of the present invention includes: system hardware configuration; DSP receiving radar multi-beam data and radar parameters; space-time adaptive processing; CFAR detection; and difference STAP angle measurement. The present invention only detects the distance unit position of the target in the space-time adaptive processing stage, and then detects the Doppler of the target after interpolation operation of the target distance unit, and performs full-dimensional and difference STAP angle measurement based on this, which solves the problem of large error in angle measurement under low pulse number. The present invention uses the EDMA data transmission method of ping-pong structure in the STAP process, and only the first access to data will be time-consuming, and the subsequent access to data does not need to wait in situ, which greatly improves the efficiency of data interaction between DDR and L2 and MSM memory, thereby improving the space-time adaptive processing speed. The invention reduces the error of the sum difference STAP angle estimation when the radar has a low pulse number, improves the utilization efficiency of EDMA, speeds up the space-time adaptive processing speed, and is suitable for clutter suppression and target detection in radar signal processing.

Claims

1. A method for implementing sum and difference STAP angle measurement based on a multi-core parallel architecture, characterized in that: The CFAR algorithm is used to detect the distance position of the target and construct a ping-pong buffer data structure for EDMA data transmission. The specific steps of the angle measurement method include the following: Step 1: The front-end antenna receives radar echo data and transmits it to DSP; Step 2, DSP receives radar multi-beam data and radar parameters; Step 3, constructing a ping-pong buffer data structure for EDMA transmission data; Step 4, divide the STAP multi-core parallel tasks according to the number of Doppler channels of the radar multi-beam data; Step 5, perform CFAR processing on the result after STAP clutter suppression to detect the distance position of the target; Step 6: Perform sum and difference STAP angle measurement based on the CFAR detection results.

2. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 1, characterized in that: The process of the front-end antenna receiving radar echo data and transmitting it to the DSP in step 1 is as follows: In the first step, a field programmable gate array (FPGA) is used to receive radar echo data within a pulse repetition frequency interval in real time through the front-end antenna; In the second step, the DSP signal processing board is connected to the FPGA through the SRIO bus to achieve high-speed data transmission between the FPGA and DSP, and transmit the radar echo data from the FPGA to the DSP.

3. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 1, characterized in that: The process of DSP receiving radar multi-beam data and radar parameters in step 2 is as follows: The first step is to sample the radar echo of each receiving channel of the array radar antenna; The second step is to perform beamforming on the sampled radar echo data, and form three beams of sum, difference and difference on the obtained radar multi-beam data to complete the spatial dimension reduction of the radar echo data; The third step is to send the radar parameters and the radar echo data after spatial dimension reduction to the DDR3 memory of the DSP in real time in units of a coherent pulse accumulation time; In the fourth step, DSP performs STAP processing on the data in the memory according to the radar parameters within a coherent pulse accumulation time.

4. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 1, characterized in that: The ping-pong buffer-like data structure in step 3 is: two buffers are opened in the memory area, and when one of the buffers is used for signal processing, EDMA writes data to the other buffer.

5. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 4, characterized in that: The steps for dividing the STAP multi-core parallel tasks described in step 4 are as follows: In the first step, each core writes the data to be detected into one of the two buffers, buffer A; In the second step, while the echo data in buffer A is being STAP processed, the other buffer B is writing the data to be detected; The third step is to perform STAP processing on the echo data in buffer B while writing the data to be detected into buffer A; Step 4: Determine whether there is any data that has not been written into the buffer. If so, execute step 5; otherwise, execute step 1. The fifth step is to complete the division of STAP multi-core parallel tasks.

6. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 1, characterized in that: The steps of STAP clutter suppression described in step 5 are as follows: The first step is to select unselected data from the data to be detected in the buffer as samples to be detected, and select data of the same length before and after the samples to be detected as training samples; The second step is to calculate the covariance matrix R of the selected samples according to the following formula: X : Among them, L t Indicates the length of the selected sample to be tested, X t represents the selected training sample, and the superscript H represents the conjugate transpose operation; The third step is to calculate the covariance matrix R according to the following formula: X Find the inverse: R XV =U -1 L -1 P Among them, R XV Represents the covariance matrix R X The inverse matrix of , P represents the permutation matrix, L represents the lower triangular matrix, U represents the upper triangular matrix, and the superscript -1 represents the inverse operation; Step 4: Calculate the clutter suppression Y output by the current range unit of the current Doppler channel according to the following formula: out : Where S represents the guidance vector in the reduced dimension space obtained from the radar parameters, X c Indicates the selected sample to be tested; Step 5: determine whether all the data to be detected in the buffer have been selected. If so, execute step 6; otherwise, execute step 1. Step 6: Complete STAP clutter suppression for all data to be detected.

7. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 1, characterized in that: The steps of the CFAR process described in step 5 are as follows: The first step is to calculate the result Y obtained by each STAP clutter suppression out Power P out ; The second step is to convert each P out and the background power P in the environment background In comparison; The third step is to determine P out Is it greater than or equal to P bac If so, then determine Y out If there is a target, record the distance unit number of the current target. Otherwise, it is determined that there is no target and skip this comparison to proceed to the next detection. out =P background f0, f0 represents the CFAR detection factor.

8. The method for implementing the sum-difference STAP angle measurement based on a multi-core parallel architecture according to claim 1, characterized in that: The steps for performing the sum and difference STAP angle measurement described in step 6 are as follows: The first step is to select the sum beam data from the sum and difference beams after beamforming, and perform FFT interpolation processing on the target position of the sum beam data. The interpolation multiple is arbitrarily selected in the range of [2, 10]. The second step is to take the Doppler value of the target peak position after FFT interpolation as the target Doppler value, and calculate the time domain steering vector based on it; The third step is to combine all the training samples of the sum-difference-difference three-beam target position, calculate the adaptive processing weights, apply the weights to the target position, and obtain the output of the sum-difference-difference channel after clutter suppression; The fourth step is to obtain the difference-sum ratio based on the output of the sum-difference channel after clutter suppression, and obtain the azimuth and pitch angle of the target position by combining the slope of the angle detection curve.

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