Resistor and manufacturing method thereof

Abstract

The invention provides a resistor and a manufacturing method thereof. The resistor comprises a substrate; the resistance layer is located on the lower surface of the substrate; the first electrode layer is located on the lower surface of the substrate, the first electrode layer comprises a first sub-part and a second sub-part which are located on the two sides of the resistance layer in the first direction respectively, and at least part of the first sub-part and at least part of the second sub-part cover part of the resistance layer respectively; the first welding part and the second welding part are located on the sides, away from the substrate, of the first sub-part and the second sub-part respectively and electrically connected with the first sub-part and the second sub-part respectively, in the vertical direction, projections of the first welding part, the first sub-part and the resistive layer are overlapped, and projections of the second welding part, the second sub-part and the resistive layer are overlapped.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic information technology, and in particular to a resistor and a method for manufacturing the same. Background Art

[0002] Chip resistors are a type of electronic component that are widely used in various electronic devices, such as smart phones, tablet computers, computer motherboards, TV cards, automotive electronics, and aerospace fields. They have a very wide range of applications and are an indispensable part of modern electronic devices.

[0003] The electrodes of a chip resistor are usually composed of a back electrode, a positive electrode and an end electrode connected in series. For chip resistors with ultra-low resistance, as the resistance of the resistor decreases, the resistance of the resistor electrode itself accounts for an increasing proportion of the overall resistance. The combined effect leads to problems such as reduced resistor accuracy and worse resistance-temperature characteristics, making it unable to meet high-precision usage requirements. Summary of the invention

[0004] The present application provides a resistor, comprising:

[0005] substrate;

[0006] A resistance layer, located on the lower surface of the substrate;

[0007] A first electrode layer, located on a lower surface of the substrate, the first electrode layer comprising a first sub-portion and a second sub-portion respectively located on both sides of the resistance layer along a first direction, at least a portion of the first sub-portion and at least a portion of the second sub-portion respectively covering a portion of the resistance layer;

[0008] The first welding portion and the second welding portion are respectively located on the side of the first sub-portion and the second sub-portion away from the substrate, and are respectively electrically connected to the first sub-portion and the second sub-portion. In the vertical direction, the projections of the first welding portion, the first sub-portion and the resistance layer overlap, and the projections of the second welding portion, the second sub-portion and the resistance layer overlap.

[0009] In some embodiments, the resistive layer comprises an alloy foil.

[0010] In some embodiments, the resistor further includes: an adhesive layer located between the resistor layer and the substrate.

[0011] In some embodiments, in the first direction, a side wall of the first sub-portion away from the second sub-portion and a side wall of the second sub-portion away from the first sub-portion are respectively flush with a side wall of the substrate; the resistor further includes:

[0012] a second electrode layer, located on the upper surface of the substrate; the second electrode layer comprises a third sub-portion and a fourth sub-portion arranged along a first direction, wherein in the first direction, a side wall of the third sub-portion away from the fourth sub-portion and a side wall of the fourth sub-portion away from the third sub-portion are respectively flush with a side wall of the substrate;

[0013] The third electrode layer is located on the side walls of the substrate that are opposite to each other in the first direction. The third electrode layer also covers the side walls of the first sub-section and the side walls of the third sub-section to electrically connect the first sub-section and the third sub-section, and covers the side walls of the second sub-section and the side walls of the fourth sub-section to electrically connect the second sub-section and the fourth sub-section.

[0014] In some embodiments, the resistor further comprises:

[0015] A barrier layer, covering the exposed surfaces of the first electrode layer, the second electrode layer and the third electrode layer;

[0016] A welding layer covers the exposed surface of the barrier layer; wherein at least a portion of the welding layer located on a side of the first sub-portion away from the substrate and at least a portion of the welding layer located on a side of the second sub-portion away from the substrate constitute the first welding portion and the second welding portion respectively.

[0017] The present application also provides a method for manufacturing a resistor, comprising:

[0018] Providing a substrate, and forming a resistance layer on the lower surface of the substrate;

[0019] forming a first electrode layer on the lower surface of the substrate, the first electrode layer comprising a first sub-portion and a second sub-portion respectively located on both sides of the resistance layer along a first direction, at least a portion of the first sub-portion and at least a portion of the second sub-portion respectively covering a portion of the resistance layer;

[0020] A first welding portion and a second welding portion are formed, wherein the first welding portion and the second welding portion are respectively located on a side of the first sub-portion and the second sub-portion away from the substrate, and are respectively electrically connected to the first sub-portion and the second sub-portion, and in the vertical direction, the projections of the first welding portion, the first sub-portion and the resistance layer overlap, and the projections of the second welding portion, the second sub-portion and the resistance layer overlap.

[0021] In some embodiments, forming a resistance layer on the lower surface of the substrate includes:

[0022] Providing an adhesive layer and a resistive material layer, and bonding the resistive material layer to the lower surface of the substrate through the adhesive layer;

[0023] A photolithography process is performed on the resistance material layer to form multiple columns of resistance layers, each column of resistance layers includes multiple resistance layers arranged along a second direction intersecting with the first direction, the number of first electrode layers is multiple, and in the first direction, the first sub-portion and the second sub-portion of each of the first electrode layers are correspondingly arranged on both sides of each of the resistance layers.

[0024] In some embodiments, the method further comprises:

[0025] A plurality of second electrode layers are formed on the upper surface of the substrate, each of the second electrode layers includes a third sub-portion and a fourth sub-portion arranged along the first direction, and in the vertical direction, the third sub-portion and the fourth sub-portion of each second electrode layer are respectively arranged opposite to the first sub-portion and the second sub-portion of each first electrode layer.

[0026] In some embodiments, after forming the first electrode layer and the second electrode layer, the method further includes:

[0027] The substrate is divided into a plurality of strip substrates extending along the second direction, each of the strip substrates has a plurality of resistor layers arranged along the second direction, and in the first direction, a side wall of the first sub-portion away from the second sub-portion and a side wall of the second sub-portion away from the first sub-portion are respectively flush with the side wall of the strip substrate, and a side wall of the third sub-portion away from the fourth sub-portion and a side wall of the fourth sub-portion away from the third sub-portion are respectively flush with the side wall of the strip substrate;

[0028] A plurality of third electrode layers are formed, wherein at least a portion of each of the third electrode layers is located on side walls of the strip substrate that are oppositely arranged in the first direction, and each of the third electrode layers also covers the side walls of the first sub-portion and the side walls of the third sub-portion to electrically connect the first sub-portion and the third sub-portion, and covers the side walls of the second sub-portion and the side walls of the fourth sub-portion to electrically connect the second sub-portion and the fourth sub-portion.

[0029] In some embodiments, after forming the third electrode layer, the direction further includes:

[0030] Dividing the strip substrate into a plurality of sub-substrates, each of the sub-substrates having a resistor layer and a first electrode layer, a second electrode layer and a third electrode layer electrically connected to the resistor layer;

[0031] forming a barrier layer on the sub-substrate, wherein the barrier layer covers exposed surfaces of the first electrode layer, the second electrode layer and the third electrode layer;

[0032] A welding layer is formed on the sub-substrate, and the welding layer covers the exposed surface of the barrier layer; wherein at least a portion of the welding layer located on a side of the first sub-portion away from the sub-substrate and at least a portion of the welding layer located on a side of the second sub-portion away from the sub-substrate constitute the first welding portion and the second welding portion, respectively.

[0033] The present application provides a resistor and a manufacturing method thereof, wherein the resistor includes: a substrate; a resistor layer, located on the lower surface of the substrate; a first electrode layer, located on the lower surface of the substrate, the first electrode layer includes a first sub-portion and a second sub-portion, respectively located on both sides of the resistor layer along a first direction, at least a portion of the first sub-portion and at least a portion of the second sub-portion respectively cover a portion of the resistor layer; a first welding portion and a second welding portion, respectively located on a side of the first sub-portion and the second sub-portion away from the substrate, and respectively electrically connected to the first sub-portion and the second sub-portion, in the vertical direction, the projections of the first welding portion, the first sub-portion and the resistor layer overlap, and the projections of the second welding portion, the second sub-portion and the resistor layer overlap. In this way, the resistor layer, the first electrode layer, the first welding part and the second welding part of the resistor are all located on the lower surface of the substrate, and in the vertical direction, the projections of the first welding part, the first sub-part and the resistor layer overlap, and the projections of the second welding part, the second sub-part and the resistor layer overlap. In actual applications, when the resistor is electrically connected to an external device through the first welding part and the second welding part and used, the path of the current passing through the first welding part and the second welding part to reach the resistor layer is shortened. In this way, the resistance value of the electrode layer of the resistor is reduced in the overall resistance value of the resistor, thereby improving the accuracy and resistance temperature characteristics of the resistor.

[0034] The details of one or more embodiments of the present disclosure are set forth in the accompanying drawings and the description below. Other features and advantages of the present disclosure will become apparent from the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 A schematic diagram of the structure of a resistor provided in some embodiments of the present application;

[0037] Figure 2 A flowchart of a method for manufacturing a resistor provided in some embodiments of the present application;

[0038] Figures 3a to 9A schematic flow chart of a method for manufacturing a resistor provided in some embodiments of the present application, wherein: Figure 3b , Figure 4b , Figure 5b , Figure 6b , Figure 7 , Figure 8b as well as Fig. 9 is a bottom-up schematic diagram of a resistor. Figure 3a , Figure 4a , Figure 5a , Figure 6a , Figure 8a Along the Figure 3b , Figure 4b , Figure 5b , Figure 6b , Figure 8b A schematic cross-sectional view taken along line AA'. DETAILED DESCRIPTION

[0039] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the specific embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0040] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0041] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0042] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present disclosure necessarily has the first element, component, region, layer or part.

[0043] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0044] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0045] Chip resistors are a type of electronic component that are widely used in various electronic devices, such as smart phones, tablet computers, computer motherboards, TV cards, automotive electronics, and aerospace fields. They have a very wide range of applications and are an indispensable part of modern electronic devices.

[0046] Chip resistors are divided into chip thick film resistors and chip thin film resistors. Chip resistors usually include a resistor layer and an electrode layer electrically connected to the resistor layer. The electrode layer is usually composed of a back electrode, a positive electrode and an end electrode in series. Chip thin film resistors form a metal film layer on the surface of a ceramic substrate as a resistor layer. The thickness of the metal film layer is at the nanometer level, and it is impossible to form an ultra-low resistance resistor. Chip thick film resistors print resistor slurry on the surface of a ceramic substrate. Ultra-low resistance can be achieved by increasing the thickness of the film layer and selecting a low square resistance slurry. However, as the resistance decreases, the proportion of the resistance of the electrode layer of the chip film resistor itself in the overall resistance increases. The combined effect leads to problems such as reduced accuracy and poor resistance-temperature characteristics of the resistor, which cannot meet high-precision usage requirements.

[0047] In addition, the step of forming the resistor includes processing the material layer of the resistor layer after forming the material layer of the resistor layer on the substrate to form the resistor layer with a predetermined size and shape. However, in the related art, the material layer of the resistor layer is usually processed by laser cutting, mold stamping and other processes, and the resistors formed include the following models: 2512 (size is 6.3mm×3.2mm), 2010 (size is 5.0mm×2.5mm), 1206 (size is 3.2mm×1.6mm) and 0805 (size is 2.0mm×1.2mm), and it is impossible to form a resistor with a smaller size.

[0048] Based on this, the inventor proposed a technical solution, in which the resistance layer, the first electrode layer, the first welding part and the second welding part of the resistor are all located on the lower surface of the substrate, and in the vertical direction, the projections of the first welding part, the first sub-part and the resistance layer overlap, and the projections of the second welding part, the second sub-part and the resistance layer overlap. In actual applications, when the resistor is electrically connected to an external device through the first welding part and the second welding part and used, the path of the current passing through the first welding part and the second welding part to reach the resistance layer is shortened. In this way, the resistance value of the electrode layer of the resistor is reduced as a proportion of the overall resistance value of the resistor, thereby improving the accuracy and resistance-temperature characteristics of the resistor.

[0049] Below, some embodiments of the present application are described in detail with reference to the accompanying drawings.

[0050] like Figure 1As shown, the present application provides a resistor, including: a substrate 10; a resistor layer 12, located on the lower surface S1 of the substrate 10; a first electrode layer 13, located on the lower surface S1 of the substrate 10, the first electrode layer 13 includes a first sub-portion 131 and a second sub-portion 132, which are respectively located on both sides of the resistor layer 12 along a first direction, at least a portion of the first sub-portion 131 and at least a portion of the second sub-portion 132 respectively cover a portion of the resistor layer 12; a first welding portion 181 and a second welding portion 182, which are respectively located on a side of the first sub-portion 131 and the second sub-portion 132 away from the substrate 10, and are respectively electrically connected to the first sub-portion 131 and the second sub-portion 132, in the vertical direction, the projections of the first welding portion 181, the first sub-portion 131 and the resistor layer 12 overlap, and the projections of the second welding portion 182, the second sub-portion 132 and the resistor layer 12 overlap.

[0051] like Figure 1 As shown, in some embodiments of the present application, the resistor layer 12, the first electrode layer 13, and the first welding portion 181 and the second welding portion 182 of the resistor are all located on the lower surface S1 of the substrate 10, and in the vertical direction, the projections of the first welding portion 181, the first sub-portion 131 and the resistor layer 12 overlap, and the projections of the second welding portion 182, the second sub-portion 132 and the resistor layer 12 overlap. In actual applications, when the resistor is electrically connected to an external device (such as a PCB board) through the first welding portion 181 and the second welding portion 182 and used, the path for the current to reach the resistor layer 12 through the first welding portion 181 and the second welding portion 182 is shortened. In this way, the proportion of the resistance of the electrode layer (such as the first electrode layer 13) of the resistor in the overall resistance of the resistor is reduced, thereby improving the accuracy and resistance-temperature characteristics of the resistor.

[0052] In some embodiments, the substrate 10 is a ceramic substrate, and the material of the ceramic substrate includes aluminum oxide. However, the present invention is not limited thereto, and the substrate 10 may also be other suitable insulating substrates.

[0053] In some embodiments, the resistance layer 12 includes an alloy foil, and the material of the alloy foil includes one or a combination of manganese-copper alloy, nickel-copper alloy, nickel-chromium alloy, nickel-iron alloy, manganese-copper-tin alloy, manganese-copper-nickel alloy, nickel-copper-iron alloy, nickel-chromium-aluminum-silicon alloy, etc. The alloy foil has excellent electrical conductivity and ultra-low resistance. The present application uses alloy foil as the resistance layer 12 of the resistor to manufacture a resistor with ultra-low resistance.

[0054] In some embodiments, the resistor further includes: an adhesive layer 11, located between the resistor layer 12 and the substrate 10, and the resistor layer 12 is fixed to the substrate 10 through the adhesive layer 11. The present application bonds the resistor layer 12 to the substrate 10 through the adhesive layer 11, which simplifies the manufacturing process of the resistor and reduces the process complexity of the resistor compared to the related art of printing the resistor paste on the substrate surface. In some embodiments, the material of the adhesive layer 11 may include one or more of butyl rubber, polyisobutylene, polyisoprene, polyolefin elastomer, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer, and polyvinyl butyral ester.

[0055] In practical applications, after the alloy foil is bonded to the substrate 10, the alloy foil can be etched into a resistor layer 12 with a predetermined size and shape using a photolithography process. Compared with laser cutting, mold stamping and other processing techniques, the alloy foil can be processed using a photolithography process to achieve the preparation of a small-size resistor layer 12 and the preparation of small-size products with a package size of 0603 (1.6mm×0.8mm), thereby meeting the high-density and miniaturization development trend of surface mount (SMT) design.

[0056] like Figure 1 As shown, in the first direction, the first sub-portion 131 and the second sub-portion 132 of the first electrode layer 13 are respectively located at two ends of the substrate 10, and the side wall of the first sub-portion 131 away from the second sub-portion 132 is flush with the side wall of the substrate 10, and the side wall of the second sub-portion 132 away from the first sub-portion 131 is flush with the side wall of the substrate 10, so that when the third electrode layer 16 is subsequently formed on the side wall of the substrate 10, it is convenient for the third electrode layer 16 to be connected with the first sub-portion 131 and the second sub-portion 132. Here, flush includes substantially flush.

[0057] Figure 1 The two ends of the resistor layer 12 shown in the figure are indented inwardly relative to the side wall of the substrate 10, the first sub-portion 131 covers part of the substrate 10 and part of the resistor layer 12, and the second sub-portion 132 covers part of the substrate 10 and part of the resistor layer 12. However, it is not limited to this. In some other embodiments, the resistor layer 12 can also extend to the edge of the substrate 10, and the first sub-portion 131 and the second sub-portion 132 are formed on the surface of the resistor layer 12 on one side away from the substrate 10 to increase the applicable scenarios.

[0058] In some embodiments, the resistor further includes: a second electrode layer 14, located on the upper surface S2 of the substrate 10; the second electrode layer 14 includes a third sub-portion 141 and a fourth sub-portion 142 arranged along the first direction; in the first direction, the side wall of the third sub-portion 141 away from the fourth sub-portion 142 is flush with the side wall of the substrate 10, and the side wall of the fourth sub-portion 142 away from the third sub-portion 141 is flush with the side wall of the substrate 10, so that when the third electrode layer 16 is subsequently formed on the side wall of the substrate 10, it is convenient for the third electrode layer 16 to be connected with the third sub-portion 141 and the fourth sub-portion 142. Here, flush includes substantially flush.

[0059] In some embodiments, the resistor also includes: a third electrode layer 16, which is at least partially located on the side walls of the substrate 10 that are relatively arranged in the first direction, and the third electrode layer 16 also covers the side walls of the first sub-portion 131 and the side walls of the third sub-portion 141 to electrically connect the first sub-portion 131 and the third sub-portion 141, and covers the side walls of the second sub-portion 132 and the side walls of the fourth sub-portion 142 to electrically connect the second sub-portion 132 and the fourth sub-portion 142.

[0060] In the present application, in actual applications, when the resistor is connected to an external device and used, current will not flow through the second electrode layer 14 and the third electrode layer 16, that is, the second electrode layer 14 and the third electrode layer 16 do not play an electrical role, so as to reduce the influence of the resistance of the second electrode layer 14 and the fourth electrode layer 16 on the overall resistance of the resistor, and the second electrode layer 14 and the third electrode layer 16 can support the first electrode layer 13 to improve the stability of the resistor.

[0061] In practical applications, the first electrode layer 13 and the second electrode layer 14 may be formed by a screen printing process, and after the first electrode layer 13 and the second electrode layer 14 are formed, the third electrode layer 16 is formed by a sputtering process. In some embodiments, the materials of the first electrode layer 13, the second electrode layer 14, and the third electrode layer 16 may be the same, partially the same, or different, and the materials of the first electrode layer 13, the second electrode layer 14, and the third electrode layer 16 include one or more of silver (Ag), copper (Cu), nickel chromium (NiCr), and the like.

[0062] In some embodiments, the resistor further includes a mark 19 formed on the upper surface S2 of the substrate 10, and the mark 19 is used to distinguish the upper and lower sides of the resistor. In some embodiments, when the resistor is connected to an external device (such as a PCB board), the side of the resistor with the mark 19 formed thereon can be soldered on the PCB board with the side facing upward. The mark 19 can be text or a pattern.

[0063] like Figure 1As shown, in some embodiments, the resistor further includes a protective layer 15, which covers a surface of the resistor layer 12 located between the first sub-portion 131 and the second sub-portion 132 and away from the substrate 10. The material of the protective layer 15 includes but is not limited to epoxy resin. In actual operation, the protective layer 15 can be formed by screen printing after the first electrode layer 13 is formed, so as to protect the resistor layer 12 from dust and electrical isolation.

[0064] In some embodiments, the protective layer 15 also covers part of the first sub-portion 131 and part of the second sub-portion 132 , thereby improving the sealing of the protective layer 15 to the resistor layer 12 and preventing pollutants such as dust and water vapor from reaching the resistor layer 12 through the junction between the protective layer 15 and the first electrode layer 13 .

[0065] like Figure 1 As shown, in some embodiments, the resistor further includes: a barrier layer 17, covering the exposed surfaces of the first electrode layer 13, the second electrode layer 14 and the third electrode layer 16; a welding layer 18, covering the exposed surface of the barrier layer 17; wherein at least a portion of the welding layer 18 located on the side of the first sub-portion 131 away from the substrate 10 and at least a portion of the welding layer 18 located on the side of the second sub-portion 132 away from the substrate 10 respectively constitute a first welding portion 181 and a second welding portion 182. Here, the exposed surfaces of the first electrode layer 13, the second electrode layer 14 and the third electrode layer 16 refer to the surfaces of the first electrode layer 13, the second electrode layer 14 and the third electrode layer 16 except the surfaces in contact with the substrate 10, the resistor layer 12, the adhesive layer 11 and the protective layer 15, and the exposed surface of the barrier layer 17 refers to the surface of the barrier layer 17 except the surfaces in contact with the first electrode layer 13, the second electrode layer 14, the third electrode layer 16 and the protective layer 15.

[0066] In some embodiments, the barrier layer 17 includes but is not limited to a nickel layer, and the solder layer 18 includes but is not limited to a tin-lead layer. The barrier layer 17 and the solder layer 18 may be formed by an electroplating process.

[0067] like Figure 1 As shown, in some embodiments, in the first direction, both ends of the protective layer 15 are retracted inward relative to the resistance layer 12 to avoid the protective layer 15 completely blocking the resistance layer 12 in the vertical direction, thereby preventing the first welding portion 181 and the second welding portion 182 formed after the protective layer 15 are formed, and the projection of the blocking layer 17 in the vertical direction from overlapping with the projection of the resistance layer 12 in the vertical direction.

[0068] The present application also provides a method for manufacturing a resistor. Figure 2 As shown, the manufacturing method includes:

[0069] Step S101, providing a substrate, and forming a resistance layer on the lower surface of the substrate;

[0070] Step S102, forming a first electrode layer on the lower surface of the substrate, the first electrode layer comprising a first sub-portion and a second sub-portion respectively located on both sides of the resistance layer along a first direction, at least a portion of the first sub-portion and at least a portion of the second sub-portion respectively covering a portion of the resistance layer;

[0071] Step S103, forming a first welding portion and a second welding portion, wherein the first welding portion and the second welding portion are respectively located on a side of the first sub-portion and the second sub-portion away from the substrate, and are respectively electrically connected to the first sub-portion and the second sub-portion, and in the vertical direction, the projections of the first welding portion, the first sub-portion and the resistance layer overlap, and the projections of the second welding portion, the second sub-portion and the resistance layer overlap.

[0072] The manufacturing method of the present application is further described in detail below with reference to the accompanying drawings.

[0073] First, execute step S101, such as Figures 3a to 4b As shown, a substrate 10 is provided, and a resistance layer 12 is formed on a lower surface S1 of the substrate 10 .

[0074] In some embodiments, the substrate 10 is a ceramic substrate, and the material of the ceramic substrate includes alumina. However, the substrate 10 is not limited thereto, and may also be other suitable insulating substrates. In some embodiments, when the structure is formed on the lower surface S1 of the substrate 10, the lower surface S1 of the substrate 10 may be operated upward.

[0075] Specifically, the resistor layer 12 is formed on the lower surface S1 of the substrate 10, including:

[0076] Providing an adhesive layer 11 and a resistive material layer 12', and bonding the resistive material layer 12' to the lower surface S1 of the substrate 10 through the adhesive layer 11;

[0077] A photolithography process is performed on the resistance material layer 12 ′ to form a plurality of columns of resistance layers 12 , each column of resistance layers 12 including a plurality of resistance layers 12 arranged along a second direction intersecting the first direction.

[0078] Here, the adhesive layer 11 can be first bonded to the lower surface S1 of the substrate 10, and then the resistor material layer 12' can be bonded to the side surface of the adhesive layer 11 away from the substrate 10. In some embodiments, the resistor material layer 12' and the adhesive layer 11 can also be subjected to a lamination process to make the resistor material layer 12' more firmly bonded to the substrate 10. The present application bonds the resistor layer 12 to the substrate 10 through the adhesive layer 11, which simplifies the manufacturing process of the resistor and reduces the process complexity of the resistor compared to printing the resistor paste on the substrate surface in the related art. In some embodiments, the material of the adhesive layer 11 may include one or more of butyl rubber, polyisobutylene, polyisoprene, polyolefin elastomer, ethylene-vinyl acetate copolymer, thermoplastic polyurethane elastomer, and polyvinyl butyral ester.

[0079] In some embodiments, the resistance material layer 12' includes an alloy foil, and the material of the alloy foil includes one or a combination of manganese-copper alloy, nickel-copper alloy, nickel-chromium alloy, nickel-iron alloy, manganese-copper-tin alloy, manganese-copper-nickel alloy, nickel-copper-iron alloy, nickel-chromium-aluminum-silicon alloy, etc. The alloy foil has excellent electrical conductivity and ultra-low resistance. The present application uses alloy foil as the resistance layer 12 of the resistor to manufacture a resistor with ultra-low resistance.

[0080] In practical applications, after the resistor material layer 12' is bonded to the substrate 10, the resistor material layer 12' can be etched into a resistor layer 12 with a predetermined size and shape by a photolithography process, that is, a photoresist is formed on the surface of the resistor material layer 12', and then the photoresist is exposed, and then the image of the photoresist is transferred to the resistor material layer 12' by an etching process to form a multi-column resistor layer 12. Compared with the laser cutting, mold stamping and other processing techniques mentioned in the related art, the resistor material layer 12' is processed by a photolithography process, which can realize the preparation of a small-size resistor layer 12 and the preparation of a small-size product with a package size of 0603 (1.6mm×0.8mm), thereby meeting the high-density and miniaturization development trend of surface mount (SMT) design.

[0081] like Figure 4b As shown, in some embodiments, multiple rows of resistor layers 12 are arranged along a first direction on the substrate 10, and the first direction and the second direction are both parallel to the plane of the substrate 10, and the two are oblique or perpendicular. However, it is not limited to this, and the multiple rows of resistor layers 12 can also be arranged along other directions intersecting the first direction and the second direction, and the present application does not make too many restrictions on this.

[0082] Next, execute step S102, such as Figure 5a to Figure 5bAs shown, a first electrode layer 13 is formed on the lower surface S1 of the substrate 10, and the first electrode layer 13 includes a first sub-portion 131 and a second sub-portion 132 respectively located on both sides of the resistance layer 12 along the first direction, and at least a portion of the first sub-portion 131 and at least a portion of the second sub-portion 132 respectively cover a portion of the resistance layer 12.

[0083] like Figure 5b As shown, in some embodiments, there are multiple first electrode layers 13 , and in the first direction, the first sub-portion 131 and the second sub-portion 132 of each first electrode layer 13 are correspondingly disposed on both sides of each resistor layer 12 .

[0084] In some embodiments, in the first direction, the second sub-portion 132 of the first electrode layer 13 can be connected to the first sub-portion 131 of the next adjacent first electrode layer 13, and the adjacent first electrode layers 13 and substrate 10 can be subsequently separated along the first dividing line L1 between the two by laser cutting or mechanical cutting process.

[0085] Figure 5a The first sub-portion 131 shown in the figure covers part of the substrate 10 and part of the resistor layer 12, and the second sub-portion 132 covers part of the substrate 10 and part of the resistor layer 12. However, it is not limited thereto. In some other embodiments, the first sub-portion 131 and the second sub-portion 132 may not contact the substrate 10, and the first sub-portion 131 and the second sub-portion 132 may also be formed on the surface of one side of the resistor layer 12 away from the substrate 10 at both ends in the first direction, so as to increase the applicable scenarios.

[0086] like Figure 5a As shown, in some embodiments, the method also includes: forming a plurality of second electrode layers 14 on the upper surface S2 of the substrate 10, each second electrode layer 14 includes a third sub-portion 141 and a fourth sub-portion 142 arranged along the first direction, and in the vertical direction, the third sub-portion 141 and the fourth sub-portion 142 of each second electrode layer 14 are respectively arranged opposite to the first sub-portion 131 and the second sub-portion 132 of each first electrode layer 13.

[0087] In practical applications, the first electrode layer 13 and the second electrode layer 14 can be formed at corresponding positions of the substrate 10 by successively performing a screen printing process and a sintering process. In some embodiments, the materials of the first electrode layer 13 and the second electrode layer 14 can be the same or different, and the materials of the first electrode layer 13 and the second electrode layer 14 include one or more of silver (Ag), tungsten (W), copper (Cu), titanium (Ti), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), etc.

[0088] In some embodiments, after forming the first electrode layer 13 and the second electrode layer 14 , the method further includes adjusting the resistance value of the current resistor.

[0089] like Figure 6a to Figure 6b As shown, in some embodiments, after adjusting the resistance and forming the first electrode layer 13 and the second electrode layer 14, the method further includes: forming a protective layer 15, the protective layer 15 covers the surface of the resistor layer 12 located between the first sub-portion 131 and the second sub-portion 132 and away from the substrate 10. The material of the protective layer 15 includes but is not limited to epoxy resin. In actual operation, the protective layer 15 can be formed by screen printing after the first electrode layer 13 is formed to protect the resistor layer 12 from dust and electrical isolation. In some embodiments, the protective layer 15 also covers part of the first sub-portion 131 and part of the second sub-portion 132, so as to improve the sealing performance of the protective layer 15 to the resistor layer 12, and prevent pollutants such as dust and water vapor from reaching the resistor layer 12 through the junction between the protective layer 15 and the first electrode layer 13.

[0090] See again Figure 6a to Figure 6b In some embodiments, the method further includes: forming a mark 19 on the upper surface S2 of the substrate 10, the mark 19 being used to distinguish the upper and lower surfaces of the resistor. In some embodiments, when the resistor is connected to an external device (such as a PCB), the side of the resistor with the mark 19 formed thereon can be soldered on the PCB with the side facing upward. The mark 19 can be text or a pattern.

[0091] Then, if Figure 7 As shown, in some embodiments, after forming the first electrode layer 13 and the second electrode layer 14, the method further includes:

[0092] The substrate 10 is divided into a plurality of strip substrates 10' extending along the second direction, each strip substrate 10' has a row of resistor layers 12, that is, a plurality of resistor layers 12 arranged along the second direction, and in the first direction, the side wall of the first sub-portion 131 away from the second sub-portion 132 and the side wall of the second sub-portion 132 away from the first sub-portion 131 are respectively flush with the side wall of the strip substrate 10', and the side wall of the third sub-portion 141 away from the fourth sub-portion 142 and the side wall of the fourth sub-portion 142 away from the third sub-portion 141 are respectively flush with the side wall of the strip substrate 10'. Here, flush includes substantially flush.

[0093] Here, the substrate 10 may be cut by mechanical cutting or laser cutting. Specifically, in the first direction, the first electrode layer 13 and the substrate 10 may be cut along a first cutting line L1 between the second sub-portion 132 of the first electrode layer 13 and the first sub-portion 131 of the next first electrode layer 13 adjacent thereto.

[0094] Then, if Figure 8a to Figure 8bAs shown, a plurality of third electrode layers 16 are formed, and at least a portion of each third electrode layer 16 is located on the side walls of the strip substrate 10' that are oppositely arranged in the first direction. Each third electrode layer 16 also covers the side walls of the first sub-portion 131 and the side walls of the third sub-portion 141 to electrically connect the first sub-portion 131 and the third sub-portion 141, and covers the side walls of the second sub-portion 132 and the side walls of the fourth sub-portion 142 to electrically connect the second sub-portion 132 and the fourth sub-portion 142.

[0095] The third electrode layer 16 can be formed by a sputtering process. In some embodiments, the material of the third electrode layer 16 can be the same as or different from the material of the first electrode layer 13 or the second electrode layer 14, and the material of the third electrode layer 16 includes one or more of silver (Ag), copper (Cu), nickel chromium (NiCr), etc.

[0096] In the present application, in actual applications, when the resistor is connected to an external device and used, current will not flow through the second electrode layer 14 and the third electrode layer 16, that is, the second electrode layer 14 and the third electrode layer 16 do not play an electrical role, so as to reduce the influence of the resistance of the second electrode layer 14 and the fourth electrode layer 16 on the overall resistance of the resistor, and the second electrode layer 14 and the third electrode layer 16 can support the first electrode layer 13 to improve the stability of the resistor.

[0097] Next, execute step S103, such as Figure 1 As shown, a first welding portion 181 and a second welding portion 182 are formed. The first welding portion 181 and the second welding portion 182 are respectively located on the side of the first sub-portion 131 and the second sub-portion 132 away from the substrate 10, and are respectively electrically connected to the first sub-portion 131 and the second sub-portion 132. In the vertical direction, the projections of the first welding portion 181, the first sub-portion 131 and the resistor layer 12 overlap, and the projections of the second welding portion 182, the second sub-portion 132 and the resistor layer 12 overlap.

[0098] like Fig. 9 As shown, in some embodiments, after forming the third electrode layer 16 and before forming the first welding portion 181 and the second welding portion 182, the method further includes:

[0099] The strip substrate 10 ′ is divided into a plurality of sub-substrates 10 ″, each of which has a resistor layer 12 and a first electrode layer 13 , a second electrode layer 14 and a third electrode layer 16 electrically connected to the resistor layer 12 .

[0100] Here, the strip substrate 10' may be cut by mechanical cutting or laser cutting. Specifically, in the second direction, the substrate 10 may be cut along a second cutting line L2 between two adjacent resistance layers 12.

[0101] Then, if Figure 1 As shown, the method also includes:

[0102] A barrier layer 17 is formed on the sub-substrate 10 ″, and the barrier layer 17 covers the exposed surfaces of the first electrode layer 13, the second electrode layer 14 and the third electrode layer 16;

[0103] A welding layer 18 is formed on the sub-substrate 10", and the welding layer 18 covers the exposed surface of the barrier layer 17; wherein at least a portion of the welding layer 18 located on the side of the first sub-portion 131 away from the substrate 10 and at least a portion of the welding layer 18 located on the side of the second sub-portion 132 away from the substrate 10 constitute a first welding portion 181 and a second welding portion 182, respectively.

[0104] Here, the exposed surfaces of the first electrode layer 13, the second electrode layer 14 and the third electrode layer 16 refer to the surfaces of the first electrode layer 13, the second electrode layer 14 and the third electrode layer 16 except the surfaces in contact with the sub-substrate 10", the resistor layer 12, the adhesive layer 11 and the protective layer 15, and the exposed surface of the barrier layer 17 refers to the surface of the barrier layer 17 except the surfaces in contact with the first electrode layer 13, the second electrode layer 14, the third electrode layer 16 and the protective layer 15.

[0105] It should be noted that, in some embodiments of the present application, the substrate 10 can be cut to form a plurality of strip substrates 10', and the strip substrate 10' can be cut to form a plurality of sub-substrates 10", and whether it is a strip substrate 10' or a sub-substrate 10", it is only a naming distinction for substrates 10 in different states in different operation modes. In fact, the substrate 10 includes a strip substrate 10' and a sub-substrate 10", and the materials of the strip substrate 10' and the sub-substrate 10" are the same as the material of the substrate 10. However, it is not limited to this, and in step S101, only one resistance layer 12 can be formed on the entire substrate 10, and the substrate 10 is not divided subsequently, and only one resistor is formed on the entire substrate 10, or only one resistance layer 12 can be formed on the strip substrate 10', and the strip substrate 10' is not divided subsequently, and only one resistor is formed on one strip substrate 10'.

[0106] In some embodiments, the barrier layer 17 includes but is not limited to a nickel layer, and the solder layer 18 includes but is not limited to a tin-lead layer. The barrier layer 17 and the solder layer 18 may be formed by an electroplating process.

[0107] It can be seen that the resistor layer 12, the first electrode layer 13, the first welding portion 181 and the second welding portion 182 of the resistor of the present application are all located on the lower surface S1 of the substrate 10, and in the vertical direction, the projections of the first welding portion 181, the first sub-portion 131 and the resistor layer 12 overlap, and the projections of the second welding portion 182, the second sub-portion 132 and the resistor layer 12 overlap. In actual applications, when the resistor is electrically connected to an external device (such as a PCB board) through the first welding portion 181 and the second welding portion 182 and used, the path of the current passing through the first welding portion 181 and the second welding portion 182 to reach the resistor layer 12 is shortened. In this way, the resistance value of the electrode layer (such as the first electrode layer 13) of the resistor is reduced in the overall resistance value of the resistor, thereby improving the accuracy and resistance-temperature characteristics of the resistor.

[0108] like Figure 1 As shown, in some embodiments, in the first direction, both ends of the protective layer 15 are retracted inward relative to the resistance layer 12 to avoid the protective layer 15 completely blocking the resistance layer 12 in the vertical direction, thereby preventing the first welding portion 181 and the second welding portion 182 formed after the protective layer 15 are formed, and the projection of the blocking layer 17 in the vertical direction from overlapping with the projection of the resistance layer 12 in the vertical direction.

[0109] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application is described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should all be included in the scope of the claims and specification of the present application. In particular, as long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions that fall within the scope of the claims.

Claims

1. A resistor, characterized in that: include: substrate; A resistance layer, located on the lower surface of the substrate; A first electrode layer, located on a lower surface of the substrate, the first electrode layer comprising a first sub-portion and a second sub-portion respectively located on both sides of the resistance layer along a first direction, at least a portion of the first sub-portion and at least a portion of the second sub-portion respectively covering a portion of the resistance layer; The first welding portion and the second welding portion are respectively located on the side of the first sub-portion and the second sub-portion away from the substrate, and are respectively electrically connected to the first sub-portion and the second sub-portion. In the vertical direction, the projections of the first welding portion, the first sub-portion and the resistance layer overlap, and the projections of the second welding portion, the second sub-portion and the resistance layer overlap.

2. The resistor according to claim 1, characterized in that The resistance layer includes an alloy foil.

3. The resistor according to claim 1, characterized in that The resistor further includes: an adhesive layer located between the resistor layer and the substrate.

4. The resistor according to claim 1, characterized in that In the first direction, a side wall of the first sub-portion away from the second sub-portion and a side wall of the second sub-portion away from the first sub-portion are respectively flush with a side wall of the substrate; the resistor further includes: a second electrode layer, located on the upper surface of the substrate; the second electrode layer comprises a third sub-portion and a fourth sub-portion arranged along a first direction, wherein in the first direction, a side wall of the third sub-portion away from the fourth sub-portion and a side wall of the fourth sub-portion away from the third sub-portion are respectively flush with a side wall of the substrate; The third electrode layer is located on the side walls of the substrate that are opposite to each other in the first direction. The third electrode layer also covers the side walls of the first sub-section and the side walls of the third sub-section to electrically connect the first sub-section and the third sub-section, and covers the side walls of the second sub-section and the side walls of the fourth sub-section to electrically connect the second sub-section and the fourth sub-section.

5. The resistor according to claim 4, characterized in that The resistor also includes: A barrier layer, covering the exposed surfaces of the first electrode layer, the second electrode layer and the third electrode layer; A welding layer covers the exposed surface of the barrier layer; wherein at least a portion of the welding layer located on a side of the first sub-portion away from the substrate and at least a portion of the welding layer located on a side of the second sub-portion away from the substrate constitute the first welding portion and the second welding portion respectively.

6. A method for manufacturing a resistor, characterized in that: include: Providing a substrate, and forming a resistance layer on the lower surface of the substrate; forming a first electrode layer on the lower surface of the substrate, the first electrode layer comprising a first sub-portion and a second sub-portion respectively located on both sides of the resistance layer along a first direction, at least a portion of the first sub-portion and at least a portion of the second sub-portion respectively covering a portion of the resistance layer; A first welding portion and a second welding portion are formed, wherein the first welding portion and the second welding portion are respectively located on a side of the first sub-portion and the second sub-portion away from the substrate, and are respectively electrically connected to the first sub-portion and the second sub-portion, and in the vertical direction, the projections of the first welding portion, the first sub-portion and the resistance layer overlap, and the projections of the second welding portion, the second sub-portion and the resistance layer overlap.

7. The manufacturing method according to claim 6, characterized in that: A resistance layer is formed on the lower surface of the substrate, comprising: Providing an adhesive layer and a resistive material layer, and bonding the resistive material layer to the lower surface of the substrate through the adhesive layer; A photolithography process is performed on the resistance material layer to form multiple columns of resistance layers, each column of resistance layers includes multiple resistance layers arranged along a second direction intersecting with the first direction, the number of first electrode layers is multiple, and in the first direction, the first sub-portion and the second sub-portion of each of the first electrode layers are correspondingly arranged on both sides of each of the resistance layers.

8. The manufacturing method according to claim 7, characterized in that: The method further comprises: A plurality of second electrode layers are formed on the upper surface of the substrate, each of the second electrode layers includes a third sub-portion and a fourth sub-portion arranged along the first direction, and in the vertical direction, the third sub-portion and the fourth sub-portion of each second electrode layer are respectively arranged opposite to the first sub-portion and the second sub-portion of each first electrode layer.

9. The manufacturing method according to claim 8, characterized in that: After forming the first electrode layer and the second electrode layer, the method further includes: The substrate is divided into a plurality of strip substrates extending along the second direction, each of the strip substrates has a plurality of resistor layers arranged along the second direction, and in the first direction, a side wall of the first sub-portion away from the second sub-portion and a side wall of the second sub-portion away from the first sub-portion are respectively flush with the side wall of the strip substrate, and a side wall of the third sub-portion away from the fourth sub-portion and a side wall of the fourth sub-portion away from the third sub-portion are respectively flush with the side wall of the strip substrate; A plurality of third electrode layers are formed, wherein at least a portion of each of the third electrode layers is located on side walls of the strip substrate that are oppositely arranged in the first direction, and each of the third electrode layers also covers the side walls of the first sub-portion and the side walls of the third sub-portion to electrically connect the first sub-portion and the third sub-portion, and covers the side walls of the second sub-portion and the side walls of the fourth sub-portion to electrically connect the second sub-portion and the fourth sub-portion.

10. The manufacturing method according to claim 9, characterized in that: After forming the third electrode layer, the direction further includes: Dividing the strip substrate into a plurality of sub-substrates, each of the sub-substrates having a resistor layer and a first electrode layer, a second electrode layer and a third electrode layer electrically connected to the resistor layer; forming a barrier layer on the sub-substrate, wherein the barrier layer covers exposed surfaces of the first electrode layer, the second electrode layer and the third electrode layer; A welding layer is formed on the sub-substrate, and the welding layer covers the exposed surface of the barrier layer; wherein at least a portion of the welding layer located on a side of the first sub-portion away from the sub-substrate and at least a portion of the welding layer located on a side of the second sub-portion away from the sub-substrate constitute the first welding portion and the second welding portion, respectively.

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