Duty ratio imbalance correction circuit and photoelectric terminal equipment
By designing an open-loop duty cycle offset correction circuit in the optoelectronic terminal equipment, the detection correction module and correction adjustment module are used to quickly respond to the power changes of optical signal, and the problem of optical signal duty cycle offset in burst mode is solved, and the Stable signal output and fast response.
Patent Information
- Application Number
- CN202411778833.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2025-01-03
- Estimated Expiration
- 2044-12-05
AI Technical Summary
The prior art cannot effectively correct the duty cycle offset of the optical signal in burst mode, especially when the optical power is switched quickly, resulting in signal distortion and response delay.
A duty cycle offset correction circuit is designed, adopting an open-loop structure, which tracks the power changes of optical signal in real time by detecting the correction module, generates a matching correction current, and quickly adjusts the output signal through the correction adjustment module to ensure the accuracy of duty cycle. Sex and stability. The circuit includes a detection correction module, a correction adjustment module and an output buffering processing module, which can respond quickly when switching between different optical powers quickly.
It realizes rapid correction of the optical signal duty cycle in burst mode, meets the requirements of fast response, maintains a stable output signal duty cycle, and improves the waveform quality and adaptability of the signal.
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Figure CN119254194A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of electronic technology, and in particular to a duty cycle imbalance correction circuit and a photoelectric terminal device. Background Art
[0002] In the field of optical communication and photoelectric detection, the front-end circuit of the optical receiver plays an important role in converting the received optical signal into an electrical signal. This conversion is crucial for subsequent signal processing and data analysis.
[0003] The front-end circuit of the receiver is mainly composed of modules such as photodiode (PD), trans-impedance amplifier (TIA) and limiting amplifier (LA). When receiving a high-power optical signal, the large-signal nonlinearity problem of PD and TIA will cause the rise time and fall time of the TIA output signal to be inconsistent, thus showing the duty cycle distortion of the TIA output signal. The output duty cycle imbalance of TIA will cause the output signal duty cycle imbalance of LA, affecting the eye diagram quality of the LA output signal.
[0004] In the related art, a duty cycle offset correction circuit with a feedback structure is usually used. The duty cycle of the distorted signal is detected by an integrator, and then a duty cycle adjustment signal is generated and fed back to the LA in the front-stage circuit of the receiving end to correct the duty cycle distortion. This duty cycle offset correction circuit with a feedback structure can effectively reduce the duty cycle distortion of large signals (signals with large optical power) caused by PD and TIA nonlinearity. However, due to the large delay of the feedback loop, it cannot meet the requirements of fast response in burst mode (fast switching between different optical powers), and may even further deteriorate the signal distortion in burst mode.
[0005] Therefore, there is an urgent need for a duty cycle imbalance correction circuit that can effectively cope with the burst mode to improve the problem of large signal distortion deterioration in the burst mode. Summary of the invention
[0006] Based on this, it is necessary to provide a duty cycle imbalance correction circuit and an optoelectronic terminal device, which can improve the large signal duty cycle imbalance problem in burst mode.
[0007] A duty cycle imbalance correction circuit is used to connect to a front-stage circuit of an optical receiving end, and the front-stage circuit of the optical receiving end is used to output an electrical signal according to a received optical signal; the duty cycle imbalance correction circuit comprises:
[0008] A detection and correction module, connected to the front-stage circuit of the optical receiving end, for receiving the electrical signal and outputting a correction current matching the power of the optical signal according to the electrical signal;
[0009] A correction and adjustment module, connected to the front-stage circuit of the optical receiving end and the detection and correction module; used to receive the electrical signal and the correction current, and output an adjustment signal after duty cycle imbalance correction according to the electrical signal and the correction current;
[0010] The output buffer processing module is connected to the correction and adjustment module and is used to perform shaping processing on the adjustment signal to obtain a processed output signal.
[0011] In one embodiment, the detection and correction module includes:
[0012] A power detection circuit, connected to the front-stage circuit of the optical receiving end, for receiving the electrical signal, detecting the power of the optical signal according to the electrical signal, and outputting a power identification signal corresponding to the power of the optical signal;
[0013] A correction control circuit, connected to the power detection circuit, for generating and outputting a correction control signal according to the power identification signal;
[0014] The correction current generating circuit is connected to the correction control circuit and the correction adjustment module, and is used to generate and output the correction current according to the correction control signal.
[0015] In one of the embodiments, the correction current generating circuit includes a current digital-to-analog converter;
[0016] The input end of the current digital-to-analog converter is connected to the correction control circuit, and the output end of the current digital-to-analog converter is connected to the correction adjustment module.
[0017] In one embodiment, there are multiple correction and adjustment modules, and each correction and adjustment module is connected in sequence;
[0018] The number of the correction current generating circuits is the same as the number of the correction adjustment modules; the output end of each current digital-to-analog converter is correspondingly connected to a detection and correction module; the input end of each current digital-to-analog converter is connected to the correction control circuit.
[0019] In one embodiment, the correction control circuit includes a comparator and a correction signal generating circuit; the comparator is connected to the power detection circuit and the correction signal generating circuit respectively; the correction signal generating circuit is connected to the correction current generating circuit; wherein,
[0020] The comparator is used to output a correction enable signal when the power identification signal indicates that the power of the optical signal is greater than a preset power threshold;
[0021] The correction signal generating circuit is used to output a correction control signal based on a preset input code word when a correction enable signal is received; the input code word corresponds to the correction current parameter.
[0022] In one embodiment, the duty cycle imbalance correction circuit further includes an input buffer processing module, the input end of the input buffer processing module is used to connect to the optical receiving end front-stage circuit, and the output end is connected to the detection correction module and the correction adjustment module;
[0023] The input buffer processing module is used to perform buffer processing on the received electrical signal.
[0024] In one of the embodiments, the input buffer processing module includes a first buffer, the input end of the first buffer is used to connect to the front-stage circuit of the optical receiving end, and the output end of the first buffer is connected to the detection correction module and the correction adjustment module.
[0025] In one embodiment, the output buffer processing module includes a second buffer, an input end of the second buffer is connected to the correction and adjustment module, and an output end of the second buffer is used to output the output signal.
[0026] In one embodiment, the correction and adjustment module is a limiting amplifier.
[0027] A photoelectric terminal device comprises a light receiving end front-stage circuit and the duty cycle imbalance correction circuit as described above.
[0028] The above-mentioned duty cycle imbalance correction circuit and optoelectronic terminal equipment, the duty cycle imbalance correction circuit is used to connect to the front-stage circuit of the optical receiving end, and the front-stage circuit of the optical receiving end is used to obtain and output an electrical signal according to the received optical signal. Specifically, the duty cycle imbalance correction circuit includes a detection correction module, a correction adjustment module and an output buffer processing module. The detection correction module is connected to the front-stage circuit of the optical receiving end to receive the electrical signal, and outputs a correction current that matches the power of the optical signal according to the electrical signal. The correction adjustment module is connected to the front-stage circuit of the optical receiving end and the detection correction module, and is used to receive the electrical signal, and outputs an adjustment signal after the duty cycle imbalance correction according to the electrical signal and the correction current. The output buffer processing module is connected to the correction adjustment module, and is used to perform shaping processing on the adjustment signal to obtain a processed output signal. The duty cycle imbalance correction circuit adopts an open-loop structure. The detection and correction module can quickly adjust the corresponding correction value (i.e., correction current) according to the power change of the optical signal, so that the correction adjustment module can quickly adjust the output signal based on the correction current for the large signal and the original electrical signal, thereby achieving the effect of quickly correcting the duty cycle imbalance of the circuit output signal. Therefore, for the application scenario where the optical signal switches quickly between different optical powers in burst mode, the duty cycle imbalance correction circuit can meet the requirements of fast response and maintain a stable output signal duty cycle. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0030] Figure 1 A schematic diagram of an application module of a duty cycle imbalance correction circuit according to an embodiment;
[0031] Figure 2 A schematic diagram of the structure of a front-stage circuit of an optical receiving end according to an embodiment;
[0032] Figure 3 is a module schematic diagram of a duty cycle imbalance correction circuit according to an embodiment;
[0033] Figure 4 is a module schematic diagram of a duty cycle imbalance correction circuit according to another embodiment;
[0034] Figure 5 A schematic diagram of a detection and correction module according to another embodiment;
[0035] Figure 6 Schematic diagram of the circuit structure of a duty cycle imbalance correction circuit according to an embodiment;
[0036] Figure 7 is a circuit structure diagram of a duty cycle imbalance correction circuit according to another embodiment;
[0037] Figure 8 for Figure 7 A schematic diagram of the duty cycle imbalance correction principle of an embodiment;
[0038] Fig. 9 for Figure 7 A waveform diagram of a duty cycle imbalance correction process according to an embodiment. DETAILED DESCRIPTION
[0039] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0041] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0042] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.
[0043] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least a portion of an element” means a part or all of an element.
[0044] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.
[0045] In one embodiment, a duty cycle distortion correction (DCD) circuit is provided. Figure 1 As shown, the duty cycle imbalance correction circuit 100 is used to connect to the optical receiving end front-stage circuit 200.
[0046] The optical receiving end front-stage circuit 200 is used to output an electrical signal according to the received optical signal. Figure 2 , exemplarily, the receiving end front-stage circuit 200 includes a photodiode D, a transimpedance amplifier and a limiting amplifier connected in sequence. The photodiode D can convert the received optical signal into a current signal; then the current signal is converted into a voltage signal and preliminarily amplified by the transimpedance amplifier, and finally the voltage signal is further amplified and shaped by the limiting amplifier, and then an electrical signal (Outp-Outm) is output.
[0047] like Figure 3 As shown, the duty cycle imbalance correction circuit 100 includes a detection correction module 110 , a correction adjustment module 120 and an output buffer processing module 130 .
[0048] The detection and correction module 110 is connected to the optical receiving end front-stage circuit 200. The detection and correction module 110 is used to receive an electrical signal and output a correction current that matches the power of the optical signal according to the electrical signal.
[0049] Specifically, after receiving the electrical signal, the detection and correction module 110 can identify and detect the power of the optical signal based on the electrical signal to determine whether the currently received signal is a large signal with a power greater than a preset power threshold or a small signal with a power less than a preset power threshold. The size of the preset power threshold can be set according to actual conditions.
[0050] Furthermore, the detection and correction module 110 can also output a corresponding correction current according to the power of the optical signal. Exemplarily, the detection and correction module 110 can output a correction current when the optical signal is a large signal; or, whether the optical signal is a large signal or a small signal, the detection and correction module 110 outputs a correction current. The correction current matches the power of the optical signal and is used to subsequently adjust the duty cycle of the signal.
[0051] The correction adjustment module 120 is connected to the optical receiving end front stage circuit 200 to receive the electrical signal. The correction adjustment module 120 is also connected to the detection correction module 110 to receive the correction current. The correction adjustment module 120 is used to output the adjustment signal after the duty cycle imbalance correction according to the electrical signal and the correction current.
[0052] Specifically, the correction adjustment module 120 can adjust the duty cycle of the electrical signal according to the correction current. The adjustment method can be determined according to the specific situation, such as adjusting the high and low level values of the electrical signal and adjusting the rising edge, the falling edge or both at the same time to achieve duty cycle correction of the electrical signal so that the duty cycle of the output adjustment signal is consistent with expectations.
[0053] The detection and correction module 110 can track the change of the optical signal power in real time and generate a correction current that matches the optical signal power. On the one hand, the correction current matches the actual power of the optical signal, so the imbalance correction processing of the electrical signal based on the correction current is more accurate and reliable.
[0054] On the other hand, the detection and correction module 110 can quickly respond to changes in the optical signal, so that the correction adjustment module 120 can quickly perform duty cycle correction. Therefore, there is no need to wait for feedback from the output signal to adjust the input or control variable, and open-loop feedback is achieved. Therefore, when the optical signal switches rapidly between different optical powers, it can quickly respond and adjust the correction current, thereby achieving rapid correction of the duty cycle of the electrical signal.
[0055] The output buffer processing module 130 is connected to the correction and adjustment module 120 , and is used for performing shaping processing on the adjustment signal output by the correction and adjustment module 120 to obtain a processed output signal.
[0056] The output buffer processing module 130 performs shaping and limiting processing on the received adjustment signal, thereby improving the waveform quality of the output signal, so that the output signal has a stable duty cycle, high-quality waveform and amplitude, and is more suitable for subsequent circuit processing or transmission.
[0057] The above-mentioned duty cycle imbalance correction circuit 100 is used to connect to the optical receiving end front-stage circuit 200, and the optical receiving end front-stage circuit 200 is used to obtain and output an electrical signal according to the received optical signal. Specifically, the duty cycle imbalance correction circuit 100 includes a detection correction module 110, a correction adjustment module 120 and an output buffer processing module 130. The detection correction module 110 is connected to the optical receiving end front-stage circuit 200, and is used to receive the electrical signal, and output a correction current that matches the power of the optical signal according to the electrical signal. The correction adjustment module 120 is connected to the optical receiving end front-stage circuit 200 and the detection correction module 110, and is used to receive the electrical signal, and output an adjustment signal after duty cycle imbalance correction according to the electrical signal and the correction current. The output buffer processing module 130 is connected to the correction adjustment module 120, and is used to perform shaping processing on the adjustment signal to obtain a processed output signal. The duty cycle imbalance correction circuit 100 adopts an open-loop structure, and the detection correction module 110 can quickly adjust the corresponding correction value (i.e., correction current) according to the change of optical signal power, so that the correction adjustment module 120 can quickly adjust the output signal based on the correction current for the large signal and the original electrical signal, thereby achieving the effect of quickly correcting the duty cycle imbalance of the circuit output signal.
[0058] The duty cycle imbalance correction circuit 100 can meet the requirement of fast response and maintain a stable output signal duty cycle for application scenarios where an optical signal quickly switches between different optical powers in a burst mode.
[0059] In practical applications, the duty cycle imbalance correction circuit 100 and the receiving end front stage circuit 200 can be integrated into the optical receiving chip, thereby improving the integration of the circuit. The duty cycle imbalance correction circuit 100 can also be applied to optoelectronic terminal equipment, such as optical fiber communication equipment, optical receivers, optical measuring instruments, etc. When applied to optoelectronic terminal equipment, the duty cycle imbalance correction circuit 100 and the receiving end front stage circuit 200 can be integrated into the optical receiving chip, or can be set in the form of an independent circuit.
[0060] In one embodiment, Figure 4 As shown, the duty cycle imbalance correction circuit 100 further includes an input buffer processing module 140. The input end of the input buffer processing module 140 is used to connect to the optical receiving end front stage circuit 200, and the output end is connected to the detection correction module 110 and the correction adjustment module 120.
[0061] The input buffer processing module 140 is used to perform buffer processing on the received electrical signal and then transmit it to the detection correction module 110 and the correction adjustment module 120 .
[0062] In this embodiment, the buffering process includes compensating for the high-frequency signal attenuation of the front-stage circuit to receive and improve the signal quality. Specifically, the input buffer processing module 140 can compensate for the high-frequency signal attenuation of the front-stage circuit 200 of the optical receiving end to improve the quality of the electrical signal. Thus, the response delay of the channel is reduced by resetting the electrical signal, which is helpful for the application scenario of the burst mode.
[0063] On the other hand, the buffer processing also includes an amplitude amplification process, that is, the input buffer processing module 140 can also amplify the output amplitude of the electrical signal to a preset amplitude. The preset amplitude can be set according to the specific situation, and this embodiment does not limit this. In this way, the signal can have sufficient strength in the subsequent processing or transmission process, thereby improving the signal reliability.
[0064] In actual implementation, the input buffer processing module 140 and the output buffer processing module 130 can be set according to specific circumstances. In one embodiment, the input buffer processing module 140 includes a first buffer, the input end of the first buffer is used to connect to the optical receiving end front stage circuit 200, and the output end of the first buffer is connected to the detection correction module 110 and the correction adjustment module 120.
[0065] The buffer can temporarily store the signal from the previous circuit part and pass it to the next circuit part at the appropriate time, thereby ensuring the integrity and stability of the signal. The buffer can amplify and shape the signal to make it more accurate and stable. The buffer can also reduce the response delay of the channel and improve the response speed.
[0066] In this embodiment, the first buffer is connected to the optical receiving end front-stage circuit 200 and performs preliminary processing on the received electrical signals, and then these signals are transmitted to the detection correction module 110 and the correction adjustment module 120 for further processing and analysis.
[0067] Specifically, the first buffer amplifies the amplitude of the electrical signal to ensure that the electrical signal has sufficient strength during transmission. At the same time, the first buffer speeds up the channel response speed of the electrical signal, thereby improving the adaptability of the duty cycle imbalance correction circuit 100 to the burst mode.
[0068] In other embodiments, the input buffer processing module 140 may further include an input limiting amplifier, the input end of the input limiting amplifier is used to connect to the optical receiving end front-stage circuit 200, and the output end of the input limiting amplifier is connected to the detection correction module 110 and the correction adjustment module 120.
[0069] Among them, the limiting amplifier is a special amplifier whose main function is to limit the amplitude range of the input signal and amplify it to a controllable output amplitude.
[0070] In this embodiment, the input limiting amplifier can perform shaping processing on the electrical signal by setting an upper limit and / or a lower limit, thereby providing a stable and controllable signal to the detection correction module 110 and the correction adjustment module 120.
[0071] In one embodiment, the output buffer processing module 130 includes a second buffer, an input end of the second buffer is connected to the correction adjustment module 120, and an output end of the second buffer is used to output the output signal.
[0072] In this embodiment, the second buffer is connected to the correction and adjustment module 120 and processes the received adjustment signal and outputs it as an output signal.
[0073] Specifically, the second buffer is used to perform shaping and limiting processing on the adjustment signal to make the output signal more stable and accurate, thereby improving the processing quality of the duty cycle imbalance correction circuit 100 and making the waveform quality of the output signal more in line with the requirements of subsequent circuits or devices.
[0074] Moreover, the second buffer has a strong driving capability, which can enable the output signal to maintain sufficient strength and stability during the transmission process, further improving the signal quality output by the duty cycle imbalance correction circuit 100 and its adaptability to application scenarios (such as long-distance transmission scenarios).
[0075] In other embodiments, the output buffer processing module 130 may include an output limiting amplifier, the input end of the output limiting amplifier is connected to the correction adjustment module 120, and the output end of the output limiting amplifier is used to output the output signal. Those skilled in the art can make settings according to specific circumstances, and only need to realize the above corresponding functions.
[0076] In one embodiment, Figure 5 As shown, the detection and correction module 110 includes a power detection circuit 111 , a correction control circuit 112 and a correction current generating circuit 113 .
[0077] The power detection circuit 111 is connected to the optical receiving end front-stage circuit 200 for receiving electrical signals.
[0078] In actual implementation, the power detection circuit 111 can be directly connected to the optical receiving end front stage circuit 200 to receive the electrical signal output by the optical receiving end front stage circuit 200. The power detection circuit 111 can also be as follows: Figure 5 As shown, the optical receiving end front-stage circuit 200 is connected via the input buffer processing module 140 to receive the electrical signal processed by the input buffer processing module 140 .
[0079] The power detection circuit 111 is used to detect the power of the optical signal according to the received electrical signal, and output a power identification signal corresponding to the power of the optical signal.
[0080] Specifically, the power detection circuit 111 can accurately identify the power level of the optical signal by sampling and analyzing the electrical signal, and then output a power identification signal corresponding to the power to the subsequent correction control circuit 112 .
[0081] The circuit structure of the power detection circuit 111 does not need to be limited. For example, the power detection circuit 111 may include a power detector. The power detector may adopt a power detection integrated chip to detect and identify the power of the optical signal.
[0082] The correction control circuit 112 is connected to the power detection circuit 111. The correction control circuit 112 is used to generate and output a correction control signal according to the power identification signal.
[0083] The correction control signal includes a correction current parameter.
[0084] The correction control circuit 112 may generate the correction control signal according to the power identification signal in a non-unique manner. In one embodiment, the correction control circuit 112 may determine the power level of the optical signal according to the power identification signal, and then determine the correction current parameters that match the power level, and generate the correction control signal based on the correction current parameters. When determining the correction current parameters that match the power level, the correction current parameters may be determined based on a specific algorithm, or the correction current parameters that match the power level may be searched from a preset corresponding relationship.
[0085] In this embodiment, the correction control circuit 112 can accurately determine the correction current parameters that match the power level, so that the subsequent correction is more accurate.
[0086] In another embodiment, the correction control circuit 112 is preset with a target correction current parameter, and generates a correction control signal according to the target correction current parameter when it is determined according to the power identification signal that the power of the optical signal is greater than a preset power threshold.
[0087] Regarding the target correction current parameter preset in the correction control circuit 112, the target correction current parameter may be pre-stored in the correction control circuit 112, or may be input by a professional in other ways. Exemplarily, the correction control circuit 112 also includes an input module, and the professional may input the target correction current parameter to the correction control circuit 112 through the input module. The target correction current parameter input by the professional may be the actual data (such as the specific parameters of the input and output signals) detected by the professional based on the optical receiving end front-stage circuit 200 and the duty cycle imbalance correction circuit 100 during the generation process of the optical receiving chip, the experimental parameters obtained through experiments, or the empirical parameters obtained based on experience. Thus, different target correction current parameters can be set for different optical receiving end front-stage circuits 200 to increase the adaptability of the circuit.
[0088] In actual implementation, professionals can also input a preset power threshold through the input module, thereby making the correction control circuit 112 more flexible and configurable to adapt to different application scenarios and power correction requirements.
[0089] In this embodiment, if the optical signal is a large signal with a power greater than a preset power threshold, the correction control circuit 112 generates a correction control signal according to the target correction current parameter. If the optical signal is a small signal, no correction control signal is generated, that is, no duty cycle imbalance correction is performed at this time. This is because: when receiving a smaller optical power signal, the photodiode and the transimpedance amplifier TIA in the optical receiving end front-stage circuit 200 are approximately linearly amplified, so that the rise time and fall time of the output signal of the transimpedance amplifier TIA are approximately equal, and the duty cycle distortion can be ignored. Therefore, by correcting the duty cycle imbalance when large light (optical signal with a power greater than the preset power threshold) is input, and not performing unnecessary correction processing when small light (optical signal with a power less than the preset power threshold) is input, the overall efficiency of the system can be improved.
[0090] The correction current generating circuit 113 is connected to the correction control circuit 112 and the correction adjustment module 120. The correction current generating circuit 113 is used to generate and output the correction current according to the correction control signal.
[0091] It can be understood that the correction current generating circuit 113 generates a correction current whose magnitude and direction satisfy the correction current parameters included in the correction control signal. The correction current is transmitted to the correction adjustment module 120 for adjusting the duty cycle of the electrical signal.
[0092] Therefore, the power detection circuit 111 detects the power of the electrical signal, the correction control circuit 112 generates a correction control signal according to the detection result, and the correction current generation circuit 113 generates and outputs a correction current according to the correction control signal, so that the correction adjustment module 120 can accurately perform duty cycle correction according to the correction current.
[0093] In one embodiment, Figure 6 As shown, the correction current generating circuit 113 includes a current digital-to-analog converter (IDAC), the input end of the current digital-to-analog converter is connected to the correction control circuit 112, and the output end of the current digital-to-analog converter is connected to the correction adjustment module 120.
[0094] Specifically, the current digital-to-analog converter receives a correction control signal from the correction control circuit 112, and the correction control signal generally includes an input codeword (DAC<7:0>) of the current digital-to-analog converter (the input codeword corresponds to the correction current parameter), and the input codeword is used to indicate the magnitude or direction of the required correction current. It can be understood that the input codeword can be determined according to the power level matching, or can be input by a professional.
[0095] The output end of the current digital-to-analog converter is connected to the correction adjustment module 120. The current digital-to-analog converter outputs an analog current signal according to the received input code word. The current signal is the required correction current.
[0096] Since the current digital-to-analog converter can provide high-precision current output, the magnitude and direction of the correction current can be controlled more accurately. By adjusting the input codeword of the current digital-to-analog converter, the magnitude of the correction current can be flexibly adjusted to adapt to different application scenarios and requirements.
[0097] It can be understood that the correction current generating circuit 113 can also adopt other forms, not limited to the forms mentioned in the above embodiments, as long as it can achieve the corresponding functions.
[0098] The structure of the correction control circuit 112 does not need to be limited. In one embodiment, please continue to refer to Figure 6 In the case where the correction control circuit 112 does not process the small light input and corrects the large light input, the correction control circuit 112 may include a comparator 1121 and a correction signal generating circuit 1122 .
[0099] The comparator 1121 is connected to the power detection circuit 111 and the correction signal generation circuit 1122 respectively; the correction signal generation circuit 1122 is also connected to the correction current generation circuit 113.
[0100] The comparator 1121 is used to output a correction enable signal when the power identification signal indicates that the power of the optical signal is greater than a preset power threshold. The correction signal generation circuit 1122 is used to output a correction control signal based on a preset input codeword when receiving the correction enable signal.
[0101] It can be understood that the comparator 1121 is also used to receive a reference signal vref, and the voltage of the reference signal vref is used to characterize the preset power threshold, so that when the power of the optical signal is greater than the preset power threshold, a comparison result is output, and the comparison result is output as a correction enable signal to the correction signal generation circuit 1122. In actual implementation, professionals can also adjust the preset power threshold by adjusting the reference signal vref.
[0102] The input code word (DAC<7:0>) preset in the correction signal generating circuit 1122 may be input by a professional, or may be determined according to power level matching.
[0103] Among them, the correction signal generating circuit 1122 is implemented using a digital circuit, and its implementation method does not need to be limited. It needs to be able to receive input instructions (such as input code words) and output the input code words to the current digital-to-analog converter when receiving a correction enable signal to adjust the current digital-to-analog converter.
[0104] In other embodiments, the correction signal generating circuit 1122 is connected to the power detecting circuit 111, and can determine the power level of the optical signal according to the received power identification signal, and then determine the correction current parameters matching the power level, and generate a correction control signal based on the correction current parameters.
[0105] In one embodiment, Figure 7 As shown, there are multiple correction and adjustment modules 120, and each correction and adjustment module 120 is connected in sequence.
[0106] The number of the correction current generating circuits 113 is the same as the number of the correction adjustment modules 120 ; the output end of each correction current generating circuit 113 is connected to a corresponding correction adjustment module 120 ; the input end of each correction current generating circuit 113 is connected to the correction control circuit 1122 .
[0107] The correction control circuit 1122 can respectively output the corresponding input codeword to control each correction current generating circuit 113. In actual implementation, each correction current generating circuit 113 can be enabled at the same time, that is, output the correction current at the same time; or partially enabled, that is, some correction current generating circuits 113 output the correction current, and other correction current generating circuits 113 do not output.
[0108] It should also be noted that, under the control of the correction control circuit 1122 , the correction currents output by each correction current generating circuit 113 may be the same or different.
[0109] When the power of the optical signal is large and the duty cycle is seriously unregulated, the correction current can be appropriately increased to improve the adjustment range. The correction current can be increased by controlling the correction current value output by the correction current generating circuit 113 to increase, or by controlling more correction current generating circuits 113 to output correction current.
[0110] In this embodiment, by reasonably setting the number of correction current generating circuits 113 and correction adjustment modules 120, the output correction current can be increased as needed, thereby increasing the adjustment range to better improve the duty cycle imbalance of the output signal.
[0111] The correction and adjustment module 120 may be implemented in various ways. In one embodiment, the correction and adjustment module 120 includes a limiting amplifier, the input end of the limiting amplifier serves as the input end of the correction and adjustment module 120 , and the output end of the limiting amplifier serves as the output end of the correction and adjustment module 120 .
[0112] When a correction and adjustment module 120 is provided in the circuit, the input end of the limiting amplifier of the correction and adjustment module 120 is used to receive the electrical signal, and the output end is connected to the output buffer processing module 130 .
[0113] In the case where multiple correction adjustment modules 120 are provided in the circuit, multiple limiting amplifiers serving as correction adjustment modules 120 are connected in sequence, that is, the output end of the limiting amplifier located in the first position is connected to the input end of the limiting amplifier located in the second position, the output end of the limiting amplifier located in the second position is connected to the input end of the limiting amplifier located in the third position, and so on. Among them, the input end of the limiting amplifier located in the first position is used to receive an electrical signal, and can be directly connected to the optical receiving end front stage circuit 200, or can be connected to the optical receiving end front stage circuit 200 through the input buffer processing module 140. The output end of the limiting amplifier located in the last position is connected to the output buffer processing module 130.
[0114] Specifically, the output end of the limiting amplifier of the correction adjustment module 120 is connected to the current digital-to-analog converter in the corresponding detection correction module 110, and receives the correction current output by the current digital-to-analog converter. Figure 8 The correction current (im-ip) output by the current digital-to-analog converter n-1 at the n-1th position is used to affect the voltage drop of the resistor R in the limiting amplifier n-1, thereby affecting the output (Vop-Vom) of the limiting amplifier n-1 to achieve duty cycle imbalance correction.
[0115] It can be understood that when the accuracy of the correction current output by each level of current digital-to-analog converter is higher, the accuracy of duty cycle offset correction is also higher.
[0116] In other embodiments, the correction and adjustment module 120 may also be a buffer, and its specific connection structure in the circuit is not described in detail here, and those skilled in the art may configure it according to specific circumstances.
[0117] In order to better understand the above embodiment, a detailed explanation is given below in conjunction with a specific embodiment. Figure 7 The duty cycle imbalance correction circuit includes an input buffer processing module 140, a detection correction module 110, a correction adjustment module 120 and an output buffer processing module 130. The detection correction module 110 includes a power detection circuit 111, a correction control circuit 112 and a correction current generation circuit 113. The correction control circuit 112 includes a comparator 1121 and a correction signal generation circuit 1122.
[0118] Among them, the power detection circuit 111 adopts a power detector. The input buffer processing module 140 includes an input buffer. The output buffer processing module 130 includes an output buffer. The correction adjustment module 120 is implemented by a limiting amplifier, and the number of the limiting amplifiers is multiple, such as n. The correction current generation circuit 113 includes a current digital-to-analog converter, and the number of the current digital-to-analog converters is the same as the number of the limiting amplifiers, that is, n current digital-to-analog converters. Each current digital-to-analog converter is connected to each limiting amplifier correspondingly. For example, the output end of the limiting amplifier 1 located in the first position is connected to the current digital-to-analog converter located in the first position, and the output end of the limiting amplifier 2 located in the second position is connected to the current digital-to-analog converter located in the second position, and so on. The output end of the limiting amplifier n located in the last position is connected to the current digital-to-analog converter located in the last position.
[0119] Specifically, the power detector 111 first detects the power of the input electrical signal (Inp-Inm). When the input power is greater than the preset power threshold, it means that the power of the optical signal is large, and the comparator 1121 outputs a high level, thereby enabling the correction signal generation circuit 1122, and then enabling the corresponding current digital-to-analog converter to correct the output signal duty cycle of the corresponding limiting amplifier.
[0120] The influence of the differential output current Ip-In of the n-1th current digital-to-analog converter on the output signal of the limiting amplifier n-1 and the output signal of the next stage limiting amplifier n is as follows: Figure 8 As shown, the duty cycle of the output signal of the limiting amplifier n-1 is controlled by the output current of the current digital-to-analog converter n-1. The input codeword of the current digital-to-analog converter n-1 can be manually set by professionals by observing the duty cycle of the output signal of the limiting amplifier n-1, thereby obtaining the best duty cycle correction effect.
[0121] Further, the effect of the output current of the current DAC on the duty cycle of the limiting amplifier and the output buffer output signal can be referred to Fig. 9It can be seen that when receiving a large-swing optical signal, the rising edge of the voltage Vip and Vim of the electrical signal (Inp-Inm) is significantly greater than the falling edge due to the nonlinear influence of the previous photodiode D and transimpedance amplifier, resulting in duty cycle distortion. After the output current Δi of the current digital-to-analog converter is introduced, the output current Δi of the current digital-to-analog converter acts on the resistor R in the limiting amplifier to form a voltage drop (the product of the resistance value of the resistor R and the output current Δi, R△i), which can adjust the intersection of the rising and falling edges of the signals Vop and Vom output by the limiting amplifier (the Vop level moves down as a whole), and then after the signal is amplified by the next-stage limiting amplifier, the optimal duty cycle and higher waveform quality can be obtained (that is, the output signal Vop1-Vop1 reaches the optimal duty cycle and higher waveform quality). When receiving a small-swing optical signal, due to the small influence of the previous stage nonlinearity, the output current Δi of the current digital-to-analog converter can be made 0 to avoid over-adjustment and damage to the waveform quality.
[0122] When the input power is less than a certain power value, the comparator 1121 outputs a low level, the current digital-to-analog converter is turned off, and its output current is 0, which does not affect the output signal duty cycle of the limiting amplifier. The preset power threshold can be controlled by setting the voltage value of the reference signal Vref of the comparator 1121.
[0123] The duty cycle imbalance correction circuit, according to the relationship between the input signal power and the duty cycle imbalance, distinguishes between large light and small light input by adding the power detector 111 and the comparator 1121 circuit, realizes the duty cycle imbalance detection by the comparator 1121 and the power detector 111, and only needs to correct the duty cycle imbalance of the large light. Thus, by detecting the power of the input signal to control whether to implement the duty cycle imbalance correction on the limiting amplifier circuit, the effect of quickly correcting the duty cycle imbalance of the circuit output signal is achieved, and the limiting amplifier output signal reaches the optimal duty cycle when large light and small light are input.
[0124] Compared with the traditional duty cycle offset circuit, the loop delay of the traditional duty cycle offset correction circuit is too large. The above-mentioned duty cycle offset correction circuit adopts open-loop control duty cycle offset, which can respond instantly to the input signal power and quickly correct the duty cycle of the limiting amplifier output signal.
[0125] In one embodiment, a photoelectric terminal device is also provided. Figure 2 As shown, the optoelectronic terminal device includes a duty cycle imbalance correction circuit 100 and a receiving end front-stage circuit 200.
[0126] Optoelectronic terminal equipment includes but is not limited to optical fiber communication equipment, optical receivers, optical measuring instruments, etc. When applied to optoelectronic terminal equipment, the duty cycle imbalance correction circuit 100 and the receiving end front-stage circuit 200 can be integrated into an optical receiving chip or provided in the form of independent circuits.
[0127] The structure of the duty cycle imbalance correction circuit 100 can be set with reference to the above embodiments, and will not be described in detail here. Since the optoelectronic terminal device includes any one of the duty cycle imbalance correction circuits provided in the above embodiments, the optoelectronic terminal device also has the beneficial effects of the duty cycle imbalance correction circuit in the above embodiments, and the similarities can be understood by referring to the above explanation of the duty cycle imbalance correction circuit, and will not be described in detail here.
[0128] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.
[0129] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0130] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. A duty cycle imbalance correction circuit, characterized in that: Used to connect to the front-stage circuit of the optical receiving end, the front-stage circuit of the optical receiving end is used to output an electrical signal according to the received optical signal; The duty cycle imbalance correction circuit comprises: A detection and correction module, connected to the front-stage circuit of the optical receiving end, for receiving the electrical signal and outputting a correction current matching the power of the optical signal according to the electrical signal; A correction and adjustment module, connected to the front-stage circuit of the optical receiving end and the detection and correction module; used to receive the electrical signal and the correction current, and output an adjustment signal after duty cycle imbalance correction according to the electrical signal and the correction current; The output buffer processing module is connected to the correction and adjustment module and is used to perform shaping processing on the adjustment signal to obtain a processed output signal.
2. The duty cycle imbalance correction circuit according to claim 1, characterized in that: The detection and correction module comprises: A power detection circuit, connected to the front-stage circuit of the optical receiving end, for receiving the electrical signal, detecting the power of the optical signal according to the electrical signal, and outputting a power identification signal corresponding to the power of the optical signal; A correction control circuit, connected to the power detection circuit, for generating and outputting a correction control signal according to the power identification signal; The correction current generating circuit is connected to the correction control circuit and the correction adjustment module, and is used to generate and output the correction current according to the correction control signal.
3. The duty cycle imbalance correction circuit according to claim 2, characterized in that: There are multiple correction and adjustment modules, and each correction and adjustment module is connected in sequence; The number of the correction current generating circuits is the same as the number of the correction adjustment modules; the output end of each correction current generating circuit is correspondingly connected to one correction adjustment module; the input end of each correction current generating circuit is connected to the correction control circuit.
4. The duty cycle imbalance correction circuit according to claim 2, characterized in that: The correction current generating circuit includes a current digital-to-analog converter; The input end of the current digital-to-analog converter is connected to the correction control circuit, and the output end of the current digital-to-analog converter is connected to the correction adjustment module.
5. The duty cycle imbalance correction circuit according to claim 2, characterized in that: The correction control circuit includes a comparator and a correction signal generating circuit; the comparator is connected to the power detection circuit and the correction signal generating circuit respectively; the correction signal generating circuit is connected to the correction current generating circuit; wherein, The comparator is used to output a correction enable signal when the power identification signal indicates that the power of the optical signal is greater than a preset power threshold; The correction signal generating circuit is used to output a correction control signal based on a preset input code word when a correction enabling signal is received.
6. The duty cycle imbalance correction circuit according to claim 1, characterized in that: It also includes an input buffer processing module, the input end of the input buffer processing module is used to connect to the front-stage circuit of the optical receiving end, and the output end is connected to the detection correction module and the correction adjustment module; The input buffer processing module is used to perform buffer processing on the received electrical signal.
7. The duty cycle imbalance correction circuit according to claim 6, characterized in that: The input buffer processing module includes a first buffer, the input end of the first buffer is used to connect to the front-stage circuit of the optical receiving end, and the output end of the first buffer is connected to the detection correction module and the correction adjustment module.
8. The duty cycle imbalance correction circuit according to claim 1, characterized in that: The output buffer processing module includes a second buffer, an input end of the second buffer is connected to the correction and adjustment module, and an output end of the second buffer is used to output the output signal.
9. The duty cycle imbalance correction circuit according to any one of claims 1 to 8, characterized in that: The correction and adjustment module is a limiting amplifier.
10. An optoelectronic terminal device, characterized in that: It comprises a front-stage circuit of an optical receiving end and a duty cycle imbalance correction circuit as described in any one of claims 1 to 9.
Citation Information
Patent Citations
Low-speed signal demodulation circuit based on peak detection and method thereof
CN117639955A
Self-adaptive comparator circuit
CN218071466U
Vehicle headlamp
US20160102831A1
