Duty cycle imbalance correction circuit and optoelectronic terminal equipment
By designing an open-loop duty cycle offset correction circuit in the optoelectronic terminal device, the duty cycle of the output signal is quickly adjusted by using the detection correction module and the correction adjustment module, the problem of large signal duty cycle offset in burst mode is solved, and fast response and stable output signal quality are achieved.
Patent Information
- Application Number
- CN202411778833.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2044-12-05
AI Technical Summary
The prior art cannot effectively deal with the problem of large signal duty cycle offset in burst mode, especially when the optical signal power changes rapidly, the loop delay of the feedback structure causes the response to be insufficiently fast enough, and may even aggravate signal distortion.
A duty cycle offset correction circuit is designed, adopting an open-loop structure, which detects the optical signal power in real time by detecting the correction module to generate a matching correction current, and quickly adjusts the duty cycle of the output signal through the correction adjustment module. The output buffer processing module shaping the adjustment signal to obtain a stable output signal.
The duty cycle offset correction circuit can quickly respond to the power changes of the optical signal in burst mode, effectively correct the duty cycle offset of the output signal, maintain stable output signal quality, and is suitable for the fields of optical communication and photoelectric detection.
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Figure CN119254194B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of electronic technology, and in particular to a duty cycle imbalance correction circuit and a photoelectric terminal device. Background Art
[0002] In the field of optical communication and photoelectric detection, the front-end circuit of the optical receiver plays an important role in converting the received optical signal into an electrical signal. This conversion is crucial for subsequent signal processing and data analysis.
[0003] The front-end circuit of the receiver is mainly composed of modules such as photodiode (PD), trans-impedance amplifier (TIA) and limiting amplifier (LA). When receiving a high-power optical signal, the large-signal nonlinearity problem of PD and TIA will cause the rise time and fall time of the TIA output signal to be inconsistent, thus showing the duty cycle distortion of the TIA output signal. The output duty cycle imbalance of TIA will cause the output signal duty cycle imbalance of LA, affecting the eye diagram quality of the LA output signal.
[0004] In the related art, a duty cycle offset correction circuit with a feedback structure is usually used. The duty cycle of the distorted signal is detected by an integrator, and then a duty cycle adjustment signal is generated and fed back to the LA in the front-stage circuit of the receiving end to correct the duty cycle distortion. This duty cycle offset correction circuit with a feedback structure can effectively reduce the duty cycle distortion of large signals (signals with large optical power) caused by PD and TIA nonlinearity. However, due to the large delay of the feedback loop, it cannot meet the requirements of fast response in burst mode (fast switching between different optical powers), and may even further deteriorate the signal distortion in burst mode.
[0005] Therefore, there is an urgent need for a duty cycle imbalance correction circuit that can effectively cope with the burst mode to improve the problem of large signal distortion deterioration in the burst mode. Summary of the invention
[0006] Based on this, it is necessary to provide a duty cycle imbalance correction circuit and an optoelectronic terminal device, which can improve the large signal duty cycle imbalance problem in burst mode.
[0007] A duty cycle imbalance correction circuit is used to connect to a front-stage circuit of an optical receiving end, and the front-stage circuit of the optical receiving end is used to output an electrical signal according to a received optical signal; the duty cycle imbalance correction circuit comprises:
[0008] A detection and correction module, connected to the front-stage circuit of the optical receiving end, for receiving the electrical signal and outputting a correction current matching the power of the optical signal according to the electrical signal;
[0009] A correction and adjustment module, connected to the front-stage circuit of the optical receiving end and the detection and correction module; it is used to receive the electrical signal and the correction current, and output an adjusted signal with duty cycle imbalance corrected according to the electrical signal and the correction current;
[0010] An output buffer processing module, connected to the correction and adjustment module, is used to perform shaping processing on the adjustment signal to obtain a processed output signal.
[0011] In one embodiment, the detection and correction module includes:
[0012] A power detection circuit, connected to the front-stage circuit of the optical receiving end, is used to receive the electrical signal, detect the power of the optical signal according to the electrical signal, and output a power identification signal corresponding to the power of the optical signal;
[0013] A correction control circuit, connected to the power detection circuit, is used to generate and output a correction control signal according to the power identification signal;
[0014] A correction current generation circuit, connected to the correction control circuit and the correction and adjustment module, is used to generate and output a correction current according to the correction control signal.
[0015] In one embodiment, the correction current generation circuit includes a current digital-to-analog converter;
[0016] The input end of the current digital-to-analog converter is connected to the correction control circuit, and the output end of the current digital-to-analog converter is connected to the correction and adjustment module.
[0017] In one embodiment, the number of the correction and adjustment modules is multiple, and each of the correction and adjustment modules is connected in sequence;
[0018] The number of the correction current generation circuits is the same as that of the correction and adjustment modules; the output end of each current digital-to-analog converter is correspondingly connected to one of the detection and correction modules; the input ends of all the current digital-to-analog converters are connected to the correction control circuit.
[0019] In one embodiment, the correction control circuit includes a comparator and a correction signal generation circuit; the comparator is respectively connected to the power detection circuit and the correction signal generation circuit; the correction signal generation circuit is connected to the correction current generation circuit; wherein,
[0020] The comparator is used to output a correction enable signal when the power identification signal indicates that the power of the optical signal is greater than a preset power threshold;
[0021] The correction signal generation circuit is configured to output a correction control signal based on a preset input codeword when receiving a correction enable signal; the input codeword corresponds to the correction current parameter.
[0022] In one embodiment, the duty cycle offset correction circuit further includes an input buffer processing module. The input end of the input buffer processing module is used to connect to the front-stage circuit of the optical receiving end, and the output end is connected to the detection and correction module and the correction adjustment module.
[0023] The input buffer processing module is configured to perform buffer processing on the received electrical signal.
[0024] In one embodiment, the input buffer processing module includes a first buffer. The input end of the first buffer is used to connect to the front-stage circuit of the optical receiving end, and the output end of the first buffer is connected to the detection and correction module and the correction adjustment module.
[0025] In one embodiment, the output buffer processing module includes a second buffer. The input end of the second buffer is connected to the correction adjustment module, and the output end of the second buffer is used to output the output signal.
[0026] In one embodiment, the correction adjustment module is a limiting amplifier.
[0027] An optoelectronic terminal device includes a front-stage circuit of an optical receiving end and the duty cycle offset correction circuit as described above.
[0028] The above duty cycle imbalance correction circuit and optoelectronic terminal device, the duty cycle imbalance correction circuit is used to connect to the front-stage circuit of the optical receiving end, and the front-stage circuit of the optical receiving end is used to obtain and output an electrical signal according to the received optical signal. Specifically, the duty cycle imbalance correction circuit includes a detection and correction module, a correction adjustment module, and an output buffer processing module. The detection and correction module is connected to the front-stage circuit of the optical receiving end to receive the electrical signal, and outputs a correction current that matches the power of the optical signal according to the electrical signal. The correction adjustment module is connected to the front-stage circuit of the optical receiving end and the detection and correction module, and is used to receive the electrical signal, and output an adjusted signal after duty cycle imbalance correction according to the electrical signal and the correction current. The output buffer processing module is connected to the correction adjustment module, and is used to perform shaping processing on the adjusted signal to obtain a processed output signal. This duty cycle imbalance correction circuit adopts an open-loop structure. The detection and correction module can quickly adjust the corresponding correction value (i.e., the correction current) according to the power change of the optical signal, so that the correction adjustment module can quickly adjust the output signal based on the correction current for large signals and the original electrical signal, thereby achieving the effect of quickly correcting the duty cycle imbalance of the circuit output signal. Therefore, for the application scenario where the optical signal quickly switches between different optical powers in the burst mode, this duty cycle imbalance correction circuit can meet the requirements of fast response and maintain a stable duty cycle of the output signal. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0030] Figure 1 Schematic diagram of the application module of the duty cycle imbalance correction circuit according to an embodiment;
[0031] Figure 2 Schematic diagram of the structure of the front-stage circuit of the optical receiving end according to an embodiment;
[0032] Figure 3 Schematic diagram of the module of the duty cycle imbalance correction circuit according to an embodiment;
[0033] Figure 4 Schematic diagram of the module of the duty cycle imbalance correction circuit according to another embodiment;
[0034] Figure 5 Schematic diagram of the module of the detection and correction module according to another embodiment;
[0035] Figure 6 Schematic diagram of the circuit structure of the duty cycle imbalance correction circuit according to an embodiment;
[0036] Figure 7 Schematic diagram of the circuit structure of the duty cycle imbalance correction circuit for another embodiment;
[0037] Figure 8 For Figure 7 Schematic diagram of the principle of duty cycle imbalance correction for the embodiment;
[0038] Figure 9 For Figure 7 Waveform schematic diagram of the duty cycle imbalance correction process for the embodiment. Detailed implementation manners
[0039] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. Embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.
[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0041] It can be understood that the terms "first", "second", etc. used in the present application can be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. For example, without departing from the scope of the present application, the first resistor can be called the second resistor, and similarly, the second resistor can be called the first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0042] It can be understood that "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is an electrical signal or data transmission between the connected circuits, modules, units, etc.
[0043] It can be understood that "at least one" means one or more, and "a plurality" means two or more. "At least part of an element" means part or all of the element.
[0044] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises / comprising", "has / including", etc. specify the presence of the stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.
[0045] In one embodiment, a duty cycle distortion (DCD) correction circuit is provided. As Figure 1 shown, the duty cycle distortion correction circuit 100 is used to connect to the front-stage circuit 200 of the optical receiving end.
[0046] Among them, the front-stage circuit 200 of the optical receiving end is used to output an electrical signal according to the received optical signal. Please refer to Figure 2 , by way of example, the front-stage circuit 200 of the receiving end includes a photodiode D, a transimpedance amplifier, and a limiting amplifier connected in sequence. The photodiode D can convert the received optical signal into a current signal; then the current signal is converted into a voltage signal and preliminarily amplified by the transimpedance amplifier, and finally the voltage signal is further amplified and shaped by the limiting amplifier, and then an electrical signal (Outp-Outm) is output.
[0047] As Figure 3 shown, the duty cycle distortion correction circuit 100 includes a detection and correction module 110, a correction adjustment module 120, and an output buffer processing module 130.
[0048] The detection and correction module 110 is connected to the front-stage circuit 200 of the optical receiving end. The detection and correction module 110 is used to receive the electrical signal and output a correction current that matches the power of the optical signal according to the electrical signal.
[0049] Specifically, after receiving the electrical signal, the detection and correction module 110 can identify and detect the power of the optical signal based on the electrical signal to determine whether the currently received is a large signal with a power greater than the preset power threshold or a small signal with a power lower than the preset power threshold. Among them, the size of the preset power threshold can be set according to the actual situation.
[0050] Furthermore, the detection and correction module 110 can also output a corresponding correction current according to the power of the optical signal. By way of example, the detection and correction module 110 can output a correction current when the optical signal is a large signal; or, whether the optical signal is a large signal or a small signal, the detection and correction module 110 outputs a correction current. The correction current matches the power of the optical signal and is used to adjust the duty cycle of the subsequent signal.
[0051] The correction adjustment module 120 is connected to the optical receiving end front stage circuit 200 to receive the electrical signal. The correction adjustment module 120 is also connected to the detection correction module 110 to receive the correction current. The correction adjustment module 120 is used to output the adjustment signal after the duty cycle imbalance correction according to the electrical signal and the correction current.
[0052] Specifically, the correction adjustment module 120 can adjust the duty cycle of the electrical signal according to the correction current. The adjustment method can be determined according to the specific situation, such as adjusting the high and low level values of the electrical signal and adjusting the rising edge, the falling edge or both at the same time to achieve duty cycle correction of the electrical signal so that the duty cycle of the output adjustment signal is consistent with expectations.
[0053] The detection and correction module 110 can track the change of the optical signal power in real time and generate a correction current that matches the optical signal power. On the one hand, the correction current matches the actual power of the optical signal, so the imbalance correction processing of the electrical signal based on the correction current is more accurate and reliable.
[0054] On the other hand, the detection and correction module 110 can quickly respond to changes in the optical signal, so that the correction adjustment module 120 can quickly perform duty cycle correction. Therefore, there is no need to wait for feedback from the output signal to adjust the input or control variable, and open-loop feedback is achieved. Therefore, when the optical signal switches rapidly between different optical powers, it can quickly respond and adjust the correction current, thereby achieving rapid correction of the duty cycle of the electrical signal.
[0055] The output buffer processing module 130 is connected to the correction and adjustment module 120 , and is used for performing shaping processing on the adjustment signal output by the correction and adjustment module 120 to obtain a processed output signal.
[0056] The output buffer processing module 130 performs shaping and limiting processing on the received adjustment signal, thereby improving the waveform quality of the output signal, so that the output signal has a stable duty cycle, high-quality waveform and amplitude, and is more suitable for subsequent circuit processing or transmission.
[0057] The above duty cycle imbalance correction circuit 100 is used to connect to the pre-stage circuit 200 of the optical receiving end. The pre-stage circuit 200 of the optical receiving end is used to obtain and output an electrical signal according to the received optical signal. Specifically, the duty cycle imbalance correction circuit 100 includes a detection and correction module 110, a correction and adjustment module 120, and an output buffer processing module 130. The detection and correction module 110 is connected to the pre-stage circuit 200 of the optical receiving end, and is used to receive the electrical signal and output a correction current that matches the power of the optical signal according to the electrical signal. The correction and adjustment module 120 is connected to the pre-stage circuit 200 of the optical receiving end and the detection and correction module 110, and is used to receive the electrical signal and output an adjusted signal after duty cycle imbalance correction according to the electrical signal and the correction current. The output buffer processing module 130 is connected to the correction and adjustment module 120, and is used to perform shaping processing on the adjusted signal to obtain a processed output signal. The duty cycle imbalance correction circuit 100 adopts an open-loop structure. The detection and correction module 110 can quickly adjust the corresponding correction value (i.e., the correction current) according to the change of the optical signal power, so that the correction and adjustment module 120 can quickly adjust the output signal based on the correction current for large signals and the original electrical signal, thereby achieving the effect of quickly correcting the duty cycle imbalance of the circuit output signal.
[0058] For the application scenario where the optical signal quickly switches between different optical powers in the burst mode, the duty cycle imbalance correction circuit 100 can meet the requirements of fast response and maintain a stable duty cycle of the output signal.
[0059] In practical applications, the duty cycle imbalance correction circuit 100 and the pre-stage circuit 200 of the receiving end can be integrated into an optical receiving chip, thereby improving the integration of the circuit. The duty cycle imbalance correction circuit 100 can also be applied to optoelectronic terminal devices, such as fiber optic communication devices, optical receivers, optical measuring instruments, etc. When applied to optoelectronic terminal devices, the duty cycle imbalance correction circuit 100 and the pre-stage circuit 200 of the receiving end can be integrated into an optical receiving chip, or can be set in the form of an independent circuit.
[0060] In one embodiment, as Figure 4 shown, the duty cycle imbalance correction circuit 100 further includes an input buffer processing module 140. The input end of the input buffer processing module 140 is used to connect to the pre-stage circuit 200 of the optical receiving end, and the output end is connected to the detection and correction module 110 and the correction and adjustment module 120.
[0061] The input buffer processing module 140 is used to perform buffer processing on the received electrical signal and then transmit it to the detection and correction module 110 and the correction and adjustment module 120.
[0062] In this embodiment, the buffering process includes, on the one hand, compensating for the high-frequency signal attenuation of the pre-stage circuit to receive and improve the signal quality. Specifically, the input buffering processing module 140 can compensate for the high-frequency signal attenuation of the pre-stage circuit 200 of the optical receiving end to improve the quality of the electrical signal. Thus, by resetting the electrical signal, the response delay of the channel is reduced, which is helpful for the application scenario of the burst mode.
[0063] On the other hand, the buffering process also includes amplitude amplification processing, that is, the input buffering processing module 140 can also amplify the output amplitude of the electrical signal to a preset amplitude value. Among them, the preset amplitude value can be set according to specific circumstances, and this embodiment does not limit it. Thereby, the signal can have sufficient strength during subsequent processing or transmission, improving signal reliability.
[0064] In actual implementation, the input buffering processing module 140 and the output buffering processing module 130 can be set according to specific circumstances. In one embodiment, the input buffering processing module 140 includes a first buffer. The input end of the first buffer is used to connect to the pre-stage circuit 200 of the optical receiving end, and the output end of the first buffer is connected to the detection and correction module 110 and the correction and adjustment module 120.
[0065] Among them, the buffer can temporarily store the signal from the previous circuit part and transfer it to the next circuit part at an appropriate time, thereby ensuring the integrity and stability of the signal. The buffer can amplify and shape the signal to make it more accurate and stable. The buffer can also reduce the response delay of the channel and improve the response speed.
[0066] In this embodiment, the first buffer is connected to the pre-stage circuit 200 of the optical receiving end and preliminarily processes the received electrical signal. Subsequently, these signals are transmitted to the detection and correction module 110 and the correction and adjustment module 120 for further processing and analysis.
[0067] Specifically, the first buffer amplifies the amplitude of the electrical signal to ensure that the electrical signal has sufficient strength during transmission. At the same time, the first buffer speeds up the channel response speed of the electrical signal, thereby enhancing the adaptability of the duty cycle imbalance correction circuit 100 to the burst mode.
[0068] In other embodiments, the input buffering processing module 140 may further include an input limiting amplifier. The input end of the input limiting amplifier is used to connect to the pre-stage circuit 200 of the optical receiving end, and the output end of the input limiting amplifier is connected to the detection and correction module 110 and the correction and adjustment module 120.
[0069] Among them, the limiting amplifier is a special amplifier, and its main function is to limit the amplitude range of the input signal and amplify it to a controllable output amplitude.
[0070] In this embodiment, the input limiting amplifier can shape the electrical signal by setting an upper limit and / or a lower limit, so as to provide a stable and controllable signal to the detection and correction module 110 and the correction and adjustment module 120.
[0071] In one embodiment, the output buffer processing module 130 includes a second buffer. The input end of the second buffer is connected to the correction and adjustment module 120, and the output end of the second buffer is used to output the output signal.
[0072] In this embodiment, the second buffer is connected to the correction and adjustment module 120, and processes the received adjustment signal and outputs it as the output signal.
[0073] Specifically, the second buffer is used to perform shaping and limiting processing on the adjustment signal to make the output signal more stable and accurate. Thereby, the processing quality of the duty cycle offset correction circuit 100 is improved, and the waveform quality of the output signal better meets the requirements of subsequent circuits or devices.
[0074] Moreover, the second buffer has a strong driving ability, which can keep the output signal with sufficient strength and stability during transmission, further improving the signal quality output by the duty cycle offset correction circuit 100 and the adaptability to the application scenario (such as the long-distance transmission scenario).
[0075] In other embodiments, the output buffer processing module 130 may include an output limiting amplifier. The input end of the output limiting amplifier is connected to the correction and adjustment module 120, and the output end of the output limiting amplifier is used to output the output signal. Those skilled in the art can set according to specific situations as long as the above corresponding functions are realized.
[0076] In one embodiment, as Figure 5 shown, the detection and correction module 110 includes a power detection circuit 111, a correction control circuit 112, and a correction current generation circuit 113.
[0077] Among them, the power detection circuit 111 is connected to the pre-stage circuit 200 of the optical receiving end for receiving the electrical signal.
[0078] In actual implementation, the power detection circuit 111 can be directly connected to the pre-stage circuit 200 of the optical receiving end to receive the electrical signal output by the pre-stage circuit 200 of the optical receiving end. The power detection circuit 111 can also be as Figure 5 shown, connected to the pre-stage circuit 200 of the optical receiving end through the input buffer processing module 140 to receive the electrical signal processed by the input buffer processing module 140.
[0079] The power detection circuit 111 is used to detect the power of the optical signal according to the received electrical signal and output a power identification signal corresponding to the power of the optical signal.
[0080] Specifically, by sampling and analyzing the electrical signal, the power detection circuit 111 can accurately identify the power level of the optical signal, and then output a power identification signal corresponding to the power to the subsequent correction control circuit 112.
[0081] The circuit structure of the power detection circuit 111 does not need to be limited. Exemplarily, the power detection circuit 111 may include a power detector, and the power detector may adopt a power detection integrated chip to implement the detection and identification of the power of the optical signal through the power detection integrated chip.
[0082] The correction control circuit 112 is connected to the power detection circuit 111. The correction control circuit 112 is configured to generate and output a correction control signal according to the power identification signal.
[0083] Among them, the correction control signal includes a correction current parameter.
[0084] The manner in which the correction control circuit 112 generates the correction control signal according to the power identification signal is not unique. In one embodiment, the correction control circuit 112 may determine the power level of the optical signal according to the power identification signal, and then determine the correction current parameter matching the power level, and generate the correction control signal based on the correction current parameter. Among them, when determining the correction current parameter matching the power level, it may be determined based on a specific algorithm, or the correction current parameter matching the power level may be found from a preset corresponding relationship.
[0085] In this embodiment, the correction control circuit 112 can accurately determine the correction current parameter matching the power level, making the subsequent correction more accurate.
[0086] In another embodiment, the correction control circuit 112 presets a target correction current parameter, and generates a correction control signal according to the target correction current parameter when it is determined according to the power identification signal that the power of the optical signal is greater than the preset power threshold.
[0087] Regarding the target correction current parameter preset in the correction control circuit 112, the target correction current parameter may be pre-stored in the correction control circuit 112, or may be input by a professional in other ways. Exemplarily, the correction control circuit 112 also includes an input module, and the professional may input the target correction current parameter to the correction control circuit 112 through the input module. The target correction current parameter input by the professional may be the actual data (such as the specific parameters of the input and output signals) detected by the professional based on the optical receiving end front-stage circuit 200 and the duty cycle imbalance correction circuit 100 during the generation process of the optical receiving chip, the experimental parameters obtained through experiments, or the empirical parameters obtained based on experience. Thus, different target correction current parameters can be set for different optical receiving end front-stage circuits 200 to increase the adaptability of the circuit.
[0088] In actual implementation, professionals can also input a preset power threshold through the input module, thereby making the correction control circuit 112 more flexible and configurable to adapt to different application scenarios and power correction requirements.
[0089] In this embodiment, if the optical signal is a large signal with a power greater than a preset power threshold, the correction control circuit 112 generates a correction control signal according to the target correction current parameter. If the optical signal is a small signal, no correction control signal is generated, that is, no duty cycle imbalance correction is performed at this time. This is because: when receiving a smaller optical power signal, the photodiode and the transimpedance amplifier TIA in the optical receiving end front-stage circuit 200 are approximately linearly amplified, so that the rise time and fall time of the output signal of the transimpedance amplifier TIA are approximately equal, and the duty cycle distortion can be ignored. Therefore, by correcting the duty cycle imbalance when large light (optical signal with a power greater than the preset power threshold) is input, and not performing unnecessary correction processing when small light (optical signal with a power less than the preset power threshold) is input, the overall efficiency of the system can be improved.
[0090] The correction current generating circuit 113 is connected to the correction control circuit 112 and the correction adjustment module 120. The correction current generating circuit 113 is used to generate and output the correction current according to the correction control signal.
[0091] It can be understood that the correction current generating circuit 113 generates a correction current whose magnitude and direction satisfy the correction current parameters included in the correction control signal. The correction current is transmitted to the correction adjustment module 120 for adjusting the duty cycle of the electrical signal.
[0092] Therefore, the power detection circuit 111 detects the power of the electrical signal, the correction control circuit 112 generates a correction control signal according to the detection result, and the correction current generation circuit 113 generates and outputs a correction current according to the correction control signal, so that the correction adjustment module 120 can accurately perform duty cycle correction according to the correction current.
[0093] In one embodiment, as Figure 6 shown, the correction current generation circuit 113 includes a current digital-to-analog converter (Current Mode Digital-to-Analog Converter, abbreviated as IDAC). The input terminal of the current digital-to-analog converter is connected to the correction control circuit 112, and the output terminal of the current digital-to-analog converter is connected to the correction adjustment module 120.
[0094] Specifically, the current digital-to-analog converter receives a correction control signal from the correction control circuit 112. The correction control signal usually includes the input codeword (DAC<7:0>) of the current digital-to-analog converter (the input codeword corresponds to the correction current parameter), and the input codeword is used to represent the magnitude or direction of the required correction current. It can be understood that the input codeword can be determined according to power level matching or input by professionals.
[0095] The output terminal of the current digital-to-analog converter is connected to the correction adjustment module 120. The current digital-to-analog converter outputs an analog current signal according to the received input codeword, and this current signal is the required correction current.
[0096] Since the current digital-to-analog converter can provide high-precision current output, the control of the magnitude and direction of the correction current is more accurate. By adjusting the input codeword of the current digital-to-analog converter, the magnitude of the correction current can be flexibly adjusted to adapt to different application scenarios and requirements.
[0097] It can be understood that the above correction current generation circuit 113 can also adopt other forms, not limited to the forms already mentioned in the above embodiments, as long as it can achieve the corresponding functions.
[0098] Among them, the structure of the correction control circuit 112 does not need to be limited. In one embodiment, please continue to refer to Figure 6 , in the case where the correction control circuit 112 does not process small optical inputs and corrects large optical inputs, the correction control circuit 112 may include a comparator 1121 and a correction signal generation circuit 1122.
[0099] The comparator 1121 is respectively connected to the power detection circuit 111 and the correction signal generation circuit 1122; the correction signal generation circuit 1122 is also connected to the correction current generation circuit 113.
[0100] Among them, the comparator 1121 is used to output a correction enable signal when the power identification signal indicates that the power of the optical signal is greater than the preset power threshold. The correction signal generation circuit 1122 is used to output a correction control signal based on the preset input codeword when receiving the correction enable signal.
[0101] It can be understood that the comparator 1121 is also used to receive a reference signal vref, and the voltage magnitude of the reference signal vref is used to represent a preset power threshold. Thus, when the power of the optical signal is greater than the preset power threshold, a comparison result is output, and this comparison result is output as a correction enable signal to the correction signal generation circuit 1122. In actual implementation, professionals can also adjust the preset power threshold by adjusting the reference signal vref.
[0102] The preset input codeword (DAC<7:0>) in the correction signal generation circuit 1122 can be input by professionals or determined according to power level matching.
[0103] Among them, the correction signal generation circuit 1122 is implemented by a digital circuit, and its implementation method does not need to be limited. It needs to be able to receive an input instruction (such as an input codeword) and, when receiving the correction enable signal, output the input codeword to the current digital-to-analog converter to adjust the current digital-to-analog converter.
[0104] In some other embodiments, the correction signal generation circuit 1122 is connected to the power detection circuit 111, and can determine the power level of the optical signal according to the received power identification signal, and then determine the correction current parameter matching the power level, and generate a correction control signal based on the correction current parameter.
[0105] In one embodiment, as Figure 7 shown, the number of correction adjustment modules 120 is multiple, and each correction adjustment module 120 is connected in sequence.
[0106] The number of correction current generation circuits 113 is the same as that of the correction adjustment modules 120; the output end of each correction current generation circuit 113 is correspondingly connected to a correction adjustment module 120; the input ends of each correction current generation circuit 113 are all connected to the correction control circuit 1122.
[0107] Among them, the correction control circuit 1122 can output corresponding input codewords to control each correction current generation circuit 113 respectively. In actual implementation, each correction current generation circuit 113 can be enabled simultaneously, that is, output correction currents simultaneously; or can be partially enabled, that is, some correction current generation circuits 113 output correction currents, and some correction current generation circuits 113 do not output.
[0108] It should also be noted that under the control of the correction control circuit 1122, the correction currents output by each correction current generation circuit 113 can be the same or different.
[0109] When the power of the optical signal is relatively large and the duty cycle imbalance is severe, the correction current can be appropriately increased to improve the adjustment range. The way to increase the correction current can be to control the correction current value output by the correction current generation circuit 113 to increase, or to control more correction current generation circuits 113 to output the correction current.
[0110] In this embodiment, by reasonably setting the number of the correction current generation circuit 113 and the correction adjustment module 120, the output correction current can be increased as needed, thereby increasing the adjustment range to better improve the duty cycle imbalance of the output signal.
[0111] Among them, the implementation manner of the correction adjustment module 120 is not unique. In one embodiment, the correction adjustment module 120 includes a limiting amplifier. The input end of the limiting amplifier serves as the input end of the correction adjustment module 120, and the output end of the limiting amplifier serves as the output end of the correction adjustment module 120.
[0112] When a correction adjustment module 120 is provided in the circuit, the input end of the limiting amplifier serving as the correction adjustment module 120 is used to receive an electrical signal, and the output end is connected to the output buffer processing module 130.
[0113] When multiple correction adjustment modules 120 are provided in the circuit, the multiple limiting amplifiers serving as the correction adjustment module 120 are connected in sequence, that is, the output end of the limiting amplifier in the first place is connected to the input end of the limiting amplifier in the second place, the output end of the limiting amplifier in the second place is connected to the input end of the limiting amplifier in the third place, and so on. Among them, the input end of the limiting amplifier in the first place is used to receive an electrical signal, which can be directly connected to the pre-stage circuit 200 of the optical receiving end, or connected to the pre-stage circuit 200 of the optical receiving end through the input buffer processing module 140. The output end of the limiting amplifier in the last place is connected to the output buffer processing module 130.
[0114] Specifically, the output end of the limiting amplifier serving as the correction adjustment module 120 is connected to the current digital-to-analog converter in the corresponding detection and correction module 110 and receives the correction current output by the current digital-to-analog converter. Please refer to Figure 8 , the correction current (im - ip) output by the current digital-to-analog converter n - 1 in the (n - 1)th place is used to affect the voltage drop across the resistor R in the limiting amplifier n - 1, thereby affecting the output (Vop - Vom) of the limiting amplifier n - 1 to achieve duty cycle imbalance correction.
[0115] It can be understood that when the accuracy of the correction current output by each stage of the current digital-to-analog converter is higher, the accuracy of the duty cycle imbalance correction is also higher.
[0116] In other embodiments, the correction adjustment module 120 may also be a buffer, and its specific connection structure in the circuit will not be elaborated here. Those skilled in the art can set it according to specific circumstances.
[0117] For a better understanding of the above embodiments, the following will be explained in detail with a specific embodiment. Please refer to Figure 7 , the duty cycle imbalance correction circuit includes an input buffer processing module 140, a detection and correction module 110, a correction adjustment module 120, and an output buffer processing module 130. The detection and correction module 110 includes a power detection circuit 111, a correction control circuit 112, and a correction current generation circuit 113. The correction control circuit 112 includes a comparator 1121 and a correction signal generation circuit 1122.
[0118] Among them, the power detection circuit 111 uses a power detector. The input buffer processing module 140 includes an input buffer. The output buffer processing module 130 includes an output buffer. The correction adjustment module 120 is implemented by a limiting amplifier, and the number of limiting amplifiers is multiple, such as n. The correction current generation circuit 113 includes a current digital-to-analog converter, and the number of current digital-to-analog converters is the same as the number of limiting amplifiers, that is, n current digital-to-analog converters. Each current digital-to-analog converter is correspondingly connected to each limiting amplifier. Exemplarily, the output terminal of the first limiting amplifier 1 is connected to the first current digital-to-analog converter, the output terminal of the second limiting amplifier 2 is connected to the second current digital-to-analog converter, and so on. The output terminal of the last limiting amplifier n is connected to the last current digital-to-analog converter.
[0119] Specifically, the power detector 111 first detects the power of the input electrical signal (Inp - Inm). When the input power is greater than the preset power threshold, it means that the power of the optical signal is relatively large. The comparator 1121 outputs a high level, thereby enabling the correction signal generation circuit 1122, and further enabling the corresponding current digital-to-analog converter to correct the duty cycle of the output signal of the corresponding limiting amplifier.
[0120] Among them, the differential output current Ip - In of the (n - 1)th current digital-to-analog converter affects the output signal of the (n - 1)th limiting amplifier and the output signal of the next-stage (n)th limiting amplifier as Figure 8 shown, and the duty cycle of the output signal of the (n - 1)th limiting amplifier is controlled by the output current of the (n - 1)th current digital-to-analog converter. The input codeword of the (n - 1)th current digital-to-analog converter can be manually set by professionals by observing the duty cycle of the output signal of the (n - 1)th limiting amplifier, so as to obtain the best duty cycle correction effect.
[0121] Furthermore, the influence of the output current of the current digital-to-analog converter on the duty cycles of the output signals of the limiting amplifier and the output buffer can be referred to Figure 9, It can be seen that when receiving a large-swing optical signal, due to the non-linear effects of the previous-stage photodiode D and transimpedance amplifier, etc., the rising edges of the voltages Vip and Vim of the electrical signal (Inp - Inm) are significantly greater than the falling edges, resulting in duty cycle distortion. After introducing the output current Δi of the current digital-to-analog converter, the output current Δi of the current digital-to-analog converter acts on the resistor R in the limiting amplifier, forming a voltage drop (the magnitude is the product of the resistance value of the resistor R and the output current Δi, RΔi), which can adjust the intersection of the rising and falling edges of the signals Vop and Vom output by the limiting amplifier (the overall level of the Vop is shifted downward). After the signal is amplified by the subsequent-stage limiting amplifier, the optimal duty cycle and higher waveform quality can be obtained (that is, the output signal Vop1 - Vop1 reaches the optimal duty cycle and higher waveform quality). When receiving a small-swing optical signal, since the non-linear effect of the previous stage is small, the output current Δi of the current digital-to-analog converter can be made 0 to avoid over-adjustment from damaging the waveform quality.
[0122] When the input power is less than a certain power value, the comparator 1121 outputs a low level, the current digital-to-analog converter is turned off, and its output current is 0, which does not affect the duty cycle of the output signal of the limiting amplifier. The preset power threshold can be controlled by setting the voltage value of the reference signal Vref of the comparator 1121.
[0123] The above duty cycle offset correction circuit, according to the relationship between the input signal power and the duty cycle offset, distinguishes large-light and small-light inputs by adding a power detector 111 and a comparator 1121 circuit, and realizes duty cycle offset detection through the comparator 1121 and the power detector 111, and only needs to correct the duty cycle offset of the large light. Thus, by detecting the power of the input signal to control whether to perform duty cycle offset correction on the limiting amplifier circuit, the effect of quickly correcting the duty cycle offset of the circuit output signal is achieved, and the output signal of the limiting amplifier reaches the optimal duty cycle when there are large-light and small-light inputs.
[0124] Compared with the traditional duty cycle offset circuit, the loop delay of the traditional duty cycle offset correction circuit is too large. The above duty cycle offset correction circuit uses open-loop control for duty cycle offset, can respond instantaneously following the input signal power, and quickly corrects the duty cycle of the output signal of the limiting amplifier.
[0125] In one embodiment, an optical and electrical terminal device is further provided. As Figure 2 shown, the optical and electrical terminal device includes a duty cycle offset correction circuit 100 and a front-stage circuit 200 of the receiving end.
[0126] The optical and electrical terminal device includes, but is not limited to, fiber optic communication devices, optical receivers, optical measuring instruments, etc. When applied to the optical and electrical terminal device, the duty cycle offset correction circuit 100 and the front-stage circuit 200 of the receiving end can be integrated into an optical receiving chip or set in the form of independent circuits.
[0127] The structure of the duty cycle imbalance correction circuit 100 can be set with reference to the above embodiments, and will not be described in detail here. Since the optoelectronic terminal device includes any one of the duty cycle imbalance correction circuits provided in the above embodiments. Therefore, the optoelectronic terminal device also has the beneficial effects of the duty cycle imbalance correction circuit in the above embodiments. The same parts can be understood with reference to the explanation of the duty cycle imbalance correction circuit above, and will not be described in detail.
[0128] In the description of this specification, the descriptions with reference to the terms "some embodiments", "other embodiments", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
[0129] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.
[0130] The above embodiments only represent several implementation manners of the present application. The descriptions are relatively specific and detailed, but should not be construed as a limitation on the scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.
Claims
1. A duty cycle imbalance correction circuit, characterized in that: Used to connect to the front-stage circuit of the optical receiving end, the front-stage circuit of the optical receiving end is used to output an electrical signal according to the received optical signal; the front-stage circuit of the optical receiving end includes a photodiode, a transimpedance amplifier and a limiting amplifier connected in sequence; the photodiode is used to convert the received optical signal into a current signal; the transimpedance amplifier is used to convert the current signal into a voltage signal and perform preliminary amplification; the limiting amplifier amplifies and shapes the voltage signal and outputs the electrical signal, which is a differential signal; The duty cycle imbalance correction circuit includes: a detection correction module, a correction adjustment module and an output buffer processing module; the detection correction module is connected to the front-stage circuit of the optical receiving end, and is used to receive the electrical signal, and output a correction current matching the power of the optical signal according to the electrical signal; the correction adjustment module is connected to the front-stage circuit of the optical receiving end and the detection correction module; and is used to receive the electrical signal and the correction current, and output an adjustment signal after duty cycle imbalance correction according to the electrical signal and the correction current; the output buffer processing module is connected to the correction adjustment module, and is used to perform shaping processing on the adjustment signal to obtain a processed output signal; Wherein, the detection and correction module includes: A power detection circuit, connected to the front-stage circuit of the optical receiving end, for receiving the electrical signal, detecting the power of the optical signal according to the electrical signal, and outputting a power identification signal corresponding to the power of the optical signal; a correction control circuit connected to the power detection circuit, and configured to generate a correction control signal according to a preset target correction current parameter when it is determined according to the power identification signal that the power of the optical signal is greater than a preset power threshold; A correction current generating circuit is connected to the correction control circuit and the correction adjustment module, and is used to generate and output a correction current according to the correction control signal; the correction current generating circuit includes a current digital-to-analog converter; the input end of the current digital-to-analog converter is connected to the correction control circuit, and the output end of the current digital-to-analog converter is connected to the correction adjustment module; the correction current output by the current digital-to-analog converter is a differential current.
2. The duty cycle imbalance correction circuit according to claim 1, characterized in that: There are multiple correction adjustment modules, and each correction adjustment module is connected in sequence; the number of the correction current generating circuits is the same as the number of the correction adjustment modules; the output end of each correction current generating circuit is correspondingly connected to a correction adjustment module; the input end of each correction current generating circuit is connected to the correction control circuit.
3. The duty cycle imbalance correction circuit according to claim 1, characterized in that: The correction control circuit includes a comparator and a correction signal generating circuit; the comparator is connected to the power detection circuit and the correction signal generating circuit respectively; the correction signal generating circuit is connected to the correction current generating circuit; wherein, The comparator is used to output a correction enable signal when the power identification signal indicates that the power of the optical signal is greater than a preset power threshold; The correction signal generating circuit is used to output a correction control signal based on a preset input code word when a correction enabling signal is received.
4. The duty cycle imbalance correction circuit according to claim 1, characterized in that: It also includes an input buffer processing module, the input end of the input buffer processing module is used to connect to the front-stage circuit of the optical receiving end, and the output end is connected to the detection correction module and the correction adjustment module; The input buffer processing module is used to perform buffer processing on the received electrical signal.
5. The duty cycle imbalance correction circuit according to claim 4, characterized in that: The input buffer processing module includes a first buffer, the input end of the first buffer is used to connect to the front-stage circuit of the optical receiving end, and the output end of the first buffer is connected to the detection correction module and the correction adjustment module.
6. The duty cycle imbalance correction circuit according to claim 1, characterized in that: The output buffer processing module includes a second buffer, an input end of the second buffer is connected to the correction and adjustment module, and an output end of the second buffer is used to output the output signal.
7. The duty cycle imbalance correction circuit according to any one of claims 1 to 6, characterized in that: The correction and adjustment module is a limiting amplifier.
8. An optoelectronic terminal device, characterized in that: It comprises a front-stage circuit of an optical receiving end and a duty cycle imbalance correction circuit as described in any one of claims 1 to 7.
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