Intelligent electronic switch, integrated circuit chip, chip product and electromechanical device

Abstract

The invention provides an intelligent electronic switch. The intelligent electronic switch comprises a power supply end, a power grounding end, a load output end and a switch control unit, the switch control unit is used for controlling the power switch to be turned on or turned off; the capacitor end is used for being connected with the first end of the first capacitor; the current sampling unit is connected with the capacitor end so as to be connected with a first capacitor in series, the current sampling unit samples current flowing through the power switch, and the current flowing through the current sampling unit is proportional to the current flowing through the power switch; and the abnormity detection unit is connected with the load output end and the capacitor end, when the voltage of the capacitor end and the voltage of the load output end meet preset conditions after the power switch is switched on, the abnormity detection unit outputs an abnormal signal, and the abnormal signal is used for representing that the capacitive load is abnormal. The embodiment of the invention also provides an integrated circuit chip, a chip product and electromechanical equipment.

Description

Technical Field

[0001] The present application relates to the field of intelligent semiconductor switches, and in particular to an intelligent electronic switch, an integrated circuit chip, a chip product and an electromechanical device. Background Art

[0002] In recent years, with the rapid growth of the automobile market, especially the development of the electric vehicle market, such as the electric passenger car market and the electric commercial vehicle market, the demand for automotive electronic components has increased. The most demanded electronic component in automobiles is the relay, which is used to turn on or off a load line. However, the relay itself has some disadvantages, such as long delay time for opening and closing, and the relay itself is expensive and large in size.

[0003] With the development of semiconductor technology, intelligent electronic switches have been successfully developed to replace traditional relays. Intelligent electronic switches are usually used to couple loads with batteries and are electronic components that control the on and off of load lines. Intelligent electronic switches also have one or more diagnostic capabilities and protection features, such as protection against over-temperature, overload, over-current, and short-circuit events. For example, a power switch is provided in the intelligent electronic switch, and in the event of over-temperature, overload, over-current, or short-circuit events, the power switch is disconnected, so that the path between the battery and the load is disconnected.

[0004] The load types connected to the existing intelligent electronic switch include capacitive loads. When the power switch is just turned on, the capacitive load will cause a large current to flow through the power switch, which may cause an overcurrent event or an overtemperature event. When an overcurrent event or an overtemperature event occurs, the power switch will be controlled to disconnect. After a certain period of time or when the temperature returns to normal, the power switch will be turned on again. When the overcurrent event or overtemperature event occurs more frequently, it may be judged as abnormal. However, there are many types of overcurrent events or overtemperature events caused by existing intelligent electronic switches, which are not limited to overcurrent events or overtemperature events caused by abnormal capacitive loads. There may be many other factors that cause overcurrent events or overtemperature events. The existing technology does not make a distinction, so the existing intelligent electronic switch lacks effective monitoring of whether the capacitive load is abnormal. Summary of the invention

[0005] The technical problem to be solved by the embodiments of the present application is to provide an intelligent electronic switch, an integrated circuit chip, a chip product and an electromechanical device to effectively monitor whether the capacitive load is abnormal.

[0006] In order to solve the above technical problems, the first aspect of the embodiment of the present application provides an intelligent electronic switch, including:

[0007] A power supply terminal, a power ground terminal, a load output terminal, and a switch control unit, wherein the power supply terminal is used to connect to the positive electrode of the battery, the power ground terminal is used to connect to the negative electrode of the battery, and the load output terminal is used to connect to the first end of the capacitive load;

[0008] A power switch, wherein a first end thereof is connected to a power supply end or a power ground end, a second end thereof is connected to a load output end for being connected in series with a capacitive load, and a control end thereof is connected to a switch control unit, wherein the switch control unit is used to control the power switch to be turned on or off;

[0009] A capacitor terminal, which is used to be connected to a first terminal of a first capacitor, a second terminal of the first capacitor is connected to a second terminal of the capacitive load, and a capacitance value of the first capacitor is proportional to a capacitance value of the capacitive load;

[0010] a current sampling unit connected to the capacitor terminal to be connected in series with the first capacitor, the current sampling unit sampling the current flowing through the power switch, and the current flowing through the current sampling unit is proportional to the current flowing through the power switch;

[0011] An abnormality detection unit is connected to the load output terminal and the capacitor terminal. When the voltage at the capacitor terminal and the voltage at the load output terminal meet preset conditions after the power switch is turned on, the abnormality detection unit outputs an abnormality signal, and the abnormality signal is used to indicate that the capacitive load is abnormal.

[0012] Optionally, the abnormality detection unit is also connected to a first reference voltage and a second reference voltage; the preset condition is that the time required for the voltage at the capacitor end to reach the first reference voltage differs from the time required for the voltage at the load output end to reach the second reference voltage, which differs by more than or equal to a first preset time length.

[0013] Optionally, the first reference voltage is equal to the second reference voltage; or,

[0014] The abnormality detection unit includes a first voltage comparator, a second voltage comparator and a timing comparison unit, wherein the first input terminal of the first voltage comparator is connected to the load output terminal, the second input terminal thereof is connected to the first reference voltage, and the output terminal thereof is connected to the timing comparison unit; the first input terminal of the second voltage comparator is connected to the capacitor terminal, the second input terminal thereof is connected to the second reference voltage, and the output terminal thereof is connected to the timing comparison unit; when the signal of one of the output terminal of the first voltage comparator and the output terminal of the second voltage comparator changes, the timing comparison unit starts timing, the timing comparison unit is connected to the first preset time length, when the signal of the output terminal of the other voltage comparator changes, the timing comparison unit compares the current timing time length with the first preset time length, and when the current timing time length is greater than or equal to the first preset time length, the timing comparison unit outputs an abnormality signal; or,

[0015] The abnormality detection unit includes a first voltage comparator, a second voltage comparator, a first timing unit, a second timing unit, a duration subtractor and a duration comparator, wherein the first input end of the first voltage comparator is connected to the load output end, the second input end thereof is connected to the first reference voltage, the load output end thereof is connected to the first timing unit, the first input end of the second voltage comparator is connected to the capacitor end, the second input end thereof is connected to the second reference voltage, the load output end thereof is connected to the second timing unit, the duration subtractor is connected to the first timing unit and the second timing unit, the duration comparator is connected to the duration subtractor, and the duration comparator The device is also connected to a first preset time length; wherein, when the power switch starts to turn on, the first timing unit and the second timing unit start timing, when the signal at the output end of the first voltage comparator changes, the first timing unit outputs a first timing time length, and when the signal at the load output end of the second voltage comparator changes, the second timing unit outputs a second timing time length, the time length subtractor subtracts the first timing time length from the second timing time length to obtain a time length difference, the time length comparator compares the time length difference with the first preset time length, and when the time length difference is greater than or equal to the first preset time length, the time length comparator outputs an abnormal signal.

[0016] Optionally, the abnormality detection unit is also connected to a first reference time length and a second reference time length; the preset condition is that the difference between the voltage at the capacitor end charged after the first reference time length and the voltage at the load output end charged after the second reference time length is greater than or equal to a third preset voltage.

[0017] Optionally, the first reference duration is equal to the second reference duration; or,

[0018] The abnormality detection unit includes a timer, a voltage subtractor and a third voltage comparator, wherein the timer is connected to a first reference time length and a second reference time length, the voltage subtractor is connected to the timer, the load output end and the capacitor end, the output end of the voltage subtractor is connected to the third voltage comparator, and the third voltage comparator is also connected to a third preset voltage; wherein the timer starts timing when the power switch starts to turn on, the voltage subtractor obtains the voltage at the load output end when the timer times to the first reference time length, the voltage subtractor obtains the voltage at the capacitor end when the timer times to the second reference voltage, the voltage subtractor subtracts the obtained voltage at the load output end and the voltage at the capacitor end to obtain a voltage difference, the voltage subtractor outputs the voltage difference to the third voltage comparator, the third voltage comparator compares the voltage difference with the third preset voltage, and the third voltage comparator outputs an abnormal signal when the voltage difference is greater than or equal to the third preset voltage.

[0019] Optionally, the ratio of the capacitance of the first capacitor to the capacitance of the capacitive load is a first ratio, the ratio of the current generated by the current sampling unit to the current flowing through the power switch is a second ratio, and the first ratio is equal to the second ratio.

[0020] Optionally, the current sampling unit includes a first semiconductor switch, which is of the same type as the power switch, wherein the first end of the first semiconductor switch is connected to the first end of the power switch, the second end of the first semiconductor switch is connected to the capacitor end, and the control end of the first semiconductor switch is connected to the control end of the power switch, wherein the current flowing through the first semiconductor switch is less than the current flowing through the power switch.

[0021] Optionally, the current sampling unit also includes an operational amplifier and a third semiconductor switch, wherein the first input terminal of the operational amplifier is connected to the second end of the power switch, the second input terminal of the operational amplifier is connected to the second end of the first semiconductor switch, the load output terminal of the operational amplifier is connected to the control terminal of the third semiconductor switch, the first end of the third semiconductor switch is connected to the second end of the first semiconductor switch, and the second end of the third semiconductor switch is connected to the capacitor terminal.

[0022] Optionally, the intelligent electronic switch further includes a second semiconductor switch, a first end of the second semiconductor switch is connected to the capacitor end, a second end of the second semiconductor switch is connected to the power ground end or the power supply end, and the second semiconductor switch is used to release the charge on the first capacitor.

[0023] Optionally, the capacitor end is also used to connect to the first end of the first resistor, and the second end of the first resistor is connected to the second end of the capacitive load, wherein the resistance of the first resistor is proportional to the resistance of the capacitive load, and the ratio of the capacitance of the first capacitor to the capacitance of the capacitive load is equal to the ratio of the resistance of the first resistor to the resistance of the capacitive load.

[0024] A second aspect of an embodiment of the present application provides an integrated circuit chip, comprising the above-mentioned intelligent electronic switch, wherein the power supply end is a power supply pin, the power ground end is a power ground pin, the load output end is a load output pin, and the capacitor end is a capacitor pin.

[0025] A third aspect of the embodiments of the present application provides a chip product, comprising the above-mentioned intelligent electronic switch, wherein the components of the intelligent electronic switch except the power switch are located on a first integrated circuit chip, and the power switch is located on a second integrated circuit chip;

[0026] Among them, the power supply end is a power supply pin, the power ground end is a power ground pin, the load output end is a load output pin, the capacitor end is a capacitor pin, the power supply pin, the power ground pin, and the capacitor pin are located on a first integrated circuit chip, and the load output pin is located on a second integrated circuit chip.

[0027] A fourth aspect of the embodiments of the present application provides an electromechanical device, including the above-mentioned intelligent electronic switch or the above-mentioned integrated circuit chip or the above-mentioned chip product;

[0028] It also includes a battery, a capacitive load and a microprocessor, wherein the positive electrode of the battery is connected to the power supply terminal, the negative electrode of the battery is connected to the power ground terminal, the first end of the capacitive load is connected to the load output terminal, the second end of the capacitive load is connected to the power ground terminal or the power supply terminal, and the microprocessor is connected to the intelligent electronic switch.

[0029] Optionally, the electromechanical device includes a car.

[0030] In this embodiment, the intelligent electronic switch includes a capacitor terminal, a current sampling unit, and an abnormality detection unit. The capacitor terminal is used to connect to the first end of the first capacitor. The capacitance of the first capacitor is proportional to the capacitance of the capacitive load. Through such a setting, the intelligent electronic switch is connected to different capacitive loads, and a matching first capacitor can be selected according to the capacitive load, so that the preset conditions in the intelligent electronic switch do not need to be changed, and the circuit and logic inside the intelligent electronic switch do not need to be changed. The load output terminal of the intelligent electronic switch can be connected to capacitive loads of various specifications, which is conducive to improving the application range of the intelligent electronic switch. Moreover, the current flowing through the current sampling unit is proportional to the current flowing through the power switch, so that the current flowing into the first capacitor is proportional to the current flowing into the capacitive load, so that the charging process of the first capacitor is similar to the charging process of the capacitive load, and the charging of the first capacitor will cause the voltage at the capacitor end to change, and the charging of the capacitive load will cause the voltage at the load output end to change. When the voltage at the capacitor end and the voltage at the load output end meet the preset conditions, the abnormality detection unit outputs an abnormal signal, that is, when the charging process of the first capacitor is significantly different from the charging process of the capacitive load, the voltage at the capacitor end and the voltage at the load output end will differ significantly at this time, which will cause the capacitor end and the load output end to meet the preset conditions, so that the present application can effectively monitor whether the capacitive load is abnormal. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0032] Figure 1a is a circuit module diagram of the electromechanical device of the first embodiment of the present application;

[0033] Figure 1b is a circuit module diagram of an electromechanical device according to another embodiment of the present application;

[0034] Figure 2 is a circuit module diagram of the intelligent electronic switch of the first embodiment of the present application;

[0035] Figure 3a is a detailed circuit module diagram of the intelligent electronic switch of the first embodiment of the present application;

[0036] Figure 3b is a detailed circuit module diagram of an intelligent electronic switch according to another embodiment of the present application;

[0037] Figure 4 is a detailed circuit module diagram of an intelligent electronic switch according to another embodiment of the present application;

[0038] Figure 5 is a circuit module diagram of an electromechanical device in yet another embodiment of the present application;

[0039] Figure 6 is a detailed circuit module diagram of the intelligent electronic switch of the second embodiment of the present application;

[0040] Figure 7 It is a detailed circuit module diagram of the intelligent electronic switch of the third embodiment of the present application. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0042] The terms "including" and "having" and any variations thereof appearing in the specification, claims and drawings of this application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or modules is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units that are inherent to these processes, methods, products or devices. In addition, the terms "first", "second" and "third" are used to distinguish different objects, rather than to describe a specific order. The connection of this application includes direct connection and indirect connection. Indirect connection means that other electronic components, pins, etc. may exist between the two connected components. The XX pin mentioned in this application may be an actual pin, or it may not be an actual pin, for example, it is only a pin of a component or a pin of a wire. The three situations mentioned and / or included in this application, such as A and / or B, include the three situations of A, B, A and B.

[0043] First embodiment

[0044] The present application embodiment provides an electromechanical device, such as an automobile, medical equipment, industrial automation equipment, aerospace equipment, etc. Figure 1a The electromechanical device includes a battery 100, a load, a microprocessor and an intelligent electronic switch 200. The battery 100 is generally a storage battery, which provides voltages such as 12V, 24V, 48V, 60V, etc., and can also be other types of batteries. The load includes a capacitive load 300, and the capacitive load 300 is, for example, a lighting element, such as a xenon arc lamp, an incandescent taillight, a headlight, etc. The microcontroller is connected to the intelligent electronic switch 200 to control the intelligent electronic switch 200. At the same time, the intelligent electronic switch 200 feeds back its state and related parameter information, such as related parameter information of diagnosis, to the microprocessor for processing.

[0045] Please continue to see Figure 1a In this embodiment, the intelligent electronic switch 200 includes a power supply terminal VCC, a power ground terminal GND, and a load output terminal OUT, wherein the power supply terminal VCC is connected to the positive electrode of the battery 100, the power ground terminal GND is connected to the negative electrode of the battery 100, the load output terminal OUT is connected to the first end of the capacitive load 300, and the second end of the capacitive load 300 is connected to the negative electrode of the battery 100.

[0046] In this embodiment, the intelligent electronic switch 200 further includes a power switch GK1 and a switch control unit 210. One end of the power switch GK1 is connected in series with the capacitive load 300 via the load output terminal OUT, and the other end is connected to the power supply terminal VCC. The control end is connected to the switch control unit 210. The switch control unit 210 is used to control whether the power switch GK1 is turned on. In this embodiment, the power switch GK1 is an NMOS tube, a PMOS tube or a junction FET, etc. The NMOS tube is used as an example for illustration in the figure. The power switch GK1 can be implemented as a silicon device, or can be implemented using other semiconductor materials, such as silicon carbide (SiC), gallium arsenide (GaAs) or gallium nitride (GaN).

[0047] exist Figure 1a In the embodiment, the power switch GK1 is connected as a high-side switch, which is a switch connected between the power supply terminal VCC and the capacitive load 300. However, the present application is not limited thereto. In other embodiments of the present application, see Figure 1b , the power switch GK1 is connected as a low-side switch, which is connected between the capacitive load 300 and the power ground terminal GND.

[0048] Please continue to see Figure 1a In this embodiment, the intelligent electronic switch 200 further includes a capacitor terminal CD, and the electromechanical device further includes a first capacitor C1. The first end of the first capacitor C1 is connected to the capacitor terminal CD, and the second end of the first capacitor C1 is connected to the second end of the capacitive load 300. In this embodiment, the capacitance of the capacitive load 300 can be determined by experimental measurement. When the capacitance of the capacitive load 300 is determined, a matching first capacitor C1 can be selected according to the capacitance of the capacitive load 300, that is, the capacitance of the first capacitor C1 in this embodiment must match the capacitance of the capacitive load 300. In this embodiment, the capacitance of the first capacitor C1 is proportional to the capacitance of the capacitive load 300. Assume that the ratio of the capacitance of the capacitive load 300 to the capacitance of the first capacitor C1 is A, and A is a number greater than 1, such as 10:1, 100:1, 1000:1, 2000:1, 10000:1, etc.

[0049] Please refer to Figure 1a and Figure 2In this embodiment, the intelligent electronic switch 200 further includes a current sampling unit 220, which is connected to the capacitor terminal CD, and is connected in series with the first capacitor C1. The current sampling unit 220 samples the current flowing through the power switch GK1. When the power switch GK1 is turned on, the current flowing through the current sampling unit 220 is proportional to the current flowing through the power switch GK1. Assuming that the ratio of the current flowing through the power switch GK1 to the current flowing through the current sampling unit 220 is B, B is a number greater than 1, such as 10:1, 100:1, 1000:1, 2000:1, 10000:1, etc. In this embodiment, B is equal to A. In other embodiments of the present application, B and A may also be different. When the power switch GK1 is turned off, the current flowing through the current sampling unit 220 and the current flowing through the power switch GK1 are both 0.

[0050] In this embodiment, when the power switch GK1 is just turned on, the voltage on the capacitive load 300 is 0, and the voltage on the first capacitor C1 is also 0. At this time, a current will be generated on the power switch GK1, and this current will charge the capacitive load 300. The voltage difference across the capacitive load 300 gradually increases. Correspondingly, a current will also flow through the current sampling unit 220, and this current will charge the first capacitor C1. Similarly, the voltage difference across the first capacitor C1 gradually increases.

[0051] In order to detect whether the capacitive load 300 is abnormal, in the present embodiment, the intelligent electronic switch 200 further includes an abnormality detection unit 230, which is connected to the load output terminal OUT and the capacitor terminal CD. When the voltage of the capacitor terminal CD and the voltage of the load output terminal OUT meet preset conditions after the power switch GK1 is turned on, the abnormality detection unit 230 outputs an abnormality signal, which is used to indicate that the capacitive load 300 is abnormal, such as a weak short circuit abnormality, a short circuit abnormality, and other faults. The abnormality signal is output to the switch control unit 210, or the abnormality signal is directly output to the microprocessor.

[0052] In this embodiment, the abnormality detection unit 230 is also connected to a first reference voltage Vref1 and a second reference voltage Vref2. The first reference voltage Vref1 and the second reference voltage Vref2 are generated by a reference source in the intelligent electronic switch 200. In this embodiment, the first reference voltage Vref1 is equal to the second reference voltage Vref2, and is a reference voltage at this time. In this embodiment, the preset condition is that the time required for the voltage of the capacitor terminal CD to reach the first reference voltage Vref1 and the time required for the voltage of the load output terminal OUT to reach the second reference voltage Vref2 differ by more than or equal to a first preset time length, and the first preset time length is, for example, 10 microseconds, 20 microseconds, 100 microseconds, 200 microseconds, 300 microseconds, etc.

[0053] Specifically, when the power switch GK1 is turned off, the voltage difference across the capacitive load 300 is 0, and the voltage difference across the first capacitor C1 is also 0; when the power switch GK1 starts to conduct, a current will be generated on the power switch GK1, and this current is called the first current. The first current will charge the capacitive load 300, and the voltage difference across the capacitive load 300 will gradually increase. Correspondingly, a current will also flow through the current sampling unit 220, and this current will be called the second current. The second current will charge the first capacitor C1, and the voltage difference across the first capacitor C1 will gradually increase. Since the second end of the capacitive load 300 and the second end of the first capacitor C1 are both connected to the negative electrode of the battery 100, the voltage of the capacitor terminal CD will gradually increase, and the voltage of the load output terminal OUT will gradually increase.

[0054] According to the formula CV=It, since A=B, and the first reference voltage Vref1 is equal to the second reference voltage Vref2, the time required for the voltage at the capacitor terminal CD to be charged to the second reference voltage Vref2 is equal to the time required for the voltage at the load output terminal OUT to be charged to the first reference voltage Vref1. However, due to various factors such as manufacturing errors, matching errors, and differences in the equivalent model of the capacitive load 300, the two times may not be equal, but the difference will not be too large. After experimental testing or theoretical calculation, the first preset time length can be obtained. When the time required for the voltage at the capacitor terminal CD to be charged to the second reference voltage Vref2 is equal to the time required for the load output terminal OUT to be charged to the first reference voltage Vref1, the first preset time length can be obtained. When the difference between the time required for the voltage of the output terminal OUT to be charged to the first reference voltage Vref1 is less than the first preset time length, it can be considered that there is no abnormality in the capacitive load 300. When the difference between the time required for the voltage of the capacitor terminal CD to be charged to the second reference voltage Vref2 and the time required for the voltage of the load output terminal OUT to be charged to the first reference voltage Vref1 is greater than or equal to the first preset time length, the two times are quite different. It is very likely that the capacitive load 300 is weakly short-circuited, short-circuited, etc., causing the capacitance of the capacitive load 300 to decrease or increase. Therefore, the abnormality detection unit 230 of this embodiment can effectively monitor whether the capacitive load 300 is abnormal.

[0055] Please refer to Figure 1a , Figure 2 and Figure 3aIn this embodiment, the current sampling unit 220 includes a first semiconductor switch BK1. The first semiconductor body switch is of the same type as the power switch GK1. The first semiconductor switch BK1 may be an NMOS tube, a PMOS tube, or a junction FET, etc. In the figure, the NMOS tube is used as an example for explanation. The first end of the first semiconductor switch BK1 is connected to the first end of the power switch GK1, the second end thereof is directly or indirectly connected to the capacitor end CD, and the control end thereof is connected to the control end of the power switch GK1. The first semiconductor switch BK1 and the power switch GK1 are highly matched, so that the first semiconductor switch BK1 samples the current of the power switch GK1, and the ratio of the current flowing through the power switch GK1 to the current flowing through the first semiconductor switch BK1 is B:1. In order to achieve the ratio of the currents of the two being B:1, one implementation method is that the ratio of the width-to-length ratio of the power switch GK1 to the width-to-length ratio of the first semiconductor switch BK1 is B:1. In this embodiment, the first semiconductor switch BK1 and the power switch GK1 form a current mirror, and the current flowing through the first semiconductor switch BK1 is determined by the current flowing through the power switch GK1.

[0056] In this embodiment, the abnormality detection unit 230 includes a first voltage comparator VCP1, a second voltage comparator VCP2 and a timing comparison unit 231, the first input end of the first voltage comparator VCP1 is connected to the load output end OUT, the second input end of the first voltage comparator VCP1 is connected to the first reference voltage Vref1, the output end of the first voltage comparator VCP1 is connected to the timing comparison unit 231, the first input end of the second voltage comparator VCP2 is connected to the capacitor end CD, the second input end of the second voltage comparator VCP2 is connected to the second reference voltage Vref2, the output end of the second voltage comparator VCP2 is connected to the timing comparison unit 231, the timing comparison unit 231 is connected to the first preset time length, when the first voltage When the signal at one of the output terminals of the comparator VCP1 and the second voltage comparator VCP2 changes, for example, from a low level to a high level, or from a high level to a low level, the timing comparison unit 231 starts timing. When the signal at the output terminal of the other voltage comparator changes, for example, from a low level to a high level, or from a high level to a low level, the timing comparison unit 231 compares the current timing duration with the first preset duration. At this time, the timing comparison unit 231 may stop timing or may not stop timing. When the current timing duration is greater than or equal to the first preset duration, the timing comparison unit 231 outputs an abnormal signal. When the current timing duration is less than the first preset duration, the timing comparison unit 231 does not output a signal or outputs a normal signal.

[0057] In addition, in other embodiments of the present application, please refer to Figure 1a , Figure 2 and Figure 3bThe abnormality detection unit 230 includes a first voltage comparator VCP1, a second voltage comparator VCP2, a first timing unit 232, a second timing unit 233, a duration subtractor 234, and a duration comparator 235. The first input terminal of the first voltage comparator VCP1 is connected to the load output terminal OUT, the second input terminal of the first voltage comparator VCP1 is connected to the first reference voltage Vref1, the output terminal of the first voltage comparator VCP1 is connected to the first timing unit 232, the first input terminal of the second voltage comparator VCP2 is connected to the capacitor terminal CD, the second input terminal of the second voltage comparator VCP2 is connected to the second reference voltage Vref2, the output terminal of the second voltage comparator VCP2 is connected to the second timing unit 233, the duration subtractor 234 is connected to the first timing unit 232 and the second timing unit 233, the duration comparator 235 is connected to the duration subtractor 234, and the duration comparator 235 is also connected to the first preset duration. When the power switch GK1 starts to turn on, the first timing unit 232 and the second timing unit 233 are triggered and start timing at the same time (the present embodiment is described by taking the signal triggering of the switch control unit 210 as an example). When the signal at the output end of the first voltage comparator VCP1 changes, for example, from a low level to a high level, or from a high level to a low level, the first timing unit 232 stops timing and outputs the first timing duration to the duration subtractor 234. The first timing duration is the current timing duration of the first timing unit 232. When the signal at the output end of the second voltage comparator VCP2 changes, for example, from a low level to a high level, or from a high level to a low level, the second timing unit 233 stops timing and outputs the first timing duration to the duration subtractor 234. The first timing duration is the current timing duration of the first timing unit 232. The timing unit 233 stops timing and outputs a second timing duration to the duration subtractor 234, where the second timing duration is the current timing duration of the second timing unit 233. After receiving the first timing duration and the second timing duration, the duration subtractor 234 subtracts the first timing duration from the second timing duration to obtain a duration difference. The duration subtractor 234 outputs the duration difference to the duration comparator 235, which compares the duration difference with the first preset duration. When the duration difference is greater than or equal to the first preset duration, the duration comparator 235 outputs an abnormal signal. When the duration difference is less than the first preset duration, the duration comparator 235 does not output a signal or outputs a normal signal.

[0058] In order to prevent the first capacitor C1 from affecting the subsequent abnormal judgment after this charging, please continue to refer to Figure 3aIn this embodiment, the intelligent electronic switch 200 further includes a second semiconductor switch BK2, which may be an NMOS tube, a PMOS tube or a junction FET, etc. The first end of the second semiconductor switch BK2 is connected to the capacitor end CD, and the second end thereof is connected to the power ground end GND or the power supply end VCC. When the power switch GK1 is connected as a high-side switch, the second end of the second semiconductor switch BK2 is connected to the power ground end GND. When the power switch GK1 is connected as a low-side switch, the second end of the second semiconductor switch BK2 is connected to the power supply end VCC. The control end of the second semiconductor switch BK2 is connected to the switch control unit 210. After the abnormal judgment is completed, the switch control unit 210 controls the second semiconductor switch BK2 to be turned on, so that the charge in the first capacitor C1 is released, and the voltage difference between the two ends of the first capacitor C1 is 0. By setting in this way, the influence of the first capacitor C1 on the latter due to the previous charging can be avoided, for example, the influence of the charge on the second timing duration in the first capacitor C1 can cause a misjudgment. In addition, in other embodiments of the present application, when the capacitor terminal CD reaches the second reference voltage Vref2, the second semiconductor switch BK2 can be controlled to be turned on. For example, the control end of the second semiconductor switch BK2 can be connected to the output end of the second voltage comparator VCP2, or the control end of the second semiconductor switch BK2 can be connected to the timing comparison unit 231.

[0059] In this embodiment, the on or off of the power switch GK1 is controlled by the output signal of the microcontroller. Each time the microcontroller controls the power switch GK1 to be on, the intelligent electronic switch 200 will detect whether the capacitive load 300 is abnormal. For example, the microcontroller sends a turn-on signal to the intelligent electronic switch 200. After the intelligent electronic switch 200 receives the turn-on signal, the intelligent electronic switch 200 first detects the abnormality of the capacitive load 300. After the capacitive load 300 is detected to be normal, the switch control unit 210 controls the power switch GK1 to be turned on. After the capacitive load 300 is detected to be abnormal, the switch control unit 210 controls the power switch GK1 to remain off. The intelligent electronic switch 200 also sends a feedback signal to inform the microcontroller that the capacitive load 300 is abnormal. In addition, in other embodiments of the present application, the detection of whether the capacitive load 300 is abnormal can also be performed in other time periods, as long as it is convenient for detection, and the embodiments of the present application are not limited to this.

[0060] The intelligent electronic switch 200 of this embodiment includes a capacitor terminal CD, a current sampling unit 220 and an abnormality detection unit 230. The capacitor terminal CD is used to be connected to the first end of the first capacitor C1. The capacitance of the first capacitor C1 is proportional to the capacitance of the capacitive load 300. By setting it in this way, the intelligent electronic switch 200 is connected to different capacitive loads 300, and a matching first capacitor C1 can be selected according to the capacitive load 300, so that the preset conditions in the intelligent electronic switch 200 do not need to be changed, and the circuit and logic inside the intelligent electronic switch 200 do not need to be changed. The load output terminal OUT of the intelligent electronic switch 200 can be connected to capacitive loads 300 of various specifications, which is conducive to improving the application range of the intelligent electronic switch 200. Moreover, the current flowing through the current sampling unit 220 is proportional to the current flowing through the power switch GK1, so that the current flowing into the first capacitor C1 is proportional to the current flowing into the capacitive load 300, so that the charging process of the first capacitor C1 is similar to the charging process of the capacitive load 300, and the charging of the first capacitor C1 will cause the voltage of the capacitor terminal CD to change, and the charging of the capacitive load 300 will cause the voltage of the load output terminal OUT to change. When the voltage of the capacitor terminal CD and the voltage of the load output terminal OUT meet the preset conditions, the abnormality detection unit 230 outputs an abnormal signal, that is, when the charging process of the first capacitor C1 is greatly different from the charging process of the capacitive load 300, the voltage of the capacitor terminal CD and the voltage of the load output terminal OUT will differ greatly at this time, which will cause the capacitor terminal CD and the load output terminal OUT to meet the preset conditions, so that the capacitive load 300 can be effectively monitored through the present application. Whether there is an abnormality.

[0061] In addition, in other embodiments of the present application, when the power switch GK1 is connected as a low-side switch, that is, the first end of the power switch GK1 is connected to the power ground terminal GND, the second end of the power switch GK1 is connected to the load output terminal OUT, the first end of the capacitive load 300 is connected to the load output terminal OUT, and the second end of the capacitive load 300 is connected to the positive electrode of the battery 100. Figure 1b and Figure 4, a first end of the first capacitor C1 is connected to the capacitor terminal CD, a second end of the first capacitor C1 is connected to the second end of the capacitive load 300, and the second end of the capacitive load 300 is connected to the positive electrode of the battery 100; a current sampling unit 220 is connected to the capacitor terminal CD, and the current sampling unit 220 includes a first semiconductor switch BK1, the first semiconductor body switch is of the same type as the power switch GK1, a first end of the first semiconductor switch BK1 is connected to the first end of the power switch GK1, a first end of the power switch GK1 is connected to the power ground terminal GND, a second end of the first semiconductor switch BK1 is directly or indirectly connected to the capacitor terminal CD, and a control end thereof is connected to the control end of the power switch GK1, the first semiconductor switch BK1 and the power switch GK1 are highly matched, so that the first semiconductor switch BK1 samples the current of the power switch GK1. When the power switch GK1 is turned on, current flows through both the power switch GK1 and the current sampling unit 220. At this time, the current flowing through the power switch GK1 charges the capacitive load 300, and the voltage difference across the capacitive load 300 gradually increases. The voltage of the load output terminal OUT gradually decreases from the battery voltage. The current flowing through the current sampling unit 220 charges the first capacitor C1, and the voltage difference across the first capacitor C1 gradually increases. The voltage of the capacitor terminal CD gradually decreases from the battery voltage. Similarly, when the voltage of the capacitor terminal CD and the voltage of the load output terminal OUT meet the preset conditions, the abnormality detection unit 230 outputs an abnormal signal, for example, the time required for the voltage of the capacitor terminal CD to drop from the battery voltage to the second reference voltage Vref2 and the time required for the voltage of the load output terminal OUT to drop from the battery voltage to the first reference voltage Vref1 differ by more than or equal to the first preset time length. In addition, in other embodiments of the present application, the implementation method of the current sampling unit 220 is not limited to the above method. Those skilled in the art can also implement it in other ways, which are not limited here.

[0062] In addition, in other embodiments of the present application, the ratio of the capacitance of the capacitive load 300 to the capacitance of the first capacitor C1 is A, and the ratio of the current flowing through the power switch GK1 to the current flowing through the current sampling unit 220 is B. A and B may not be equal. At this time, the values ​​of the first reference voltage Vref1 and the second reference voltage Vref2 can be adjusted to achieve that the time required for the capacitor terminal CD to charge to the second reference voltage Vref2 is close to the time required for the load output terminal OUT to charge to the first reference voltage Vref1. For example, the value of A is 1000:1, and the value of B is 500:1. At this time, the ratio of the first reference voltage Vref1 to the second reference voltage Vref2 can be designed to be 1:2, so that the time required for the capacitor terminal CD to charge to the second reference voltage Vref2 is close to the time required for the load output terminal OUT to charge to the first reference voltage Vref1. In addition, in other embodiments of the present application, A and B are not equal, and the first reference voltage Vref1 and the second reference voltage Vref2 are equal. At this time, the first preset time length can be adjusted to determine whether it is abnormal. For example, the time required for the voltage of the capacitor terminal CD to reach the first reference voltage Vref1 and the time required for the voltage of the load output terminal OUT to reach the second reference voltage Vref2 are designed to be larger. For example, the first preset time length is changed to twice the first preset time length, and the determination of whether it is abnormal can also be achieved. In the same way, the third preset voltage mentioned in the second embodiment can also be adjusted to achieve.

[0063] Generally speaking, the capacitive load 300 is equivalent to a load capacitor C0, but the present application is not limited thereto. In other embodiments of the present application, in a more accurate model, please refer to Figure 5 The capacitive load 300 can also be equivalent to a load capacitor C0 and a load resistor R0, and the load capacitor C0 is connected in parallel with the load resistor R0. At this time, the design of the first preset time length and the third preset voltage (the second embodiment) needs to consider the influence of the load resistor R0 shunt. Please continue to refer to Figure 5 A first resistor R1 may be further provided, one end of the first resistor R1 being connected to the capacitor end CD, the other end of the first resistor R1 being connected to the second end of the capacitive load 300, the ratio of the resistance value of the load resistor R0 to the resistance value of the first resistor R1 being A, by such a setting, the influence of the load resistor R0 may be reduced, and the charging process of the current to the first capacitor may be more similar to the charging process of the current to the capacitive load, thereby achieving more accurate detection of whether the capacitive load 300 is abnormal.

[0064] In addition, in this embodiment, the first reference voltage Vref1 and the second reference voltage Vref2 can be set according to actual needs, and the maximum value cannot be greater than the voltage of the power supply terminal VCC, and the minimum value cannot be less than 0, which is not limited here.

[0065] The embodiment of the present application further provides an integrated circuit chip, the integrated circuit chip includes the above-mentioned intelligent electronic switch 200, that is, the above-mentioned intelligent electronic switch 200 is made on the same semiconductor substrate. Among them, the power supply terminal VCC is a power supply pin, the power ground terminal GND is a power ground pin, the load output terminal OUT is a load output pin, and the capacitor terminal CD is a capacitor pin.

[0066] Other embodiments of the present application also provide a chip product, the chip product includes the above-mentioned intelligent electronic switch 200, wherein the components of the intelligent electronic switch 200 except the power switch GK1 are located on the first integrated circuit chip, and the power switch GK1 is located on the second integrated circuit chip, that is, the first integrated circuit chip is made on a semiconductor substrate, and the second integrated circuit chip is made on another semiconductor substrate. Among them, the power supply terminal VCC is the power supply pin, the power ground terminal GND is the power ground pin, the load output terminal OUT is the load output pin, the capacitor terminal CD is the capacitor pin, the power supply pin, the power ground pin, and the capacitor pin are located on the first integrated circuit chip, and the load output pin is located on the second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip can also be provided with other pins as needed. Here, the first integrated circuit chip and the second integrated circuit chip are packaged into one product.

[0067] The intelligent electronic switch 200 and the integrated circuit chip of the present embodiment are not limited to being used in automotive electronics, but can also be used in the fields of industrial automation, aerospace, etc.

[0068] Second embodiment

[0069] See also Figure 6 , Figure 6 1 is a circuit module diagram of an intelligent electronic switch 200 according to a second embodiment of the present application. This embodiment is similar to the first embodiment, so the parts not described in this embodiment may refer to the first embodiment. The main difference between this embodiment and the first embodiment is that the preset conditions are different.

[0070] See also Figure 1a , Figure 2 and Figure 6 In this embodiment, the abnormality detection unit 230 is also connected to the first reference time length Tref1 and the second reference time length Tref2. The first reference time length Tref1 and the second reference time length Tref2 are generated by the standard timing unit in the intelligent electronic switch 200. In this embodiment, the first reference time length Tref1 and the second reference time length Tref2 are equal. The preset condition is that the difference between the voltage at the capacitor terminal CD charged after the first reference time length Tref1 and the voltage at the load output terminal OUT charged after the second reference time length Tref2 is greater than or equal to the third preset voltage.

[0071] Specifically, in this embodiment, the abnormality detection unit 230 includes a timer 236, a voltage subtractor 237 and a third voltage comparator VCP3, wherein the timer 236 is connected to the first reference time length Tref1 and the second reference time length Tref2, the voltage subtractor 237 is connected to the timer 236, the load output terminal OUT, and the capacitor terminal CD, the output terminal of the voltage subtractor 237 is connected to the third voltage comparator VCP3, and the third voltage comparator VCP3 is also connected to the third preset voltage.

[0072] In this embodiment, when the power switch GK1 starts to turn on, the current flowing through the power switch GK1 starts to charge the capacitive load 300, and the current flowing through the current sampling unit 220 starts to charge the first capacitor C1. The timing unit is triggered to start timing. When the timing unit times to the first reference time length Tref1 and the second reference time length Tref2 (the two are equal in this embodiment), the voltage subtractor 237 obtains the voltage of the load output terminal OUT and the voltage of the capacitor terminal CD, and subtracts the two voltages to obtain a voltage difference. The voltage subtractor 237 outputs the voltage difference to the voltage comparator, and the voltage comparator compares the voltage difference with the third preset voltage. If the voltage difference is greater than or equal to the third preset voltage, the voltage comparator outputs an abnormal signal. If the voltage difference is less than the third preset voltage, the voltage comparator does not output a signal or outputs a normal signal. In addition, in other embodiments of the present application, when the first reference time length Tref1 and the second reference time length Tref2 are not equal, for example, the first reference time length Tref1 is shorter than the second reference time length Tref2, in this case, when the power switch GK1 starts to turn on, the timing unit starts timing, and when the timing unit times to the first reference time length Tref1, the voltage subtractor 237 obtains the voltage of the load output terminal OUT, and the timer 236 continues to time, and when the timer 236 times to the second reference time length Tref2, the voltage subtractor 237 obtains the voltage of the capacitor terminal CD, and subtracts the voltage of the capacitor terminal CD from the previously obtained voltage of the load output terminal OUT to obtain a voltage difference, and the voltage subtractor 237 outputs the voltage difference to the voltage comparator, and the voltage comparator compares the voltage difference with the third preset voltage. If the voltage difference is greater than or equal to the third preset voltage, the voltage comparator outputs an abnormal signal. In addition, in other embodiments of the present application, in order to achieve timing to the first reference time length Tref1 and the second reference time length Tref2, the timing unit may further include two timers 236, one for timing the first reference time length Tref1 and the other for timing the second reference time length Tref2. The embodiment of the present application can also effectively determine whether the capacitive load 300 is abnormal.

[0073] In the above two embodiments, the first end of the first semiconductor switch BK1 is connected to the first end of the power switch GK1, and the control end of the first semiconductor switch BK1 is connected to the control end of the power switch GK1, so that the ratio of the current flowing through the first semiconductor switch BK1 to the current flowing through the power switch GK1 can be approximately equal to 1:B. However, in practice, since the second end of the first semiconductor switch BK1 is not connected to the second end of the power switch GK1, the voltage at the second end of the first semiconductor switch BK1 and the voltage at the second end of the power switch GK1 may be different, resulting in some difference between the ratio of the current flowing through the first semiconductor switch BK1 to the current flowing through the power switch GK1 and 1:B, thereby affecting the abnormal judgment of the capacitive load 300. In order to solve this problem, the present application provides a third embodiment.

[0074] Third embodiment

[0075] See also Figure 7 , Figure 7 2 is a circuit module diagram of an intelligent electronic switch 200 according to a third embodiment of the present application. This embodiment is similar to the first and second embodiments, so the parts not described in this embodiment may refer to the first and second embodiments. The main difference between this embodiment and the first and second embodiments is that the voltage at the second end of the first semiconductor switch BK1 is equal to the voltage at the second end of the power switch GK1.

[0076] In order to achieve that the voltage at the second end of the first semiconductor switch BK1 is equal to the voltage at the second end of the power switch GK1, please refer to Figure 1a , Figure 2 and Figure 7 In this embodiment, the current sampling unit 220 further includes an operational amplifier OPA and a third semiconductor switch BK3, wherein the first input terminal of the operational amplifier OPA is connected to the second terminal of the power switch GK1, that is, connected to the load output terminal OUT, the second input terminal of the operational amplifier OPA is connected to the second terminal of the first semiconductor switch BK1, the load output terminal OUT of the operational amplifier OPA is connected to the control terminal of the third semiconductor switch BK3, the first terminal of the third semiconductor switch BK3 is connected to the second terminal of the first semiconductor switch BK1, and the second terminal of the third semiconductor switch BK3 is connected to the capacitor terminal CD. In this embodiment, the third semiconductor switch BK3 is, for example, an NMOS tube, a PMOS tube, etc., and is a PMOS tube in the figure.

[0077] In this embodiment, through the combination of the operational amplifier OPA and the third semiconductor switch BK3, the voltage at the second end of the first semiconductor switch BK1 can be equal to the voltage at the second end of the power switch GK1, so that the ratio of the current flowing through the first semiconductor switch BK1 to the current flowing through the power switch GK1 can be precisely equal to 1:B, which can achieve more accurate abnormality judgment.

[0078] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0079] It should be understood that the "plurality" mentioned in this article refers to two or more. Those skilled in the art will easily think of other embodiments of the present application after considering the specification and practicing the application disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary technical means in the art that are not disclosed in the present application. The specification and examples are only regarded as exemplary, and the true scope and spirit of the present application are indicated by the following claims.

[0080] It should be noted that each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0081] The above disclosure is only the preferred embodiment of the present application, which certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.

Claims

1. An intelligent electronic switch, characterized in that: include: A power supply terminal, a power ground terminal, a load output terminal, and a switch control unit, wherein the power supply terminal is used to connect to the positive electrode of the battery, the power ground terminal is used to connect to the negative electrode of the battery, and the load output terminal is used to connect to the first end of the capacitive load; A power switch, wherein a first end thereof is connected to a power supply end or a power ground end, a second end thereof is connected to a load output end for being connected in series with a capacitive load, and a control end thereof is connected to a switch control unit, wherein the switch control unit is used to control the power switch to be turned on or off; A capacitor terminal, which is used to be connected to a first terminal of a first capacitor, a second terminal of the first capacitor is connected to a second terminal of the capacitive load, and a capacitance value of the first capacitor is proportional to a capacitance value of the capacitive load; a current sampling unit connected to the capacitor terminal to be connected in series with the first capacitor, the current sampling unit sampling the current flowing through the power switch, and the current flowing through the current sampling unit is proportional to the current flowing through the power switch; An abnormality detection unit is connected to the load output terminal and the capacitor terminal. When the voltage at the capacitor terminal and the voltage at the load output terminal meet preset conditions after the power switch is turned on, the abnormality detection unit outputs an abnormality signal, and the abnormality signal is used to indicate that the capacitive load is abnormal.

2. The intelligent electronic switch according to claim 1, characterized in that: The abnormality detection unit is also connected to a first reference voltage and a second reference voltage; the preset condition is that the time required for the voltage at the capacitor end to reach the first reference voltage differs from the time required for the voltage at the load output end to reach the second reference voltage, which differs by greater than or equal to a first preset time length.

3. The intelligent electronic switch according to claim 2, characterized in that: The first reference voltage is equal to the second reference voltage; or, The abnormality detection unit includes a first voltage comparator, a second voltage comparator and a timing comparison unit, wherein the first input terminal of the first voltage comparator is connected to the load output terminal, the second input terminal thereof is connected to the first reference voltage, and the output terminal thereof is connected to the timing comparison unit; the first input terminal of the second voltage comparator is connected to the capacitor terminal, the second input terminal thereof is connected to the second reference voltage, and the output terminal thereof is connected to the timing comparison unit; when the signal of one of the output terminal of the first voltage comparator and the output terminal of the second voltage comparator changes, the timing comparison unit starts timing, the timing comparison unit is connected to the first preset time length, when the signal of the output terminal of the other voltage comparator changes, the timing comparison unit compares the current timing time length with the first preset time length, and when the current timing time length is greater than or equal to the first preset time length, the timing comparison unit outputs an abnormality signal; or, The abnormality detection unit includes a first voltage comparator, a second voltage comparator, a first timing unit, a second timing unit, a duration subtractor and a duration comparator, wherein the first input end of the first voltage comparator is connected to the load output end, the second input end thereof is connected to the first reference voltage, the load output end thereof is connected to the first timing unit, the first input end of the second voltage comparator is connected to the capacitor end, the second input end thereof is connected to the second reference voltage, the load output end thereof is connected to the second timing unit, the duration subtractor is connected to the first timing unit and the second timing unit, the duration comparator is connected to the duration subtractor, and the duration comparator The device is also connected to a first preset time length; wherein, when the power switch starts to turn on, the first timing unit and the second timing unit start timing, when the signal at the output end of the first voltage comparator changes, the first timing unit outputs a first timing time length, and when the signal at the load output end of the second voltage comparator changes, the second timing unit outputs a second timing time length, the time length subtractor subtracts the first timing time length from the second timing time length to obtain a time length difference, the time length comparator compares the time length difference with the first preset time length, and when the time length difference is greater than or equal to the first preset time length, the time length comparator outputs an abnormal signal.

4. The intelligent electronic switch according to claim 1, characterized in that: The abnormality detection unit is also connected to a first reference time length and a second reference time length; the preset condition is that the difference between the voltage at the capacitor end charged after the first reference time length and the voltage at the load output end charged after the second reference time length is greater than or equal to a third preset voltage.

5. The intelligent electronic switch according to claim 4, characterized in that: The first reference duration is equal to the second reference duration; or, The abnormality detection unit includes a timer, a voltage subtractor and a third voltage comparator, wherein the timer is connected to a first reference time length and a second reference time length, the voltage subtractor is connected to the timer, the load output end and the capacitor end, the output end of the voltage subtractor is connected to the third voltage comparator, and the third voltage comparator is also connected to a third preset voltage; wherein the timer starts timing when the power switch starts to turn on, the voltage subtractor obtains the voltage at the load output end when the timer times to the first reference time length, the voltage subtractor obtains the voltage at the capacitor end when the timer times to the second reference voltage, the voltage subtractor subtracts the obtained voltage at the load output end and the voltage at the capacitor end to obtain a voltage difference, the voltage subtractor outputs the voltage difference to the third voltage comparator, the third voltage comparator compares the voltage difference with the third preset voltage, and the third voltage comparator outputs an abnormal signal when the voltage difference is greater than or equal to the third preset voltage.

6. The intelligent electronic switch according to any one of claims 1 to 5, characterized in that: The ratio of the capacitance of the first capacitor to the capacitance of the capacitive load is a first ratio, the ratio of the current generated by the current sampling unit to the current flowing through the power switch is a second ratio, and the first ratio is equal to the second ratio.

7. The intelligent electronic switch according to any one of claims 1 to 5, characterized in that: The current sampling unit includes a first semiconductor switch, which is of the same type as the power switch, a first end of the first semiconductor switch is connected to a first end of the power switch, a second end of the first semiconductor switch is connected to a capacitor end, and a control end of the first semiconductor switch is connected to a control end of the power switch, wherein a current flowing through the first semiconductor switch is less than a current flowing through the power switch.

8. The intelligent electronic switch according to claim 7, characterized in that: The current sampling unit also includes an operational amplifier and a third semiconductor switch, wherein a first input terminal of the operational amplifier is connected to the second terminal of the power switch, a second input terminal of the operational amplifier is connected to the second terminal of the first semiconductor switch, a load output terminal of the operational amplifier is connected to a control terminal of the third semiconductor switch, a first terminal of the third semiconductor switch is connected to the second terminal of the first semiconductor switch, and a second terminal of the third semiconductor switch is connected to a capacitor terminal.

9. The intelligent electronic switch according to any one of claims 1 to 5, characterized in that: The intelligent electronic switch also includes a second semiconductor switch, a first end of the second semiconductor switch is connected to the capacitor end, a second end of the second semiconductor switch is connected to the power ground end or the power supply end, and the second semiconductor switch is used to release the charge on the first capacitor.

10. The intelligent electronic switch according to any one of claims 1 to 5, characterized in that: The capacitor end is also used to connect to the first end of the first resistor, and the second end of the first resistor is connected to the second end of the capacitive load, wherein the resistance of the first resistor is proportional to the resistance of the capacitive load, and the ratio of the capacitance of the first capacitor to the capacitance of the capacitive load is equal to the ratio of the resistance of the first resistor to the resistance of the capacitive load.

11. An integrated circuit chip, characterized in that: It includes the intelligent electronic switch as claimed in any one of claims 1 to 10, wherein the power supply end is a power supply pin, the power ground end is a power ground pin, the load output end is a load output pin, and the capacitor end is a capacitor pin.

12. A chip product, characterized in that: The intelligent electronic switch according to any one of claims 1 to 10, wherein the components of the intelligent electronic switch except the power switch are located on a first integrated circuit chip, and the power switch is located on a second integrated circuit chip; Among them, the power supply end is a power supply pin, the power ground end is a power ground pin, the load output end is a load output pin, the capacitor end is a capacitor pin, the power supply pin, the power ground pin, and the capacitor pin are located on a first integrated circuit chip, and the load output pin is located on a second integrated circuit chip.

13. An electromechanical device, characterized in that: The intelligent electronic switch according to any one of claims 1 to 10, the integrated circuit chip according to claim 11, or the chip product according to claim 12; It also includes a battery, a capacitive load and a microprocessor, wherein the positive electrode of the battery is connected to the power supply terminal, the negative electrode of the battery is connected to the power ground terminal, the first end of the capacitive load is connected to the load output terminal, the second end of the capacitive load is connected to the power ground terminal or the power supply terminal, and the microprocessor is connected to the intelligent electronic switch.

14. The electromechanical device according to claim 13, characterized in that The electromechanical device includes an automobile.

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