Ethernet signal transmission circuit

Abstract

The invention discloses an Ethernet signal transmission circuit, which comprises a first physical layer sending circuit, a connector connected in series with the first physical layer sending circuit, and a first physical layer receiving circuit connected in series with the connector, and is characterized in that the first physical layer sending circuit is used for transmitting a first Ethernet signal sent by a pre-stage port, and the first physical layer receiving circuit is used for transmitting a second Ethernet signal sent by a pre-stage port; comprising a first filter circuit, a first common mode choke connected in series with the first filter circuit, and a first electrostatic protection circuit connected in series with the first common mode choke. The first physical layer receiving circuit is used for receiving the first Ethernet signal and sending the first Ethernet signal to a post-stage port, and comprises a second filter circuit, a first capacitor connected in series with the second filter circuit, and a second common mode choke connected in series with the first capacitor; the second electrostatic protection circuit is connected in series with the second common mode choke; and the connector is used for connecting the first electrostatic protection circuit and the second electrostatic protection circuit.

Description

Technical Field

[0001] The present application relates to the field of communications, and in particular, to an Ethernet signal transmission circuit. Background Art

[0002] Ethernet for Control Automation Technology (Ether CAT) provides the features of industrial Ethernet at a price level equivalent to or even lower than that of traditional fieldbus systems. Usually, Ether CAT master and slave stations only need one Ethernet port to communicate with each other and complete data exchange.

[0003] In the face of long distances and harsh electromagnetic interference environments, conventional Ethernet ports that use connectors must take additional protective devices (such as network transformers, filters, lightning arresters, etc.) in the design of the physical layer interface (PHY) communication circuit, and plan grounding paths and add grounding accessories to ensure normal communication of the Ethernet port. Usually, these measures are easily applied under the premise that the physical size requirements of the Ether CAT master and slave stations are not high. However, in the face of compact, small, close-proximity, and relatively complex master and slave stations, the connector and PHY communication circuit design selected for conventional Ethernet ports cannot be applied due to size and cost limitations.

[0004] In the prior art, the interference in the Ethernet transmission process is reduced by adding a network transformer or other devices in the Ethernet transmission circuit, but the network transformer is too large to realize the transmission of Ethernet signals between small-volume products. No effective solution has been proposed so far.

[0005] Therefore, it is necessary to improve the related technology to overcome the above-mentioned defects in the related technology. Summary of the invention

[0006] An embodiment of the present application provides an Ethernet signal transmission circuit to solve the problem in the prior art that interference in the Ethernet transmission process is reduced by adding devices such as a network transformer in the Ethernet transmission circuit, but the network transformer is too large to realize the transmission of Ethernet signals between small-volume products.

[0007] According to one aspect of an embodiment of the present application, an Ethernet signal transmission circuit is provided, comprising: a first physical layer transmitting circuit and a connector connected in series with the first physical layer transmitting circuit, and a first physical layer receiving circuit connected in series with the connector, wherein the first physical layer transmitting circuit is used to transmit a first Ethernet signal sent by a front-stage port, and the first physical layer transmitting circuit comprises: a first filtering circuit, a first common-mode choke connected in series with the first filtering circuit, and a first electrostatic protection circuit connected in series with the first common-mode choke; the first physical layer receiving circuit is used to receive the first Ethernet signal and send the first Ethernet signal to a rear-stage port, and the first physical layer receiving circuit comprises: a second filtering circuit, a first capacitor connected in series with the second filtering circuit, a second common-mode choke connected in series with the first capacitor, and a second electrostatic protection circuit connected in series with the second common-mode choke; the connector is used to connect the first electrostatic protection circuit and the second electrostatic protection circuit.

[0008] In an exemplary embodiment, the first physical layer transmitting circuit includes: a second physical layer transmitting circuit for transmitting a first signal and a third physical layer transmitting circuit for transmitting a second signal, wherein the first Ethernet signal includes: the first signal and the second signal, and the first signal and the second signal are differential signal pairs.

[0009] In an exemplary embodiment, the second physical layer transmitting circuit includes: a third filtering circuit and a third electrostatic protection circuit; and the third physical layer transmitting circuit includes: a fourth filtering circuit and a fourth electrostatic protection circuit; wherein, the first filtering circuit includes: the third filtering circuit and the fourth filtering circuit, and the first electrostatic protection circuit includes: the third electrostatic protection circuit and the fourth electrostatic protection circuit; the third filtering circuit and the fourth filtering circuit are both connected in series with the first common mode choke, and the first common mode choke is respectively connected in series with the third electrostatic protection circuit and the fourth electrostatic protection circuit.

[0010] In an exemplary embodiment, the first physical layer receiving circuit includes: a second physical layer receiving circuit for receiving the first signal and a third physical layer receiving circuit for receiving the second signal, wherein the second physical layer receiving circuit includes: a fifth filtering circuit, a fifth electrostatic protection circuit and a second capacitor; and the third physical layer receiving circuit includes: a sixth filtering circuit, a sixth electrostatic protection circuit and a third capacitor; wherein the second filtering circuit includes: the fifth filtering circuit and the sixth filtering circuit, and the second electrostatic protection circuit includes: the fifth electrostatic protection circuit and the sixth electrostatic protection circuit; the fifth filtering circuit is connected in series with the second capacitor, and the sixth filtering circuit is connected in series with the third capacitor; the second capacitor and the third capacitor are both connected in series with the second common mode choke, and the second common mode choke is connected in series with the fifth electrostatic protection circuit and the sixth electrostatic protection circuit, respectively.

[0011] In an exemplary embodiment, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first electrostatic protection circuit and the second electrostatic protection circuit are used to filter the first electrostatic interference signal in the first Ethernet signal, and to filter the second electrostatic interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0012] In an exemplary embodiment, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first common mode choke and the second common mode choke are used to filter the first common mode interference signal in the first Ethernet signal, and to filter the second common mode interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0013] In an exemplary embodiment, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first capacitor is used to filter the DC signal in the first Ethernet signal so that the AC signal in the first Ethernet signal is transmitted to the rear-stage port.

[0014] In an exemplary embodiment, the third filtering circuit includes: a first resistor and a fourth capacitor connected in parallel with the first resistor; the fourth filtering circuit includes: a second resistor and a fifth capacitor connected in parallel with the second resistor; wherein, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first filtering circuit is used to filter the first interference signal in the first Ethernet signal, and to filter the second interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0015] In an exemplary embodiment, the fifth filtering circuit includes: a third resistor and a sixth capacitor connected in parallel with the third resistor; the sixth filtering circuit includes: a fourth resistor and a seventh capacitor connected in parallel with the fourth resistor; wherein, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the second filtering circuit is used to filter the third interference signal in the first Ethernet signal, and to filter the fourth interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0016] In an exemplary embodiment, a fourth physical layer transmitting circuit, and the connector connected in series with the fourth physical layer transmitting circuit, and a fourth physical layer receiving circuit connected in series with the connector, wherein: the fourth physical layer transmitting circuit is used to transmit a second Ethernet signal sent by a subsequent port, and the fourth physical layer transmitting circuit includes: a seventh filtering circuit, a third common mode choke connected in series with the seventh filtering circuit, and a seventh electrostatic protection circuit connected in series with the third common mode choke; the fourth physical layer receiving circuit is used to receive the second Ethernet signal and send the second Ethernet signal to the subsequent port, and the fourth physical layer receiving circuit includes: an eighth filtering circuit, an eighth capacitor connected in series with the eighth filtering circuit, a fourth common mode choke connected in series with the eighth capacitor, and an eighth electrostatic protection circuit connected in series with the fourth common mode choke; the connector is also used to connect the seventh electrostatic protection circuit and the eighth electrostatic protection circuit.

[0017] Through the present application, the Ethernet signal transmission circuit includes a first physical layer transmission circuit, a first physical layer receiving circuit, and a connector for connecting the first physical layer transmission circuit and the first physical layer receiving circuit. Among them, the first physical layer transmission circuit is used to: transmit the first Ethernet signal sent by the front-stage port, and the first physical layer receiving circuit is used to: receive the first Ethernet signal sent by the first Ethernet transmission circuit, and send the first Ethernet transmission signal to the back-stage port. The first physical layer transmission circuit includes: a first filter circuit, a first common mode choke connected in series with the first filter circuit, and a first electrostatic protection circuit connected in series with the first common mode choke; the first physical layer receiving circuit includes: a second filter circuit, a second capacitor connected in series with the second filter circuit, a second common mode choke connected in series with the second capacitor, and a second electrostatic protection circuit connected in series with the second common mode choke. The first electrostatic protection circuit and the second electrostatic protection circuit are connected through a connector. Through the above-mentioned Ethernet signal transmission circuit, the problem that the interference in the Ethernet transmission process is reduced by adding a network transformer and other devices in the Ethernet transmission circuit in the prior art, but the problem that the Ethernet signal transmission between small-volume products cannot be realized due to the large volume of the network transformer. Then, the transmission of Ethernet signals between small-volume products can be realized. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The exemplary embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0019] Figure 1 is a circuit diagram (I) of an Ethernet signal transmission circuit according to an embodiment of the present application;

[0020] Figure 2 is a circuit diagram of a first physical layer transmitting circuit according to an embodiment of the present application;

[0021] Figure 3 is a circuit diagram of a first physical layer receiving circuit according to an embodiment of the present application;

[0022] Figure 4 is a circuit diagram of a third filtering circuit according to an embodiment of the present application;

[0023] Figure 5 is a circuit diagram of a fourth filtering circuit according to an embodiment of the present application;

[0024] Figure 6 is a circuit diagram of a fifth filtering circuit according to an embodiment of the present application;

[0025] Figure 7 is a circuit diagram of a sixth filtering circuit according to an embodiment of the present application;

[0026] Figure 8 is a circuit diagram (II) of an Ethernet signal transmission circuit according to an embodiment of the present application;

[0027] Fig. 9 is a circuit diagram of an Ethernet port communication circuit according to an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0029] It should be noted that the terms and "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0030] In this embodiment, an Ethernet signal transmission circuit is provided. Figure 1 1 is a circuit diagram of an Ethernet signal transmission circuit according to an embodiment of the present application (I), such as Figure 1 As shown, the circuit diagram includes:

[0031] A first physical layer transmitting circuit 12 and a connector 14 connected in series with the first physical layer transmitting circuit, and a first physical layer receiving circuit 16 connected in series with the connector, wherein:

[0032] The first physical layer sending circuit 12 is used to transmit the first Ethernet signal sent by the front-stage port, and the first physical layer sending circuit 12 includes: a first filtering circuit, a first common-mode choke connected in series with the first filtering circuit, and a first electrostatic protection circuit connected in series with the first common-mode choke;

[0033] The first physical layer receiving circuit 16 is used to receive the first Ethernet signal and send the first Ethernet signal to the subsequent port. The first physical layer receiving circuit 16 includes: a second filtering circuit, a first capacitor connected in series with the second filtering circuit, a second common mode choke connected in series with the first capacitor, and a second electrostatic protection circuit connected in series with the second common mode choke;

[0034] The connector 14 is used to connect the first electrostatic protection circuit and the second electrostatic protection circuit.

[0035] In an embodiment of the present application, the Ethernet signal transmission circuit includes a first physical layer transmission circuit, a first physical layer receiving circuit, and a connector for connecting the first physical layer transmission circuit and the first physical layer receiving circuit. Among them, the first physical layer transmission circuit is used to: transmit the first Ethernet signal sent by the front-stage port, and the first physical layer receiving circuit is used to: receive the first Ethernet signal sent by the first Ethernet transmission circuit, and send the first Ethernet transmission signal to the back-stage port. The first physical layer transmission circuit includes: a first filter circuit, a first common mode choke connected in series with the first filter circuit, and a first electrostatic protection circuit connected in series with the first common mode choke; the first physical layer receiving circuit includes: a second filter circuit, a second capacitor connected in series with the second filter circuit, a second common mode choke connected in series with the second capacitor, and a second electrostatic protection circuit connected in series with the second common mode choke. The first electrostatic protection circuit and the second electrostatic protection circuit are connected through a connector. Through the above-mentioned Ethernet signal transmission circuit, the problem that the interference in the Ethernet transmission process is reduced by adding devices such as network transformers in the Ethernet transmission circuit in the prior art, but the problem that the transmission of Ethernet signals between small-volume products cannot be realized due to the large volume of the network transformer is solved. Then, the transmission of Ethernet signals between small-volume products can be realized.

[0036] Optionally, the first physical layer transmitting circuit includes: a second physical layer transmitting circuit for transmitting a first signal and a third physical layer transmitting circuit for transmitting a second signal, wherein the first Ethernet signal includes: the first signal and the second signal, and the first signal and the second signal are a differential signal pair.

[0037] It can be known from the above technical solution that the first physical layer sending circuit can be used to transmit the Ethernet signal sent by the front-stage port, wherein the Ethernet signal is a differential signal.

[0038] Wherein, the first physical layer transmission circuit includes: a second physical layer transmission circuit and a third physical layer transmission circuit. Wherein, the second physical layer transmission circuit includes: a third filter circuit and a third electrostatic protection circuit; and the third physical layer transmission circuit includes: a fourth filter circuit and a fourth electrostatic protection circuit; wherein, the first filter circuit includes: the third filter circuit and the fourth filter circuit, and the first electrostatic protection circuit includes: the third electrostatic protection circuit and the fourth electrostatic protection circuit; the third filter circuit and the fourth filter circuit are both connected in series with the first common mode choke, and the first common mode choke is respectively connected in series with the third electrostatic protection circuit and the fourth electrostatic protection circuit.

[0039] Figure 2 is a circuit diagram of a first physical layer sending circuit according to an embodiment of the present application, such as Figure 2As shown: the second physical layer transmission circuit is used to transmit the first signal transmitted by the front-stage port, and the third physical layer transmission circuit is used to transmit the second signal transmitted by the front-stage port. The third filter circuit of the second physical layer transmission circuit is connected in series with the first common mode choke coil, and is connected to the third electrostatic protection circuit through the first common mode choke coil; the fourth filter circuit of the third physical layer transmission circuit is connected in series with the first common mode choke coil, and is connected to the fourth electrostatic protection circuit through the first common mode choke coil.

[0040] Among them, the first physical layer receiving circuit includes: a second physical layer receiving circuit for receiving the first signal and a third physical layer receiving circuit for receiving the second signal, wherein the second physical layer receiving circuit includes: a fifth filtering circuit, a fifth electrostatic protection circuit and a second capacitor; and the third physical layer receiving circuit includes: a sixth filtering circuit, a sixth electrostatic protection circuit and a third capacitor; wherein the second filtering circuit includes: the fifth filtering circuit and the sixth filtering circuit, and the second electrostatic protection circuit includes: the fifth electrostatic protection circuit and the sixth electrostatic protection circuit; the fifth filtering circuit is connected in series with the second capacitor, and the sixth filtering circuit is connected in series with the third capacitor; the second capacitor and the third capacitor are both connected in series with the second common mode choke, and the second common mode choke is respectively connected in series with the fifth electrostatic protection circuit and the sixth electrostatic protection circuit.

[0041] Figure 3 is a circuit diagram of a first physical layer receiving circuit according to an embodiment of the present application, such as Figure 3 As shown: the second physical layer receiving circuit is used to receive the first signal and transmit the first signal to the rear-stage port, and the third physical layer receiving circuit is used to transmit the second signal sent by the front-stage port, and transmit the second signal to the rear-stage port. The fifth electrostatic protection circuit of the second physical layer receiving circuit is connected in series with the second common-mode choke, the second common-mode choke is connected in series with the second capacitor of the second physical layer receiving circuit, the second capacitor is connected in series with the third filter circuit, and the first signal is transmitted to the rear-stage port through the third filter circuit; the sixth electrostatic protection circuit of the third physical layer receiving circuit is connected in series with the second common-mode choke, the second common-mode choke is connected in series with the third capacitor of the third physical layer receiving circuit, the third capacitor is connected in series with the fourth filter circuit, and the second signal is transmitted to the rear-stage port through the fourth filter circuit.

[0042] Optionally, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first electrostatic protection circuit and the second electrostatic protection circuit are used to filter the first electrostatic interference signal in the first Ethernet signal, and to filter the second electrostatic interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0043] It can be seen from the above scheme that the front-stage port and the rear-stage port are connected through a connector, and the Ethernet signal transmission circuit may generate a first electrostatic interference signal during the transmission of the first Ethernet signal, and may also couple the second electrostatic interference signal into the Ethernet signal transmission circuit through the connector. In this case, it is necessary to filter out the first electrostatic interference signal and the second electrostatic interference signal to ensure that the Ethernet signal transmission circuit is not interfered by the electrostatic interference signal during the signal transmission process.

[0044] The first electrostatic protection circuit and the second electrostatic protection circuit may be Ethernet lightning arresters.

[0045] Since both the first electrostatic protection circuit and the second electrostatic protection circuit have a pin connected to the ground, the first electrostatic protection circuit and the second electrostatic protection circuit can quickly discharge transient, high-energy interference signals such as the first electrostatic interference signal generated during the transmission of the Ethernet signal and the second electrostatic interference signal coupled in the Ethernet signal transmission circuit through the connector to the reference system ground, so as to achieve the effect that the Ethernet signal transmission circuit is not interfered by the electrostatic interference signal during the signal transmission process, and to prevent the front-stage port and the rear-stage port from being attacked by the interference signal.

[0046] In an exemplary embodiment, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first common mode choke and the second common mode choke are used to filter the first common mode interference signal in the first Ethernet signal, and to filter the second common mode interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0047] It is understandable that after the electrostatic interference signal is filtered by the first static protection circuit and the second static protection circuit, a common-mode interference signal may still exist. During the transmission of the first Ethernet signal, a common-mode current will flow through the first common-mode choke, thereby presenting a relatively large inductance. In this case, the first common-mode choke can suppress the common-mode interference signal, so that the first Ethernet signal is transmitted almost losslessly.

[0048] That is to say, by suppressing the common-mode interference signal through the inductance of the first common-mode choke coil, the Ethernet signal transmission circuit can be free from interference by the common-mode interference signal during the signal transmission process.

[0049] In an exemplary embodiment, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first capacitor is used to filter the DC signal in the first Ethernet signal so that the AC signal in the first Ethernet signal is transmitted to the rear-stage port.

[0050] Since capacitors have the basic characteristics of passing AC and blocking DC; passing high frequencies and blocking low frequencies, by connecting the first capacitor in series in the first physical layer receiving circuit, the AC signal in the first Ethernet signal can be coupled to the first physical layer receiving circuit with almost no attenuation.

[0051] In addition, since the first capacitor has the basic characteristics of passing DC and blocking AC, and the interference signal in the first Ethernet signal and the interference signal coupled in the Ethernet signal transmission circuit through the connector are both AC signals, the second capacitor also has the function of filtering the interference signal.

[0052] In an exemplary embodiment, the third filtering circuit includes: a first resistor and a fourth capacitor connected in parallel with the first resistor; the fourth filtering circuit includes: a second resistor and a fifth capacitor connected in parallel with the second resistor; wherein, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first filtering circuit is used to filter the first interference signal in the first Ethernet signal, and to filter the second interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0053] Understandably, Figure 4 is a circuit diagram of a third filtering circuit according to an embodiment of the present application, Figure 5 is a circuit diagram of a fourth filtering circuit according to an embodiment of the present application, such as Figure 4 , Figure 5 As shown: the third filter circuit and the fourth filter circuit are both composed of a resistor and a capacitor, and a pin in the third filter circuit and the fourth filter circuit is grounded. The first interference signal and the second interference signal may be interference signals that are not filtered out by the first common mode choke.

[0054] The third filtering circuit and the fourth filtering circuit can filter the first interference signal and the second interference signal, and filter the first interference signal and the second interference signal to the system reference ground, so as to achieve the effect that the first physical layer sending circuit of the Ethernet signal transmission circuit is not interfered by the first interference signal and the second interference signal during the signal transmission process.

[0055] In an exemplary embodiment, the fifth filtering circuit includes: a third resistor and a sixth capacitor connected in parallel with the third resistor; the sixth filtering circuit includes: a fourth resistor and a seventh capacitor connected in parallel with the fourth resistor; wherein, when the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the second filtering circuit is used to filter the third interference signal in the first Ethernet signal, and to filter the fourth interference signal coupled in the Ethernet signal transmission circuit through the connector.

[0056] Understandably, Figure 6 is a circuit diagram of a fifth filtering circuit according to an embodiment of the present application, Figure 7 is a circuit diagram of a sixth filtering circuit according to an embodiment of the present application, such as Figure 6 , Figure 7 As shown: the fifth filter circuit and the sixth filter circuit are both composed of a resistor and a capacitor, and a pin in the fifth filter circuit and the sixth filter circuit is grounded. The third interference signal and the fourth interference signal may be interference signals that are not filtered out by the first capacitor.

[0057] The third filtering circuit and the fourth filtering circuit can filter the third interference signal and the fourth interference signal, and filter the third interference signal and the fourth interference signal to the system reference ground, so as to achieve the effect that the first physical layer receiving circuit of the Ethernet signal transmission circuit is not interfered by the third interference signal and the fourth interference signal during the signal transmission process.

[0058] In an exemplary embodiment, a fourth physical layer transmitting circuit, and the connector connected in series with the fourth physical layer transmitting circuit, and a fourth physical layer receiving circuit connected in series with the connector, wherein: the fourth physical layer transmitting circuit is used to transmit a second Ethernet signal sent by a subsequent port, and the fourth physical layer transmitting circuit includes: a seventh filtering circuit, a third common mode choke connected in series with the seventh filtering circuit, and a seventh electrostatic protection circuit connected in series with the third common mode choke; the fourth physical layer receiving circuit is used to receive the second Ethernet signal and send the second Ethernet signal to the subsequent port, and the fourth physical layer receiving circuit includes: an eighth filtering circuit, an eighth capacitor connected in series with the eighth filtering circuit, a fourth common mode choke connected in series with the eighth capacitor, and an eighth electrostatic protection circuit connected in series with the fourth common mode choke; the connector is also used to connect the seventh electrostatic protection circuit and the eighth electrostatic protection circuit.

[0059] It can be understood that the first physical layer transmitting circuit can send the first Ethernet signal from the front-stage port to the rear-stage port through the first physical layer receiving circuit, and the second Ethernet signal of the rear-stage port can be sent from the fourth physical layer transmitting circuit to the front-stage port through the fourth physical layer receiving circuit. Specifically:

[0060] Figure 8 is a circuit diagram (II) of an Ethernet signal transmission circuit according to an embodiment of the present application, such as Figure 8 As shown, the fourth physical layer sending circuit is connected in the same way as the first physical layer sending circuit, and the fourth physical layer receiving circuit is connected in the same way as the first physical layer receiving circuit. The fourth physical layer sending circuit and the fourth physical layer receiving circuit are used to transmit the second Ethernet signal from the rear port to the front port.

[0061] Obviously, the above described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. In order to better understand the above working state determination system, the above process is described below in conjunction with the embodiments, but it is not used to limit the technical solutions of the embodiments of the present application.

[0062] The exemplary embodiment of the present application provides an Ethernet port communication circuit. Fig. 9 is a circuit diagram of an Ethernet port communication circuit according to an exemplary embodiment of the present application, such as Fig. 9 As shown:

[0063] The Ethernet port communication circuit includes: a first Ethernet port communication circuit for transmitting Ethernet signals from a front-stage port and a second Ethernet port communication circuit for transmitting Ethernet signals from a rear-stage port, and optionally:

[0064] The first Ethernet port communication circuit includes a first signal sending circuit (i.e., the first physical layer sending circuit of the present application) and a first signal receiving circuit (i.e., the first physical layer receiving circuit of the present application), wherein the first signal sending circuit includes:

[0065] 1) Transmit link: PHY2_TD+, PHY2_TD-;

[0066] 2) PHY chip;

[0067] 3) RC filter circuit: R1-C8 circuit in which R1 and C8 are connected in parallel (i.e., the third filter circuit of the present application), R2-C9 circuit in which R2 and C9 are connected in parallel (i.e., the fourth filter circuit of the present application);

[0068] 4) Common mode choke: L2 (i.e., the first common mode choke of the present application);

[0069] 5) Ethernet lightning arrester: D3 (ie, the third electrostatic protection circuit of the present application), D4 (ie, the fourth electrostatic protection circuit of the present application).

[0070] Among them, the PHY chip sends Ethernet signals through the transmission link, PHY2_TD+ is connected in series with the R1-C8 circuit, PHY2_TD- is connected in series with the R2-C9 circuit, the R1-C8 circuit and the R2-C9 circuit are both connected in series with L2, the R1-C8 circuit is connected in series with D3 through L2, and the R2-C9 circuit is connected in series with D4 through L2.

[0071] The first signal receiving circuit comprises:

[0072] 1) Receive link: PHY1_RD+, PHY1_RD-;

[0073] 2) Ethernet lightning arrester: D7 (i.e., the sixth electrostatic protection circuit of the present application), D8 (i.e., the fifth electrostatic protection circuit of the present application);

[0074] 3) Common mode choke: L4 (i.e., the second common mode choke of the present application);

[0075] 4) Capacitors: C2 (i.e., the third capacitor of the present application), C3 (i.e., the second capacitor of the present application);

[0076] 5) RC filter circuit: R8-C11 circuit in which R8 and C11 are connected in parallel (i.e., the fifth filter circuit of the present application), R7-C12 circuit in which R7 and C12 are connected in parallel (i.e., the sixth filter circuit of the present application);

[0077] 6)PHY chip.

[0078] Among them, the PHY chip receives the Ethernet signal through the receiving link, PHY1_RD+ is connected in series with the R8-C11 circuit, PHY1_RD- is connected in series with the R7-C12 circuit, the R8-C11 circuit is connected in series with C3, the R7-C12 circuit is connected in series with C2, C3 and C2 are both connected in series with L4, C2 is connected in series with D8 through L4, and the C3 circuit is connected in series with D7 through L4.

[0079] Among them, D8 is connected to D3 through a connector, and D7 is connected to D4 through a connector.

[0080] The second Ethernet port communication circuit includes a second signal sending circuit and a second signal receiving circuit, wherein the second signal sending circuit includes:

[0081] 1) Transmit link: PHY1_TD+, PHY1_TD-;

[0082] 2) PHY chip;

[0083] 3) RC filter circuit (i.e., the seventh filter circuit of the present application): an R6-C6 circuit in which R6 and C6 are connected in parallel, and an R5-C7 circuit in which R5 and C7 are connected in parallel;

[0084] 4) Common mode choke: L1 (i.e., the third common mode choke of the present application);

[0085] 5) Ethernet lightning arrester (ie, the seventh electrostatic protection circuit of the present application): D5, D6.

[0086] Among them, the PHY chip sends Ethernet signals through the transmission link, PHY1_TD+ is connected in series with the R5-C7 circuit, PHY1_TD- is connected in series with the R6-C6 circuit, the R5-C7 circuit and the R6-C6 circuit are both connected in series with L1, the R5-C7 circuit is connected in series with D5 through L1, and the R6-C6 circuit is connected in series with D5 through L1.

[0087] The second signal receiving circuit comprises:

[0088] 1) Ethernet lightning arrester (i.e., the eighth electrostatic protection circuit of the present application): D1, D2;

[0089] 2) Common mode choke: L3 (i.e., the fourth common mode choke of the present application);

[0090] 3) Capacitors (i.e., the eighth capacitor of the present application): C4, C5;

[0091] 4) RC filter circuit (i.e., the eighth filter circuit of the present application): an R4-C10 circuit in which R4 and C10 are connected in parallel, and an R3-C1 circuit in which R3 and C11 are connected in parallel;

[0092] 5) Receive link: PHY2_RD+, PHY2_RD-;

[0093] 6)PHY chip.

[0094] Among them, the PHY chip receives the Ethernet signal through the receiving link, PHY2_RD+ is connected in series with the R3-C1 circuit, PHY2_RD- is connected in series with the R4-C10 circuit, the R4-C10 circuit is connected in series with C5, the R3-C1 circuit is connected in series with C4, C4 and C5 are both connected in series with L3, C4 is connected in series with D2 through L3, and the C5 circuit is connected in series with D1 through L3.

[0095] Among them, D1 and D6 are connected through a connector, and D2 and D4 are connected through a connector.

[0096] According to the above Ethernet port communication circuit, after the Ethernet port signal (i.e., the first Ethernet signal and the second Ethernet signal of the present application) passes through the connector, it first passes through D1 to D8 to quickly discharge the transient, high-energy interference signal (i.e., the first electrostatic interference signal and the second electrostatic interference signal of the present application) to the system reference ground (DGND), and then enters the common-mode choke (L1 to L4). When the common-mode current flows through the common-mode choke, a large inductance will be presented to ensure that most of the common-mode interference signals (i.e., the first common-mode interference signal and the second common-mode interference signal of the present application) are suppressed, and the Ethernet differential signal passes losslessly. After capacitive coupling, the remaining common-mode interference signal coupled to the Ethernet differential signal line is further filtered out by the coupling capacitor post-RC (R1-C8, R2-C9, R4-C10, R3-C1, R8-C11, R7-C12, R6-C6, R5-C7) filtering, and finally ensures that the Ethernet signal meets the electrical requirements of the PHY chip and realizes stable communication between ports.

[0097] The above technical solution uses the basic characteristics of capacitors to pass AC and block DC; pass high frequencies and block low frequencies, and connects the capacitors in series between the front and back stages of the PHY sending and receiving circuits. The coupling capacitor (i.e. Fig. 9C2, C3, C4, C5) in the coupling capacitor can couple the Ethernet AC signal from the transmitting end to the receiving end with almost no attenuation, decouple the unnecessary DC signal, and allow different levels of voltage values ​​to appear at both ends of the coupling capacitor. However, the coupling capacitor will affect the code jitter when introduced, that is, when the signal transmitted by the circuit appears continuously "0" and "1", the DC level of the signal will drop, affecting the signal eye height. The exemplary embodiment of the present application needs to combine the RC charge and discharge characteristics with the resonance characteristics of the capacitor after installation to select a suitable capacitance value. In addition, the capacitor position is also crucial to the eye diagram of the actual signal. In actual application, the final placement position is determined by testing the capacitor placed at the signal transmitting end and the receiving end signal eye diagram respectively.

[0098] By using the technical solution of the exemplary embodiment of the present application, the Ethernet communication required by Ether CAT can be achieved between compact, small-volume, and close-proximity products.

[0099] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0100] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0101] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. An Ethernet signal transmission circuit, comprising: A first physical layer transmitting circuit and a connector connected in series with the first physical layer transmitting circuit, and a first physical layer receiving circuit connected in series with the connector, wherein: The first physical layer sending circuit is used to transmit the first Ethernet signal sent by the front-stage port, and the first physical layer sending circuit includes: a first filtering circuit, a first common-mode choke connected in series with the first filtering circuit, and a first electrostatic protection circuit connected in series with the first common-mode choke; The first physical layer receiving circuit is used to receive the first Ethernet signal and send the first Ethernet signal to a subsequent port, the first physical layer receiving circuit comprising: a second filtering circuit, a first capacitor connected in series with the second filtering circuit, a second common mode choke connected in series with the first capacitor, and a second electrostatic protection circuit connected in series with the second common mode choke; The connector is used to connect the first electrostatic protection circuit and the second electrostatic protection circuit.

2. The Ethernet signal transmission circuit according to claim 1, characterized in that: include: The first physical layer transmitting circuit comprises: a second physical layer transmitting circuit for transmitting a first signal and a third physical layer transmitting circuit for transmitting a second signal, wherein: The first Ethernet signal includes: the first signal and the second signal, and the first signal and the second signal are a differential signal pair.

3. The Ethernet signal transmission circuit according to claim 2, characterized in that: include: The second physical layer sending circuit includes: a third filtering circuit and a third electrostatic protection circuit; and, The third physical layer sending circuit includes: a fourth filtering circuit and a fourth electrostatic protection circuit; wherein, The first filter circuit includes: the third filter circuit and the fourth filter circuit, and the first electrostatic protection circuit includes: the third electrostatic protection circuit and the fourth electrostatic protection circuit; The third filter circuit and the fourth filter circuit are both connected in series with the first common mode choke coil, and the first common mode choke coil is connected in series with the third electrostatic protection circuit and the fourth electrostatic protection circuit, respectively.

4. The Ethernet signal transmission circuit according to claim 2, characterized in that: include: The first physical layer receiving circuit includes: a second physical layer receiving circuit for receiving the first signal and a third physical layer receiving circuit for receiving the second signal, wherein the second physical layer receiving circuit includes: a fifth filtering circuit, a fifth electrostatic protection circuit and a second capacitor; and, The third physical layer receiving circuit includes: a sixth filtering circuit, a sixth electrostatic protection circuit and a third capacitor; wherein, The second filter circuit includes: the fifth filter circuit and the sixth filter circuit, and the second electrostatic protection circuit includes: the fifth electrostatic protection circuit and the sixth electrostatic protection circuit; The fifth filter circuit is connected in series with the second capacitor, and the sixth filter circuit is connected in series with the third capacitor; The second capacitor and the third capacitor are both connected in series with the second common-mode choke, and the second common-mode choke is respectively connected in series with the fifth electrostatic protection circuit and the sixth electrostatic protection circuit.

5. The Ethernet signal transmission circuit according to claim 1, characterized in that: include: When the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first electrostatic protection circuit and the second electrostatic protection circuit are used to filter the first electrostatic interference signal in the first Ethernet signal and filter the second electrostatic interference signal coupled in the Ethernet signal transmission circuit through the connector.

6. The Ethernet signal transmission circuit according to claim 1, characterized in that: include: When the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first common mode choke and the second common mode choke are used to filter the first common mode interference signal in the first Ethernet signal and to filter the second common mode interference signal coupled in the Ethernet signal transmission circuit through the connector.

7. The Ethernet signal transmission circuit according to claim 1, characterized in that: When the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first capacitor is used to filter a DC signal in the first Ethernet signal so that an AC signal in the first Ethernet signal is transmitted to the rear-stage port.

8. The Ethernet signal transmission circuit according to claim 3, characterized in that: include: The third filtering circuit comprises: a first resistor and a fourth capacitor connected in parallel with the first resistor; The fourth filtering circuit comprises: a second resistor and a fifth capacitor connected in parallel with the second resistor; wherein, When the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the first filtering circuit is used to filter a first interference signal in the first Ethernet signal and to filter a second interference signal coupled in the Ethernet signal transmission circuit through the connector.

9. The Ethernet signal transmission circuit according to claim 4, characterized in that: include: The fifth filtering circuit comprises: a third resistor and a sixth capacitor connected in parallel with the third resistor; The sixth filtering circuit comprises: a fourth resistor and a seventh capacitor connected in parallel with the fourth resistor; wherein, When the first Ethernet signal is transmitted from the first physical layer transmitting circuit to the first physical layer receiving circuit, the second filtering circuit is used to filter a third interference signal in the first Ethernet signal and to filter a fourth interference signal coupled in the Ethernet signal transmission circuit through the connector.

10. The Ethernet signal transmission circuit according to claim 1, characterized in that: Also includes: a fourth physical layer transmitting circuit, and the connector connected in series with the fourth physical layer transmitting circuit, and a fourth physical layer receiving circuit connected in series with the connector, wherein: The fourth physical layer sending circuit is used to transmit the second Ethernet signal sent by the subsequent port, and the fourth physical layer sending circuit includes: a seventh filtering circuit, a third common mode choke coil connected in series with the seventh filtering circuit, and a seventh electrostatic protection circuit connected in series with the third common mode choke coil; The fourth physical layer receiving circuit is used to receive the second Ethernet signal and send the second Ethernet signal to the rear port, and the fourth physical layer receiving circuit includes: an eighth filtering circuit, an eighth capacitor connected in series with the eighth filtering circuit, a fourth common mode choke connected in series with the eighth capacitor, and an eighth electrostatic protection circuit connected in series with the fourth common mode choke; The connector is also used to connect the seventh electrostatic protection circuit and the eighth electrostatic protection circuit.

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