Systems and methods for least unreliable bit (LRB) identification

Abstract

The invention discloses a least unreliable bit (LRB) identification method based on a cumulative distribution function (CDF). In some embodiments, the receiver includes a detector and a decoder. The detector is configured to receive a codeword and determine a list of reliability values for bits included in the codeword. The decoder is configured to receive a codeword and a list of reliability values from the detector, calculate a CDF list of reliability values for the codeword, identify a group from the CDF list that includes a particular number of LRBs having reliability values within a threshold range, and determine a location in the codeword for each LRB in the group.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 354,040, filed on June 21, 2022, entitled “System and Methods for LeastReliable Bit (LRG) Identification,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to a decoding system for identifying LRBs of a codeword based on a cumulative distribution function (CDF). background

[0003] A challenging task in communication systems is to accurately decode codewords received over a noisy channel. Before a message is transmitted, a transmitter may encode the message with an error correction code (e.g., adding redundant bits or parity bits to the message) to form a codeword. A receiver receives the message transmitted over a computer network to perform decoding (e.g., an error correction process) to recover the original message. Typically, a receiver may perform hard decision decoding or soft decision decoding. Hard decision decoding or hard decoding takes a bit stream and decodes each bit by treating it as a definite 1 or 0, for example, by sampling a received pulse and comparing the voltage to a threshold. On the other hand, soft decision decoding or soft decoding treats the received signal as a probability distribution and calculates the likelihood (e.g., a soft value) of each possible transmitted bit based on the characteristics of the received signal. The soft value is then processed to obtain the hard value of the bit, i.e., 0 or 1. Typically, soft decoding can achieve higher accuracy and reliability, but at the expense of complexity. Therefore, a simplified and efficient soft decoding method is needed. Overview

[0004] To address the above shortcomings, the least reliable bit (LRB) identification based on the cumulative distribution function (CDF) is disclosed. In some embodiments, a receiver in a communication system includes a detector and a decoder. The detector is configured to receive a codeword and determine a list of reliability values ​​of bits included in the codeword. The detector is configured to: receive a list of codewords and reliability values ​​from the detector, calculate a CDF list of reliability values ​​for the codeword, identify a group including a specific number of LRBs with reliability values ​​within a threshold range from the CDF list, and determine the position of each LRB in the group in the codeword.

[0005] The above and other preferred features, including various novel implementation details and combinations of elements, will now be described in more detail with reference to the accompanying drawings and mentioned in the claims. It should be understood that the specific methods and devices are shown only by way of illustration and not as limitations. As will be appreciated by those skilled in the art, the principles and features explained herein can be used in various and numerous embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The disclosed embodiments have advantages and features that will be more readily apparent from the detailed description, the appended claims, and the accompanying drawings (or figures). The following is a brief description of the drawings.

[0007] Figure 1 An exemplary communication system with error correction capabilities in accordance with some embodiments is shown.

[0008] Figure 2 An exemplary input codeword associated with reliability information is shown in accordance with some embodiments.

[0009] Figure 3 The present method is applied to Figure 2 Example LRB recognition results for an example input codeword of .

[0010] Figure 4 Shows Figure 2 Example cumulative distribution function (CDF) of example codewords in .

[0011] Figure 5 An exemplary method for LRB identification according to some embodiments is shown.

[0012] Figure 6 An exemplary method of applying CDF-based LRB identification using an oFEC decoder according to some embodiments is shown.

[0013] Figure 7 An exemplary advanced open forward error correction (oFEC) decoder is shown in accordance with some embodiments.

[0014] Figure 8 An exemplary oFEC decoding process using a Chase decoder is shown in accordance with some embodiments.

[0015] Fig. 9 An exemplary process for CDF-based LRB identification according to some embodiments is shown. Detailed Description

[0016] The drawings and the following description relate to preferred embodiments by way of illustration only. It should be noted that from the following discussion, alternative embodiments of the structures and methods disclosed herein will readily be recognized as viable alternatives that can be employed without departing from the principles of the claimed invention.

[0017] Reference will now be made in detail to some embodiments, examples of which are shown in the accompanying drawings. Note that similar or like reference numerals may be used in the drawings whenever possible, and similar or like functions may be indicated. The drawings depict embodiments of the disclosed systems (or methods) for illustrative purposes only. Those skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods shown herein may be employed without departing from the principles described herein.

[0018] Figure 1 An exemplary communication system 100 with error correction capabilities is shown. Communication systems (wireless or wired) typically rely on error correction mechanisms (eg, forward error correction (FEC)) to control errors when information is transmitted over a noisy communication channel. Figure 1 As shown, a transmitter (eg, encoder 102) encodes input data (eg, information, message) using an error correction code. The encoded data (ie, codeword) is transmitted to a receiver via a noisy channel or transmission link 104.

[0019] FEC is a coding scheme that improves the bit error rate of a communication link by adding redundant information (e.g., parity bits) to the input data at the transmitter so that the receiver can use the redundant information to detect and correct errors introduced in the transmission link. FEC error correction codes can be block codes, convolutional codes, or concatenated codes. Block codes operate on fixed-size packets, convolutional codes operate on streams of arbitrary length, and concatenated codes typically have properties of block codes and / or convolutional codes. The present disclosure focuses on decoding concatenated codes and / or block codes, such as Turbo Product Codes (TPC), open FEC (oFEC) defined in International Telecommunication Union (ITU) G.709.3, and the like.

[0020] The receiver can detect and receive the encoded data including any changes made by noise during transmission, and then decode the received data to recover the input information of the transmitter. Decoding the error correction codeword typically includes hard decoding or soft decoding. For a given signal-to-noise ratio (SNR) or input error rate, soft decoding can generally achieve better error correction capabilities than hard decoding, but usually at the expense of complexity (such as power, area, delay, etc.), as described below with respect to the Chase algorithm. The choice of using soft decoding or hard decoding can depend on the target error rate, the noise level, and many system considerations. It is not always easy or feasible to determine the soft values ​​used in soft decoding. The disclosure of this article proposes an optimized, computationally efficient soft decoding method that performs well in error correction.

[0021] exist Figure 1 In the embodiment, the receiver includes a detector 106 and a soft decoder 108. In some embodiments, the detector 106 can detect and receive the codeword transmitted through the channel 104 and calculate the reliability information of each bit of the codeword. Figures 2 to 4 As discussed in , the reliability information may include a cumulative distribution function (CDF), a log likelihood ratio (LLR), etc. The soft decoder 108 may receive the reliability information from the detector 106 and decode the codeword to recover the original input information / message from the transmitter / encoder 102. In some embodiments, the soft decoder 108 may be configured to determine a set of test patterns based on the reliability information and determine how to perform hard decision encoding on the patterns in the set of test patterns. It should be noted that Figure 1 Depicted for illustration, other components (e.g., hard decoders) may be included in the communication system 100. For example, one or more hard decoders (not shown) may be part of the detector 106 to assist in decoding, and / or included in the soft decoder 108 (e.g., Chase decoder) to determine reliability information.

[0022] When a received codeword or code is decoded using soft decoding (typically, with iterative soft decoding), one of the most popular algorithms for soft decoding of a single component code is the Chase algorithm. The main idea of ​​the Chase algorithm is that if a word or message decoded by a hard decoder (i.e., a traditional hard decision) contains an error, then one of its "closest" words will most likely match the transmitted message (i.e., the transmitter's input information). Traditionally, the Euclidean distance between the received codeword and the original codeword is calculated, and an exhaustive search is performed to find the codeword. This type of decoding approach quickly becomes prohibitive due to the unbearable computational complexity associated with the increase in codeword size. The Chase algorithm is a maximum likelihood (ML) bit estimate based on the observation that at high SNRs, ML codewords are located with very high probability in a sphere with a certain radius centered at a certain point (e.g., determined based on the SNR and the received code). In order to reduce the number of codewords examined, only the set of the most likely codewords (i.e., the "closest" codewords) within the sphere are selected. Further description of the Chase algorithm is given in RM Pyndiah, Near-Optimum Decoding of Production Codes: Block Turbo Codes. IEEE Transactions on Communications, Vol. 46, No. 8 (1998), which is incorporated by reference in its entirety.

[0023] Typically, the Chase algorithm enumerates a selected set of bit patterns that are decoded with a hard decoder. The results of applying the hard decoder to all bit patterns are used to generate soft decision metrics or reliability information, such as log likelihood ratios (LLRs) of the bits in the codeword. In some embodiments, the pattern can be generated by taking the bits in the hard pattern (slicing of soft bits) and flipping some of the least reliable bits (LRBs). Different combinations of the least reliable bits are processed, and the output of the soft decoder is the candidate word with the best soft decision metric.

[0024] The Chase algorithm can improve performance in some ways, but has significant disadvantages. The Chase algorithm requires the identification of the least reliable bits (or least reliable positions). Using the Chase algorithm, the entire codeword must be analyzed to find a specified number n of least reliable bits (LRBs).

[0025] The reliability of a bit is usually measured by the absolute value of the LLR of the bit. Using the Chase algorithm, LRB identification is based on reading the LLR list of each bit and comparing the LLR of each bit to maintain a dynamic list of N LRBs. The dynamic list is updated until every bit of the codeword is scanned. The end result is a list of the least reliable bits. The list can also include the bit location and bit LLR / reliability associated with the least reliable bit. Here, a large amount of hardware and other computing resources may be required to implement a high-rate decoder.

[0026] The present system and method for LRB identification disclosed herein solves the aforementioned shortcomings and improves the performance of error correction decoding. Prior art systems (e.g., Chase) use a one-pass algorithm (e.g., on read) to find LRBs with large decision trees, resulting in a large amount of power consumption and / or large delays. In the present system, the comparison operation for LRB identification is for a fixed value, and the logical decision tree is greatly simplified. In some embodiments, the present system uses a two-pass algorithm to simplify the identification process and reduce power usage. Compared to the on-pass read on in the Chase decoder, the two-pass algorithm can generally be implemented when the decoding process is separated between writing and reading. Therefore, when the present system is applied to identify the LRB of a codeword during the decoding process, the present system reduces complexity and delay, and improves efficiency and accuracy.

[0027] Additionally, the method can be used in any system where it is necessary to identify extreme values ​​in the data, which is particularly advantageous in error correction decoding situations where the resolution of the reliability is low and only a limited number of values ​​are available for CDF determination.

[0028] It should be noted that "Chase decoder" or "Chase algorithm" in this specification refers to a general soft decoder that enumerates modes as used in error correction literature. They do not necessarily refer to one of the original Chase options.

[0029] Figure 2 An exemplary input codeword 200 with associated reliability information is shown. The codeword 200 is an input to the detector 106 or the soft decoder 108 of the receiver. The input codeword 200 may contain errors, and the receiver aims to decode the input codeword 200 to correctly recover the original message of the sender. In some embodiments, the codeword 200 is encoded data (e.g., with an error correction code) transmitted from the sender (e.g., the encoder 102) to the receiver via the communication channel 104.

[0030] Given a bit index 202 ranging from 0 to 9, the input codeword 200 includes 10 bits. For each bit, an LLR 204 is calculated (e.g., by the detector 106), which is a soft decision metric or reliability information used in subsequent soft decoding. In some embodiments, the sign (e.g., positive or negative) of the LLR value 204 corresponds to a hard decision. For example, a negative sign indicates that the corresponding bit is considered to be a "1", while a positive sign corresponds to a "0" decision. The magnitude of the LLR value 204 corresponds to the certainty or probability in the decision. Figure 2 In the depicted example, reliability value 206 is the absolute value of LLR 204 .

[0031] A method for LRB identification based on generating a cumulative distribution function (CDF) of reliability is disclosed herein. In some embodiments, the method may allow a receiver (e.g., Figure 1 The detector 106 and the soft decoder 108 in FIG. 1 determine the value of the least reliable bit (eg, Figure 2 The receiver generates a list of reliability values ​​206 in the LRB and identifies from the list a maximum value that can be used to determine the n LRBs. The maximum value refers to the maximum reliability value within the LRB. Therefore, the maximum value is the maximum LRB value or the LRB threshold. By generating a CDF for reliability in the present system, the receiver can simply scan the CDF to identify a bit group / bin having a reliability value within the threshold range (i.e., the maximum LRB value). This is shown in the following Figure 3 and Figure 4 The receiver can then scan the list of LLRs or reliability values ​​(e.g., Figure 2 200 in the list) to obtain the position of the least reliable bit in the identified group.

[0032] Figure 3 Shown in Figure 2 The exemplary LRB identification result 300 of the present method is applied to the codeword 200 of Figure 2 Result 300 includes an LRB list that identifies three LRBs in codeword 200. In this example, result 300 includes an LRB index 302 and an LRB value 304. LRB index 302 indicates the position / location of each of the three least reliable bits in codeword 200, and LRB value 304 measures the reliability of the corresponding least reliable bit.

[0033] The present method allows the CDF of reliability to be constructed over (1) the entire sequence of received codewords, or (2) the partial sequence of codewords currently received. This method is particularly useful for time-sensitive data recovery because data decoding can be performed while subsequent data (e.g., new parts of codewords, new codewords) are still being transmitted to the receiver.

[0034] In some embodiments, upon receiving a codeword, the receiver (e.g., detector 106 and soft decoder 108) may first calculate the CDF of the codeword and then use the LRB threshold to identify the LRB position in the codeword. This method may be used to easily and efficiently implement iterative decoding. In the present system, LLRs may be updated from one codeword and written to memory. When a subsequent codeword is subsequently decoded, the present system may read the LLRs from memory. Thus, by maintaining the CDF of each codeword during the writing process, the present method may allow the bit or LRB position to be easily identified when the LLRs are read for the next codeword. Using the present method, the reliability value (e.g., LRB value 304) for each bit is used only once in the second pass to compare with a specified threshold. The present system calculates LRBs more efficiently than a conventional Chase decoder. (In the conventional Chase algorithm description, determining LRBs in the first stage or preprocessing stage of Chase involves an arbitrarily defined problem.)

[0035] Figure 4 Shown for Figure 2 An exemplary CDF 400 of reliability values ​​calculated for the exemplary codeword 200 in FIG. A CDF in the present disclosure refers to a cumulative histogram of reliability information. Figure 4 , each CDF index 402 is the maximum LRB value (ie, the maximum reliability value within an LRB). Each CDF value 404 counts the total number of bits of the codeword 200 that each have a reliability value less than or equal to the corresponding CDF index.

[0036] Assume that the CDF index (maximum reliability value within an LRB) is configured to be 1 (e.g., 406). Figure 2 , only three bits (i.e., bit indices "2", "3", and "7") have reliability values ​​of 0 or 1 that are less than or equal to the CDF index "1" in 406. Therefore, the corresponding CDF value in 408 is "3". If the CDF index or maximum reliability value is set to 2 as in 410, there are still these three bits with reliability values ​​less than 2, and therefore the CDF value in 412 is still "3". Figure 2 , the maximum reliability value of all bits is 18, and therefore, when the CDF index is set to “18” in 416 , the CDF value 414 counts all “10” bits of the codeword 200 .

[0037] based on Figure 4, a receiver (e.g., soft decoder 108) can identify a specific number of LRBs in codeword 200. In the example shown, three LRBs are selected. This means that the threshold is the first interval whose CDF value is greater than or equal to 3. According to CDF 400, this is interval / group 1 in 406 with CDF index "1". In other words, this interval includes the fewest data bits with reliability less than or equal to 1. As described above, interval 1 includes three bits with indices "2", "3", and "7". Figure 3 The LRB identification result is shown in , where LRB index 302 identifies each of the three least reliable bits, and LRB value 304 shows the reliability value corresponding to each identified bit.

[0038] Figure 5 An exemplary method 500 for LRB identification is shown. In some embodiments, the detector 106 is configured to receive a codeword (e.g., an error-containing codeword encoded with an error correction code) and generate reliability information (e.g., LLRs) for bits included in the codeword. As depicted, a new bit of the codeword can be read at 502 and the LLRs can be determined. The bits and LLRs can be written to a memory at 504. Reliability information such as LLRs can be used as input data to the soft decoder 108 to construct a CDF for the codeword. The CDF can be written to the memory at 506 and updated.

[0039] As above Figures 2 to 4 As described in , the soft decoder 108 can read the CDF at 508, read the LLR determined for the codeword bits at 510, and identify and select the LRBs based on the CDF and LLRs at 512. Once the LRBs are determined, the soft decoder 108 can use the LRBs to perform a decoding process. When iterative decoding is used, the soft decoder 108 can output 514 the LLRs and output 516 the CDF to be used in the next iteration. If the decoding is complete, then at 514, the soft decoder 108 can also output a recovered message, which should be the original message from the transmitter 102. The recovered message is usually extracted from the LLRs by a thresholding operation (i.e., less than zero).

[0040] After decoding the codeword, the soft decoder 108 will update the CDF. In practice, when the soft decoder 108 performs decoding of a codeword, the codeword is typically interleaved (i.e., the decoded bits belong to multiple codewords). Typically, the soft decoder 108 performs decoding alternately between codewords. For example, the decoding of TPC can be performed row by row and then moved to columns. This decoding process is repeated until the decoder terminates. In order to handle interleaved codewords, the system is configured to prepare a CDF for subsequent codewords to be decoded. Continuing with the TPC example, assuming that the last decoding stage in TPC is performed row by row, the soft decoder 108 is configured to construct a CDF for the column to achieve LRB detection for the column. In particular, since the bits need to be reordered from row to column for decoding, the system beneficially configures the detector 106 and / or the soft decoder 108 to calculate and update the CDF after this bit reordering operation.

[0041] Therefore, when the LLR is written to the memory after a single current codeword is decoded, the CDF will be updated. Typically, in iterative decoding of correlated codes, after a codeword is decoded, the CDFs of other codewords that use the same data bits as another codeword should be updated. However, as described above, the CDF of the current codeword may also be updated. When decoding is performed alternately by row and column in TPC, and after the column codeword has been decoded, the CDF of the row codeword should also be updated to prepare for row decoding, and vice versa. The CDF will be updated during different iterations.

[0042] The CDF of the codeword may be written to memory (eg, as in 506) or held in a register. In the present system, once the CDF is determined, the CDF may be replaced by a single number (eg, Figure 4 The CDF is kept intact until the threshold is determined. Figure 4 If two or three LRBs need to be identified in the CDF list of n=2 or n=3, the CDF threshold is “1” as shown in 406. If any of four, five, or six LRBs need to be identified, the threshold is “2” as shown in 410.

[0043] In some embodiments, when the number of LRBs is predefined, only a threshold is extracted and stored instead of maintaining the entire CDF. In some embodiments, a threshold n is specified. The number of reliability values ​​(equal to the threshold n) can be used to simplify the comparison of reliability values ​​and the selection of LRB locations by selecting all bits with reliability values ​​less than the threshold n and the first n bits with equal reliability values. Specifically, if n is known (e.g., predefined), the CDF value 404 does not need to store numbers greater than n. Therefore, Figure 4The CDF list 400 may be truncated. In addition, during the calculation of the CDF, it may be dynamically determined that certain values ​​are no longer relevant and may therefore be discarded. In other words, assuming Figure 4 Including the intermediate CDF list 400 for n=2, all rows with CDF index 402 values ​​greater than one can be discarded because the threshold is currently "1" and can only remain at one or go to zero as more data is added. Based on these considerations for reducing the size of the CDF list, system performance is improved as more meaningful information is stored and used for decoding.

[0044] Figure 6 An exemplary method 600 for applying the CDF-based LRB identification described herein using an oFEC decoder is shown. The present LRB-CDF method is particularly suitable for oFEC defined in ITU G.709.3. oFEC typically operates with a small number of bits per LLR. For example, 4 bits per LLR are recommended in the ITU G.709.3 specification. These 4 bits include the 3 bits after the absolute value. This indicates that the CDF only includes 2 3 = 8 levels. This also means that applying the LRB-CDF method on the oFEC decoder is easy to implement and efficient. Figure 6 The workflow of the present LRB-CDF method shown in is similar to Figure 5 Therefore, for the sake of brevity and clarity, this article will not repeat the description.

[0045] Figure 7 An exemplary advanced oFEC decoder 700 with three soft iterations and two hard iterations according to some embodiments is shown. This is the configuration proposed in the ITU G.709.3 standard and is also used in the present system to show improved decoding performance.

[0046] Figure 8An exemplary decoding process 800 using Chase decoding in an oFEC decoder is shown. In the depicted example, soft iteration is implemented using a Chase decoder, and the CDF is calculated for the oFEC decoder. As shown at 802, the codewords are arranged so that 16×16 blocks participate in two 16-block equations. The two equations are processed in alternating order, once in one order and then in the other order. Each bit participates in exactly two equations. The soft decoder works in groups of 16 equations, and the Chase decoder also works in multiples of 16. At 804, the LLRs of the 16 equations are read, and the previously determined CDF threshold is also read. In some embodiments, in order to find the LRB at 806, the soft decoder reads the LLR, and during the reading, the soft decoder compares the LLR with the threshold and keeps the value and index of the LRB separately. The Chase decoder then runs all modes based on the determined LRB at 808 and updates the LLR for the next iteration at 810. Next, at 812, the LLRs are arranged into the order in which they are arranged in the equation. Based on the arranged LLRs, a CDF is calculated at 814, and the LLRs are written to memory at 816. After all the LLRs for the codeword have been written, a threshold is determined at 818, and the threshold is written to memory at 820 for use in the next iteration.

[0047] For oFEC, there is a delay between reading and writing the LLRs, so the LLR values ​​are usually written to memory. Figure 8 In the example 16×16 block shown in oFEC, the LLRs are written to memory because there is a delay between a bit participating in the first equation and the bit participating in the second equation. Therefore, there is an opportunity to construct the CDF when the LLRs are written to memory.

[0048] Fig. 9 An exemplary process 900 for CDF-based LRB identification is shown. In some embodiments, a communication system includes an encoder / transmitter for transmitting information / messages to a receiver via a noisy communication channel. The encoder is configured to encode a codeword with an error correction code and transmit the codeword to the receiver via the communication channel. The receiver is configured to perform the CDF-based LRB identification process 900. In some embodiments, the receiver includes a detector and a soft decoder for implementing the steps of process 900.

[0049] At step 905, a codeword is received at a receiver. The codeword may contain errors, and the receiver aims to decode the codeword to correctly recover the sender's original message.

[0050] At step 910, a list of reliability values ​​for bits included in the codeword is determined. In some embodiments, each of the reliability values ​​is an absolute value of a log likelihood ratio (LLR). An example list of reliability values ​​is as follows: Figure 2 shown.

[0051] At step 915, a CDF list of reliability values ​​for the codewords is calculated. An example CDF list is Figure 4 Shown in.

[0052] At step 920, a threshold group is identified from the CDF list. The group includes a specific number of LRBs having reliability values ​​within a threshold range. In some embodiments, the receiver (e.g., Figure 1 The detector 106 and the soft decoder 108 in FIG. 1 determine the value of the least reliable bit (eg, Figure 2 The receiver generates a list of reliability values ​​206 in the LRBs and identifies from the list the maximum LRB value that can be used to determine the n LRBs. The maximum LRB value refers to the maximum reliability value within the LRB. By generating a CDF of the reliability values ​​in the present system, the receiver can simply scan the CDF to identify bit groups / intervals having reliability values ​​within a threshold range (i.e., the maximum LRB value).

[0053] At step 925, the position of each LRB in the codeword is determined. The LRBs are included in the identified group / interval. The receiver can scan the list of LLRs or reliability values ​​(e.g., Figure 2 200 in the codeword) to obtain the positions of these least reliable bits in the codeword. Example results are as follows Figure 3 shown.

[0054] In some embodiments, once a threshold is determined, there may be more than n bits with reliability values ​​less than or equal to the threshold. There is some freedom in which positions in the identified interval / group the bits can be selected from. In some embodiments, when creating the CDF, the receiver can be configured to store the number of LRBs that should be selected in the identified interval / group and the threshold. This reduces ambiguity and unnecessary comparisons, thereby further improving decoding performance. Additional Considerations

[0055] In some implementations, at least a portion of the above methods may be implemented by instructions that, when executed, cause one or more processing devices to perform the above processes and functions. Such instructions may include, for example, interpreted instructions, such as script instructions or executable code, or other instructions stored in a non-transitory computer-readable medium. The storage device 830 may be implemented in a distributed manner over a network, such as as a server farm or a group of widely distributed servers, or may be implemented in a single computing device.

[0056] Although an example processing system has been described, the embodiments, functional operations, and processes of the subject matter described in this specification may be implemented in other types of digital electronic circuits, in tangibly embodied computer software or firmware, in computer hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of them. The embodiments of the subject matter described in this specification may be implemented as one or more computer programs, i.e., one or more computer program instruction modules encoded on a tangible non-volatile program carrier for execution by a data processing device or for controlling the operation of the data processing device. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagation signal (e.g., a machine-generated electrical signal, optical signal, or electromagnetic signal) that is generated to encode information for transmission to an appropriate receiver device for execution by a data processing device. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, or a combination of one or more of them.

[0057] The term "system" may cover all kinds of devices, apparatuses and machines for processing data, including, for example, a programmable processor, a computer or multiple processors or computers. A processing system may include special-purpose logic circuits, such as an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit). In addition to hardware, a processing system may also include code that creates an execution environment for the computer program in question, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.

[0058] A computer program (which may also be referred to or described as a program, software, software application, module, software module, script or code) may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it may be deployed in any form, including deployment as a standalone program or as a module, component, subroutine or other unit suitable for use in a computing environment. A computer program may, but need not, correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files storing portions of one or more modules, subroutines or code). A computer program may be deployed to execute on one computer or on multiple computers that are located at one location or distributed at multiple locations and interconnected by a communication network.

[0059] The processes and logic flows described in this specification may be performed by one or more programmable computers executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by, and the apparatus may also be implemented as, a special purpose logic circuit, such as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

[0060] As an example, a computer suitable for executing a computer program may include a general or special microprocessor or both, or any other type of central processing unit. Typically, the central processing unit receives instructions and data from a read-only memory or a random access memory or both. A computer typically includes a central processing unit for implementing or executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks) for storing data or be operably coupled to receive data from one or more mass storage devices for storing data or to transfer data to it or both. However, a computer does not need to have such a device. In addition, to name just a few examples, a computer may be embedded in another device, such as a mobile phone, a personal digital assistant (PDA), a mobile audio or video player, a game console, a global positioning system (GPS) receiver, or a portable storage device (e.g., a universal serial bus (USB) flash drive).

[0061] Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including, for example: semiconductor memory devices, such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and memory may be supplemented by, or incorporated in, special purpose logic circuitry.

[0062] To provide interaction with a user, embodiments of the subject matter described in this specification may be implemented on a computer having a display device (e.g., a CRT (cathode ray tube), or LCD (liquid crystal display) monitor) for displaying information to the user, and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices may also be used to provide interaction with the user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input). In addition, the computer may interact with the user by sending documents to and receiving documents from a device used by the user; for example, by sending a web page to a web browser on a user device of the user in response to a request received from the web browser.

[0063] Embodiments of the subject matter described in this specification may be implemented in a computing system that includes a back-end component (e.g., as a data center) or includes a middleware component (e.g., an application server) or includes a front-end component (e.g., a client computer with a graphical user interface or a web browser through which a user can interact with an implementation of the subject matter described in this specification) or any combination of one or more such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include local area networks (LANs) and wide area networks (WANs), such as the Internet.

[0064] A computing system may include clients and servers. Generally speaking, clients and servers are remote from each other and typically interact through a communication network. The relationship between client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

[0065] Although this specification contains many specific implementation details, these should not be interpreted as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to a particular embodiment. Certain features described in this specification in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. In addition, although features may be described above as working in certain combinations and even initially claimed as such, one or more features from the claimed combination may be deleted from the combination in some cases, and the claimed combination may be directed to a sub-combination or a variation of the sub-combination.

[0066] Similarly, although operations are depicted in a particular order in the accompanying drawings, this should not be understood as requiring such operations to be performed in the particular order shown or in order, or to perform all operations shown, to achieve desired results. In some cases, multitasking and parallel processing may be advantageous. In addition, the separation of the various system components in the above-described embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can be integrated together in a single software product or packaged into multiple software products.

[0067] Specific embodiments of the subject matter have been described. Other embodiments are within the scope of the appended claims. For example, the actions recited in the claims can be performed in a different order and still achieve the desired results. As an example, the processes depicted in the accompanying figures do not necessarily require the particular order or sequence shown to achieve the desired results. In certain implementations, multitasking and parallel processing may be advantageous. Additional steps or levels may be provided for the described processes, or steps or levels may be eliminated. Therefore, other implementations are within the scope of the appended claims.

[0068] The phraseology and terminology used herein is for the purpose of description and should not be regarded as limiting.

[0069] The term "about", the phrase "approximately equal to" and other similar phrases (e.g., "X has a value of approximately Y" or "X is approximately equal to Y") as used in the specification and claims should be understood to mean that one value (X) is within a predetermined range of another value (Y). Unless otherwise specified, the predetermined range may be plus or minus 20%, 10%, 5%, 3%, 1%, 0.1%, or less than 0.1%.

[0070] As used in the specification and claims, the indefinite articles "a" and "an" shall be understood to mean "at least one" unless clearly indicated to the contrary. As used in the specification and in the claims, the phrase "and / or" shall be understood to mean "any one or both" of the elements so combined, i.e., elements present in combination in some cases and separately in other cases. Multiple elements listed with "and / or" should be interpreted in the same manner, i.e., "one or more" of the elements so combined. In addition to the elements specifically referred to by the "and / or" clause, other elements may optionally be present, whether related or unrelated to those specifically referred to. Thus, as a non-limiting example, a reference to "A and / or B", when used in conjunction with open language such as "comprising", may refer to only A (optionally including elements other than B) in one embodiment; to only B (optionally including elements other than A) in another embodiment; to both A and B (optionally including other elements) in yet another embodiment, and so on.

[0071] As used in the specification and in the claims, "or" should be understood to have the same meaning as "and / or" as defined above. For example, when separating items in a list, "or" or "and / or" should be interpreted as inclusive, that is, including at least one element, but also including multiple elements or more than one element in a list of elements, and optionally, including additional unlisted items. Unless the term clearly indicates the opposite meaning, for example, "only one of..." or "only one of..." or when "consisting of..." is used in the claims, it will refer to including multiple elements or only one element in a list of elements. Generally, the term "or", as used, when guided by exclusive terms such as "any one", "one of...", "only one of..." or "only one of...", should only be interpreted as indicating an exclusive alternative form (i.e., "one or the other but not both"). When "consisting of..." is used in the claims, it should have its ordinary meaning used in the field of patent law.

[0072] As used in the specification and in the claims, the phrase "at least one" when used for a list of one or more elements should be understood to refer to at least one element selected from any one or more elements in the list of elements, but does not necessarily include at least one of each element specifically listed in the list of elements, and does not exclude any combination of elements in the list of elements. This definition also allows that elements other than the elements specifically identified in the list of elements to which the phrase "at least one" refers may optionally be present, whether related or unrelated to those specifically identified elements. Thus, as a non-limiting example, "at least one of A and B" (or, equivalently "at least one of A or B", or equivalently "at least one of A and / or B") may refer to at least one, optionally including more than one A, without B present (and optionally including elements other than B) in one embodiment; to at least one, optionally including more than one B, without A present (and optionally including elements other than A) in another embodiment; to at least one, optionally including more than one A, and at least one, optionally including more than one B (and optionally including other elements) in yet another embodiment, and so on.

[0073] The use of "including," "comprising," "having," "including," "involving," and variations thereof herein is meant to encompass the items listed thereafter as well as additional items.

[0074] The use of ordinal terms such as "first," "second," "third," etc., in the claims to modify claim elements does not, by itself, imply any priority, precedence, or order of one claim element relative to another claim element or the temporal order in which the actions of the method are performed. Ordinal terms are used solely as labels to distinguish one claim element having a particular name from another element having the same name (but with respect to the use of the ordinal terms) to distinguish claim elements.

[0075] Having thus described several aspects of at least one embodiment of the present invention, it will be appreciated that various changes, modifications and improvements will readily occur to those skilled in the art. Such changes, modifications and improvements are intended to be a part of this disclosure and are intended to be within the spirit and scope of the present invention. Therefore, the foregoing description and accompanying drawings are intended only as examples.

Claims

1. A receiver for identifying a least reliable bit (LRB) in a communication system, the receiver comprising: a detector configured to receive a codeword and determine a list of reliability values ​​for bits included in the codeword; as well as a decoder coupled to the detector and configured to: receiving from the detector the list of codewords and the reliability values; calculating a list of cumulative distribution functions (CDFs) of the reliability values ​​of the codewords; identifying, from the CDF list, a group including a certain number of LRBs having reliability values ​​within a threshold range; and A position of each LRB of the group in the codeword is determined.

2. The receiver according to claim 1, wherein: The reliability value among the reliability values ​​is an absolute value of a log likelihood ratio (LLR).

3. The receiver according to claim 1, wherein: The decoder is further configured to decode the codeword based on the identified LRBs and positions associated with the LRBs.

4. The receiver according to claim 3, wherein: The decoder is further configured to update the CDF after decoding the codeword, wherein, to update the CDF, the decoder is further configured to prepare the CDF for a subsequent codeword to be decoded.

5. The receiver according to claim 3, wherein: The decoder is further configured to: Updating the LLR of the codeword; and The LLRs are written to memory.

6. The receiver according to claim 5, wherein: The decoder is further configured to read the LLRs from the memory when decoding a next codeword at a later time.

7. The receiver according to claim 1, wherein: The decoder is an open forward error correction (oFEC) decoder, and the oFEC decoder is configured to construct the CDF when writing the LLRs to the memory.

8. The receiver according to claim 1, wherein: The decoder is further configured to construct the CDF over the entire sequence of the codewords or over a partial sequence of the codewords.

9. The receiver according to claim 1, wherein: The receiver uses a two-pass algorithm to simplify the LRB identification process, wherein the two-pass algorithm is implemented when the decoding process is split between write operations and read operations.

10. The receiver according to claim 1, wherein: The codeword is encoded with an error correction code, and the detector is configured to receive the codeword from an encoder via a communication channel.

11. A method for identifying a least reliable bit (LRB) by a receiver, comprising: receiving a codeword encoded with an error correction code; determining a list of reliability values ​​for bits included in the codeword; Calculating a cumulative distribution function (CDF) of the reliability value of the codeword; identifying from the CDF a group including a particular number of LRBs having reliability values ​​within a threshold range; and A position of each LRB of the group in the codeword is determined.

12. The method according to claim 11, wherein: The reliability value among the reliability values ​​is an absolute value of a log likelihood ratio (LLR).

13. The method of claim 11, further comprising decoding the codeword based on the identified LRBs and positions associated with the LRBs.

14. The method according to claim 13, further comprising: updating the CDF after decoding the codeword, The updating includes preparing the CDF for a subsequent codeword to be decoded.

15. The method according to claim 13, further comprising: Updating the LLR of the codeword; as well as The LLRs are written to memory.

16. The method of claim 15, further comprising reading the LLRs from the memory when decoding a next codeword at a later time.

17. The method of claim 11, further comprising constructing the CDF when writing LLRs to a memory through an open forward error correction (oFEC) decoder.

18. The method of claim 11, further comprising constructing the CDF over the entire sequence of codewords or over a partial sequence of codewords.

19. The method according to claim 11, wherein: Identification of the LRBs is simplified using a two-pass algorithm that is implemented when the decoding process is split between write and read operations.

20. The method according to claim 11, wherein: The receiver includes a detector and a soft decoder, wherein the receiver receives an encoded codeword from an encoder via a communication channel.

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