Fault detection method of transmission interface circuit and transmission interface circuit

Abstract

The invention discloses a fault detection method of a transmission interface circuit and the transmission interface circuit. The method comprises the steps that a control signal is sent to a digital output circuit, a transmission interface circuit comprises the digital output circuit, and the digital output circuit responds to the control signal to start a self-checking state; and after the fault feedback signal sent by the digital output circuit is received, the digital output circuit is controlled to execute the reset operation. The technical problem that the fault of the output circuit in the IO circuit cannot be found in time in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the field of data processing, and in particular to a fault detection method for a transmission interface circuit and a transmission interface circuit. Background Art

[0002] In related technologies, fault detection systems for IO (input / output) circuits often focus on stability detection of input circuits (such as sensor interfaces) and power circuits. As a key interface for the system to interact with external devices or next-level circuits, the reliability of digital output circuits directly affects the stability and performance of the entire system. If there is a fault in the output circuit and it is not discovered and repaired in time, it may cause frequent system errors and even damage the equipment connected to it, thereby reducing the reliability of the overall system.

[0003] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention

[0004] The embodiment of the present invention provides a transmission interface circuit fault detection method and a transmission interface circuit, so as to at least solve the technical problem in the related art that a fault in an output circuit of an IO circuit cannot be detected in time.

[0005] According to one aspect of an embodiment of the present invention, a fault detection method for a transmission interface circuit is provided, comprising: sending a control signal to a digital output circuit, wherein the transmission interface circuit includes a digital output circuit, and the digital output circuit starts a self-check state in response to the control signal; after receiving a fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation.

[0006] Optionally, after receiving a fault feedback signal sent by the digital output circuit, the digital output circuit is controlled to perform a reset operation, including: after receiving a fault feedback signal sent by an isolation chip included in the digital output circuit, a reset signal is sent to the isolation chip, and the isolation chip forwards the reset signal to other chips included in the digital output circuit, wherein the other chips perform a reset operation in response to the reset signal, and the isolation chip is used to electrically isolate the controller from other chips.

[0007] Optionally, sending a control signal to the digital output circuit includes: sending a control signal to an output driver chip, wherein the digital output circuit includes an output driver chip, the output driver chip starts a self-test state in response to the control signal, and when the output driver chip detects a fault in the digital output circuit in the self-test state, it sends a fault feedback signal to the controller.

[0008] Optionally, after receiving a fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation, including: after receiving the fault feedback signal sent by the digital output circuit, detecting whether there is a fault in the power supply, wherein the power supply supplies power to the digital output circuit; and in the case that there is no fault in the power supply, controlling the digital output circuit to perform a reset operation.

[0009] Optionally, the method further includes: in the event that both power supplies fail, disconnecting the power supply from the digital output circuit and sending an alarm message, wherein the alarm message is used to notify operation and maintenance personnel that the power supply fails.

[0010] Optionally, after receiving a fault feedback signal sent by the digital output circuit, detecting whether the power supply is faulty includes: after receiving the fault feedback signal sent by the digital output circuit, detecting a first operating voltage of the digital output circuit and a second operating voltage of the controller, wherein the power supply is also used to power the controller; and determining that the power supply is faulty when the first operating voltage and the second operating voltage are outside a safe voltage range.

[0011] According to another aspect of an embodiment of the present invention, a transmission interface circuit is provided, comprising: a controller, a digital output circuit and a digital input circuit, wherein the controller is connected to the digital output circuit and the digital input circuit respectively, the controller is used to send a control signal to the digital output circuit, and control the digital output circuit to perform a reset operation when receiving a fault feedback signal sent by the digital output circuit; the digital output circuit starts a self-test state in response to the control signal, wherein the digital output circuit sends a fault feedback signal to the controller when a fault of the digital output circuit is detected in the self-test state.

[0012] Optionally, the digital output circuit includes: an isolation chip and an output driver chip, wherein the isolation chip is used to electrically isolate the controller from the output driver chip, and is also used to transmit signals between the controller and the output driver chip; the driver chip is used to transmit the signal output by the controller to an external device, and is also used to respond to the control signal to start a self-test state, and is also used to send a fault feedback signal to the controller when a digital output circuit fault is detected in the self-test state.

[0013] According to another aspect of an embodiment of the present invention, a non-volatile storage medium is provided. The non-volatile storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor and executing any one of the fault detection methods for a transmission interface circuit.

[0014] According to another aspect of an embodiment of the present invention, a robot is provided, comprising: one or more processors and a memory, the memory being used to store one or more programs, wherein when the one or more programs are executed by one or more processors, the one or more processors implement any one of the above-mentioned transmission interface circuit fault detection methods; and also comprising any one of the above-mentioned transmission interface circuits.

[0015] According to another aspect of the embodiments of the present invention, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the computer program implements any one of the above-mentioned methods for detecting a fault in a transmission interface circuit.

[0016] In an embodiment of the present invention, a control signal is sent to a digital output circuit, wherein the transmission interface circuit includes a digital output circuit, and the digital output circuit starts a self-check state in response to the control signal; after receiving a fault feedback signal sent by the digital output circuit, the digital output circuit is controlled to perform a reset operation, thereby achieving the purpose of performing fault detection on the digital output circuit in the IO circuit, and realizing the technical effect of timely discovering the output circuit fault, thereby solving the technical problem in the related art that the output circuit in the IO circuit cannot be discovered in time. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0018] Figure 1 is a flow chart of a fault detection method for a transmission interface circuit provided according to an embodiment of the present invention;

[0019] Figure 2 is a schematic diagram of an optional transmission interface circuit provided according to an embodiment of the present invention;

[0020] Figure 3 is a schematic diagram of an optional fault detection method provided according to an embodiment of the present invention;

[0021] Figure 4 is a schematic diagram of an optional digital output circuit provided according to an embodiment of the present invention;

[0022] Figure 5 is a schematic diagram of an optional digital input circuit provided according to an embodiment of the present invention;

[0023] Figure 6 It is a structural schematic diagram of a transmission interface circuit provided according to an embodiment of the present invention. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] For the convenience of description, some nouns or terms involved in the embodiments of the present application are explained below:

[0027] IO interface circuit, namely input / output interface circuit, is a key component in the robot system for realizing information exchange with external devices (such as sensors, actuators, etc.). It allows the robot to receive input signals from the external environment (such as sensor measurement data) and output control signals to external devices (such as drive motors) to realize the robot's perception, decision-making and execution functions.

[0028] An isolation chip is a chip used to isolate electrical signals. It is usually used to isolate the digital output signals sent by the controller to protect the controller and other devices from electrical interference or overload.

[0029] A watchdog in a digital circuit is a device used to monitor the operating status of a system. It usually consists of a timer and a logic circuit, which periodically sends a signal to the system. If the system is operating normally, it will reply to the signal in time. If the system fails or stops responding, the watchdog will initiate a restart operation to restore the normal operation of the system. The watchdog can play a protective role in the digital system to prevent the system from deadlocking or other failures that may cause the system to crash.

[0030] Existing detection mechanisms may focus on the accuracy of input signals and the stability of power supply, while ignoring possible faults in the digital output circuit itself, such as open circuit, short circuit, insufficient driving capability, signal distortion, etc. This results in the system not being able to work properly due to output circuit failures even if the input and power supply parts are normal in actual operation. Due to the lack of direct fault detection of digital output circuits, locating the source of the fault becomes more complicated when a problem occurs in the system. Technicians may need to use indirect means (such as observing system behavior, using logic analyzers, etc.) to infer whether the output circuit is faulty, which is not only time-consuming and labor-intensive, but may also increase the risk of misjudgment. As a key interface for the system to interact with external devices or the next-level circuit, the reliability of the digital output circuit directly affects the stability and performance of the entire system. If there is a fault in the output circuit and it is not discovered and repaired in time, it may cause frequent system errors or even damage the equipment connected to it, thereby reducing the reliability of the overall system. In addition, due to the lack of effective fault detection methods, system maintenance personnel may need to adopt more conservative maintenance strategies, such as adding redundant components and shortening maintenance cycles, to deal with potential output circuit failures. This not only increases the hardware cost of the system, but also increases the complexity and labor cost of maintenance.

[0031] In response to the above problems, an embodiment of the present invention provides an embodiment of a method for fault detection in a transmission interface circuit. According to an embodiment of the present invention, an embodiment of a method for fault detection in a transmission interface circuit is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in an order different from that shown here.

[0032] Figure 1 is a flow chart of a fault detection method for a transmission interface circuit according to an embodiment of the present invention. Figure 1 As shown, the method comprises the following steps:

[0033] Step S102 : sending a control signal to the digital output circuit, wherein the transmission interface circuit includes the digital output circuit, and the digital output circuit starts a self-test state in response to the control signal.

[0034] It can be understood that the execution subject of this step is the controller, which can send a control signal to the digital output circuit. This step is the starting point of the entire fault detection process, which controls the digital output circuit to start the self-test process. As part of the transmission interface circuit, the digital output circuit is responsible for converting the control signal into a specific output behavior, such as driving an external device or performing other tasks. By sending a control signal, the controller requires the digital output circuit to enter the self-test state, that is, to self-check the integrity of its internal circuits, connections, and functions.

[0035] In an optional embodiment, sending a control signal to a digital output circuit includes: sending a control signal to an output driver chip, wherein the digital output circuit includes an output driver chip, the output driver chip starts a self-test state in response to the control signal, and when the output driver chip detects a digital output circuit fault in the self-test state, it sends a fault feedback signal to the controller.

[0036] Optionally, the control signal can be sent to the output driver chip inside the digital output circuit. The output driver chip is the core component of the digital output circuit. It is responsible for converting the signal sent from the robot into a signal suitable for the external device to drive the external device. It is mainly responsible for the output signal in the transmission interface circuit. When the output driver chip receives the self-check control signal, it will start the internal self-check program to check its own working status and connection status. If any abnormality or fault is found, the output driver chip will generate and send a fault feedback signal to the controller for further processing.

[0037] It should be noted that the digital output circuit may include not only an output driver chip, but also an output expansion chip. The output expansion chip is located between the output driver chip and the controller, and can be used to connect multiple output driver chips. That is, the controller can transmit signals to multiple output driver chips through the output expansion chip to improve signal transmission efficiency. At this time, since the output expansion chip is also an important part of the signal output link, the controller can also send a control signal to the output expansion chip, and control the output expansion chip to start the internal self-test program to check its own working status and connection status. If any abnormality or fault is found, the output expansion chip will generate and send a fault feedback signal to the controller for further processing.

[0038] Step S104, after receiving the fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation.

[0039] It can be understood that when the controller receives a fault feedback signal from the digital output circuit, it will immediately take action to control the digital output circuit to perform a reset operation. The reset operation is a process of restoring the circuit to its initial state, aiming to clear any temporary state or incorrect configuration that may cause a fault.

[0040] In an optional embodiment, after receiving a fault feedback signal sent by the digital output circuit, the digital output circuit is controlled to perform a reset operation, including: after receiving a fault feedback signal sent by an isolation chip included in the digital output circuit, a reset signal is sent to the isolation chip, and the isolation chip forwards the reset signal to other chips included in the digital output circuit, wherein the other chips perform a reset operation in response to the reset signal, and the isolation chip is used to electrically isolate the controller from other chips.

[0041] Optionally, the controller is not directly connected to the digital output circuit, but is connected to the isolation chip in the digital output circuit, and the signal to be sent is sent to the isolation chip, which is then forwarded by the isolation chip to other chips in the digital output circuit. Similarly, the controller will also receive a fault feedback signal from the isolation chip and send a reset signal to the isolation chip. The function of the isolation chip is to electrically isolate the controller from other chips to improve the safety and stability of the system. After receiving the reset signal, the isolation chip will forward it to other chips in the digital output circuit, such as the output driver chip, etc. These chips will then perform a reset operation and return to the initial state.

[0042] In an optional embodiment, after receiving a fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation includes: after receiving the fault feedback signal sent by the digital output circuit, detecting whether there is a fault in the power supply, wherein the power supply supplies power to the digital output circuit; and in the case that there is no fault in the power supply, controlling the digital output circuit to perform a reset operation.

[0043] In an optional embodiment, the method further includes: in the event that both power supplies fail, disconnecting the power supply from the digital output circuit and sending an alarm message, wherein the alarm message is used to notify operation and maintenance personnel that the power supply fails.

[0044] Optionally, after receiving the fault feedback signal, first check whether the power supply is faulty. This is because the power supply is the basis for the normal operation of the digital output circuit. If the power supply fails, any reset operation may be futile. Whether the power supply fails can be determined by checking whether the power supply is stable. If the power supply is not faulty, continue to perform the reset operation; if the power supply is faulty, disconnect the connection between the power supply and the digital output circuit, and send an alarm message to the operation and maintenance personnel so that the power supply problem can be repaired in time.

[0045] It should be noted that in the transmission interface circuit, the controller and the power supply may include two groups, that is, a main controller and a backup controller, a first power supply connected to the main controller and supplying power to the main controller, and a second power supply connected to the backup controller and supplying power to the backup controller. These two power supplies can be connected to the digital output circuit respectively, and the backup controller and the main controller can respectively detect whether there is a problem with the power supply of the other party. When a problem is detected in one of the power supplies, the connection between the digital output power supply and the faulty voltage can be disconnected, and an alarm can be sent to the operation and maintenance personnel. The connection between the faulty power supply and the corresponding controller can also be disconnected at the same time, and the normal data processing task can be performed by another controller. In addition, under normal circumstances, only one power supply can be selected to power the digital output circuit, and the other power supply can be used as a backup power supply.

[0046] In an optional embodiment, after receiving a fault feedback signal sent by a digital output circuit, detecting whether a power supply has a fault includes: after receiving a fault feedback signal sent by the digital output circuit, detecting a first operating voltage of the digital output circuit and a second operating voltage of the controller, wherein the power supply is also used to power the controller; and determining that a power supply has a fault when the first operating voltage and the second operating voltage are outside a safe voltage range.

[0047] Optionally, first, after the controller receives the fault feedback signal sent by the digital output circuit, it indicates that there is some problem inside the digital output circuit or the external device connected to it, causing the circuit to fail to work properly or performance degradation. At this time, the controller does not immediately control the digital output circuit to perform a reset operation, but first detects the working state of the power supply. This includes measuring two key voltage values: the first working voltage of the digital output circuit, that is, the voltage required for the normal operation of the digital output circuit, because the digital output circuit is directly connected to the power supply, and the stability of its working voltage directly reflects the output capacity of the power supply; the second working voltage of the controller, that is, the voltage at which the power supply supplies power to the controller so that the controller is in a working state. Although the controller itself may not be the focus of attention directly caused by the digital output circuit failure, detecting its working voltage helps to comprehensively evaluate the health of the power supply. After obtaining the measured values ​​of the first working voltage and the second working voltage, the controller compares these two values ​​with the preset safe voltage range. The safe voltage range is determined according to the system design and equipment specifications, and is intended to ensure that the circuit will not be damaged under normal working conditions. If both the first working voltage and the second working voltage are within the safe voltage range, it can be preliminarily determined that the power supply itself is not faulty, or the fault is not directly caused by the power supply. At this point, the controller can further consider other possible causes of the fault, such as damaged components inside the digital output circuit, connection line problems, etc. If the first operating voltage or the second operating voltage (or both) is outside the safe voltage range, the controller can determine that the power supply is faulty. This may be caused by unstable power supply voltage, power supply overload, power supply damage, etc.

[0048] It should be noted that, since the transmission interface circuit may include a main controller and a backup controller, the two controllers may respectively detect the first operating voltage and the second operating voltage corresponding to the other party's power supply to determine whether the other party's power supply fails.

[0049] With this optional embodiment, the controller can more comprehensively evaluate the health of the system after receiving the fault feedback signal from the digital output circuit, and promptly detect and resolve potential power failure problems. This helps improve the stability and reliability of the system and reduce downtime and maintenance costs caused by power failures.

[0050] Through the above steps, a control signal is sent to the digital output circuit, wherein the transmission interface circuit includes a digital output circuit, and the digital output circuit starts a self-check state in response to the control signal; after receiving the fault feedback signal sent by the digital output circuit, the digital output circuit is controlled to perform a reset operation, thereby achieving the purpose of performing fault detection on the digital output circuit in the IO circuit, and realizing the technical effect of timely discovering the output circuit fault, thereby solving the technical problem in the related art that the output circuit in the IO circuit cannot be discovered in time.

[0051] Based on the above embodiments and optional embodiments, the present invention proposes an optional implementation mode: Figure 2 is a schematic diagram of an optional transmission interface circuit provided according to an embodiment of the present invention, such as Figure 2 As shown, the transmission interface circuit includes a power supply 1, a controller 1, a power supply 2, a controller 2 and an input / output circuit (a digital input circuit and / or a digital output circuit). The power supply 1 supplies power to the controller 1 and the input / output circuit, and the power supply 2 supplies power to the controller 2. The controller 1 can control and monitor the power supply 2. Similarly, the controller 2 can also control and monitor the voltage 1. The controller 1 and the controller 2 can also communicate with each other to perform data verification. The controller 1 and the controller 2 can respectively transmit signals with the input / output circuit, including IO monitoring signals, IO signals and IO control signals, wherein the IO control signal is used to start the self-test state of the input / output circuit, the IO monitoring signal includes a fault signal of the input / output circuit itself that is fed back, and the IO signal is a signal for communicating with external devices.

[0052] Among them, when controller 2 detects that the input\output circuit and the working voltage of controller 1 are abnormal, controller 2 cuts off power supply 1 and sends an alarm message to the operation and maintenance personnel; similarly, when controller 1 detects that the input\output circuit and the working voltage of controller 2 are abnormal, controller 1 cuts off power supply 2 and sends an alarm message. Controller 1 is the main working controller, and controller 2 is used for redundancy and monitoring.

[0053] Among them, controller 1 and controller 2 receive and send signals at the same time, and the two controllers verify data through communication, and take functional safety measures when the data is inconsistent. In addition, when selecting controller 1 and controller 2, two types of controllers with different internal structures can be selected to prevent the phenomenon of common cause failure of the two controllers, that is, to prevent the two controllers from being affected by the same external factors, causing them to fail at the same time, further improving the stability of the circuit.

[0054] Figure 3 is a schematic diagram of an optional fault detection method provided according to an embodiment of the present invention, such as Figure 3 As shown in the figure, the fault detection scheme after the controller is started has three steps: the first step is to detect the circuit fault state. If the circuit fails, functional safety measure 1 is taken; if the circuit does not fail, the input\output circuit is enabled. Among them, safety measure 1 is to cut off the power supply and send an alarm message; the second step is to monitor whether the IO signal is abnormal. If there is no abnormality, continue to monitor. If the IO signal is abnormal, execute the third step; the third step is to determine whether there is a circuit fault state. If there is, functional safety measure 1 is taken. If not, functional safety measure 2 is taken. Among them, safety measure 2 is to reset the IO circuit and send an alarm message.

[0055] Figure 4 is a schematic diagram of an optional digital output circuit provided according to an embodiment of the present invention, such as Figure 4 As shown, the digital output circuit may include an isolation device (isolation chip), an IO expansion chip (output expansion chip), a DO driver chip (output driver chip) and a watchdog, wherein the isolation device is responsible for data communication with the controller, the IO expansion chip is responsible for expanding multi-channel signals, and can be connected to multiple DO driver chips (multiple DO driver chips are not shown in the figure), and the DO driver chip is used to communicate with external devices. In addition, when selecting multiple DO driver chips, multiple DO driver chips with different internal structures can be selected, which can prevent the phenomenon of common cause failure of multiple DO driver chips, that is, prevent multiple DO driver chips from being affected by the same external factors, causing them to fail at the same time, and further improve the stability of the circuit.

[0056] Among them, the controller receives the DO signal and fault signal (fault feedback signal) sent by the isolation device, and sends a DO control signal (control signal) to the isolation device. The controller may include controller 1 and controller 2. The isolation device isolates the controller from other chips to ensure the safe transmission of data. If the IO expansion chip fails, a fault signal will be fed back. For example, if the IO expansion chip data bus runs incorrectly, the IO expansion chip can be reset by hardware. The DO driver chip receives the DO signal of the IO expansion chip and the DO driver chip control signal of the isolation device. When the DO driver chip detects a fault in itself, it will also feed back a fault signal. The watchdog is used to reset the chip.

[0057] Figure 5 is a schematic diagram of an optional digital input circuit provided according to an embodiment of the present invention, such as Figure 5 As shown, the isolated DI chip (digital input circuit) can also be subjected to corresponding fault detection, wherein the isolated DI chip can be a chip integrating an isolated chip, an IO expansion chip and a DI driver chip. The controller can receive fault feedback signals and DI monitoring signals, and can also send DI control signals and DI signals to the isolated DI chip, and the controller includes controller 1 and controller 2. If the isolated DI chip data bus runs incorrectly, the IO expansion chip can be hardware reset.

[0058] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0059] A transmission interface circuit is also provided in an embodiment of the present invention. The transmission interface circuit provided in the embodiment of the present invention is introduced below.

[0060] Figure 6 is a schematic diagram of the structure of a transmission interface circuit provided according to an embodiment of the present invention. Figure 6 As shown, the circuit includes: a controller 61, a digital output circuit 62 and a digital input circuit 63, and the circuit will be described below.

[0061] The circuit includes: a controller, a digital output circuit and a digital input circuit, wherein the controller is connected to the digital output circuit and the digital input circuit respectively, and is used to send a control signal to the digital output circuit, and control the digital output circuit to perform a reset operation when receiving a fault feedback signal sent by the digital output circuit; the digital output circuit starts a self-checking state in response to the control signal, wherein the digital output circuit sends a fault feedback signal to the controller when a fault of the digital output circuit is detected in the self-checking state.

[0062] The transmission interface circuit includes a controller, which is responsible for sending control signals to the digital output circuit, receiving fault feedback signals from the digital output circuit, and performing corresponding operations according to the received signals, such as controlling the digital output circuit to enter a self-test state or perform a reset operation.

[0063] The transmission interface circuit also includes a digital output circuit, which is a key part of the transmission interface circuit and is responsible for converting the signal output by the controller into a signal that can drive external devices. The digital output circuit can respond to the control signal of the controller, enter the self-test state, and send a fault feedback signal to the controller when a fault is detected.

[0064] The transmission interface circuit also includes a digital input circuit for receiving signals from external devices and transmitting these signals to the controller for processing. It and the digital output circuit together constitute a complete IO (input / output) interface system.

[0065] As an optional embodiment, the digital output circuit includes: an isolation chip and an output driver chip, wherein the isolation chip is used to electrically isolate the controller from the output driver chip, and is also used to transmit signals between the controller and the output driver chip; the driver chip is used to transmit the signal output by the controller to an external device, and is also used to respond to the control signal to start a self-test state, and is also used to send a fault feedback signal to the controller when a digital output circuit fault is detected in the self-test state.

[0066] Optionally, in an optional embodiment, the digital output circuit is further refined into a structure including an isolation chip and an output driver chip. The main function of the isolation chip is to provide electrical isolation to protect the controller from potential damage from the output driver chip or external devices. Electrical isolation can also reduce noise interference and improve signal stability and reliability. At the same time, the isolation chip is also responsible for signal transmission between the controller and the output driver chip to ensure the integrity and accuracy of the signal.

[0067] In addition, the output driver chip is responsible for converting the signal output by the controller into a signal that can drive external devices. It is directly connected to external devices such as motors, LED lights, etc., and controls the operating status of these devices. The output driver chip can also respond to the control signal of the controller and enter the self-test state to detect faults in itself and the connected lines. Once a fault is detected, the output driver chip will immediately send a fault feedback signal to the controller.

[0068] The transmission interface circuit provided by the embodiment of the present invention realizes the fault detection and automatic recovery function of the digital output circuit in the IO circuit by integrating the controller, the digital output circuit (including the isolation chip and the output driver chip) and the digital input circuit. Specifically, when the controller sends a control signal to the digital output circuit, the digital output circuit will enter the self-check state and perform a comprehensive check on its own working state and connection lines. Once a fault is found, the digital output circuit will immediately send a fault feedback signal to the controller, and the controller will perform a reset operation according to the received signal to restore the normal working state of the digital output circuit. The embodiment of the present invention effectively solves the technical problem that the output circuit in the IO circuit cannot be found in time in the related art, and improves the stability and reliability of the system. At the same time, by introducing the subdivision design of the isolation chip and the output driver chip, the electrical isolation capability and signal processing capability of the system are further enhanced, providing a strong guarantee for the stable operation of external devices.

[0069] In a transmission interface circuit provided by an embodiment of the present invention, a controller, a digital output circuit and a digital input circuit are used, wherein the controller is connected to the digital output circuit and the digital input circuit respectively, and the controller is used to send a control signal to the digital output circuit, and control the digital output circuit to perform a reset operation when receiving a fault feedback signal sent by the digital output circuit; the digital output circuit starts a self-check state in response to the control signal, wherein when the digital output circuit detects a fault in the digital output circuit in the self-check state, the digital output circuit sends a fault feedback signal to the controller, thereby achieving the purpose of fault detection of the digital output circuit in the IO circuit, and realizing the technical effect of timely discovering the output circuit fault, thereby solving the technical problem in the related art that the output circuit in the IO circuit cannot be discovered in time.

[0070] An embodiment of the present invention provides a non-volatile storage medium on which a program is stored. When the program is executed by a processor, a fault detection method for a transmission interface circuit is implemented.

[0071] An embodiment of the present invention also provides a robot, comprising: one or more processors and a memory, the memory being used to store one or more programs, wherein when the one or more programs are executed by one or more processors, the one or more processors implement any one of the above-mentioned transmission interface circuit fault detection methods; and also includes any one of the above-mentioned transmission interface circuits.

[0072] The present invention also provides a computer program product, which, when executed on a data processing device, is suitable for executing an initialization program having the following method steps: sending a control signal to a digital output circuit, wherein the transmission interface circuit includes a digital output circuit, and the digital output circuit starts a self-test state in response to the control signal; after receiving a fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation.

[0073] Optionally, the above-mentioned computer program product is also suitable for executing an initialization program having the following method steps: sending a control signal to a digital output circuit, wherein the transmission interface circuit includes a digital output circuit, and the digital output circuit starts a self-test state in response to the control signal; after receiving a fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation.

[0074] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0075] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0076] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0077] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0078] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0079] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0080] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0081] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0082] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0083] The above are only embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A fault detection method for a transmission interface circuit, characterized in that: include: Sending a control signal to a digital output circuit, wherein the transmission interface circuit includes the digital output circuit, and the digital output circuit starts a self-test state in response to the control signal; After receiving the fault feedback signal sent by the digital output circuit, the digital output circuit is controlled to perform a reset operation.

2. The method according to claim 1, characterized in that After receiving the fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation includes: After receiving a fault feedback signal sent by the isolation chip included in the digital output circuit, a reset signal is sent to the isolation chip, and the isolation chip forwards the reset signal to other chips included in the digital output circuit, wherein the other chips perform a reset operation in response to the reset signal, and the isolation chip is used to electrically isolate the controller from the other chips.

3. The method according to claim 1, characterized in that Send control signals to digital output circuits, including: The control signal is sent to an output driver chip, wherein the digital output circuit includes the output driver chip, and the output driver chip turns on the self-test state in response to the control signal, wherein when the output driver chip detects a fault in the digital output circuit in the self-test state, the fault feedback signal is sent to the controller.

4. The method according to any one of claims 1 to 3, characterized in that After receiving the fault feedback signal sent by the digital output circuit, controlling the digital output circuit to perform a reset operation includes: After receiving the fault feedback signal sent by the digital output circuit, detecting whether there is a fault in a power supply, wherein the power supply supplies power to the digital output circuit; In the case that there is no failure in the power supply, the digital output circuit is controlled to perform a reset operation.

5. The method according to claim 4, characterized in that Also includes: In the case that both of the power supplies are faulty, the connection between the power supply and the digital output circuit is disconnected, and an alarm message is sent, wherein the alarm message is used to notify the operation and maintenance personnel that the power supply is faulty.

6. The method according to claim 4, characterized in that After receiving the fault feedback signal sent by the digital output circuit, detecting whether the power supply has a fault includes: After receiving the fault feedback signal sent by the digital output circuit, detecting a first operating voltage of the digital output circuit and a second operating voltage of the controller, wherein the power supply is also used to power the controller; When the first operating voltage and the second operating voltage are outside the safety voltage range, it is determined that the power supply has a fault.

7. A transmission interface circuit, characterized in that: include: controller, a digital output circuit and a digital input circuit, wherein: The controller is connected to the digital output circuit and the digital input circuit respectively, and is used to send a control signal to the digital output circuit, and control the digital output circuit to perform a reset operation when receiving a fault feedback signal sent by the digital output circuit; The digital output circuit starts a self-checking state in response to the control signal, wherein when the digital output circuit detects a fault in the digital output circuit in the self-checking state, the digital output circuit sends the fault feedback signal to the controller.

8. The circuit according to claim 7, characterized in that The digital output circuit includes: an isolation chip and an output driver chip, wherein: The isolation chip is used to electrically isolate the controller from the output driver chip, and is also used to transmit signals between the controller and the output driver chip; The driver chip is used to transmit the signal output by the controller to an external device, and is also used to start the self-test state in response to the control signal, and is also used to send the fault feedback signal to the controller when a fault in the digital output circuit is detected in the self-test state.

9. A non-volatile storage medium, characterized in that: The non-volatile storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor and executing the fault detection method for a transmission interface circuit according to any one of claims 1 to 6.

10. A robot, characterized in that: include: One or more processors and a memory, the memory being used to store one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the fault detection method for the transmission interface circuit described in any one of claims 1 to 6; and also including the transmission interface circuit described in any one of claims 7 or 8.

11. A computer program product comprising computer instructions, characterized in that: The computer instructions are executed by the processor to implement the fault detection method for the transmission interface circuit according to any one of claims 1 to 6.

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