Electronic device and operation control method

Abstract

The invention provides an electronic apparatus and an operation control method, which can reduce power consumption in a power saving mode without reducing waveform quality. The electronic device includes a substrate, a plurality of DRAMs, and a jump processing unit. The substrate includes a power supply layer adjacent to the wiring layer. Each DRAM can jump from a first state in which data can be retained to a second state in which data cannot be retained and power consumption is smaller than that of the first state, and receives power from the power supply layer. When an operation mode of the electronic device is shifted from a normal mode to a power-saving mode in which power consumption is less than that of the normal mode, the jump processing unit stores, in a portion of the plurality of DRAMs, recovery data used when recovering to the normal mode. And causes each of the DRAMs in which the recovery data is not stored to jump from the first state to the second state.

Description

Technical Field

[0001] The invention relates to an electronic device and a motion control method. Background Art

[0002] An electronic device such as a digital multifunction machine is known that can switch the operation mode between a normal mode and a power saving mode that consumes less power than the normal mode. In addition, as a related art, an electronic device that can reduce the power consumption in the power saving mode is known. Specifically, the electronic device of the related art includes a first power supply that supplies power to a first DRAM and a second power supply that supplies power to a second DRAM, and when the operation mode of the device is transferred from the normal mode to the power saving mode, the data in the first DRAM is retained in the second DRAM and the power supply of the first power supply is stopped.

[0003] However, the plurality of DRAMs mounted on the substrate receive power from a power layer that functions as a reference layer of the wiring layer in the substrate. Here, in order to apply the related art to a configuration having the plurality of DRAMs that receive power from the power layer, the power layer needs to be divided. However, if the power layer that functions as a reference layer of the wiring layer is divided, the return path of the current flowing through the wiring layer becomes discontinuous, and the waveform quality of the signal transmitted in the wiring layer is degraded. Summary of the invention

[0004] The object of the present invention is to provide an electronic device and a motion control method, which can reduce power consumption in a power saving mode without reducing waveform quality.

[0005] An electronic device according to one embodiment of the present invention comprises: a substrate including a power supply layer adjacent to a wiring layer; a plurality of DRAMs capable of jumping from a first state capable of retaining data to a second state capable of retaining data and consuming less power than the first state, and receiving power from the power supply layer; and a jump processing unit, which, when an operation mode of the electronic device is transferred from a normal mode to a power saving mode consuming less power than the normal mode, stores recovery data used when restoring to the normal mode in a part of the plurality of DRAMs, and causes each of the DRAMs that does not store the recovery data to jump from the first state to the second state.

[0006] Another aspect of the action control method of the present invention is executed in an electronic device, wherein the electronic device includes: a substrate including a power supply layer adjacent to a wiring layer; and a plurality of DRAMs capable of jumping from a first state capable of retaining data to a second state capable of retaining data and consuming less power than the first state, and receiving power from the power supply layer. The action control method includes the following jumping step: when the action mode of the electronic device is transferred from a normal mode to a power saving mode consuming less power than the normal mode, recovery data used when restoring to the normal mode is stored in a part of the plurality of DRAMs, and each DRAM that does not store the recovery data is caused to jump from the first state to the second state.

[0007] According to the present invention, power consumption in the power saving mode can be reduced without reducing waveform quality.

[0008] This specification is presented in a simplified form, with appropriate reference to the accompanying drawings, to summarize the concepts described in the following detailed description. This specification is not intended to limit the important features and essential features of the subject matter described in the claims, nor is it intended to limit the scope of the subject matter described in the claims. In addition, the subject matter described in the claims is not limited to implementations that solve some or all of the disadvantages described in any part of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a diagram showing the configuration of an image forming apparatus according to an embodiment of the present invention.

[0010] Figure 2 It is a block diagram showing the system configuration of the image forming apparatus according to the embodiment of the present invention.

[0011] Figure 3 It is a diagram showing a configuration of a control unit of an image forming apparatus according to an embodiment of the present invention.

[0012] Figure 4 It is a diagram showing the configuration of a control substrate of the image forming apparatus according to the embodiment of the present invention.

[0013] Figure 5 This is a flowchart showing an example of an operation control process executed in the image forming apparatus according to the embodiment of the present invention. DETAILED DESCRIPTION

[0014] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In addition, the following embodiment is an example of a specific embodiment of the present invention and is not intended to limit the technical scope of the present invention.

[0015] (Configuration of Image Forming Apparatus 100) First, refer to Figure 1 and Figure 2 The configuration of the image forming apparatus 100 according to the embodiment of the present invention will be described. Figure 1 It is a cross-sectional view showing the structure of the image forming apparatus 100 .

[0016] The image forming device 100 is a digital multifunction machine having multiple functions such as a scanning function for reading an original image, a printing function for forming an image based on image data on a sheet, a fax function, and a copy function. The image forming device 100 is an example of an electronic device of the present invention. In addition, the present invention can be applied to electronic devices such as scanners, printers, fax devices, copiers, personal computers, notebook computers, smart phones, tablet terminals, televisions, air conditioners, refrigerators, and washing machines.

[0017] like Figure 1 and Figure 2 As shown, the image forming apparatus 100 includes an automatic document feeder 1 , an image reading unit 2 , an image forming unit 3 , a sheet conveying unit 4 , an operation display unit 5 , a power supply unit 6 , and a control unit 7 .

[0018] The automatic document feeder 1 feeds a document to be read by the scanning function. The automatic document feeder 1 includes a document setting portion, a plurality of conveying rollers, a document pressing member, and a paper discharge portion.

[0019] The image reading unit 2 realizes the above-mentioned scanning function and includes a document table, a light source, a plurality of reflection mirrors, an optical lens, and a CCD (Charge Coupled Device).

[0020] The image forming unit 3 realizes the printing function. Specifically, the image forming unit 3 forms an image on a sheet by electrophotography. The image forming unit 3 includes a photosensitive drum, a charging device, a light scanning unit (LSU), a developing device, a transfer device, a cleaning device, and a fixing device.

[0021] The sheet conveying unit 4 conveys the sheet on which the image is formed by the image forming unit 3. The sheet conveying unit 4 includes a paper feed cassette and a plurality of conveying rollers.

[0022] The operation display unit 5 is a user interface of the image forming apparatus 100. The operation display unit 5 includes a display unit and an operation unit. The display unit displays various information according to control instructions from the control unit 7. For example, the display unit is a liquid crystal display. The operation unit inputs various information to the control unit 7 according to user operations. For example, the operation unit is a touch panel.

[0023] The power supply unit 6 supplies power supplied from an external commercial power source to each unit of the image forming apparatus 100. Specifically, the power supply unit 6 is an AC-DC converter that converts an AC voltage of 100 V supplied from the commercial power source into a DC voltage of a predetermined voltage value.

[0024] The control unit 7 performs overall control of the image forming apparatus 100 .

[0025] (Configuration of Control Unit 7) Next, refer to Figure 2 to Figure 4 The structure of the control unit 7 is described. Here, Figure 3 3 is a top view showing a part of the structure of the first wiring layer 31 of the control substrate 30. Figure 4 It is a side view showing the structure of the control board 30 .

[0026] The control unit 7 includes Figure 3 The control unit 7 includes a plurality of electronic components including a CPU 11 and two DRAMs (Dynamic Random Access Memory) 12 (12A, 12B). In addition, the control unit 7 includes a control substrate 30 (see FIG. 1 ) on which the plurality of electronic components are mounted. Figure 4 ).

[0027] The control substrate 30 is a multi-layer substrate. Figure 4 As shown, the control substrate 30 includes a first wiring layer 31, a first insulating layer 32, a power supply layer 33, a second insulating layer 34, a ground layer 35, a third insulating layer 36, and a second wiring layer 37. The control substrate 30 is an example of a substrate of the present invention.

[0028] The first wiring layer 31 forms one outer surface of the control substrate 30. A wiring pattern is formed on the first wiring layer 31. A plurality of electronic components including the CPU 11 and two DRAMs 12 are mounted on the first wiring layer 31. Figure 3 In FIG. 1 , a region 31A in which the CPU 11 and two DRAMs 12 are mounted in the first wiring layer 31 is indicated by a two-dot chain line.

[0029] The power supply layer 33 is disposed adjacent to the first wiring layer 31. Figure 4 As shown, the power layer 33 is disposed opposite to the first wiring layer 31 with the first insulating layer 32 interposed therebetween. A power distribution pattern is formed on the power layer 33. The CPU 11 and the two DRAMs 12 are electrically connected to the power layer 33 and receive power from the power layer 33.

[0030] The ground layer 35 is disposed adjacent to the power layer 33. Figure 4 As shown, the ground layer 35 and the power layer 33 are disposed opposite to each other with the second insulating layer 34 interposed therebetween. A ground distribution pattern is formed on the ground layer 35. The CPU 11 and the two DRAMs 12 are electrically connected to the ground layer 35.

[0031] The second wiring layer 37 forms another outer surface of the control substrate 30. Figure 4 As shown, the second wiring layer 37 and the ground layer 35 are disposed opposite to each other with the third insulating layer 36 interposed therebetween. A wiring pattern is formed on the second wiring layer 37.

[0032] The first insulating layer 32 , the second insulating layer 34 , and the third insulating layer 36 are formed of an insulator.

[0033] The CPU 11 is a processor that executes various calculation processes. The CPU 11 executes various calculation processes by executing a control program pre-stored in a ROM (not shown) included in the plurality of electronic components.

[0034] For example, CPU 11 executes the control program as Figure 2 The switching processing unit 41 shown functions.

[0035] The switching processing unit 41 switches the operation mode of the image forming apparatus 100 between a normal mode and a power saving mode that consumes less power than the normal mode. In the power saving mode, power supply to some components of the image forming apparatus 100 is stopped.

[0036] Specifically, when the operation mode is the normal mode, the switching processing unit 41 switches the operation mode from the normal mode to the power saving mode when a predetermined transition condition is satisfied.

[0037] For example, the transition condition includes a first transition condition and a second transition condition. When either the first transition condition or the second transition condition is satisfied, the switching processing unit 41 switches the operation mode to the power saving mode. The first transition condition is that a no-operation state in which no operation input is performed on the image forming device 100 continues for more than a predetermined time. The second transition condition is that an input operation of a transition instruction to the power saving mode is performed in the operation display unit 5. In addition, the transition condition may also include conditions different from the above-mentioned conditions.

[0038] Furthermore, when the operation mode is the power saving mode, the switching processing unit 41 switches the operation mode from the power saving mode to the normal mode when a predetermined restoration condition is satisfied.

[0039] For example, the restoration condition includes a first restoration condition and a second restoration condition. When either the first restoration condition or the second restoration condition is satisfied, the switching processing unit 41 switches the operation mode to the normal mode. The first restoration condition is that an image forming job sent from an external information processing device is received. The second restoration condition is that the operation display unit 5 is operated. In addition, the restoration condition may also include conditions different from the above-mentioned conditions.

[0040] When the operation mode is switched from the normal mode to the power saving mode, the switching processing unit 41 inputs the control signal (not shown) of the above content to the power supply unit 6 to stop the power supply to a part of the components of the image forming apparatus 100. In addition, when the operation mode is switched from the power saving mode to the normal mode, the switching processing unit 41 inputs the control signal (not shown) of the above content to the power supply unit 6 to restart the power supply to a part of the components of the image forming apparatus 100.

[0041] The DRAMs 12 are volatile memories, respectively, and the two DRAMs 12 are used as temporary memories (work areas) for various processes executed by the CPU 11 .

[0042] Specifically, the DRAM 12 is LPDDR4 (Low Power Double Data Rate 4). In addition, the DRAM 12 may also be DDR4-SDRAM (Double Data Rate 4 Synchronous Dynamic Random Access Memory) or the like.

[0043] However, as a related art, an electronic device that can reduce power consumption in the power saving mode is known. Specifically, the electronic device in the related art includes a first power supply for supplying power to DRAM 12A and a second power supply for supplying power to DRAM 12B, and when the operation mode of the device is transferred from the normal mode to the power saving mode, the data in DRAM 12A is retained in DRAM 12B, and the power supply of the first power supply is stopped.

[0044] Here, in the image forming apparatus 100, the two DRAMs 12 are powered from the power layer 33 that functions as a reference layer of the first wiring layer 31 in the control substrate 30. In order to apply the related art to the image forming apparatus 100 having such a configuration, it is necessary to divide the power layer 33. However, if the power layer 33 that functions as a reference layer of the first wiring layer 31 is divided, the return path of the current flowing through the first wiring layer 31 becomes discontinuous, and the waveform quality of the signal transmitted in the first wiring layer 31 is degraded.

[0045] In contrast, the image forming apparatus 100 according to the embodiment of the present invention can reduce power consumption in the power saving mode without degrading waveform quality as described below.

[0046] Specifically, each DRAM 12 can switch its operating state between a first state, a second state, and a third state.

[0047] Here, the first state is a state in which data can be retained and data can be read and written. In the first state, a refresh operation for continuously retaining data is periodically performed.

[0048] In addition, the third state is a state in which data can be retained and a state in which data cannot be read or written. In the third state, the refresh action is performed periodically. The third state consumes less power than the first state. The third state is a state called "self-refresh mode" or the like. In addition, the third state can be included in the first state of the present invention.

[0049] In addition, the second state is a state in which data cannot be retained. In the second state, the periodic refresh operation is not performed. The second state consumes less power than the first state and the third state. The second state is a state called "power failure mode" or the like.

[0050] Furthermore, each DRAM 12 can switch a part of its operating state among the first state, the second state, and the third state.

[0051] For example Figure 3 As shown, DRAM 12 is provided with four silicon chips 20. The four silicon chips 20 are arranged in the package of DRAM 12. Each silicon chip 20 constitutes a part of DRAM 12. Each silicon chip 20 is provided with a plurality of storage cells, which can store data. Each silicon chip 20 can make the operation state jump between the first state, the second state and the third state. The silicon chip 20 is an example of the data storage unit of the present invention.

[0052] like Figure 3 As shown, DRAM 12A includes silicon chips 21 to 24. Silicon chips 21 and 22 are connected by data signal lines DA1 (see Figure 3 ) is connected to CPU 11. In addition, silicon chip 23 and silicon chip 24 are connected to CPU 11 by data signal line DA2 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 21 is connected to the CPU 11 by means of the control signal line CO1 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 22 is connected to the CPU 11 by means of the control signal line CO2 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 23 is connected to the CPU 11 by means of the control signal line CO3 (refer to Figure 3) is connected to the CPU 11. In addition, the silicon chip 24 is connected to the CPU 11 by means of the control signal line CO4 (refer to Figure 3 ) is connected to CPU11.

[0053] In addition, if Figure 3 As shown, DRAM 12B includes silicon chips 25 to 28. Silicon chips 25 and 26 are connected to each other by data signal lines DA3 (see Figure 3 ) is connected to CPU 11. In addition, silicon chip 27 and silicon chip 28 are connected to CPU 11 by data signal line DA4 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 25 is connected to the CPU 11 by means of the control signal line CO5 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 26 is connected to the CPU 11 by means of the control signal line CO6 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 27 is connected to the CPU 11 by means of the control signal line CO7 (refer to Figure 3 ) is connected to the CPU 11. In addition, the silicon chip 28 is connected to the CPU 11 by means of the control signal line CO8 (refer to Figure 3 ) is connected to CPU11.

[0054] The control signal lines CO1 to CO8 are used to specify the silicon chip 20 to read or write data. In addition, the control signal lines CO1 to CO8 are used to control the operation state of each silicon chip 20. In addition, the data signal lines DA1 to DA4 are used to send and receive data.

[0055] In addition, if Figure 2 As shown, the control unit 7 includes a jump processing unit 42.

[0056] Specifically, an action control program for causing the CPU 11 of the control unit 7 to function as the jump processing unit 42 is pre-stored in the ROM of the control unit 7. The CPU 11 of the control unit 7 functions as the jump processing unit 42 by executing the action control program stored in the ROM. The jump processing unit 42 may also be composed of an electronic circuit. In addition, the action control program may also be a program for causing a plurality of processors to function as the jump processing unit 42.

[0057] When the operation mode of the image forming apparatus 100 is transferred from the normal mode to the power saving mode, the jump processing unit 42 stores the restoration data used when restoring to the normal mode in a part of the plurality of DRAMs 12, and causes each DRAM 12 that does not store the restoration data to jump from the first state to the second state.

[0058] Furthermore, the jump processing unit 42 causes each silicon chip 20 that does not store the restoration data and is included in the DRAM 12 that stores the restoration data to jump from the first state to the second state.

[0059] Furthermore, the jump processing unit 42 causes each silicon chip 20 storing the restoration data to jump from the first state to the third state.

[0060] For example, when the operation mode of the image forming apparatus 100 is shifted from the normal mode to the power saving mode, the jump processing unit 42 generates the restoration data. For example, the jump processing unit 42 deletes a specific type of data that is determined to be less important in advance, such as cache data, from the data stored in the two DRAMs 12. Furthermore, the jump processing unit 42 generates the restoration data by compressing the remaining data after deleting the specific type of data.

[0061] Furthermore, the jump processing unit 42 determines a storage destination of the generated restoration data. Specifically, the jump processing unit 42 determines any one or more of the eight silicon wafers 20 as the storage destination of the restoration data in a manner that minimizes the number of silicon wafers 20 storing the restoration data based on the amount of the restoration data.

[0062] Furthermore, the jump processing unit 42 stores the restoration data in each of the one or more silicon chips 20 determined as storage destinations.

[0063] The jump processing unit 42 executes a first state jump processing to cause each silicon chip 20 storing the restoration data to jump from the first state to the third state, and causes each silicon chip 20 not storing the restoration data to jump from the first state to the second state.

[0064] In addition, each silicon chip 20 may not be able to jump to the third state. In this case, the jump processing unit 42 may prevent each silicon chip 20 storing the restoration data from jumping from the first state to the third state.

[0065] In addition, each DRAM 12 may have a partially inoperable state. In this case, the jump processing unit 42 may prevent each silicon chip 20 that does not store the restoration data and is included in the DRAM 12 storing the restoration data from jumping from the first state to the second state.

[0066] (Motion Control Processing) Below, refer to Figure 5 , an example of the steps of the motion control process executed by the control unit 7 in the image forming apparatus 100 is described, and the motion control method of the present invention is described. Here, steps S11, S12, ... represent the numbers of the processing steps executed by the control unit 7.

[0067] <Step S11> First, in step S11, the control unit 7 determines whether the transition condition is satisfied.

[0068] Specifically, when either the first transition condition or the second transition condition is satisfied, the control unit 7 determines that the transition condition is satisfied.

[0069] Here, when it is determined that the transition condition is satisfied ("Yes" side of S11), the control unit 7 transfers the process to step S12. If the transition condition is not satisfied ("No" side of S11), the control unit 7 waits for the transition condition to be satisfied in step S11.

[0070] <Step S12> In step S12, the control unit 7 generates the restoration data.

[0071] Specifically, the control unit 7 deletes the specific type of data from the data stored in the two DRAMs 12. Furthermore, the control unit 7 generates the restoration data by compressing the data remaining after the specific type of data is deleted.

[0072] <Step S13> In step S13, the control unit 7 determines the storage destination of the restoration data generated in the process of step S12.

[0073] Specifically, the control unit 7 determines any one or more of the eight silicon wafers 20 as storage destinations for the restoration data based on the amount of the restoration data so as to minimize the number of silicon wafers 20 storing the restoration data.

[0074] <Step S14> In step S14, the control unit 7 stores the restoration data in the storage destination determined in the process of step S13.

[0075] <Step S15> In step S15 , the control unit 7 executes the first state jump process. Here, the process from step S11 to step S15 is an example of a jump process of the present invention, and is executed by the jump processing unit 42 of the control unit 7 .

[0076] Thus, among the eight silicon chips 20 included in the two DRAMs 12, each silicon chip 20 that does not store the restoration data switches to the second state. Moreover, among the eight silicon chips 20, each silicon chip 20 that stores the restoration data switches to the third state. Therefore, the power consumption in the power saving mode of the two DRAMs 12 is suppressed to the necessary minimum.

[0077] Furthermore, after the process of step S15 is executed, the switching processing unit 41 of the control unit 7 switches the operation mode of the image forming apparatus 100 from the normal mode to the power saving mode.

[0078] <Step S16> In step S16 , the control unit 7 determines whether the above-mentioned restoration condition is satisfied.

[0079] Specifically, when either the first restoration condition or the second restoration condition is satisfied, the control unit 7 determines that the restoration condition is satisfied.

[0080] Here, when it is determined that the restoration condition is satisfied ("Yes" side of S16), the control unit 7 transfers the process to step S17. If the restoration condition is not satisfied ("No" side of S16), the control unit 7 waits for the restoration condition to be satisfied in step S16.

[0081] <Step S17> In step S17 , the control unit 7 executes a second state transition process to transition each silicon chip 20 storing the restoration data from the third state to the first state, and to transition each silicon chip 20 not storing the restoration data from the second state to the first state.

[0082] Furthermore, after the process of step S17 is executed, the switching processing unit 41 of the control unit 7 switches the operation mode of the image forming apparatus 100 from the power saving mode to the normal mode using the restoration data.

[0083] Thus, in the image forming apparatus 100, when the operation mode is shifted from the normal mode to the power saving mode, the restoration data is stored in a part of the plurality of DRAMs 12, and each DRAM 12 that does not store the restoration data jumps from the first state to the second state. Thus, the power consumption in the power saving mode can be reduced without dividing the power layer 33. Therefore, compared with the configuration in which the power layer 33 is divided, the power consumption in the power saving mode can be reduced without reducing the waveform quality.

[0084] In addition, the number of DRAMs 12 included in the control unit 7 may be three or more. In addition, the number of silicon chips 20 included in each DRAM 12 only needs to be two or more.

[0085] The scope of the present invention is not limited to the above content, but is defined by the description of the claims, so it can be considered that the embodiments described in this specification are only illustrative, not limiting. Therefore, all changes that do not depart from the scope and limits of the claims, as well as contents that are equivalent to the scope and limits of the claims, are included in the scope of the claims.

Claims

1. An electronic device, characterized in that include: a substrate including a power layer adjacent to the wiring layer; A plurality of DRAMs capable of switching from a first state capable of retaining data to a second state capable of not retaining data and consuming less power than the first state, and receiving power from the power supply layer; as well as The jump processing unit, when the operation mode of the electronic device is transferred from the normal mode to the power saving mode which consumes less power than the normal mode, stores the recovery data used when restoring to the normal mode in a part of the plurality of DRAMs, and causes each DRAM which does not store the recovery data to jump from the first state to the second state.

2. The electronic device according to claim 1, characterized in that: Each of the DRAMs includes a plurality of data storage units that can switch between the first state and the second state. The jump processing unit causes each of the data storage units that does not store the restoration data and is included in the DRAM storing the restoration data to jump from the first state to the second state.

3. The electronic device according to claim 2, characterized in that: Each of the data storage units can jump to a third state that can retain data and consumes less power than the first state, The jump processing unit causes each of the data storage units storing the restoration data to jump from the first state to the third state.

4. The electronic device according to any one of claims 1 to 3, characterized in that: The device includes one or both of an image reading section for reading an image of a document and an image forming section for forming an image on a sheet.

5. A motion control method, the motion control method being executed in an electronic device, the electronic device comprising: a substrate including a power layer adjacent to the wiring layer; And multiple DRAMs, which can jump from a first state in which data can be retained to a second state in which data cannot be retained and which consumes less power than the first state, and receive power from the power supply layer. The action control method is characterized in that it includes the following jump steps: when the action mode of the electronic device is transferred from the normal mode to the power saving mode which consumes less power than the normal mode, the recovery data used when restoring to the normal mode is stored in a part of the multiple DRAMs, and each of the DRAMs that does not store the recovery data jumps from the first state to the second state.

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