Semiconductor device facing vfto disturbance equivalent experimental device and method

Abstract

An equivalent experimental device and method for semiconductor devices disturbed by VFTO, comprising a charging circuit, an experimental circuit and a discharging circuit. The experimental circuit is provided with a semiconductor device to be tested, an electric signal detection device is installed at the semiconductor device to be tested, and a converter valve submodule simulation module and an experimental discharge module are connected in parallel. The capacitive device of the converter valve submodule simulation module is connected in parallel with the charging circuit and the discharging circuit respectively; and the experimental discharge module is connected in parallel with the charging circuit and the discharging circuit. Through the experimental topology, an effective experimental device is built, and through the corresponding experimental method, the voltage waveform of the equivalent VFTO waveform can be generated at both ends of the semiconductor device, which is convenient for studying the device characteristics of different semiconductor devices under the VFTO working condition, solving the demand of engineering application for experiments, and the overall structure is simple, low in cost and convenient to build.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of microelectronics, in particular to an equivalent experimental device for semiconductor devices disturbed by VFTO and an experimental method thereof. BACKGROUND

[0002] Very fast transient overvoltage (hereinafter referred to as: VFTO) refers to a transient overvoltage with a wave front time in the range of 3-100 ns. It seriously affects the stable operation of the power system due to its characteristics of high amplitude (up to several times the rated voltage), high frequency (up to hundreds of kHz to several MHz) and extremely short duration (a few nanoseconds to a few microseconds).

[0003] For VFTO related problems, various ways such as high voltage level experiment and digital simulation are generally used for research. A common way is to use electromagnetic simulation software EMTP to build a GIS wideband model to simulate and obtain the GIS bus outgoing end port voltage. In a specific example, a UHV GIS device VFTO test loop capable of generating relatively severe VFTO is established in a UHV AC test base. A large-scale GIS disconnector operation test is carried out in the VFTO test loop of the UHV GIS device, and the VFTO measurement results are statistically analyzed. The waveform characteristics of the VFTO waveform, the breakdown times, the frequency components and the residual voltage distribution, the waveform characteristics of the single breakdown waveform and the oscillation coefficient distribution are obtained, and the VFTO characteristics of the UHV GIS are more comprehensively mastered. In another example, a VFTO simulation generator is used to generate an abrupt wave voltage superimposed with a single frequency damped oscillation wave to simulate VFTO. By adjusting the loop capacitance and inductance parameters, a VFTO generating device with an amplitude of 2.5 kV is developed.

[0004] Therefore, the existing technology for VFTO research can be summarized into two categories. One category focuses on digital modeling and simulation of GIS. The other category is to build a high voltage level experimental loop, actually operate the disconnector, and measure the GIS outgoing end port voltage waveform. Some research teams also simulate VFTO by using an abrupt wave generator plus a damped oscillation wave. In the above research on VFTO, the VFTO waveform at the GIS outgoing end port is basically measured, and the influence of VFTO on subsequent converter valve devices is not further studied. In the existing offshore converter platform, there are engineering cases where VFTO invades the converter valve sub-module, causing damage to the semiconductor devices in the converter valve sub-module. Engineering practice forces technical personnel to study the semiconductor devices in the converter valve under VFTO conditions.

[0005] However, there is no simulation experimental device and method for studying the VFTO entering the converter valve at present, so the influence of the VFTO on the sub-module device and the voltage waveform at the sub-module port are not recorded experimentally.

[0006] Therefore, the existing VFTO experimental device needs to be improved to better simulate the influence of the VFTO on the sub-module device of the converter valve in reality, so as to better predict the influence in the real situation and guide the design of specific devices. SUMMARY

[0007] The technical problem to be solved by the present application is to provide an equivalent experimental device and control method for the semiconductor device disturbed by the VFTO.

[0008] The present application adopts the following technical solutions to solve the above technical problems:

[0009] In one aspect, the present application provides an equivalent experimental device for the semiconductor device disturbed by the VFTO, comprising a charging circuit, an experimental circuit and a discharging circuit.

[0010] The charging circuit is provided with a first charging circuit and a second charging circuit; the first charging circuit is provided with a first DC power supply and a first charging switch; and the second charging circuit is provided with a second DC power supply and a second charging switch.

[0011] The experimental circuit is provided with a semiconductor device to be tested, and the semiconductor device to be tested is installed with an electric signal detection device; the semiconductor device to be tested is connected in parallel with a converter valve sub-module simulation module; and the semiconductor device to be tested is also connected in parallel with an experimental discharging module.

[0012] The discharging circuit is provided with a first discharging circuit and a second discharging circuit; the first discharging circuit is provided with a first discharging load and a first discharging switch; and the second discharging circuit is provided with a second discharging load and a second discharging switch.

[0013] The capacitive device of the converter valve sub-module simulation module is connected in parallel with the first charging circuit and the first discharging circuit, respectively.

[0014] The experimental discharging module is provided with a discharging capacitor and a charging capacitor, and the discharging capacitor is connected with the charging capacitor; the discharging capacitor is connected with the experimental circuit; and the charging capacitor is connected in parallel with the second charging circuit and the second discharging circuit, respectively.

[0015] Optionally, the electric signal detection device comprises a differential probe and a Rogowski coil.

[0016] The electric signal detection device is connected with an oscilloscope.

[0017] Optionally, the converter valve sub-module simulation module is provided with an adjusting inductor and an adjusting capacitor.

[0018] The adjusting capacitor is connected in parallel with the first charging circuit and the first discharging circuit respectively.

[0019] Optionally, the adjusting inductor is a micro Henry inductor, and the adjusting capacitor is a micro Farad capacitor.

[0020] Optionally, the charging capacitor is connected in series with a maintaining resistor, and forms a loop with the discharging capacitor.

[0021] The discharging capacitor is connected in parallel with the semiconductor device to be tested.

[0022] The experimental circuit is provided with an isolation switch.

[0023] Optionally, the charging capacitor is a micro Farad capacitor, and the discharging capacitor is a pico Farad capacitor.

[0024] The maintaining resistor has a resistance value ranging from 50kΩ to 150kΩ.

[0025] Optionally, the first discharging load and the second discharging load are both resistors.

[0026] The first discharging load has a resistance value ranging from 1100Ω to 2100Ω.

[0027] The second discharging load has a resistance value ranging from 1800Ω to 2500Ω.

[0028] Optionally, the semiconductor device to be tested is an insulated gate bipolar transistor, a thyristor or a parallel diode.

[0029] Optionally, the experimental state of the semiconductor device to be tested is a blocking state.

[0030] In another aspect, the application further provides an equivalent experimental method for a semiconductor device disturbed by VFTO, and main steps of the method include:

[0031] S1, charging a capacitive device and a charging capacitor of a converter valve sub-module simulation module through a charging circuit, and disconnecting the charging circuit when a charging voltage reaches a target voltage;

[0032] S2, closing an experimental circuit, and recording a power-on waveform of a semiconductor device to be tested through an electric signal detection device;

[0033] S3, disconnecting the experimental circuit, and closing a discharging circuit to discharge the capacitive device and the charging capacitor of the converter valve sub-module simulation module.

[0034] Compared with the prior art, the application has the following technical effects:

[0035] The application builds an effective experimental device through an experimental topology, and can generate a voltage waveform of an equivalent VFTO waveform at two ends of a semiconductor device through a corresponding control method, so as to facilitate research on device characteristics of different semiconductor devices under a VFTO working condition, and solve the demand of engineering application for experiments. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor under the premise of the drawings.

[0037] Figure 1 is a simplified circuit diagram of the equivalent experimental device in the present application;

[0038] Figure 2 is a control method flow chart in the present application;

[0039] Figure 3 is a graph of experimental measurement of voltage and current waveforms at two ends of a thyristor in embodiment 1 of the present application. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the following will combine the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0041] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0042] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connection" and the like should be understood broadly, for example, can be fixed connection, or detachable connection, or integral; can be directly connected, or indirectly connected through an intermediate medium; can be internal communication of two elements or interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0043] It should be noted that the method used in the present application is a conventional method unless otherwise specified; the raw materials and devices used are conventional commercially available products unless otherwise specified.

[0044] In one aspect, the embodiment provides an equivalent experimental device for semiconductor devices disturbed by VFTO (hereinafter referred to as device), which is shown in Figure 1 , mainly including a charging circuit, an experimental circuit and a discharging circuit.

[0045] Take the setting direction in Figure 1 as an example for illustration, wherein the charging circuit is a circuit arranged on the left and right sides, specifically including a first charging circuit. The first charging circuit is provided with a first DC power supply U SM and a first charging switch S1 connected in series; the second charging circuit is provided with a second DC power supply U0 and a second charging switch S2. Preferably, the first and second charging switches are vacuum contactors, which are controlled by a controller to control the opening or closing of the respective circuits.

[0046] The experimental circuit is the middle part, which is installed with a semiconductor device to be tested, which can be an insulated gate bipolar transistor or a thyristor. In the present embodiment, as shown in Figure 1 , the semiconductor device to be tested is a thyristor T, and the experimental state is kept in a blocking state. The left side of the thyristor is connected in parallel with a converter valve sub-module simulation module, and the right side is connected in parallel with an experimental discharge module.

[0047] Specifically, the converter valve sub-module simulation module of the present embodiment is provided with an adjusting inductor L SM and an adjusting capacitor C SM , which are connected in series, and the first charging circuit is connected in parallel across the capacitive device of the module, i.e. the adjusting capacitor C SM . Preferably, the adjusting capacitor C SM is selected as a microfarad capacitor, with a capacity range of 0.1 μF-22000 μF, which is used to simulate the converter valve sub-module capacitor; correspondingly, the adjusting inductor is selected as a microhenry inductor, with an inductance range of 1 μH-820 μH, which is used to adjust the oscillation frequency of the circuit.

[0048] Furthermore, the experimental discharge module includes a discharge capacitor C1 and a charging capacitor C0. Discharge capacitor C1 and charging capacitor C0 are connected to form a branch circuit within the module, and a holding resistor R is connected in series in this circuit. The discharge capacitor C1 is a picofarad capacitor with a capacitance range of 10pF-1000pF; the charging capacitor C0 is also a microfarad capacitor, used to maintain the voltage stability of the discharge capacitor C1 before closing the circuit. Correspondingly, the resistance value of the holding resistor R ranges from 50kΩ to 150kΩ, preferably 100kΩ. The charging capacitor C0 discharges a small current to the discharge capacitor C1 through the holding resistor R, maintaining the voltage across the discharge capacitor C1. The discharge capacitor C1 is connected in parallel with the thyristor T, and an isolating switch S is provided in the experimental circuit to control the circuit switching. Preferably, the isolating switch S is an air isolating switch, and the arc breakdown time during closing is tens of nanoseconds, which can simulate the rising edge of VFTO.

[0049] An electrical signal detection device is mounted on the thyristor T; preferably, in this embodiment, the electrical signal detection device includes a differential probe and a Rogowski coil, and is externally connected to an oscilloscope. The differential probe is used to measure the voltage u. T Rogowski coils are used to measure current i T An oscilloscope is used to display and record waveforms (including corresponding measurement parameters).

[0050] The discharge circuit is equipped with a first discharge circuit ( Figure 1 Left end) and second discharge circuit ( Figure 1 (Right end). The first discharge circuit includes a first discharge load and a first discharge switch S3. Preferably, the first discharge load is a regulating capacitor discharge resistor R. E2 Its resistance range is 1100Ω-2100Ω; the second discharge circuit is provided with a second discharge load and a second discharge switch S4, preferably the second discharge load is the discharge resistor R of the charging capacitor. E1 Its resistance range is 1800Ω-2500Ω. Furthermore, based on the above parameter selection, this embodiment uses the same resistance value for both resistors, 2000Ω. Both the first and second discharge switches are selected as vacuum contactors. Therefore, the first discharge circuit and the regulating capacitor C are designed. SM The second discharge circuit is connected in parallel with the charging capacitor C0.

[0051] On the other hand, such as Figure 2 As shown, this embodiment also provides an experimental method based on the above-described equivalent experimental apparatus for addressing VFTO interference in semiconductor devices. The main steps of this method include:

[0052] S1. Charge the capacitive devices and charging capacitors of the converter valve submodule simulation module through the charging circuit respectively. When the charging voltage reaches the target voltage, disconnect the charging circuit.

[0053] S2, close the experimental circuit, and record the power-on waveform of the semiconductor device to be tested by the electric signal detection device;

[0054] S3, disconnect the experimental circuit, and close the discharge circuit to discharge the capacitive device and the charging capacitor of the thyristor sub-module simulation module.

[0055] Embodiment 1; on the basis of the above, the specific experimental operation is carried out, and the steps are as follows:

[0056] Disconnect all switches before the experiment;

[0057] S1, close the first charging switch S1 and the second charging switch S2; the first and second DC power supplies charge the regulating capacitor C SM and the charging capacitor C0 through two charging circuits respectively, and when the charging voltage reaches the target voltage, disconnect the first charging switch S1 and the second charging switch S2;

[0058] S2, adjust the oscilloscope trigger, close the isolation switch S, and read the voltage u T and the current i T waveforms across the thyristor T through the oscilloscope of the electric signal detection device, and obtain the experimental results as shown in Figure 3 The rising edge dv / dt of the voltage across the thyristor is 100 kV / μs, the amplitude reaches 3.5 p.u., and the frequency reaches 10 MHz, which meets the equivalent requirements of VFTO;

[0059] S3, disconnect the isolation switch S after recording is completed, and close the first discharge switch S3 and the second discharge switch S4 to discharge the regulating capacitor C SM and the charging capacitor C0;

[0060] Disconnect all switches after the discharge is completed, and the experiment is ended.

[0061] The above only describes the preferred embodiments of the present application, and it should be noted that for ordinary skilled in the art, without departing from the technical principles of the present application, a number of improvements and modifications can be made, and these improvements and modifications should be considered as the protection scope of the present application.

Claims

1. An equivalent experimental setup for semiconductor devices subjected to VFTO interference, characterized in that, Includes charging circuit, experimental circuit, and discharging circuit; The charging circuit includes a first charging circuit and a second charging circuit; the first charging circuit includes a first DC power supply and a first charging switch; the second charging circuit includes a second DC power supply and a second charging switch. The experimental circuit is equipped with a semiconductor device to be tested, and an electrical signal detection device is installed at the semiconductor device to be tested; a converter valve submodule simulation module is connected in parallel to the semiconductor device to be tested; and an experimental discharge module is also connected in parallel to the semiconductor device to be tested. The discharge circuit includes a first discharge circuit and a second discharge circuit; the first discharge circuit includes a first discharge load and a first discharge switch; the second discharge circuit includes a second discharge load and a second discharge switch. The capacitive devices of the converter valve submodule simulation module are connected in parallel with the first charging circuit and the first discharging circuit, respectively. The experimental discharge module is equipped with a discharge capacitor and a charging capacitor, the discharge capacitor being connected to the charging capacitor; the discharge capacitor being connected to the experimental circuit; and the charging capacitor being connected in parallel with both the second charging circuit and the second discharge circuit. The charging capacitor is connected in series with a holding resistor and forms a circuit with the discharging capacitor. The discharge capacitor is connected in parallel with the semiconductor device under test; The experimental circuit is equipped with an isolating switch.

2. The equivalent experimental apparatus for treating VFTO interference in semiconductor devices according to claim 1, characterized in that, The electrical signal detection device includes a differential probe and a Rogowski coil; The electrical signal detection device is externally connected to an oscilloscope.

3. The equivalent experimental apparatus for treating VFTO interference in semiconductor devices according to claim 1, characterized in that, The converter valve submodule simulation module is equipped with an adjustable inductor and an adjustable capacitor; The regulating capacitor is connected in parallel with the first charging circuit and the first discharging circuit, respectively.

4. The equivalent experimental apparatus for treating VFTO interference in semiconductor devices according to claim 3, characterized in that, The regulating inductor is a microhenry inductor; the regulating capacitor is a microfarad capacitor.

5. The equivalent experimental apparatus for VFTO interference in semiconductor devices according to claim 1, characterized in that, The charging capacitor is a microfarad capacitor, and the discharging capacitor is a picofarad capacitor; The resistance value of the sustaining resistor is in the range of 50kΩ-150kΩ.

6. The equivalent experimental apparatus for VFTO interference in semiconductor devices according to claim 1, characterized in that, Both the first discharge load and the second discharge load are resistors; The resistance of the first discharge load is in the range of 1100Ω-2100Ω; The resistance of the second discharge load ranges from 1800Ω to 2500Ω.

7. The equivalent experimental apparatus for treating VFTO interference in semiconductor devices according to claim 1, characterized in that, The semiconductor device to be tested is an insulated gate bipolar transistor, a thyristor, or a parallel diode.

8. The equivalent experimental apparatus for VFTO interference in semiconductor devices according to claim 7, characterized in that, The experimental state of the semiconductor device under test is the blocking state.

9. An equivalent experimental method based on the equivalent experimental apparatus for semiconductor devices subjected to VFTO interference as described in claim 1, characterized in that the steps are as follows: include: S1. Charge the capacitive devices and charging capacitors of the converter valve submodule simulation module through the charging circuit respectively. When the charging voltage reaches the target voltage, disconnect the charging circuit. S2. Close the experimental circuit and record the energized waveform of the semiconductor device under test through an electrical signal detection device; S3. Disconnect the experimental circuit and close the discharge circuit to discharge the capacitive devices and the charging capacitor of the converter valve submodule simulation module.

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