A performance testing method and system for pressure-resistant, moisture-resistant and moisture-proof chip capacitors

Abstract

The present invention discloses a performance testing method and system for a pressure-resistant moisture-resistant patch capacitor, and relates to the technical field of patch capacitor performance testing. The performance testing method for the pressure-resistant moisture-resistant patch capacitor comprises the following steps: collecting initial performance data; performing performance analysis; and comprehensively evaluating performance. The present invention collects initial performance data obtained by a performance test of a patch capacitor, and pre-processes the initial performance data to obtain first performance data, then performs a performance analysis on the patch capacitor based on the first performance data to obtain a performance evaluation index, and then performs a comprehensive evaluation on the patch capacitor based on the performance evaluation index to obtain a comprehensive performance evaluation index, and finally performs a comprehensive grading of the patch capacitor based on the comprehensive evaluation result to obtain a grading result, thereby achieving the effect of improving the correlation between the performance of the patch capacitor and the performance test result, and solving the problem of low correlation between the performance of the patch capacitor and the performance test result in the prior art.

Description

[0001] This application is a divisional application of the application filed on August 30, 2024, with application number 202411028571.6 and invention name “A performance testing method and system for pressure-resistant, moisture-resistant and moisture-proof chip capacitors”. Technical Field

[0002] The present invention relates to the technical field of chip capacitor performance testing, and in particular to a performance testing method and system for a pressure-resistant, moisture-resistant, and moisture-proof chip capacitor. Background Art

[0003] With the continuous development of electronic technology, chip capacitors have become an indispensable part of modern electronic devices. The full name of chip capacitors is multi-layer (laminated, stacked) chip ceramic capacitors, also known as chip capacitors and chip capacitors. They are an electronic component widely used in electronic devices. Their main function is to store charge and adjust the frequency of the circuit. Chip capacitors are made of ceramic dielectric diaphragms with printed electrodes (inner electrodes) stacked in a staggered manner. After a one-time high-temperature sintering to form a ceramic chip, a metal layer (outer electrode) is sealed at both ends of the chip to form a monolithic structure, so it is also called a monolithic capacitor. It occupies an important position in modern electronic devices with its miniaturization, high performance, low cost and high reliability.

[0004] The existing performance test system for chip capacitors achieves a comprehensive evaluation of the performance of chip capacitors through a variety of methods such as digital capacitance testers, digital bridges, impedance tests, temperature tests, reliability tests, and dielectric strength tests. These test methods and technical means provide important guarantees for the design and production of electronic products, ensuring the stable and reliable operation of chip capacitors in circuits.

[0005] For example, a method for detecting failure of a patch capacitor disclosed in a patent application with publication number CN115901781A includes: step S1: multimeter detection method, when detecting the capacitor by a multimeter, first disconnect one end of the capacitor from the original circuit, and then disconnect the capacitor from the original circuit when detecting by a multimeter, and measure its resistance value, which should be infinite. When measuring with the ×10k block of the pointer meter, the capacitor pointer of about 0.1μF has a jumping phenomenon, and returns to infinity after being stationary. If a fixed resistance value is measured, it indicates that the capacitor is damaged, otherwise it indicates that the capacitor is normal. The present invention can effectively improve the detection efficiency of the patch capacitor by cooperating the appearance detection method with the power-on detection. During the detection process, the appearance detection equipment is first used to determine whether the appearance of the patch capacitor is damaged. If it is damaged, it is directly detected by the power-on detection method. Otherwise, it can be directly detected by the multimeter, thereby achieving the efficiency of its detection.

[0006] For example, the invention patent with announcement number: CN111982914B announces a method for detecting hidden cracks inside a chip capacitor, which includes the following steps: S1. Select four side surfaces of the chip capacitor except the two end surfaces in the length direction, and use two as a group as grinding surfaces; S2. Place the chip capacitor on a positioning and clamping mechanism, clamp the two end surfaces of the chip capacitor in the length direction by the positioning and clamping mechanism, stably fix the chip capacitor, and expose any two opposite side surfaces thereof. This method for detecting hidden cracks inside the chip capacitor is different from the prior art, and thus, in real-time use, saves the time for inlaying the chip capacitor and effectively avoids the disadvantages of single-sided grinding. The real-time clamping and fixing of the chip capacitor is convenient, and at the same time, the synchronous grinding of two side surfaces as a group further improves the grinding efficiency of the chip capacitor, thereby ensuring accurate, convenient and efficient dark crack detection of the chip capacitor.

[0007] However, in the process of implementing the technical solution of the invention in the embodiments of the present application, the present application found that the above technology has at least the following technical problems:

[0008] In the prior art, the performance tests of chip capacitors include but are not limited to pressure resistance tests and moisture resistance tests. The specific testing process is complicated and lacks unified testing standards and procedures. Different testing methods and standards may lead to differences in test results, making it difficult to conduct horizontal comparisons and evaluations. There is a problem of low correlation between the performance of chip capacitors and performance test results. Summary of the invention

[0009] The embodiments of the present application solve the problem of low correlation between the performance of the patch capacitor and the performance test results in the prior art by providing a performance testing method and system for a pressure-resistant, moisture-resistant and moisture-proof chip capacitor, thereby improving the correlation between the performance of the chip capacitor and the performance test results.

[0010] The embodiment of the present application provides a performance testing method for a pressure-resistant, moisture-resistant and humidity-proof chip capacitor, comprising the following steps: S1, obtaining initial performance data obtained by a performance test of the chip capacitor, and preprocessing the initial performance data to obtain first performance data, wherein the performance test is used to evaluate the comprehensive performance of the chip capacitor, and the initial performance data includes initial pressure performance data and initial moisture-resistant and humidity-proof performance data; S2, performing a performance analysis on the chip capacitor according to the first performance data to obtain a performance evaluation index, wherein the performance evaluation index includes a pressure-resistant performance evaluation index and a moisture-resistant and humidity-proof performance evaluation index, wherein the pressure-resistant performance evaluation index is used to evaluate the performance stability of the chip capacitor under different pressures, and the moisture-resistant and humidity-proof performance evaluation index is used to evaluate the performance stability of the chip capacitor under different humidity and temperature conditions; S3, performing a comprehensive evaluation on the chip capacitor according to the performance evaluation index to obtain a comprehensive performance evaluation index, and performing a comprehensive grading of the chip capacitor according to the comprehensive evaluation result to obtain a grading result, wherein the comprehensive performance evaluation index is used to comprehensively quantify the pressure-resistant, moisture-resistant and humidity-proof performance of the chip capacitor.

[0011] Furthermore, the performance test includes a pressure performance test and a moisture resistance and humidity proof performance test; the pressure performance test means recording the initial pressure performance data of the chip capacitor through a data acquisition device to evaluate the performance of the chip capacitor when subjected to different pressures, and the data acquisition device includes an LCR meter and a leakage current tester; the moisture resistance and humidity proof performance test means recording the initial moisture resistance and humidity proof performance data of the chip capacitor through a data acquisition device to evaluate the performance of the chip capacitor under different humidity and temperature conditions.

[0012] Furthermore, the specific steps of the preprocessing are as follows: obtaining first initial performance data by performing outlier removal processing, the first initial performance data represents the data after the initial performance data is processed by removing outliers; obtaining second initial performance data by performing missing value filling processing, the second initial performance data represents the data after the first initial performance data is processed by filling missing values; obtaining first performance data by performing data interpolation processing, the first performance data represents the data after the second initial performance data is processed by data interpolation processing.

[0013] Furthermore, the specific process of the compressive performance analysis is: obtaining first pressure performance data from the first performance data, and obtaining a compressive performance evaluation index based on the first pressure performance data, wherein the first pressure performance data represents the pressure value and the corresponding capacitance response recorded when the pressure performance test of the chip capacitor is performed under different pressures; the specific process of the moisture and moisture resistance performance analysis is: obtaining first moisture and moisture resistance performance data from the first performance data, and obtaining a moisture and moisture resistance performance evaluation index based on the first moisture and moisture resistance performance data, wherein the first moisture and moisture resistance performance data includes the humidity value, temperature value and corresponding capacitance response recorded when the moisture and moisture resistance performance test of the chip capacitor is performed under different humidity and temperature conditions.

[0014] Furthermore, the specific method for obtaining the compressive performance evaluation index is as follows: obtaining a first capacitance standard deviation according to the first pressure performance data, the first capacitance standard deviation is used to evaluate the stability of the capacitance value of the patch capacitor under different pressures; obtaining a first leakage current standard deviation according to the first pressure performance data, the first leakage current standard deviation is used to evaluate the stability of the leakage current of the patch capacitor under different pressures; obtaining a first weight from a preset database, and calculating the compressive performance evaluation index in combination with the first capacitance standard deviation and the first leakage current standard deviation, the first weight includes a first capacitance stability weight and a first leakage current stability weight, and the compressive performance evaluation index is calculated using the following formula:

[0015]

[0016] Where CPAI is the compressive performance evaluation index, e represents a natural constant, ω c1 is the first capacitance value stability weight, CVSC1 is the first capacitance value standard deviation, CVSC 1,max is the reference maximum value of the standard deviation of the first capacitance value, ω l1 is the first leakage current stability weight, LSC1 is the first leakage current standard deviation, LSC 1,max The reference maximum value of the first leakage current standard deviation

[0017] Furthermore, the specific method for obtaining the moisture resistance and moisture proof performance evaluation index is as follows: obtaining a second capacitance standard deviation according to the first moisture resistance and moisture proof performance data, the second capacitance standard deviation is used to evaluate the stability of the capacitance value of the patch capacitor under different humidity and temperature conditions; obtaining a second leakage current standard deviation according to the first moisture resistance and moisture proof performance data, the second leakage current standard deviation is used to evaluate the stability of the leakage current of the patch capacitor under different humidity and temperature conditions; obtaining a second weight from a preset database, and calculating the moisture resistance and moisture proof performance evaluation index in combination with the second capacitance standard deviation and the second leakage current standard deviation, the second weight includes a second capacitance stability weight and a second leakage current stability weight, and the moisture resistance and moisture proof performance evaluation index is calculated using the following formula:

[0018]

[0019] Where MPAI is the moisture resistance and moisture resistance performance evaluation index, e represents the natural constant, ω c2 is the second capacitance value stability weight, CVSC2 is the second capacitance value standard deviation, CVSC 2,max is the reference maximum value of the standard deviation of the second capacitance value, ω l2 is the second leakage current stability weight, LSC2 is the second leakage current standard deviation, LSC 2,max is the reference maximum value of the first leakage current standard deviation.

[0020] Furthermore, the specific process of the comprehensive evaluation is as follows: obtaining the weight distribution factor corresponding to the compressive performance evaluation index and the moisture resistance and moisture proof performance evaluation index from a preset database, wherein the weight distribution factor includes the compressive performance evaluation weight and the moisture resistance and moisture proof performance evaluation weight; obtaining the comprehensive performance evaluation index according to the weight distribution factor, the compressive performance evaluation index and the moisture resistance and moisture proof performance evaluation index, wherein the comprehensive performance evaluation index is calculated using the following formula:

[0021] OAI=log2(1+CPAI*ω P +MPAI*ω m );

[0022] In the formula, OAI is the comprehensive performance evaluation index, CPAI is the compression performance evaluation index, ω P is the weight for compressive performance evaluation, MPAI is the moisture resistance and moisture resistance evaluation index, ω m Weights for evaluating moisture and humidity resistance.

[0023] Furthermore, the specific process of the comprehensive grade classification is as follows: obtain the grade classification standard corresponding to the comprehensive performance evaluation index; classify the chip capacitor according to the comprehensive performance evaluation index and the grade classification standard to obtain a grade classification result, and the grade classification means obtaining the corresponding grade classification result based on the numerical range of comparing the comprehensive performance evaluation index and the grade classification standard to evaluate the grade corresponding to the comprehensive performance of the chip capacitor.

[0024] Furthermore, it also includes data visualization: obtaining a performance evaluation index, a comprehensive performance evaluation index and a grade division result and transmitting them to a preset performance test database; using a data visualization tool to display the performance evaluation index, the comprehensive performance evaluation index and the grade division result in a chart to obtain a chip capacitor performance graph, wherein the chip capacitor performance graph is used to reflect the performance stability of the chip capacitor and the corresponding grade division result.

[0025] The embodiment of the present application provides a performance testing system for a compressive, moisture-resistant and moisture-proof chip capacitor, comprising a data collection module, a performance analysis module and a comprehensive evaluation module; wherein the data collection module is used to collect initial performance data obtained by a performance test of the chip capacitor, and pre-process the initial performance data to obtain first performance data, the performance test is used to evaluate the comprehensive performance of the chip capacitor, and the initial performance data includes initial pressure performance data and initial moisture-resistant and moisture-proof performance data; the performance analysis module is used to perform a performance analysis on the chip capacitor according to the first performance data to obtain a performance evaluation index, the performance evaluation index includes a compressive performance evaluation index and a moisture-resistant and moisture-proof performance evaluation index, the compressive performance evaluation index is used to evaluate the performance stability of the chip capacitor under different pressures, and the moisture-resistant and moisture-proof performance evaluation index is used to evaluate the performance stability of the chip capacitor under different humidity and temperature conditions; the comprehensive evaluation module is used to perform a comprehensive evaluation on the chip capacitor according to the performance evaluation index to obtain a comprehensive performance evaluation index, and the chip capacitor is comprehensively graded according to the comprehensive evaluation result to obtain a grade classification result, and the comprehensive performance evaluation index is used to comprehensively quantify the compressive, moisture-resistant and moisture-proof performance of the chip capacitor.

[0026] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0027] 1. Initial performance data obtained by performance testing of chip capacitors is collected and preprocessed to obtain first performance data, and then a performance analysis is performed on the chip capacitors based on the first performance data to obtain a performance evaluation index, and then a comprehensive evaluation is performed on the chip capacitors based on the performance evaluation index to obtain a comprehensive performance evaluation index, and finally, the chip capacitors are comprehensively graded based on the comprehensive evaluation results to obtain a grade classification result, thereby achieving efficient use of the performance test data of the chip capacitors, and further achieving an improvement in the correlation between the performance of the chip capacitors and the performance test results, effectively solving the problem of low correlation between the performance of the chip capacitors and the performance test results in the prior art.

[0028] 2. By extracting the first pressure performance data from the first performance data and obtaining the first capacitance value standard deviation and the first leakage current standard deviation corresponding to the first pressure performance data, a compressive performance evaluation index is obtained according to the first capacitance value standard deviation and the first leakage current standard deviation. Finally, the performance stability of the chip capacitor under different pressures is evaluated through the obtained compressive performance evaluation index, thereby realizing the digitization of the compressive performance of the chip capacitor, and then realizing a more accurate evaluation of the compressive performance of the chip capacitor.

[0029] 3. By extracting the first moisture and humidity resistance performance data from the first performance data, and obtaining the second capacitance value standard deviation and the second leakage current standard deviation corresponding to the first moisture and humidity resistance performance data, a moisture and humidity resistance performance evaluation index is obtained according to the second capacitance value standard deviation and the second leakage current standard deviation, and finally the performance stability of the chip capacitor under different humidity and temperature conditions is evaluated by the obtained moisture and humidity resistance performance evaluation index, thereby realizing the digitization of the moisture and humidity resistance performance of the chip capacitor, and then realizing a more accurate evaluation of the moisture and humidity resistance performance of the chip capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A flow chart of a performance testing method for a pressure-resistant, moisture-resistant, and moisture-proof chip capacitor provided in an embodiment of the present application;

[0031] Figure 2 A flowchart of preprocessing provided in an embodiment of the present application;

[0032] Figure 3 A flowchart for obtaining a comprehensive performance evaluation index provided in an embodiment of the present application;

[0033] Figure 4 A schematic diagram of the changes in the comprehensive performance evaluation index provided in the embodiment of the present application;

[0034] Figure 5 A schematic diagram of the structure of a performance testing system for a pressure-resistant, moisture-resistant, and moisture-proof chip capacitor provided in an embodiment of the present application. DETAILED DESCRIPTION

[0035] The embodiment of the present application solves the problem of low correlation between the performance of the patch capacitor and the performance test results in the prior art by providing a performance testing method and system for a pressure-resistant, moisture-resistant and moisture-proof chip capacitor. The method collects initial performance data obtained by performance testing the patch capacitor, pre-processes the initial performance data to obtain first performance data, and then performs performance analysis on the patch capacitor based on the first performance data to obtain a performance evaluation index. The patch capacitor is then comprehensively evaluated based on the performance evaluation index to obtain a comprehensive performance evaluation index. Finally, the patch capacitor is comprehensively graded based on the comprehensive evaluation result to obtain a grade classification result. The performance evaluation index, the comprehensive performance evaluation index and the grade classification result are displayed in the form of a chart through a data visualization tool, thereby achieving an improvement in the correlation between the performance of the patch capacitor and the performance test results.

[0036] The technical solution in the embodiment of the present application is to solve the problem that the performance of the above-mentioned chip capacitor has a low correlation with the performance test results. The overall idea is as follows:

[0037] The performance of the chip capacitor is analyzed through the first performance data to obtain a performance evaluation index, and then the chip capacitor is comprehensively evaluated based on the performance evaluation index to obtain a comprehensive performance evaluation index. Finally, the chip capacitor is comprehensively graded based on the comprehensive evaluation result to obtain a grade classification result, thereby achieving the effect of improving the correlation between the performance of the chip capacitor and the performance test result.

[0038] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0039] like Figure 1 As shown, it is a flow chart of a performance testing method for a pressure-resistant, moisture-resistant and moisture-proof chip capacitor provided in an embodiment of the present application, the method comprising the following steps: S1, obtaining initial performance data obtained by a performance test of the chip capacitor, and preprocessing the initial performance data to obtain first performance data, the performance test is used to evaluate the comprehensive performance of the chip capacitor, and the initial performance data includes initial pressure performance data and initial moisture-resistant and moisture-proof performance data; S2, performing a performance analysis on the chip capacitor according to the first performance data to obtain a performance evaluation index, the performance evaluation index includes a pressure-resistant performance evaluation index and a moisture-resistant and moisture-proof performance evaluation index, the pressure-resistant performance evaluation index is used to evaluate the performance stability of the chip capacitor under different pressures, and the moisture-resistant and moisture-proof performance evaluation index is used to evaluate the performance stability of the chip capacitor under different humidity and temperature conditions; S3, performing a comprehensive evaluation on the chip capacitor according to the performance evaluation index to obtain a comprehensive performance evaluation index, performing a comprehensive grading of the chip capacitor according to the comprehensive evaluation result to obtain a grading result, and the comprehensive performance evaluation index is used to comprehensively quantify the pressure-resistant, moisture-resistant and moisture-proof performance of the chip capacitor.

[0040] In this embodiment, the initial pressure performance data is obtained by testing the chip capacitor when different pressures are applied. These data reflect the performance of the chip capacitor under different pressure conditions, and may specifically include but are not limited to the capacitance value, leakage current, resistance value, failure condition and other indicators of the chip capacitor under different pressure values. These data are an important basis for evaluating the compressive performance of the chip capacitor; the initial moisture and humidity resistance performance data is obtained by testing the chip capacitor under different humidity levels. These data include capacitance value, leakage current, insulation resistance, dielectric loss, failure condition and humidity recovery and other indicators, which comprehensively reflect the performance stability and moisture resistance of the chip capacitor in a humid environment; the first performance data represents the corresponding data obtained by preprocessing the initial performance data, and the first performance data includes the first pressure performance data and the first moisture and humidity resistance performance data. The first pressure performance data refers to a specific set of values ​​reflecting the performance stability and performance of the chip capacitor under different pressure conditions after preprocessing, including capacitance value and leakage current; the first moisture and humidity resistance performance data refers to a specific set of values ​​reflecting the moisture and humidity resistance of the chip capacitor after testing it under different humidity environments, including capacitance value and leakage current; the correlation between the performance of the chip capacitor and the performance test results is improved.

[0041] Further, such as Figure 2 As shown, it is a flowchart of the preprocessing provided in an embodiment of the present application, in which the first initial performance data is obtained by performing an outlier removal process, and the first initial performance data represents the data after the initial performance data is processed by removing outliers; the second initial performance data is obtained by performing a missing value filling process, and the second initial performance data represents the data after the first initial performance data is processed by filling missing values; the first performance data is obtained by performing a data interpolation process, and the first performance data represents the data after the second initial performance data is processed by data interpolation.

[0042] In this embodiment, initial performance data obtained through performance testing is first obtained, and the initial performance data is processed to remove outliers by using the IQR (interquartile range) method to obtain first initial performance data. After the outliers are removed by the IQR method, the first initial performance data has eliminated obviously erroneous or unreasonable data points, providing a more reliable data basis for subsequent processing; the first initial performance data is then processed to fill missing values ​​by the median filling method to obtain second initial performance data. After the missing values ​​are processed by the median filling method, the obtained second initial performance data is complete and has no missing values, providing convenience for subsequent data analysis; finally, the second initial performance data is processed to interpolate data by using the linear interpolation method to obtain first performance data. After the sparse data points are processed by linear interpolation, the obtained first performance data is already a more complete, smooth and easy-to-analyze data.

[0043] Specifically, IQR is the difference between the third quartile (Q3) and the first quartile (Q1). Data points that are less than Q1-1.5IQR or greater than Q3+1.5IQR are usually regarded as outliers, that is, wrong or unreasonable data points. The specific steps are as follows: First, Q1 and Q3 are calculated for the initial performance data (including initial pressure performance data and initial moisture resistance and moisture resistance data), respectively; then, IQR=Q3-Q1 is calculated based on Q1 and Q3; then, according to the 1.5 times rule of IQR, data points that are less than Q1-1.5IQR or greater than Q3+1.5IQR are identified as outliers; finally, these outliers are removed from the initial performance data to obtain the first initial performance data.

[0044] The specific steps of using the median filling method to handle missing values ​​in the first initial performance data are as follows: in the first initial performance data, identify all missing or unrecorded data points; for each missing value that needs to be filled, calculate the median of the column in which it is located (for example, for a specific parameter of pressure performance data or moisture resistance performance data); use the calculated median to fill the corresponding missing values ​​to obtain the second initial performance data.

[0045] The specific steps of using linear interpolation to perform data interpolation processing on the second initial performance data are as follows: in the second initial performance data, identify areas where data points are relatively sparse or have large intervals, and in these sparse areas, select positions that require interpolation (i.e., positions where new data points need to be added); for each selected interpolation point, use the two known data points before and after it to perform linear interpolation to calculate the data value of the interpolation point; add the calculated interpolation point data value to the second initial performance data to obtain the first performance data.

[0046] Through the above three steps, the initial performance data of the chip capacitor can be effectively cleaned, filled and interpolated, so as to obtain more complete, accurate and easy-to-analyze first performance data; and the effective processing of the performance test data of the chip capacitor is realized.

[0047] Furthermore, the performance test includes a pressure performance test and a moisture resistance and humidity resistance performance test; the pressure performance test means recording the initial pressure performance data of the chip capacitor through a data acquisition device to evaluate the performance of the chip capacitor when subjected to different pressures, and the data acquisition device includes an LCR meter and a leakage current tester; the moisture resistance and humidity resistance performance test means recording the initial moisture resistance and humidity resistance performance data of the chip capacitor through a data acquisition device to evaluate the performance of the chip capacitor under different humidity and temperature conditions.

[0048] In this embodiment, an LCR meter (inductance capacitance resistance meter) is an electronic instrument specifically used to measure the intrinsic parameters of electrical components, also known as an LCR meter or LCR measuring instrument, and is mainly used to test the performance and parameters of circuit components such as inductance (L), capacitance (C) and resistance (R); a leakage current tester can quickly and accurately measure the leakage current existing in electrical equipment or systems; these leakage currents are usually caused by poor insulation performance of the equipment, line aging or design defects.

[0049] Specifically, in the pressure performance test, the LCR meter is used to obtain the current value of the chip capacitor under different pressures, and the leakage current tester is used to obtain the leakage current of the chip capacitor under different pressures; in the moisture resistance and moisture resistance performance test, the LCR meter is used to obtain the current value of the chip capacitor under different humidity and temperature conditions, and the leakage current tester is used to obtain the leakage current of the chip capacitor under different humidity and temperature conditions; the acquisition of performance test data of the chip capacitor is realized.

[0050] Furthermore, the performance analysis includes compressive performance analysis and moisture and humidity resistance performance analysis; the specific process of the compressive performance analysis is: obtaining first pressure performance data from the first performance data, and obtaining a compressive performance evaluation index based on the first pressure performance data, the first pressure performance data representing the pressure value and the corresponding capacitance response recorded when the chip capacitor is subjected to a pressure performance test under different pressures; the specific process of the moisture and humidity resistance performance analysis is: obtaining first moisture and humidity resistance performance data from the first performance data, and obtaining a moisture and humidity resistance performance evaluation index based on the first moisture and humidity resistance performance data, the first moisture and humidity resistance performance data including the humidity value, temperature value and corresponding capacitance response recorded when the chip capacitor is subjected to a moisture and humidity resistance performance test under different humidity and temperature conditions.

[0051] In this embodiment, the compressive performance analysis is used to evaluate the stability and reliability of the chip capacitor when subjected to external pressure. The compressive performance analysis is crucial to ensure that the chip capacitor operates stably in a complex and changeable electronic environment. Capacitors with high compressive performance can reduce performance degradation or damage caused by external pressure, thereby improving the reliability and life of the entire electronic system; in the compressive performance analysis, the capacitor response in the first pressure performance data includes capacitance values ​​and leakage currents under different pressures; the moisture resistance and moisture resistance performance analysis mainly focuses on the performance of the chip capacitor in a humid environment to evaluate its moisture resistance and long-term stability. The moisture resistance and moisture resistance performance analysis is crucial to ensure that the chip capacitor can still work normally in a humid or high humidity environment. In many electronic devices, such as automotive electronics, communication equipment, etc., it is often necessary to operate in a humid or harsh environment. Therefore, capacitors with good moisture resistance and moisture resistance can improve the overall performance and reliability of the equipment; in the moisture resistance and moisture resistance performance analysis, the capacitor response in the first moisture resistance and moisture resistance performance data includes capacitance values ​​and leakage currents under different humidity and temperature conditions; accurate evaluation and analysis of chip capacitor performance test data is achieved.

[0052] Furthermore, the specific method for obtaining the compressive performance evaluation index is as follows: obtaining a first capacitance value standard deviation according to the first pressure performance data, the first capacitance value standard deviation is used to evaluate the stability of the capacitance value of the patch capacitor under different pressures; obtaining a first leakage current standard deviation according to the first pressure performance data, the first leakage current standard deviation is used to evaluate the stability of the leakage current of the patch capacitor under different pressures; obtaining a first weight from a preset database, and calculating the compressive performance evaluation index in combination with the first capacitance value standard deviation and the first leakage current standard deviation, the first weight includes a first capacitance value stability weight and a first leakage current stability weight, and the compressive performance evaluation index is calculated using the following formula:

[0053]

[0054] Where, CPAI is the compressive performance evaluation index, e represents the natural constant, ω c1 is the first capacitance value stability weight, CVSC1 is the first capacitance value standard deviation, CVSC 1,max is the reference maximum value of the first capacitance standard deviation, ω l1 is the first leakage current stability weight, LSC1 is the first leakage current standard deviation, LSC 1,max is the reference maximum value of the first leakage current standard deviation.

[0055] In this embodiment, the relative deviation of the stability of the first capacitance value is defined as The relative deviation of the stability of the first capacitance value is multiplied by the first capacitance value stability weight to obtain the contribution of the stability of the first capacitance value to CPAI. The relative deviation of the stability of the first leakage current is defined as The relative deviation of the first leakage current stability is multiplied by the first leakage current stability weight to obtain the contribution of the first leakage current stability to CPAI, and the first evaluation index weight is defined as WC. The first evaluation index weight is obtained by adding the contributions of the first capacitance value stability and the first leakage current stability to CPAI, that is, WC = ω c1 *MC1+ω l1 *ML1; The formula combines the first capacitance standard deviation, the first leakage current standard deviation, the first capacitance stability weight and the first leakage current stability weight to obtain the compressive performance evaluation index. In this formula, there is a negative correlation between the first evaluation index weight and the compressive performance evaluation index. When the first evaluation index weight is close to 0, the compressive performance evaluation index is close to 1. When the first evaluation index weight increases, the compressive performance evaluation index gradually decreases; the first capacitance standard deviation represents the standard deviation corresponding to the capacitance value under different pressures. This standard deviation reflects the fluctuation of the capacitance value under different pressures, that is, the stability of the capacitance value. The higher the stability, the less the capacitance value is affected by pressure changes, which is crucial to ensuring the stability and reliability of the circuit; the first leakage current standard deviation represents the standard deviation corresponding to the leakage current under different pressures. The leakage current is the current that leaks through the insulating layer when a voltage is applied to the capacitor. Its stability also affects the performance and reliability of the capacitor. The smaller the leakage current standard deviation, the smaller the change of the leakage current under different pressures, and the better the insulation performance of the capacitor. The first capacitance stability weight is used to measure the importance of capacitance stability in the compressive performance, and the first leakage current stability weight is used to measure the importance of leakage current stability in the compressive performance; the sum of the first capacitance stability weight and the first leakage current stability weight is 1, indicating that different factors have different effects on the compressive performance evaluation index, and adjusting the distribution of weights can reflect the different effects of different factors on the compressive performance evaluation index.

[0056] It should be understood that the first capacitance standard deviation is calculated using the following formula: Where CVSC1 is the first capacitance standard deviation, i represents the number of times the pressure performance test is performed, i = 1, 2, ..., N, N is the total number of times the pressure performance test is performed, C i is the capacitance value of the i-th pressure performance test, is the first average capacitance value; the first leakage current standard deviation is calculated using the following formula: Where LSC1 is the first leakage current standard deviation, I i is the leakage current of the i-th pressure performance test, is the first average leakage current; the numeralization of the compression performance evaluation of the chip capacitor is realized.

[0057] Specifically, CPAI, as a pressure resistance performance evaluation index, is a value between 0 and 1. The closer the CPAI value is to 1, the better the pressure resistance performance is. CVSC1, as the first capacitance value standard deviation, represents the degree of capacitance fluctuation under different pressures. 1,max The reference maximum value of the first capacitance standard deviation is the largest capacitance value in the first pressure performance data, which is used to standardize CVSC1. LSC1 is the first leakage current standard deviation, which indicates the fluctuation degree of leakage current under different pressures. LSC 1,max The reference maximum value which is the first leakage current standard deviation is the largest leakage current value in the first pressure performance data and is used to standardize LSC1.

[0058] The first capacitance value stability weight is obtained from a preset database, and a fitting curve is obtained by fitting the relationship between the first capacitance value standard deviation and the compressive performance evaluation index in a historical time period, and the first capacitance value stability weight corresponding to the input first capacitance value standard deviation is obtained according to the fitting curve.

[0059] The first leakage current stability weight is obtained from a preset database, and a fitting curve is obtained by fitting the relationship between the first leakage current standard deviation in a historical time period and the moisture resistance and moisture proof performance evaluation index, and the first leakage current stability weight corresponding to the input first leakage current standard deviation is obtained according to the fitting curve.

[0060] Furthermore, the specific method for obtaining the moisture resistance and moisture proof performance evaluation index is as follows: obtaining the second capacitance standard deviation according to the first moisture resistance and moisture proof performance data, the second capacitance standard deviation is used to evaluate the stability of the capacitance value of the chip capacitor under different humidity and temperature conditions; obtaining the second leakage current standard deviation according to the first moisture resistance and moisture proof performance data, the second leakage current standard deviation is used to evaluate the stability of the leakage current of the chip capacitor under different humidity and temperature conditions; obtaining the second weight from the preset database, and combining the second capacitance standard deviation with the second leakage current standard deviation to calculate the moisture resistance and moisture proof performance evaluation index, the second weight includes the second capacitance stability weight and the second leakage current stability weight, and the moisture resistance and moisture proof performance evaluation index is calculated using the following formula:

[0061]

[0062] Where MPAI is the moisture resistance and moisture resistance performance evaluation index, e represents the natural constant, ω c2 is the second capacitance value stability weight, CVSC2 is the second capacitance value standard deviation, CVSC 2,max is the reference maximum value of the standard deviation of the second capacitance value, ω l2 is the second leakage current stability weight, LSC2 is the second leakage current standard deviation, LSC 2,max is the reference maximum value of the second leakage current standard deviation.

[0063] In this embodiment, the relative deviation of the stability of the second capacitance value is defined as The relative deviation of the second capacitance stability is multiplied by the second capacitance stability weight to obtain the contribution of the second capacitance stability to MPAI. The relative deviation of the second leakage current stability is defined as The relative deviation of the second leakage current stability is multiplied by the second leakage current stability weight to obtain the contribution of the second leakage current stability to MPAI, and the second evaluation index weight is defined as WP. The second evaluation index weight is obtained by adding the contribution of the second capacitance value stability and the second leakage current stability to MPAI, that is, WP=ω c2 *MC2+ω l2 *ML2; The formula combines the second capacitance standard deviation, the second leakage current standard deviation, the second capacitance stability weight and the second leakage current stability weight to obtain the moisture resistance and moisture proof performance evaluation index. There is a negative correlation between the second evaluation index weight and the moisture resistance and moisture proof performance evaluation index in this formula. When the second evaluation index weight is close to 0, the moisture resistance and moisture proof performance evaluation index is close to 1. When the second evaluation index weight increases, the moisture resistance and moisture proof performance evaluation index gradually decreases. The second capacitance standard deviation represents the standard deviation of the capacitance value under different humidity and temperature conditions. This standard deviation measures the degree of discreteness of the capacitance value under these environmental conditions, that is, the stability of the capacitance value. A smaller standard deviation means that the capacitance value changes less under different environmental conditions, that is, the capacitance value has higher stability, which is crucial to ensure the stability and reliability of the circuit; the second leakage current standard deviation represents the leakage current corresponding to different humidity and temperature conditions. Standard deviation, this standard deviation measures the degree of discreteness of the leakage current under these environmental conditions, that is, the stability of the leakage current. Leakage current is an undesirable phenomenon that may occur in chip capacitors under specific conditions (such as high humidity and high temperature), which will affect the performance and life of the capacitor. A smaller leakage current standard deviation means that the leakage current changes less under different environmental conditions, that is, the leakage current has a higher stability, which is of great significance for reducing energy loss, improving circuit efficiency and extending the life of the capacitor; the second capacitance value stability weight represents the degree of influence of capacitance value stability on the moisture resistance and moisture resistance performance evaluation, and the second leakage current stability weight represents the degree of influence of leakage current stability on the moisture resistance and moisture resistance performance evaluation. The sum of the first capacitance value stability weight and the first leakage current stability weight is 1, indicating that different factors have different effects on the pressure resistance performance evaluation index. Adjusting the distribution of weights can reflect the different effects of different factors on the pressure resistance performance evaluation index;

[0064] It should be understood that the standard deviation of the second capacitance value is calculated using the following formula: Wherein, CVSC2 is the second capacitance standard deviation, j represents the jth moisture resistance and humidity proof performance test, j=1,2,...,M, M is the total number of moisture resistance and humidity proof performance tests, Cj is the capacitance value of the jth moisture resistance and humidity resistance test, is the average value of the second capacitance; the second leakage current standard deviation is calculated using the following formula: Where LSC2 is the second leakage current standard deviation, I j is the leakage current of the jth moisture resistance test, is the average value of the second leakage current; the numeralization of the moisture resistance and humidity resistance performance evaluation of the chip capacitor is realized.

[0065] Specifically, MPAI, as an evaluation index of moisture resistance and humidity resistance, is a value between 0 and 1. The closer the MPAI value is to 1, the better the moisture resistance and humidity resistance is. CVSC2, as the second capacitance standard deviation, indicates the degree of capacitance fluctuation at different humidity and temperature. 2,max The reference maximum value of the second capacitance standard deviation is the largest capacitance value in the first moisture resistance and moisture proof performance data, which is used to standardize CVSC2. LSC2 is the second leakage current standard deviation, which indicates the fluctuation degree of leakage current under different humidity and temperature. LSC 2,max The reference maximum value for the second leakage current standard deviation is the maximum leakage current value in the first moisture and humidity resistance performance data, and is used to standardize LSC2.

[0066] The second capacitance value stability weight is obtained from a preset database, and a fitting curve is obtained by fitting the relationship between the second capacitance value standard deviation in a historical time period and the moisture resistance and moisture proof performance evaluation index, and the second capacitance value stability weight corresponding to the input second capacitance value standard deviation is obtained according to the fitting curve.

[0067] The second leakage current stability weight is obtained from a preset database, and a fitting curve is obtained by fitting the relationship between the second leakage current standard deviation in a historical time period and the moisture resistance and moisture proof performance evaluation index, and the second leakage current stability weight corresponding to the input second leakage current standard deviation is obtained according to the fitting curve.

[0068] Furthermore, the specific process of comprehensive evaluation is as follows: obtain the weight distribution factors corresponding to the compressive performance evaluation index and the moisture resistance and anti-humidity performance evaluation index from the preset database, the weight distribution factors including the compressive performance evaluation weight and the moisture resistance and anti-humidity performance evaluation weight; obtain the comprehensive performance evaluation index according to the weight distribution factor, the compressive performance evaluation index and the moisture resistance and anti-humidity performance evaluation index, and the comprehensive performance evaluation index is calculated using the following formula:

[0069] OAI=log2(1+CPAI*ω P +MPAI*ω m 0;

[0070] In the formula, OAI is the comprehensive performance evaluation index, CPAI is the compression performance evaluation index, ω Pis the weight for compressive performance evaluation, MPAI is the moisture resistance and moisture resistance evaluation index, ω m Weights for evaluating moisture and humidity resistance.

[0071] In this embodiment, the weight allocation factor is used to reflect the contribution and influence of different performance indicators in the overall performance. The pressure resistance evaluation performance weight indicates the influence of the chip capacitor's ability to maintain structural and functional integrity when subjected to external pressure on the overall performance. The pressure resistance performance is an important indicator of whether the component can work normally in harsh environments (such as mechanical stress, vibration, etc.). Therefore, for applications that need to work in high-pressure environments, ω P It should be assigned a higher value. The moisture resistance and humidity resistance evaluation weight indicates the degree of influence of the chip capacitor's ability to maintain electrical performance and structural stability in a humid environment on the overall performance. Moisture resistance and humidity resistance are essential for the long-term stable operation of components in humid, high humidity or possible contact with moisture environments. Therefore, in applications requiring high reliability, ω m It should also be assigned a higher value; the sum of the compression performance evaluation weight and the moisture resistance performance evaluation weight is 1, indicating the different effects of different factors on the comprehensive performance evaluation index. Adjusting the distribution of weights can reflect the different effects of different factors on the comprehensive performance evaluation index;

[0072] Specifically, the compressive performance evaluation weight is obtained from a preset database, and a fitting curve is obtained by fitting the relationship between the comprehensive performance evaluation index of the historical time period and the compressive performance evaluation index, and the compressive performance evaluation index weight corresponding to the input compressive performance evaluation index is obtained according to the fitting curve.

[0073] The moisture resistance and moisture proof performance evaluation weight is obtained from a preset database, and a fitting curve is obtained by fitting the relationship between the comprehensive performance evaluation index of the historical time period and the moisture resistance and moisture proof performance evaluation index, and the moisture resistance and moisture proof performance evaluation index weight corresponding to the input moisture resistance and moisture proof performance evaluation index is obtained according to the fitting curve.

[0074] It should be understood that, taking the weight of compressive performance evaluation as 0.4 and the weight of moisture resistance performance evaluation as 0.6 as an example, the statistical table of changes in the comprehensive performance evaluation index is shown in Table 1:

[0075] Table 1 Statistics of changes in comprehensive performance evaluation index

[0076]

[0077] As can be seen from Table 1, these five groups of data show the changes in the comprehensive performance evaluation index coefficients under different compressive performance evaluation indexes and moisture resistance performance evaluation indexes. In the first group of data, both the compressive and moisture resistance performance evaluation indexes are high, so the comprehensive performance evaluation index is also high; in the second group of data, the compressive performance evaluation index is very high, but the moisture resistance performance evaluation index is slightly low, and the weight of moisture resistance performance is high, so the comprehensive performance evaluation index is slightly lower than that of the first group; in the third group of data, both the compressive and moisture resistance performance evaluation indexes are at an upper-middle level, so the comprehensive performance evaluation index reflects this balance; in the fourth group of data, although the compressive performance evaluation index reached the highest, the moisture resistance performance evaluation index was low, and the weight of moisture resistance performance was high, so the comprehensive performance evaluation index did not increase significantly; in the fifth group of data, both the compressive and moisture resistance performance evaluation indexes are low and equal. Since the weight of the moisture resistance performance evaluation index is higher, the comprehensive performance evaluation index reflects this lower overall performance.

[0078] like Figure 4 As shown, it is a schematic diagram of the change of the comprehensive performance evaluation index provided in the embodiment of the present application, wherein it is assumed that: the compressive performance evaluation weight is 0.6, the moisture resistance and moisture proof performance evaluation weight is 0.4, and the value range of the compressive performance evaluation index and the moisture resistance and moisture proof performance evaluation index is 0-1; it can be seen from the figure that the formula combines the compressive performance evaluation index, the moisture resistance and moisture proof performance evaluation index, the compressive performance evaluation weight and the moisture resistance and moisture proof performance evaluation weight to obtain the comprehensive performance evaluation index, and there is a positive correlation between the compressive performance evaluation index, the moisture resistance and moisture proof performance evaluation index and the comprehensive performance evaluation index in this formula, when the compressive performance evaluation index and the moisture resistance and moisture proof performance evaluation index are higher, the closer the comprehensive performance evaluation index is to 1.0, and when the compressive performance evaluation index and the moisture resistance and moisture proof performance evaluation index are smaller, the closer the comprehensive performance evaluation index is to 0.0; a more accurate numerical evaluation of the comprehensive performance of the chip capacitor is achieved.

[0079] Furthermore, the specific process of comprehensive grading is as follows: obtaining the grading standard corresponding to the comprehensive performance evaluation index, grading the chip capacitor according to the comprehensive performance evaluation index and the grading standard to obtain the grading result, and the grading means obtaining the corresponding grading result according to the numerical range of the comprehensive performance evaluation index and the grading standard to evaluate the grade corresponding to the comprehensive performance of the chip capacitor,

[0080] In this embodiment, the grading standard represents the grading basis obtained by setting a clear numerical interval, and the grading results include excellent, good, general, and poor. The grading standard is formulated according to historical data: when CPI ≥ 0.9, the grading result of the chip capacitor is excellent; when 0.7 ≤ CPI < 0.9, the grading result of the chip capacitor is good; when 0.5 ≤ CPI < 0.7, the grading result of the chip capacitor is good; when CPI < 0.5, the grading result of the chip capacitor is poor; for example, we calculate that the CPI of a certain chip capacitor is 0.85, and compare the CPI (0.85) of the chip capacitor with the above standard. Since 0.85 falls in the range of 0.7 to 0.9, according to the grading standard, the chip capacitor is rated as excellent. The grade classification result of the chip capacitor is good, which indicates that the comprehensive performance of the chip capacitor is at an upper-middle level in the set standard. The grade classification standard provides a unified and quantifiable evaluation benchmark, which enables chip capacitors from different batches, different manufacturers and even different test environments to be compared and evaluated under a common standard. This standardized evaluation ensures the consistency and comparability of the evaluation results and avoids the deviation caused by subjective judgment. By setting clear numerical ranges to divide the grades, the boundaries of chip capacitors at different performance levels can be clearly defined, which helps manufacturers, buyers and consumers to quickly understand the performance positioning of chip capacitors, thereby more accurately evaluating whether they meet specific application requirements; the accuracy of the comprehensive grade classification of chip capacitors is improved.

[0081] Furthermore, the specific contents of data visualization are as follows: obtaining the performance evaluation index, comprehensive performance evaluation index and grade division results and transferring them into a preset performance test database; using a data visualization tool to display the performance evaluation index, comprehensive performance evaluation index and grade division results in a chart to obtain a chip capacitor performance graph, which is used to reflect the performance stability of the chip capacitor and the corresponding grade division results.

[0082] In this embodiment, a preset performance test database is used to store performance test data to analyze the changing trend of chip capacitor performance. This database is used for long-term storage and management of test data for subsequent analysis and tracing; a visualization tool (Tableau) is used to draw performance evaluation index charts, comprehensive performance evaluation index charts and grade classification result charts respectively.

[0083] Specifically, the performance evaluation index chart includes a compressive performance evaluation index chart and a moisture and humidity resistance performance evaluation index chart. For the compressive performance evaluation index chart, the X-axis is different pressure levels; for the moisture and humidity resistance performance evaluation index chart, the X-axis is different humidity or temperature conditions; the Y-axis represents the value of the performance evaluation index, that is, the quantitative value of the performance of the chip capacitor under different test conditions; the performance evaluation index chart is used to show the performance stability of the chip capacitor under different pressure, humidity or temperature conditions. By observing the value on the Y-axis, the performance of the chip capacitor under different test conditions can be judged, as well as whether there is a trend of performance degradation.

[0084] The X-axis of the comprehensive performance evaluation index chart is the different test batch numbers, and the Y-axis is the value of the comprehensive performance evaluation index, which is a quantitative result that combines multiple performance evaluation indexes (such as pressure resistance and moisture resistance). The comprehensive performance evaluation index chart is used to comprehensively evaluate the overall performance level of chip capacitors and show its changing trend with the test batches. By comparing the comprehensive performance evaluation indexes of different batches, the trend of performance improvement or degradation can be identified, providing a basis for quality control and production optimization.

[0085] The grading result chart is in the form of a bar chart, where each test batch is distinguished by color, size or position; the grading result chart intuitively shows the grade distribution of the chip capacitors, making the comparison between different grades clear at a glance. By viewing the chart, high-quality and low-quality product batches can be quickly identified, thereby guiding quality control and decision-making in the production process.

[0086] Based on the above chart information, a chip capacitor performance chart is generated. The chart should be able to intuitively reflect the performance stability of the chip capacitor and the corresponding grade classification results. This chart can be used as part of the product manual for reference by manufacturers, buyers or consumers. Based on the results of the above data visualization, the performance of the chip capacitor can be deeply analyzed to find out performance bottlenecks or potential problems; the visualization of the chip capacitor performance test results is realized.

[0087] like Figure 5As shown, it is a structural schematic diagram of a performance test system for a pressure-resistant moisture-resistant patch capacitor provided in an embodiment of the present application. The performance test system for a pressure-resistant moisture-resistant patch capacitor provided in an embodiment of the present application includes a data collection module, a performance analysis module and a comprehensive evaluation module; wherein the data collection module is used to collect initial performance data obtained by a performance test of the patch capacitor, and pre-process the initial performance data to obtain first performance data, the performance test is used to evaluate the comprehensive performance of the patch capacitor, and the initial performance data includes initial pressure performance data and initial moisture-resistant performance data; the performance analysis module is used to evaluate the comprehensive performance of the patch capacitor according to the first performance data A performance evaluation index is obtained based on performance analysis of the chip capacitor, and the performance evaluation index includes a compressive performance evaluation index and a moisture and humidity resistance performance evaluation index. The compressive performance evaluation index is used to evaluate the performance stability of the chip capacitor under different pressures, and the moisture and humidity resistance performance evaluation index is used to evaluate the performance stability of the chip capacitor under different humidity and temperature conditions; the comprehensive evaluation module is used to perform a comprehensive evaluation on the chip capacitor according to the performance evaluation index to obtain a comprehensive performance evaluation index, and perform a comprehensive grade classification on the chip capacitor according to the comprehensive evaluation result to obtain a grade classification result. The comprehensive performance evaluation index is used to comprehensively quantify the compressive, moisture and humidity resistance performance of the chip capacitor.

[0088] In this example, in the comprehensive evaluation module, the two evaluation indexes (compressive performance evaluation index and moisture resistance performance evaluation index) obtained by the performance analysis module are integrated to form a comprehensive performance evaluation index. Based on the comprehensive performance evaluation index, the system will classify the chip capacitors into comprehensive grades. This step not only provides users with direct quantitative indicators of capacitor performance, but also facilitates manufacturers to classify and control products according to performance levels. The comprehensive performance evaluation index and grade classification results are crucial for users to choose capacitors suitable for their application scenarios, and also provide manufacturers with directions for product improvement and optimization.

[0089] To summarize, the embodiment of the present application collects initial performance data obtained by performance testing of chip capacitors and performs preprocessing to obtain first performance data, then performs performance analysis on the chip capacitors based on the first performance data to obtain a performance evaluation index, then performs a comprehensive evaluation on the chip capacitors based on the performance evaluation index to obtain a comprehensive performance evaluation index, and finally performs a comprehensive grading of the chip capacitors based on the comprehensive evaluation results to obtain a grading result, thereby achieving efficient utilization of the performance test data of the chip capacitors, and further achieving an improvement in the correlation between the performance of the chip capacitors and the performance test results, effectively solving the problem of low correlation between the performance of the chip capacitors and the performance test results in the prior art.

[0090] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0091] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0092] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0093] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0094] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0095] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A performance test method for a pressure-resistant, moisture-resistant, and moisture-proof chip capacitor, characterized in that: The following steps are involved: S1, obtaining initial performance data obtained by a performance test of the chip capacitor, and preprocessing the initial performance data to obtain first performance data, wherein the performance test is used to evaluate the comprehensive performance of the chip capacitor, and the initial performance data includes initial pressure performance data and initial moisture resistance performance data; The specific steps of the pretreatment are as follows: Acquire first initial performance data by performing outlier removal processing, wherein the first initial performance data represents data after the outlier removal processing is performed on the initial performance data; Acquire second initial performance data by performing missing value filling processing, wherein the second initial performance data represents data after the missing value filling processing is performed on the first initial performance data; Acquire first performance data by performing data interpolation processing, wherein the first performance data represents data obtained by performing data interpolation processing on the second initial performance data; S2, performing a performance analysis on the SMD capacitor according to the first performance data to obtain a performance evaluation index, wherein the performance evaluation index includes a compressive performance evaluation index and a moisture and humidity resistance performance evaluation index, wherein the compressive performance evaluation index is used to evaluate the performance stability of the SMD capacitor under different pressures, and the moisture and humidity resistance performance evaluation index is used to evaluate the performance stability of the SMD capacitor under different humidity and temperature conditions; S3, comprehensively evaluating the chip capacitor according to the performance evaluation index to obtain a comprehensive performance evaluation index, and comprehensively grading the chip capacitor according to the comprehensive evaluation result to obtain a grading result, wherein the comprehensive performance evaluation index is used to comprehensively quantify the compression resistance, moisture resistance and moisture proof performance of the chip capacitor; The specific process of the comprehensive level classification is as follows: Obtain the grading standard corresponding to the comprehensive performance evaluation index; The chip capacitors are graded according to the comprehensive performance evaluation index and the grade classification standard to obtain a grade classification result, wherein the grade classification indicates that the corresponding grade classification result is obtained by comparing the numerical range of the comprehensive performance evaluation index and the grade classification standard to evaluate the grade corresponding to the comprehensive performance of the chip capacitors; The performance analysis includes compression resistance analysis and moisture resistance and humidity resistance analysis; The specific process of the compression performance analysis is as follows: Acquire first pressure performance data from the first performance data, and acquire a pressure resistance performance evaluation index according to the first pressure performance data, wherein the first pressure performance data represents a pressure value and a corresponding capacitance response recorded when a pressure performance test is performed on the chip capacitor under different pressures; The specific process of the moisture and humidity resistance analysis is as follows: Obtaining first moisture resistance and moisture proof performance data from the first performance data, and obtaining a moisture resistance and moisture proof performance evaluation index according to the first moisture resistance and moisture proof performance data, wherein the first moisture resistance and moisture proof performance data includes a humidity value, a temperature value, and a corresponding capacitance response recorded when performing a moisture resistance and moisture proof performance test on the chip capacitor under different humidity and temperature conditions; The specific method for obtaining the compression resistance evaluation index is as follows: Acquire a first capacitance value standard deviation according to the first pressure performance data, where the first capacitance value standard deviation is used to evaluate the stability of the capacitance value of the chip capacitor under different pressures; Acquire a first leakage current standard deviation according to the first pressure performance data, where the first leakage current standard deviation is used to evaluate the stability of the leakage current of the chip capacitor under different pressures; The first weight is obtained from the preset database, and the compressive performance evaluation index is calculated in combination with the first capacitance value standard deviation and the first leakage current standard deviation, wherein the first weight includes the first capacitance value stability weight and the first leakage current stability weight, and the compressive performance evaluation index is calculated using the following formula: Where CPAI is the compressive performance evaluation index, e represents a natural constant, ω c1 is the first capacitance value stability weight, CVSC1 is the first capacitance value standard deviation, CVSC 1,max is the reference maximum value of the standard deviation of the first capacitance value, ω l1 is the first leakage current stability weight, LSC1 is the first leakage current standard deviation, LSC 1,max is the reference maximum value of the first leakage current standard deviation; The specific method for obtaining the moisture resistance and moisture proof performance evaluation index is as follows: Obtaining a second capacitance value standard deviation according to the first moisture resistance and humidity resistance performance data, wherein the second capacitance value standard deviation is used to evaluate the stability of the capacitance value of the chip capacitor under different humidity and temperature conditions; Obtaining a second leakage current standard deviation according to the first moisture resistance and humidity resistance performance data, wherein the second leakage current standard deviation is used to evaluate the stability of the leakage current of the chip capacitor under different humidity and temperature conditions; The second weight is obtained from the preset database, and the moisture resistance and moisture proof performance evaluation index is calculated in combination with the second capacitance value standard deviation and the second leakage current standard deviation, wherein the second weight includes the second capacitance value stability weight and the second leakage current stability weight, and the moisture resistance and moisture proof performance evaluation index is calculated using the following formula: Where MPAI is the moisture resistance and moisture resistance performance evaluation index, e represents the natural constant, ω c2 is the second capacitance value stability weight, CVSC2 is the second capacitance value standard deviation, CVSC 2,max is the reference maximum value of the standard deviation of the second capacitance value, ω l2 is the second leakage current stability weight, LSC2 is the second leakage current standard deviation, LSC 2,max is the reference maximum value of the second leakage current standard deviation; The specific process of the comprehensive assessment is as follows: Obtaining weight allocation factors corresponding to the compression resistance performance evaluation index and the moisture resistance and anti-humidity performance evaluation index from a preset database, wherein the weight allocation factors include the compression resistance performance evaluation weight and the moisture resistance and anti-humidity performance evaluation weight; The comprehensive performance evaluation index is obtained according to the weight distribution factor, the compression performance evaluation index and the moisture resistance and moisture resistance performance evaluation index. The comprehensive performance evaluation index is calculated using the following formula: OAI=log2(1+CPAI*ω P +MPAI*ω m ); In the formula, OAI is the comprehensive performance evaluation index, CPAI is the compression performance evaluation index, ω P is the weight for compressive performance evaluation, MPAI is the moisture resistance and moisture resistance evaluation index, ω m Weights for evaluating moisture and humidity resistance.

2. A method for testing the performance of a pressure-resistant, moisture-resistant, and moisture-proof chip capacitor as claimed in claim 1, characterized in that: The performance tests include pressure performance test and moisture resistance and humidity resistance test; The pressure performance test means recording the initial pressure performance data of the SMD capacitor by a data acquisition device to evaluate the performance of the SMD capacitor when subjected to different pressures; The moisture resistance and humidity proof performance test refers to recording the initial moisture resistance and humidity proof performance data of the chip capacitor by a data acquisition device to evaluate the performance of the chip capacitor under different humidity and temperature conditions.

3. A performance testing method for a pressure-resistant, moisture-resistant, and moisture-proof chip capacitor as claimed in claim 1, characterized in that: It also includes data visualization; Obtaining the performance evaluation index, comprehensive performance evaluation index and grade classification results and transferring them to a preset performance test database; The performance evaluation index, the comprehensive performance evaluation index and the grade division results are displayed in a graphical form through a data visualization tool to obtain a chip capacitor performance graph, which is used to reflect the performance stability of the chip capacitor and the corresponding grade division results.

4. A performance test system for a pressure-resistant moisture-resistant chip capacitor, using a performance test method for a pressure-resistant moisture-resistant chip capacitor as described in any one of claims 1 to 3, characterized in that: It includes data collection module, performance analysis module and comprehensive evaluation module; The data collection module is used to collect initial performance data obtained by a performance test of the SMD capacitor, and preprocess the initial performance data to obtain first performance data. The performance test is used to evaluate the comprehensive performance of the SMD capacitor, and the initial performance data includes initial pressure performance data and initial moisture resistance performance data. The performance analysis module is used to perform performance analysis on the SMD capacitor according to the first performance data to obtain a performance evaluation index, wherein the performance evaluation index includes a compressive performance evaluation index and a moisture and humidity resistance performance evaluation index, wherein the compressive performance evaluation index is used to evaluate the performance stability of the SMD capacitor under different pressures, and the moisture and humidity resistance performance evaluation index is used to evaluate the performance stability of the SMD capacitor under different humidity and temperature conditions; The comprehensive evaluation module is used to comprehensively evaluate the chip capacitor according to the performance evaluation index to obtain a comprehensive performance evaluation index, and to comprehensively classify the chip capacitor according to the comprehensive evaluation result to obtain a classification result, and the comprehensive performance evaluation index is used to comprehensively quantify the compression resistance, moisture resistance and moisture resistance performance of the chip capacitor; The specific process of the comprehensive level classification is as follows: Obtain the grading standard corresponding to the comprehensive performance evaluation index; The chip capacitors are graded according to the comprehensive performance evaluation index and the grade classification standard to obtain a grade classification result, and the grade classification means obtaining the corresponding grade classification result based on the numerical range of the comprehensive performance evaluation index and the grade classification standard to evaluate the grade corresponding to the comprehensive performance of the chip capacitor.

Images