Material tower control circuit

Abstract

The invention discloses a material tower control circuit, which comprises a main control unit and an auxiliary control unit, the main control unit is connected with the auxiliary control unit, the auxiliary control unit is used for calculating and feeding back a time signal, and the main control unit automatically forms an offset time signal based on the time signal fed back by the auxiliary control unit and performs self-calibration and feedback of an execution signal based on the offset time signal. The main control unit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a first diode and a first connector; the in-phase end of the first operational amplifier is connected with one end of the second resistor, one end of the fourth resistor, the cathode of the first diode and the end of the first connector, the anti-phase end of the first operational amplifier is connected with one end of the first resistor and one end of the third resistor, and the output end of the first operational amplifier is connected with the anode of the first diode. The other end of the second resistor and the other end of the third resistor are connected with a power supply. The other end of the first resistor and the other end of the fourth resistor are connected with a grounding end.

Description

Technical Field

[0001] The invention relates to the technical field of automatic control, and in particular to a material tower control circuit. Background Art

[0002] In batch production, the material tower can realize automatic material discharge to improve production efficiency. The proportion of ingredients plays a decisive role in improving product quality and performance. The quality of each material type is different and the weight of the material will also be affected by air humidity. When the material type is changed or the weight of the material changes due to humidity, it is necessary to repeatedly calibrate the material discharge time parameters to ensure the accuracy of each material discharge. Therefore, a material tower control circuit is proposed, which can automatically form an offset time signal and complete the self-calibration of the discharge accuracy and reset after self-calibration based on this, so as to improve the discharge accuracy and prevent the material type from changing and the material weight from being affected by air humidity. The weight of the material is different each time the material is discharged. Summary of the invention

[0003] In view of the above technical problems, the object of the present invention is to provide a material tower control circuit, including a main control unit and an auxiliary control unit, wherein the main control unit and the auxiliary control unit are connected, the auxiliary control unit is used to calculate and feedback a time signal, the main control unit automatically forms an offset time signal based on the time signal fed back by the auxiliary control unit and performs self-calibration and feedback execution signal based on the time signal, and the main control unit includes a first operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, and a first connector P1;

[0004] The in-phase end of the first operational amplifier U1 is connected to one end of the second resistor R2, one end of the fourth resistor R4, the cathode of the first diode D1, and the end of the first connector P1; the inverting end of the first operational amplifier U1 is connected to one end of the first resistor R1 and one end of the third resistor R3; the output end of the first operational amplifier U1 is connected to the anode of the first diode D1; the other end of the second resistor R2 and the other end of the third resistor R3 are connected to the power supply; the other end of the first resistor R1 and the other end of the fourth resistor R4 are connected to the ground.

[0005] Further, the main control unit also includes a third operational amplifier U3, a fourth operational amplifier U4, an eighth operational amplifier U8, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, and a second connector P2;

[0006] The in-phase end of the third operational amplifier U3 is connected to one end of the eighth resistor R8 and one end of the eleventh resistor R11, the inverting end of the third operational amplifier U3 is connected to one end of the seventh resistor R7 and one end of the tenth resistor R10, the output end of the third operational amplifier U3 is connected to the other end of the seventh resistor R7, the in-phase end of the fourth operational amplifier U4 is connected to one end of the twenty-third resistor R23 and the end of the second connector P2, the inverting end of the fourth operational amplifier U4 is connected to one end of the twelfth resistor R12, the output end of the fourth operational amplifier U4 is connected to the other end of the eleventh resistor R11 and the other end of the twelfth resistor R12, the in-phase end of the eighth operational amplifier U8 is connected to one end of the ninth resistor R9 and one end of the twenty-fifth resistor R25, the inverting end of the eighth operational amplifier U8 is connected to one end of the twenty-fourth resistor R24, the output end of the eighth operational amplifier U8 is connected to the other end of the twenty-fourth resistor R24 ​​and the other end of the eighth resistor R8, the other end of the ninth resistor R9 is connected to the power supply, and the other end of the tenth resistor R10, the other end of the twenty-third resistor R23, and the other end of the twenty-fifth resistor R25 are connected to the ground.

[0007] Further, the main control unit also includes a second operational amplifier U2, a seventh operational amplifier U7, a first field effect transistor Q1, a fifth field effect transistor Q5, a fifth resistor R5, a sixth resistor R6, a twenty-second resistor R22, a second diode D2, a first capacitor C1, and a third connector P3;

[0008] The non-inverting end of the second operational amplifier U2 is connected to the output end of the eighth operational amplifier U8, the inverting end of the second operational amplifier U2 is connected to the drain of the first field effect transistor Q1, the drain of the fifth field effect transistor Q5, one end of the sixth resistor R6, and one end of the first capacitor C1, the output end of the second operational amplifier U2 is connected to the anode of the second diode D2, the cathode of the second diode D2 is connected to the inverting end of the first operational amplifier U1, the non-inverting end of the seventh operational amplifier U7 is connected to the output end of the third operational amplifier U3, the inverting end of the seventh operational amplifier U7 is connected to one end of the twenty-second resistor R22, the output end of the seventh operational amplifier U7 is connected to the other end of the twenty-second resistor R22 and the source of the fifth field effect transistor Q5, the gate of the first field effect transistor Q1 is connected to the gate of the fifth field effect transistor Q5 and the anode of the first diode D1, the source of the first field effect transistor Q1 is connected to one end of the fifth resistor R5 and the end of the third connector P3, the other end of the fifth resistor R5, the other end of the sixth resistor R6, the other end of the first capacitor C1 and the ground are connected.

[0009] Further, the main control unit also includes a fifth operational amplifier U5, a sixth operational amplifier U6, a second triode Q2, a third field effect transistor Q3, a fourth field effect transistor Q4, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a third diode D3, a fourth diode D4, a second capacitor C2, and a third capacitor C3;

[0010] The in-phase end of the fifth operational amplifier U5 is connected to one end of the fourteenth resistor R14 and the collector of the second transistor Q2, the inverting end of the fifth operational amplifier U5 is connected to one end of the thirteenth resistor R13 and one end of the nineteenth resistor R19, the output end of the fifth operational amplifier U5 is connected to the other end of the thirteenth resistor R13, the gate of the third field effect transistor Q3, and the gate of the fourth field effect transistor Q4, the in-phase end of the sixth operational amplifier U6 is connected to one end of the twenty-first resistor R20 and the drain of the third field effect transistor Q3, the inverting end of the sixth operational amplifier U6 is connected to the output end of the eighth operational amplifier U8, the output end of the sixth operational amplifier U6 is connected to one end of the twenty-first resistor R21 and the anode of the fourth diode D4, the cathode of the fourth diode D4 is connected to one end of the fourth resistor R4, and the emitter of the second transistor Q2 is connected to the output end of the fourth operational amplifier U4, The base of the second triode Q2 is connected to one end of the fifteenth resistor R15 and the cathode of the third diode D3, the anode of the third diode D3 is connected to one end of the third capacitor C3 and the output end of the third operational amplifier U3, the source of the third field effect transistor Q3 is connected to the source of the fourth field effect transistor Q4, one end of the sixteenth resistor R16, and one end of the second capacitor C2, the drain of the fourth field effect transistor Q4 is connected to one end of the seventeenth resistor R17 and one end of the eighteenth resistor R18, the other end of the seventeenth resistor R17 is connected to the power supply, and the other end of the fourteenth resistor R14, the other end of the fifteenth resistor R15, the other end of the sixteenth resistor R16, the other end of the eighteenth resistor R18, the other end of the nineteenth resistor R19, the other end of the twentieth resistor R20, the other end of the twenty-first resistor R21, the other end of the second capacitor C2, the other end of the third capacitor C3 are connected to the ground terminal.

[0011] Furthermore, the twenty-fifth resistor R25 is an adjustable resistor.

[0012] Furthermore, the thirteenth resistor R13 is an adjustable resistor.

[0013] The beneficial effects of the present invention compared with the prior art are:

[0014] The present invention can automatically form an offset time signal and complete self-calibration of material discharge accuracy and reset after self-calibration based on the signal, thereby preventing different material weights caused by each material discharge when the material type changes and the material weight is affected by air humidity. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0016] Figure 1 A schematic diagram of the circuit structure provided by the present invention. DETAILED DESCRIPTION

[0017] In order to make the objects and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific implementations of the present invention, and does not strictly limit the scope of protection specifically requested by the present invention.

[0018] The present invention discloses a material tower control circuit, comprising a main control unit and an auxiliary control unit, wherein the main control unit and the auxiliary control unit are connected, the auxiliary control unit is used to calculate and feed back a time signal, the main control unit automatically forms an offset time signal based on the time signal fed back by the auxiliary control unit and performs self-calibration and feeds back an execution signal based on the time signal, and the main control unit comprises a first operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, and a first connector P1;

[0019] The in-phase end of the first operational amplifier U1 is connected to one end of the second resistor R2, one end of the fourth resistor R4, the cathode of the first diode D1, and the end of the first connector P1; the inverting end of the first operational amplifier U1 is connected to one end of the first resistor R1 and one end of the third resistor R3; the output end of the first operational amplifier U1 is connected to the anode of the first diode D1; the other end of the second resistor R2 and the other end of the third resistor R3 are connected to the power supply; the other end of the first resistor R1 and the other end of the fourth resistor R4 are connected to the ground.

[0020] Specifically, the main control unit also includes a third operational amplifier U3, a fourth operational amplifier U4, an eighth operational amplifier U8, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, and a second connector P2;

[0021] The in-phase end of the third operational amplifier U3 is connected to one end of the eighth resistor R8 and one end of the eleventh resistor R11, the inverting end of the third operational amplifier U3 is connected to one end of the seventh resistor R7 and one end of the tenth resistor R10, the output end of the third operational amplifier U3 is connected to the other end of the seventh resistor R7, the in-phase end of the fourth operational amplifier U4 is connected to one end of the twenty-third resistor R23 and the end of the second connector P2, the inverting end of the fourth operational amplifier U4 is connected to one end of the twelfth resistor R12, the output end of the fourth operational amplifier U4 is connected to the other end of the eleventh resistor R11 and the other end of the twelfth resistor R12, the in-phase end of the eighth operational amplifier U8 is connected to one end of the ninth resistor R9 and one end of the twenty-fifth resistor R25, the inverting end of the eighth operational amplifier U8 is connected to one end of the twenty-fourth resistor R24, the output end of the eighth operational amplifier U8 is connected to the other end of the twenty-fourth resistor R24 ​​and the other end of the eighth resistor R8, the other end of the ninth resistor R9 is connected to the power supply, and the other end of the tenth resistor R10, the other end of the twenty-third resistor R23, and the other end of the twenty-fifth resistor R25 are connected to the ground.

[0022] Specifically, the main control unit further includes a second operational amplifier U2, a seventh operational amplifier U7, a first field effect transistor Q1, a fifth field effect transistor Q5, a fifth resistor R5, a sixth resistor R6, a twenty-second resistor R22, a second diode D2, a first capacitor C1, and a third connector P3;

[0023] The non-inverting end of the second operational amplifier U2 is connected to the output end of the eighth operational amplifier U8, the inverting end of the second operational amplifier U2 is connected to the drain of the first field effect transistor Q1, the drain of the fifth field effect transistor Q5, one end of the sixth resistor R6, and one end of the first capacitor C1, the output end of the second operational amplifier U2 is connected to the anode of the second diode D2, the cathode of the second diode D2 is connected to the inverting end of the first operational amplifier U1, the non-inverting end of the seventh operational amplifier U7 is connected to the output end of the third operational amplifier U3, the inverting end of the seventh operational amplifier U7 is connected to one end of the twenty-second resistor R22, the output end of the seventh operational amplifier U7 is connected to the other end of the twenty-second resistor R22 and the source of the fifth field effect transistor Q5, the gate of the first field effect transistor Q1 is connected to the gate of the fifth field effect transistor Q5 and the anode of the first diode D1, the source of the first field effect transistor Q1 is connected to one end of the fifth resistor R5 and the end of the third connector P3, the other end of the fifth resistor R5, the other end of the sixth resistor R6, the other end of the first capacitor C1 and the ground are connected.

[0024] Specifically, the main control unit also includes a fifth operational amplifier U5, a sixth operational amplifier U6, a second triode Q2, a third field effect transistor Q3, a fourth field effect transistor Q4, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a third diode D3, a fourth diode D4, a second capacitor C2, and a third capacitor C3;

[0025] The in-phase end of the fifth operational amplifier U5 is connected to one end of the fourteenth resistor R14 and the collector of the second transistor Q2, the inverting end of the fifth operational amplifier U5 is connected to one end of the thirteenth resistor R13 and one end of the nineteenth resistor R19, the output end of the fifth operational amplifier U5 is connected to the other end of the thirteenth resistor R13, the gate of the third field effect transistor Q3, and the gate of the fourth field effect transistor Q4, the in-phase end of the sixth operational amplifier U6 is connected to one end of the twenty-first resistor R20 and the drain of the third field effect transistor Q3, the inverting end of the sixth operational amplifier U6 is connected to the output end of the eighth operational amplifier U8, the output end of the sixth operational amplifier U6 is connected to one end of the twenty-first resistor R21 and the anode of the fourth diode D4, the cathode of the fourth diode D4 is connected to one end of the fourth resistor R4, and the emitter of the second transistor Q2 is connected to the output end of the fourth operational amplifier U4, The base of the second triode Q2 is connected to one end of the fifteenth resistor R15 and the cathode of the third diode D3, the anode of the third diode D3 is connected to one end of the third capacitor C3 and the output end of the third operational amplifier U3, the source of the third field effect transistor Q3 is connected to the source of the fourth field effect transistor Q4, one end of the sixteenth resistor R16, and one end of the second capacitor C2, the drain of the fourth field effect transistor Q4 is connected to one end of the seventeenth resistor R17 and one end of the eighteenth resistor R18, the other end of the seventeenth resistor R17 is connected to the power supply, and the other end of the fourteenth resistor R14, the other end of the fifteenth resistor R15, the other end of the sixteenth resistor R16, the other end of the eighteenth resistor R18, the other end of the nineteenth resistor R19, the other end of the twentieth resistor R20, the other end of the twenty-first resistor R21, the other end of the second capacitor C2, the other end of the third capacitor C3 are connected to the ground terminal.

[0026] Specifically, the twenty-fifth resistor R25 is an adjustable resistor.

[0027] Specifically, the thirteenth resistor R13 is an adjustable resistor.

[0028] The specific working principle of the present invention is as follows: the power supply signal reaches the ground terminal through the third resistor R3 and the first resistor R1, the signal at the first resistor R1 end is fed back to the inverting end of the first operational amplifier U1, the power supply signal reaches the ground terminal through the second resistor R2 and the fourth resistor R4, in the initial state, the signal at the first resistor R1 end is higher than the signal at the fourth resistor R4 end and lower than the signal amplitude of the saturated output signal of the first operational amplifier U1 after the voltage drop through the first diode D1, the first operational amplifier U1 is cut off, the terminal / manually feeds back a discharge signal to the first connector P1 of the main control unit, the discharge signal is a high level, the signal reaches the ground terminal through the first connector P1 and the fourth resistor R4, the signal at the fourth resistor R4 end is increased to make the first operational amplifier U1 output, the signal at the output end of the first operational amplifier U1 reaches the ground terminal through the first diode D1 and the fourth resistor R4, when the discharge signal is lost at the first connector P1 end, the first diode D1 prevents reverse, the first operational amplifier U1 maintains output, and the signal at the output end of the first operational amplifier U1 is a calibration signal, so that when the terminal / manually feeds back the discharge signal, the calibration signal required during the self-calibration period can be provided to the lower circuit.

[0029] The self-calibrated reference time signal is set on the auxiliary control unit and fed back to the main control unit through the second connector P2. The signal is fed back to the in-phase terminal of the fourth operational amplifier U4. The twenty-third resistor R23 is a pull-down resistor at the in-phase terminal of the fourth operational amplifier U4. The output terminal of the fourth operational amplifier U4 is negatively feedback connected to the inverting terminal of the fourth operational amplifier U4 through the twelfth resistor R12 to prevent interference from the signal of the lower circuit while following the output of the second connector P2 terminal signal. The output terminal signal of the fourth operational amplifier U4 is fed back to the in-phase terminal of the third operational amplifier U3 through the eleventh resistor R11. The power supply signal is connected to the ground terminal through the ninth resistor R9 and the twenty-fifth resistor R25. The signal at the end of the twenty-fifth resistor R25 is fed back to the in-phase terminal of the eighth operational amplifier U8. The output of the eighth operational amplifier U8 The end is connected through the twenty-fourth resistor R24 ​​and the inverting end of the eighth operational amplifier U8 for negative feedback to prevent interference from the signal of the lower circuit, and at the same time follows the output of the signal of the twenty-fifth resistor R25 end. The signal of the twenty-fifth resistor R25 end is a bias signal. The bias signal can be set by adjusting the resistance value of the twenty-fifth resistor R25. The output signal of the eighth operational amplifier U8 is fed back to the in-phase end of the third operational amplifier U3 through the eighth resistor R8. The output signal of the third operational amplifier U3 is fed back to the ground end through the seventh resistor R7 and the tenth resistor R10. The signal of the tenth resistor R10 end is fed back to the inverting end of the third operational amplifier U3. The third operational amplifier U3 shifts upward to output a self-calibrated reference time signal, so that an offset time signal can be automatically formed when the auxiliary control unit feeds back a time signal.

[0030] The output signal of the third operational amplifier U3 is fed back to the non-inverting terminal of the seventh operational amplifier U7. The output signal of the seventh operational amplifier U7 is negatively fed back through the twenty-second resistor R22 and the inverting terminal of the seventh operational amplifier U7 to prevent interference from the signal of the lower circuit and follow the output signal of the third operational amplifier U3. The output signal of the seventh operational amplifier U7 is grounded through the source of the fifth field effect transistor Q5, the drain of the fifth field effect transistor Q5, and the sixth resistor R6. The potential of the first capacitor C1 rises to the amplitude of the output signal of the seventh operational amplifier U7. The output signal of the first operational amplifier U1 is synchronously fed back to the gate of the first field effect transistor Q1 and the gate of the fifth field effect transistor Q5. When the first operational amplifier U1 outputs, the voltage difference between the gate of the fifth field effect transistor Q5 and the source of the fifth field effect transistor Q5 is higher than the conduction threshold, the fifth field effect transistor Q5 is turned off, the potential of the first capacitor C1 decreases, and at the same time, the voltage difference between the gate of the first field effect transistor Q1 and the source of the first field effect transistor Q1 is higher than the conduction threshold. The first field effect transistor Q 1 is turned on, the signal at the end of the first capacitor C1 passes through the fifth resistor R5 to the ground end, the signal at the end of the fifth resistor R5 is fed back to the feeding mechanism through the third connector P3, the signal at the end of the third connector P3 is the feeding signal, the feeding mechanism feeds the material to the material tray, the signal at the output end of the eighth operational amplifier U8 is synchronously fed back to the in-phase end of the second operational amplifier U2, the signal at the end of the first capacitor C1 is synchronously fed back to the inverting end of the second operational amplifier U2, when the potential at the end of the first capacitor C1 is lower than the amplitude of the offset signal, the second operational amplifier U2 outputs, the signal at the output end of the second operational amplifier U2 passes through the second diode D2 and the first resistor R1 to the ground end, the signal at the end of the first resistor R1 rises, the first operational amplifier U1 is turned off, a weight sensor is arranged under the material tray, when the first operational amplifier U1 is turned off, the material weight parameter is fed back to the auxiliary control unit by the weight sensor, at this time the auxiliary control unit obtains the material weight parameter of the feeding mechanism within the self-calibration reference time, so as to perform self-calibration based on the formed offset time signal when the terminal / manually feeds back the feeding signal.

[0031] The required material weight signal is set on the auxiliary control unit. When the auxiliary control unit obtains the material weight parameter of the material discharging mechanism within the self-calibration reference time, the auxiliary control unit calculates the remaining material discharging time based on the material weight of the material discharging within the self-calibration reference time and the remaining required material weight. The auxiliary control unit changes the amplitude of the reference time signal to make it consistent with the remaining material discharging time signal. At this time, the signal at the end of the second connector P2 is the remaining material discharging time signal. A third capacitor C3 is set between the output end of the third operational amplifier U3 and the in-phase end of the seventh operational amplifier U7 so that after the signal at the output end of the fourth operational amplifier U4 is adjusted, the third operational amplifier U3 can lag and output the offset remaining material discharging time signal. In the initial state, the power supply signal passes through the seventeenth resistor R17 and the eighteenth resistor R18 to the ground terminal. The eighteenth resistor R1 The signal at the output of the fourth operational amplifier U4 is fed back to the emitter of the second transistor Q2, and the offset signal at the output of the third operational amplifier U3 is fed back to the ground through the third diode D3 and the fifteenth resistor R15. The second transistor Q2 is cut off between the emitter of the second transistor Q2 and the base of the second transistor Q2. When the signal at the output of the fourth operational amplifier U4 is adjusted, during the lag period of the signal at the output of the third operational amplifier U3, the emitter of the second transistor Q2 and the base of the second transistor Q2 are forward biased, the second transistor Q2 is turned on, and the signal at the output of the fourth operational amplifier U4 is fed back to the emitter of the second transistor Q2. The signal is fed back to the ground through the emitter of the second transistor Q2, the collector of the second transistor Q2 and the fourteenth resistor R14, and the signal at the end of the fourteenth resistor R14 is fed back to the non-inverting end of the fifth operational amplifier U5, and the signal at the output end of the fifth operational amplifier U5 is fed back to the ground through the thirteenth resistor R13 and the nineteenth resistor R19, and the signal at the end of the nineteenth resistor R19 is fed back to the inverting end of the fifth operational amplifier U5, and the fifth operational amplifier U5 gain outputs the signal at the end of the fourteenth resistor R14, and the resistance value of the thirteenth resistor R13 is adjusted to change the gain multiple so that the fifth operational amplifier U5 is saturated when the second transistor Q2 is turned on, and the output end signal of the fifth operational amplifier U5 is fed back to the gate of the third field effect transistor Q3, the gate of the fourth field effect transistor Q4, and the gate of the fourth field effect transistor Q4 and the gate of the fourth field effect transistor Q5. The voltage difference between the source of the field effect tube Q4 is higher than the conduction threshold, the fourth field effect tube Q4 is cut off, the voltage difference between the gate of the third field effect tube Q3 and the source of the third field effect tube Q3 is higher than the conduction threshold, the third field effect tube Q3 is turned on, the signal at the second capacitor C2 is connected to the ground terminal via the source of the third field effect tube Q3, the drain of the third field effect tube Q3, and the twentieth resistor R20, the signal at the twentieth resistor R20 is fed back to the in-phase terminal of the sixth operational amplifier U6, the output terminal signal of the eighth operational amplifier U8 is fed back to the inverting terminal of the sixth operational amplifier U6, the sixth operational amplifier U6 outputs, the output terminal signal of the sixth operational amplifier U6 is connected to the ground terminal via the twenty-first resistor R21, and at the same time, the output terminal signal of the sixth operational amplifier U6 is connected to the ground terminal via the fourth diode D4 and the fourth resistor R4.The signal at the end of the fourth resistor R4 rises, and the first operational amplifier U1 outputs. At this time, the signal at the output end of the first operational amplifier U1 is the execution signal, the first field effect tube Q1 is turned on, the material discharge mechanism discharges the material, and when the potential at the end of the first capacitor C1 is lower than the amplitude of the offset signal, the second operational amplifier U2 outputs, and the first operational amplifier U1 is cut off. When the material weight signal fed back by the weight sensor is consistent with the required material weight signal, the auxiliary control unit resets the signal at the end of the second connector P2 to the self-calibration reference time signal, thereby completing the self-calibration of the material discharge accuracy and the reset after self-calibration based on the automatically formed offset time signal, and automatically performing self-calibration when the next material is discharged.

[0032] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and scope of the equivalent elements of the claims be included in the invention. Any marking in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A material tower control circuit, comprising a main control unit and an auxiliary control unit, characterized in that: The main control unit is connected to the auxiliary control unit, the auxiliary control unit is used to calculate and feed back the time signal, the main control unit automatically forms an offset time signal based on the time signal fed back by the auxiliary control unit and performs self-calibration and feeds back the execution signal based on the time signal, and the main control unit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a first diode, and a first connector; The in-phase end of the first operational amplifier is connected to one end of the second resistor, one end of the fourth resistor, the cathode of the first diode, and the first connector end; the inverting end of the first operational amplifier is connected to one end of the first resistor and one end of the third resistor; the output end of the first operational amplifier is connected to the anode of the first diode; the other end of the second resistor and the other end of the third resistor are connected to the power supply; the other end of the first resistor and the other end of the fourth resistor are connected to the ground end.

2. The material tower control circuit according to claim 1, characterized in that: The main control unit also includes a third operational amplifier, a fourth operational amplifier, an eighth operational amplifier, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, and a second connector; The non-inverting end of the third operational amplifier is connected to one end of the eighth resistor and one end of the eleventh resistor, the inverting end of the third operational amplifier is connected to one end of the seventh resistor and one end of the tenth resistor, the output end of the third operational amplifier is connected to the other end of the seventh resistor, the non-inverting end of the fourth operational amplifier is connected to one end of the twenty-third resistor and the second connector end, the inverting end of the fourth operational amplifier is connected to one end of the twelfth resistor, the output end of the fourth operational amplifier is connected to the other end of the eleventh resistor and the other end of the twelfth resistor, the non-inverting end of the eighth operational amplifier is connected to one end of the ninth resistor and one end of the twenty-fifth resistor, the inverting end of the eighth operational amplifier is connected to one end of the twenty-fourth resistor, the output end of the eighth operational amplifier is connected to the other end of the twenty-fourth resistor and the other end of the eighth resistor, the other end of the ninth resistor is connected to the power supply, and the other ends of the tenth resistor, the twenty-third resistor and the twenty-fifth resistor are connected to the ground.

3. The material tower control circuit according to claim 2, characterized in that: The main control unit also includes a second operational amplifier, a seventh operational amplifier, a first field effect transistor, a fifth field effect transistor, a fifth resistor, a sixth resistor, a twenty-second resistor, a second diode, a first capacitor, and a third connector; The non-inverting end of the second operational amplifier is connected to the output end of the eighth operational amplifier, the inverting end of the second operational amplifier is connected to the drain of the first field effect tube, the drain of the fifth field effect tube, one end of the sixth resistor, and one end of the first capacitor, the output end of the second operational amplifier is connected to the anode of the second diode, the cathode of the second diode is connected to the inverting end of the first operational amplifier, the non-inverting end of the seventh operational amplifier is connected to the output end of the third operational amplifier, the inverting end of the seventh operational amplifier is connected to one end of the twenty-second resistor, the output end of the seventh operational amplifier is connected to the other end of the twenty-second resistor and the source of the fifth field effect tube, the gate of the first field effect tube is connected to the gate of the fifth field effect tube and the anode of the first diode, the source of the first field effect tube is connected to one end of the fifth resistor and the end of the third connector, the other end of the fifth resistor, the other end of the sixth resistor, the other end of the first capacitor and the ground are connected.

4. The material tower control circuit according to claim 2, characterized in that: The main control unit also includes a fifth operational amplifier, a sixth operational amplifier, a second triode, a third field effect transistor, a fourth field effect transistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a third diode, a fourth diode, a second capacitor, and a third capacitor; The in-phase end of the fifth operational amplifier is connected to one end of the fourteenth resistor and the collector of the second transistor, the inverting end of the fifth operational amplifier is connected to one end of the thirteenth resistor and one end of the nineteenth resistor, the output end of the fifth operational amplifier is connected to the other end of the thirteenth resistor, the gate of the third field effect transistor, and the gate of the fourth field effect transistor, the in-phase end of the sixth operational amplifier is connected to one end of the twenty-first resistor and the drain of the third field effect transistor, the inverting end of the sixth operational amplifier is connected to the output end of the eighth operational amplifier, the output end of the sixth operational amplifier is connected to one end of the twenty-first resistor and the anode of the fourth diode, the cathode of the fourth diode is connected to one end of the fourth resistor, the emitter of the second transistor is connected to the output end of the fourth operational amplifier The first end is connected to the first transistor, the second end is connected to the second transistor, the base of the second triode is connected to one end of the fifteenth resistor and the cathode of the third diode, the anode of the third diode is connected to one end of the third capacitor and the output end of the third operational amplifier, the source of the third field effect transistor is connected to the source of the fourth field effect transistor, one end of the sixteenth resistor and one end of the second capacitor, the drain of the fourth field effect transistor is connected to one end of the seventeenth resistor and one end of the eighteenth resistor, the other end of the seventeenth resistor is connected to the power supply, the other end of the fourteenth resistor, the other end of the fifteenth resistor, the other end of the sixteenth resistor, the other end of the eighteenth resistor, the other end of the nineteenth resistor, the other end of the twentieth resistor, the other end of the twenty-first resistor, the other end of the second capacitor, the other end of the third capacitor and the ground terminal are connected.

5. The material tower control circuit according to claim 2, characterized in that: The twenty-fifth resistor is an adjustable resistor.

6. The material tower control circuit according to claim 4, characterized in that: The thirteenth resistor is an adjustable resistor.

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