Silicon-based heterogeneous substrate structure, preparation method thereof and semiconductor device

Abstract

The invention relates to the technical field of semiconductors, in particular to a silicon-based heterogeneous substrate structure, a preparation method thereof and a semiconductor device. The silicon-based heterogeneous substrate structure comprises a supporting substrate, a first oxide layer located on the surface of one side of the supporting substrate, and a functional thin film layer located on the surface of the side, away from the supporting substrate, of the first oxide layer. A chamfering structure is arranged on the edge of one side, with the first oxide layer, of the supporting substrate and / or the edge of one side, facing the first oxide layer, of the functional film layer; according to the technical scheme of the invention, the edge of one side, provided with the first oxide layer, of the supporting substrate is provided with the chamfer structure, and / or the edge of one side, facing the first oxide layer, of the functional film layer is provided with the chamfer structure, so that the functional wafer is prevented from being broken in the bonding process, and the bonding yield is further improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a silicon-based heterogeneous substrate structure and a preparation method thereof, and a semiconductor device. Background Art

[0002] Heterogeneous integration of multiple materials is an important way to improve chip performance and integration level. By preparing materials with piezoelectric, ferroelectric, optoelectronic, pyroelectric, nonlinear and other properties into thin film structures and integrating them with different materials, we can fully utilize the advantages of different materials and improve chip performance.

[0003] The silicon-based heterogeneous substrate structure is generally composed of a functional film layer with functional characteristics, an oxide layer that electrically isolates the functional film layer from the silicon-based substrate layer, and a silicon-based substrate as a supporting layer; the current method for transferring the functional film layer to the silicon-based substrate is generally an ion beam stripping method, which mainly involves ion implantation on the polished surface of the functional wafer, bonding its polished surface to the silicon-based substrate through the oxide layer, and then transferring the functional film layer to the silicon-based substrate by heat treatment, and then flattening it to obtain the target silicon-based substrate structure; however, in the process of transferring the functional film layer to the silicon-based substrate, the following problems may occur:

[0004] (1) During the wafer bonding process, the surface of the silicon-based substrate may suffer from varying degrees of edge damage. In addition, due to the influence of the silicon wafer processing technology, the morphology and roughness of the edge area of ​​the functional wafer are insufficient. During the bonding process between the functional wafer and the supporting substrate, a wider unbonded area and more bonding holes are likely to appear.

[0005] (2) In the process of preparing the oxide layer by thermal oxidation process, due to the edge damage of the functional wafer during loading and unloading, it is easy to introduce different degrees of dislocation defects on the edge of the silicon-based substrate, which will cause larger edge defects when bonding with the functional wafer, and even cause the functional wafer to break during the bonding process;

[0006] (3) In the subsequent process of wafer bonding, due to the difference in thermal expansion coefficients between the functional wafer layer and the silicon-based substrate layer, the bonded wafer may be broken during the ion beam stripping process, further affecting the production yield. Summary of the invention

[0007] In view of the above problems in the prior art, the present application provides a wafer bonding method and a functional substrate preparation method thereof, which can avoid the occurrence of wafer displacement and bonding holes caused by the wafer direct bonding technology in the prior art. The specific technical solution is as follows:

[0008] On the one hand, the present application provides a silicon-based heterogeneous substrate structure, comprising:

[0009] A support substrate having a first oxide layer on one surface;

[0010] A functional thin film layer located on a surface of the first oxide layer facing away from the supporting substrate;

[0011] A chamfer structure is provided on an edge of one side of the support substrate having the first oxide layer and / or an edge of one side of the functional thin film layer facing the first oxide layer.

[0012] In a possible implementation manner, the support substrate has a first substrate region close to the first oxide layer and a second substrate region away from the first oxide layer; and a radial dimension of the functional thin film layer is at least smaller than a radial dimension of the second substrate region.

[0013] In a possible implementation manner, a radial dimension of the first substrate region is smaller than a radial dimension of the second substrate region.

[0014] In a possible implementation manner, the support substrate satisfies at least one of the following characteristics:

[0015] The first substrate region has a first substrate surface on a side close to the first oxide layer, the second substrate region has a second substrate surface on a side close to the first oxide layer, and a difference between a radial dimension of the first substrate surface and a radial dimension of the second substrate surface is 0-5 mm;

[0016] The first substrate region has a first thickness, the second substrate region has a second thickness, and a ratio between the first thickness and the second thickness ranges from 0.001 to 0.235.

[0017] In a possible implementation manner, the chamfered structure includes a first chamfered structure, and the first chamfered structure is provided at edges of the first oxide layer and the support substrate close to the first oxide layer.

[0018] In a possible implementation manner, the heterogeneous substrate structure further satisfies at least one of the following characteristics:

[0019] The chamfer structure includes a second chamfer structure, and the second chamfer structure is provided at an edge of the functional film layer on a side facing the first oxide layer;

[0020] The heterogeneous substrate structure further includes a functional oxide layer located on a surface of a side of the functional thin film layer close to the first oxide layer, and the chamfer structure includes a third chamfer structure, and the third chamfer structure is provided at the edge of the functional oxide layer and the functional thin film layer close to the functional oxide layer;

[0021] The difference between the functional oxide layer and the first oxide layer ranges from 0 to 15 μm.

[0022] In a possible implementation manner, the heterogeneous substrate structure further includes a second oxide layer located on a surface of the support substrate facing away from the first oxide layer, and the second oxide layer satisfies at least one of the following characteristics:

[0023] The radial dimension of the second oxide layer is greater than the radial dimension of the functional thin film layer;

[0024] The difference between the thickness of the first oxide layer and the thickness of the second oxide layer is 0-15 μm.

[0025] In a possible implementation manner, the heterogeneous substrate structure further includes a first trap layer located between the first oxide layer and the supporting substrate and / or a second trap layer located on a surface of the supporting substrate facing away from the first oxide layer, and the first trap layer and the second trap layer satisfy at least one of the following characteristics:

[0026] The radial dimension of the second trap layer is greater than the radial dimension of the functional thin film layer;

[0027] The chamfered structure includes a fourth chamfered structure, and the fourth chamfered structure is provided on the first trap layer, the first oxide layer and the edge of the support substrate close to the first oxide layer;

[0028] The thickness of the first trap layer and the second trap layer are both in the range of 0-5 μm.

[0029] In a possible implementation manner, the heterogeneous substrate structure satisfies at least one of the following characteristics:

[0030] The thickness of the functional film layer is 0.05-20 μm;

[0031] The thickness of the first oxide layer is 0-15 μm;

[0032] The thickness of the support substrate is 200-1000 μm.

[0033] On the other hand, the present application provides a method for preparing a silicon-based heterogeneous substrate structure, the preparation method is used to prepare the heterogeneous substrate structure as described in the above embodiment, the preparation method comprising:

[0034] Providing a supporting substrate and a functional substrate, wherein the functional substrate comprises a non-functional layer and a functional thin film layer formed on the non-functional layer;

[0035] forming a first oxide layer on a surface of one side of the support substrate;

[0036] The supporting substrate forming the first oxide layer and / or the functional substrate are subjected to edge removal treatment to form a chamfer structure on an edge of one side of the supporting substrate having the first oxide layer and / or an edge of one side of the functional thin film layer facing the first oxide layer, and the supporting substrate having the first oxide layer and the functional substrate after the edge removal treatment are bonded to form a bonding structure; the functional thin film layer in the bonding structure is bonded to the first oxide layer; and the non-functional layer in the bonding structure is removed to obtain a heterogeneous substrate structure.

[0037] In a possible implementation, the heterogeneous substrate structure includes the functional thin film layer, the first oxide layer and the supporting substrate, the supporting substrate having a first substrate region close to the first oxide layer and a second substrate region away from the first oxide layer; the radial dimension of the functional thin film layer is at least smaller than the radial dimension of the second substrate region.

[0038] In a possible implementation manner, the chamfer structure includes a first chamfer structure, and edge removal processing is performed on the support substrate on which the first oxide layer is formed, including:

[0039] The supporting substrate for forming the first oxide layer is chamfered to form the first chamfered structure at the first oxide layer and the edge of the supporting substrate close to the first oxide layer to form the first substrate region, wherein the radial dimension of the first substrate region is smaller than the radial dimension of the second substrate region.

[0040] In a possible implementation, the chamfer structure includes a second chamfer structure, and edge removal processing is performed on the functional substrate, including: chamfering the functional substrate to form the second chamfer structure at the edge of the functional film layer on the side facing the first oxide layer.

[0041] In a possible implementation, before edge removal processing is performed on the functional substrate, the method further includes: forming a functional oxide layer on a surface of the functional substrate close to the first oxide layer, the functional substrate including a non-functional layer, a functional thin film layer formed on the non-functional layer, and a functional oxide layer.

[0042] In a possible implementation manner, the chamfer structure includes a third chamfer structure, and edge removal processing is performed on the functional substrate, including: chamfering the functional substrate having the functional oxide layer to form the third chamfer structure at the edge of the functional oxide layer and the functional thin film layer close to the functional oxide layer;

[0043] The difference between the functional oxide layer and the first oxide layer ranges from 0 to 15 μm.

[0044] In a possible implementation, before forming a first oxide layer on one side surface of the supporting substrate, the method further includes: forming a first trap layer between the first oxide layer and the supporting substrate and / or forming a second trap layer on a side surface of the supporting substrate away from the first oxide layer, wherein a radial dimension of the second trap layer is greater than a radial dimension of the functional thin film layer, and a thickness range of the first trap layer and the second trap layer are both 0-5 μm.

[0045] In a possible implementation, the chamfer structure includes a fourth chamfer structure, and edge removal processing is performed on the supporting substrate forming the first oxide layer, including: chamfering the supporting substrate having the first trap layer to form the fourth chamfer structure at the edge of the first trap layer, the first oxide layer and the supporting substrate close to the first oxide layer to form the first substrate region.

[0046] On the other hand, the present application also provides a semiconductor device, comprising the silicon-based heterogeneous substrate structure as described in the above embodiment.

[0047] Based on the above technical scheme, the present application has the following beneficial effects: the technical scheme of the present invention provides a silicon-based heterogeneous substrate structure, comprising: a supporting substrate, a first oxide layer located on one side surface of the supporting substrate, and a functional thin film layer located on the side surface of the first oxide layer away from the supporting substrate, and a chamfer structure is provided on the edge of one side of the supporting substrate having the first oxide layer and / or the edge of one side of the functional thin film layer facing the first oxide layer; by providing a chamfer structure on the edge of one side of the supporting substrate having the first oxide layer and / or providing a chamfer structure on the edge of one side of the functional thin film layer facing the first oxide layer, on the one hand, it can be avoided that the silicon-based substrate with edge damage can easily lead to a wider unbonded area and bonding holes during the bonding process, and on the other hand, it can be avoided that the functional wafer with edge damage can cause dislocation defects during the bonding process, and at the same time, it can also avoid the functional wafer from being broken during the bonding process, thereby improving the bonding yield. In addition, it can also effectively release thermal stress, avoid the wafer from being broken during bonding due to the difference in thermal expansion coefficients between the functional wafer and the silicon-based substrate, and further improve the bonding yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] In order to more clearly illustrate the technical solution of the present application, the following is a brief introduction to the drawings required for use in the embodiments or prior art descriptions. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0049] Figure 1-36 All of them are schematic diagrams of the structure of a silicon-based heterogeneous substrate in a specific embodiment of the present invention.

[0050] Fig.37 The figure is a schematic diagram of the steps of a method for preparing a supporting substrate in a specific embodiment of the present invention.

[0051] Fig.38 The figure is a schematic diagram of the steps of a method for preparing a supporting substrate in a specific embodiment of the present invention.

[0052] Fig.39 The figure is a schematic diagram of the steps of a method for preparing a functional substrate in a specific embodiment of the present invention.

[0053] Fig.40 The figure is a schematic diagram of the steps of a method for preparing a functional substrate in a specific embodiment of the present invention.

[0054] Fig.41 Schematic diagram of the bonding interface after wafer bonding in Example 1 of the present invention.

[0055] Fig.42 It is a schematic diagram of the bonding interface after wafer bonding in Comparative Example 1 of the present invention.

[0056] In the figure: 1-functional thin film layer, 2-first oxide layer, 3-support substrate, 31-first substrate region, 32-second substrate region, 4-second oxide layer, 5-functional oxide layer, 6-first trap layer, 7-second trap layer, 8-functional substrate, 9-silicon oxide substrate, 100-first chamfered structure, 200-second chamfered structure, 201-defect layer, 202-non-functional layer, 300-third chamfered structure, 400-fourth chamfered structure. DETAILED DESCRIPTION

[0057] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0058] For the following defined terms, these definitions shall apply unless a different definition is given in the claims or elsewhere in this specification. All numerical values, whether explicitly indicated or not, are defined herein as modified by the term "about". The term "about" generally refers to a numerical range that a person of ordinary skill in the art considers to be equivalent to the stated values ​​to produce substantially the same properties, functions, results, etc. A numerical range indicated by a lower value and a higher value is defined to include all numerical values ​​included in the numerical range and all subranges included in the numerical range.

[0059] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0060] On the one hand, a silicon-based heterogeneous substrate structure provided in an embodiment of the present application is introduced below, including: a supporting substrate 3 having a first oxide layer 2 on one surface; by adding the first oxide layer 2 on the surface of the supporting substrate 3, the chemical and electrical properties of the surface of the supporting substrate can be improved, so that it can be bonded to the functional substrate, and at the same time, the surface of sensitive materials can be protected to prevent external moisture, pollutants and chemical corrosion.

[0061] In some embodiments, the material of the support substrate 3 includes silicon material. Specifically, the silicon material includes at least one of single crystal silicon, polycrystalline silicon, and silicon on insulator (SOI).

[0062] In some embodiments, the first oxide layer 2 is made of silicon oxide, which has extremely high insulation properties and can effectively isolate circuit components to prevent current leakage and short circuit.

[0063] In some embodiments, reference Figure 1 and Figure 2 , wherein the radial dimension of the first oxide layer 2 is equal to the radial dimension of the supporting substrate 3.

[0064] In some embodiments, reference Figure 1-36 The support substrate 3 has a first substrate region 31 close to the first oxide layer 2 and a second substrate region 32 far from the first oxide layer 3, and the radial dimension of the functional film layer 1 is at least smaller than the radial dimension of the second substrate region 32. Through this arrangement, the thermal stress in the subsequent heat treatment process can be further released, the wafer fragmentation phenomenon can be avoided, and the bonding yield can be further improved.

[0065] In some embodiments, the thickness of the first oxide layer 2 is 0-15 μm, and the thickness of the support substrate 3 is 200-1000 μm. The thickness of the first oxide layer 2 and the support substrate 3 can be any point value within the above range, which is not enumerated here. The thickness of the oxide layer will affect the electrical properties of the prepared device, such as the threshold voltage and the permittivity, so by accurately controlling the thickness of the oxide layer, the performance of the device prepared later can be optimized.

[0066] The silicon-based heterogeneous substrate structure further includes a functional thin film layer located on a surface of the first oxide layer 2 facing away from the supporting substrate 3;

[0067] In some embodiments, the material of the functional thin film layer includes at least one of single crystal lithium niobate, single crystal lithium tantalate, quartz, aluminum nitride, gallium nitride, calcium fluoride, silicon, sapphire, silicon carbide, and diamond.

[0068] Specifically, refer to Figure 1-36 , the radial dimension of the functional thin film layer 2 is smaller than the second substrate region 32 of the supporting substrate 3 .

[0069] The edge of one side of the supporting substrate 3 with the first oxide layer and / or the edge of one side of the functional film layer 1 facing the first oxide layer 2 is provided with a chamfer structure. Through the above arrangement, on the one hand, it is possible to avoid the silicon-based substrate with edge damage that is prone to cause a wider unbonded area and bonding holes during the bonding process, and on the other hand, it is possible to avoid dislocation defects caused by the functional wafer with edge damage during the bonding process, and it is also possible to avoid the functional wafer from breaking during the bonding process, thereby improving the bonding yield. In addition, it is also possible to effectively release thermal stress, avoid the wafer from breaking during bonding due to the difference in thermal expansion coefficients between the functional wafer and the silicon-based substrate, and further improve the bonding yield.

[0070] In some embodiments, the chamfer structure includes a first chamfer structure 100, and the first chamfer structure 100 is provided at the edge of the first oxide layer 2 and the supporting substrate 3 near the first oxide layer 2. By providing the first chamfer structure 100, it is possible to avoid the silicon-based substrate with edge damage from easily causing a wider unbonded area and bonding holes during the bonding process.

[0071] Specifically, the edge of one side of the support substrate 3 having the first oxide layer 2 is chamfered so that the first oxide layer 2 and the edge of the support substrate 3 close to the first oxide layer 2 form a first chamfered structure 100 .

[0072] Specifically, the radial dimensions of the first oxide layer 2 and the first substrate region 31 gradually increase in a direction close to the second substrate region 32. This arrangement can better release thermal stress in subsequent heat treatment processes and improve bonding quality.

[0073] In some embodiments, reference Figure 3 The radial dimension of the first substrate region 31 is smaller than the radial dimension of the second substrate region 32 , and the radial dimension of the second oxide layer 2 is smaller than the radial dimension of the second substrate region 32 .

[0074] Specifically, refer to Figure 3The first substrate region 31 has a first substrate surface on the side close to the first oxide layer 2, and the second substrate region 32 has a second substrate surface on the side close to the first oxide layer 2, and the difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface is 0-5 mm. The difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface can be any point value within the above range, which is not enumerated here. By setting the difference between the radial dimensions of the first substrate surface and the second substrate surface, the effective use area of ​​the wafer during bonding can be guaranteed.

[0075] Specifically, the difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface is 1-5 mm. By further limiting the difference, the effective use area of ​​the wafer during bonding can be further guaranteed, and the wafer can be prevented from being broken during transfer.

[0076] In some embodiments, the first substrate region 31 has a first thickness, the second substrate region 32 has a second thickness, and the ratio between the first thickness and the second thickness is in the range of 0.001-0.235. The ratio between the first thickness and the second thickness can be any point value within the above range, which is not enumerated here. By setting the ratio of the above two thicknesses, it is possible to avoid the influence on the thermal stress and stability of the prepared heterogeneous substrate structure due to the first substrate region 31 being too thick.

[0077] In some embodiments, the chamfer structure includes a second chamfer structure 200, and the second chamfer structure 200 is provided at the edge of the functional film layer 1 on the side facing the first oxide layer 2. By providing the second chamfer structure 200, dislocation defects caused by edge damaged functional wafers during the bonding process can be avoided, and the functional wafer can also be prevented from being broken during the bonding process, thereby improving the bonding yield.

[0078] Specifically, the edge of the functional film layer 1 facing the first oxide layer 2 is chamfered to form a second chamfered structure 200 at the edge of the functional film layer 1 facing the first oxide layer 2. The above arrangement can make the edge of the functional film layer 1 smoother, thereby improving the bonding quality.

[0079] Specifically, the radial dimension of the functional film layer 1 gradually decreases in the direction close to the first oxide layer 2. This arrangement can better release the thermal stress in the subsequent heat treatment process and improve the bonding quality.

[0080] Exemplary, reference Figure 1 and Figure 2 , wherein the radial dimension of the functional film layer 1 is smaller than the radial dimension of the first oxide layer 2. This arrangement can ensure that the surface of the functional film layer 1 is smooth, thereby avoiding the occurrence of functional wafer fragmentation during bonding transfer.

[0081] In some embodiments, the thickness of the functional film layer 1 is 0.05-20 μm. The thickness of the functional film layer 1 can be any value within the above range, which is not enumerated here. Avoiding too thick a functional film layer 1 will cause large internal stress during the bonding process, which in turn causes wafer breakage.

[0082] In some embodiments, the heterogeneous substrate structure further includes a functional oxide layer 5 located on a side surface of the functional film layer 1 close to the first oxide layer 2, and the chamfer structure includes a third chamfer structure 300, and the third chamfer structure 300 is provided at the edge of the functional oxide layer 5 and the functional film layer 1 close to the functional oxide layer 5. By providing the third chamfer structure 300, not only can the functional oxide layer 5 be better protected and isolated from the functional film layer when the functional wafer is transferred, thereby ensuring the stability of the performance during the subsequent preparation of the device, but also the edges of the functional oxide layer 5 and the functional film layer 1 can be made smooth, thereby avoiding the generation of unbonded areas during wafer transfer and improving the bonding quality.

[0083] Specifically, the functional oxide layer 5 on one side of the functional film layer 1 close to the first oxide layer 2 is chamfered to form a third chamfered structure 300 between the functional oxide layer 5 and the edge of the functional film layer 1 close to the functional oxide layer 5. By chamfering the functional oxide layer 5 on one side of the functional film layer close to the first oxide layer 2, the thermal stress between the functional substrate 8 and the supporting substrate 3 in the subsequent processing can be better released, thereby improving the bonding yield.

[0084] Specifically, the radial dimensions of the functional oxide layer 5 and the functional thin film layer 1 gradually decrease in the direction close to the first oxide layer 2. This arrangement can further release the thermal stress in the subsequent heat treatment process and improve the bonding quality.

[0085] Specifically, refer to Figure 7 and Figure 8 , wherein the radial dimension of the functional oxide layer 5 is smaller than the radial dimension of the supporting substrate 3 .

[0086] In some embodiments, the difference between the functional oxide layer 5 and the first oxide layer 2 is in the range of 0-15 μm.

[0087] In some embodiments, the heterogeneous substrate structure further includes a second oxide layer 4 located on a surface of the support substrate 3 facing away from the first oxide layer 1, and the radial dimension of the second oxide layer 4 is greater than the radial dimension of the functional film layer 1. Adding the second oxide layer 4 on the basis of the original heterogeneous substrate structure is conducive to improving the performance and reliability of the device.

[0088] In some embodiments, reference Figure 6 , wherein the radial dimension of the second oxide layer 4 is greater than the radial dimension of the first oxide layer 2 .

[0089] In some embodiments, reference Figure 8 , wherein the radial dimension of the second oxide layer 4 is equal to the radial dimension of the first oxide layer 2.

[0090] In some embodiments, the difference between the thickness of the first oxide layer 2 and the thickness of the second oxide layer 4 is 0-15 μm. The difference between the thickness of the first oxide layer 2 and the thickness of the second oxide layer 4 can be any point value within the above range, which is not enumerated here. By setting the difference between the thickness of the two oxide layers, the electrical properties of the silicon-based heterogeneous substrate can be adjusted, the performance of the device can be optimized, and the internal stress generated during the bonding process can be further reduced.

[0091] In some embodiments, the thickness of the first oxide layer 2 is greater than the thickness of the second oxide layer 4. This configuration helps to improve the mechanical stability of the substrate and resist external pressure or strain through the unevenness of stress distribution.

[0092] In some embodiments, the heterogeneous substrate structure further includes a first trap layer 6 located between the first oxide layer 2 and the supporting substrate 3 and / or a second trap layer 7 located on the surface of the supporting substrate 3 facing away from the first oxide layer 2. By adding the trap layer, the crystal quality of the substrate material in the silicon-based heterogeneous substrate can be improved and defects and impurities can be reduced.

[0093] In some embodiments, the radial dimension of the second trap layer 7 is greater than the radial dimension of the functional film layer 1. Through this arrangement, thermal stress can be further released and the bonding yield can be improved.

[0094] In some embodiments, reference Fig.14 , wherein the radial dimension of the first trap layer 6 is equal to the radial dimension of the second trap layer 7 , and the radial dimension of the second trap layer 7 is equal to the radial dimension of the first oxide layer 2 .

[0095] In some embodiments, the chamfer structure includes a fourth chamfer structure 400, and the fourth chamfer structure 400 is provided at the edge of the first trap layer 6, the first oxide layer 2, and the support substrate 3 close to the first oxide layer 2. By providing the fourth chamfer structure 400, the sharp corners of the edge of the first trap layer 6, the first oxide layer 2, and the support substrate 3 close to the first oxide layer 2 can be eliminated, and stress concentration caused by mechanical shock or thermal expansion can be avoided, thereby reducing the risk of wafer breakage during manufacturing and use.

[0096] Specifically, the edges of the first trap layer 6, the first oxide layer 2 and the support substrate 3 close to the first oxide layer 2 are chamfered to form a fourth chamfered structure 400 at the edges of the first trap layer 6, the first oxide layer 2 and the support substrate 3 close to the first oxide layer 2. The above chamfering process can significantly improve the bonding yield and bonding quality of wafer bonding.

[0097] Specifically, the radial dimensions of the first trap layer 6, the first oxide layer 2 and the first substrate region 31 gradually increase in a direction close to the second substrate region 32. Through this arrangement, thermal stress can be further released and the bonding yield can be improved.

[0098] Specifically, refer to Fig.24 , wherein the radial dimension of the first trap layer 6 is smaller than the radial dimension of the second trap layer 7 , and the radial dimension of the second trap layer 7 is larger than the radial dimension of the first oxide layer 2 .

[0099] In some embodiments, the thickness of the first trap layer 6 and the second trap layer 7 are both in the range of 0-5 μm. The thickness of the first trap layer 6 and the second trap layer 7 can be any point value within the above range, which is not enumerated here. By limiting the thickness of the first trap layer 6 and the second trap layer 7, it is avoided that the thickness is too large to affect the carrier migration, thereby reducing the performance of the prepared device.

[0100] Specifically, the thickness of the first trap layer 6 and the second trap layer 7 are both in the range of 0.3-3 μm. The thickness of the first trap layer 6 and the second trap layer 7 can be any point value within the above range, which is not enumerated here. By adjusting the thickness of the trap layer, the distribution and mobility of the carriers can be adjusted, and the electrical characteristics and optoelectronic performance of the device can be optimized.

[0101] On the other hand, a method for preparing a silicon-based heterogeneous substrate structure provided in an embodiment of the present application is described below. The method is used to prepare a heterogeneous substrate structure as in the above embodiment. The method comprises:

[0102] S100 : providing a support substrate 3 and a functional substrate 8 , wherein the functional substrate 8 includes a non-functional layer 202 and a functional thin film layer 1 formed on the non-functional layer 202 .

[0103] In some embodiments, the material of the support substrate 3 includes silicon material.

[0104] Specifically, the silicon material includes at least one of single crystal silicon, polycrystalline silicon, and silicon on insulator (SOI).

[0105] In some embodiments, the material of the functional thin film layer 1 includes at least one of single crystal lithium niobate, single crystal lithium tantalate, quartz, aluminum nitride, gallium nitride, calcium fluoride, silicon, sapphire, silicon carbide, and diamond.

[0106] Specifically, the thickness of the functional film layer 1 is 0.05-20 μm, and the thickness of the supporting substrate 3 is 200-1000 μm. The thickness of the functional film layer 1 and the supporting substrate 3 can be any point value within the above range, which is not enumerated here. Avoiding the functional film layer 1 being too thick will cause large internal stress to be generated during the bonding process, thereby causing wafer breakage.

[0107] S200: forming a first oxide layer 2 on one side surface of the support substrate 3. By adding the first oxide layer 2 on the surface of the support substrate 3, the chemical and electrical properties of the surface of the support substrate 3 can be improved, so that it can be bonded with the functional substrate 8, and at the same time, the surface of the sensitive material can be protected from external moisture, pollutants and chemical corrosion.

[0108] Specifically, the material of the first oxide layer 2 is silicon oxide. Silicon oxide has extremely high insulation performance and can effectively isolate circuit components to prevent current leakage and short circuit.

[0109] In some embodiments, reference Figure 1 and Figure 2 , wherein the radial dimension of the first oxide layer 2 is equal to the radial dimension of the supporting substrate 3.

[0110] In some embodiments, reference Figure 1-36 The support substrate 3 has a first substrate region 31 close to the first oxide layer 2 and a second substrate region 32 far from the first oxide layer 3, and the radial dimension of the functional film layer 1 is at least smaller than the radial dimension of the second substrate region 32. Through this arrangement, the thermal stress in the subsequent heat treatment process can be further released, the wafer fragmentation phenomenon can be avoided, and the bonding yield can be further improved.

[0111] Specifically, refer to Figure 1-36 , the radial dimension of the functional thin film layer 1 is smaller than the second substrate region 32 of the supporting substrate 3 .

[0112] In some embodiments, the thickness of the first oxide layer 2 is 0-15 μm. The thickness of the first oxide layer 2 can be any point value within the above range, which is not enumerated here. The thickness of the oxide layer will affect the electrical properties of the prepared device, such as the threshold voltage and the permittivity, so by accurately controlling the thickness of the oxide layer, the performance of the device prepared later can be optimized.

[0113] In some embodiments, Fig.37 As shown, forming a first oxide layer 2 on one side surface of a support substrate 3 includes: performing oxidation treatment on one side surface of the support substrate 3 to form the first oxide layer 2 on one side surface of the support substrate 3, thereby obtaining a support substrate a having the first oxide layer 2.

[0114] In some embodiments, before edge removal processing is performed on the support substrate 3 and / or the functional substrate 8 forming the first oxide layer 2, after the first oxide layer 2 is formed on one side surface of the support substrate 3, the method further includes: forming a second oxide layer 4 on the side surface of the support substrate 3 away from the first oxide layer 2, and the radial dimension of the second oxide layer 4 is greater than the radial dimension of the functional film layer 1. Adding the second oxide layer 4 on the basis of the original heterogeneous substrate structure is conducive to improving the performance and reliability of the device.

[0115] In some embodiments, the preparation method also includes: simultaneously forming a first oxide layer 2 and a second oxide layer 4 on one side surface of the supporting substrate 3, wherein the second oxide layer 4 is located on the side surface of the supporting substrate 3 away from the first oxide layer 2, and the radial dimension of the second oxide layer 4 is greater than the radial dimension of the functional thin film layer 1.

[0116] In some embodiments, reference Figure 8 , wherein the radial dimension of the second oxide layer 4 is greater than the radial dimension of the first oxide layer 2 .

[0117] In some embodiments, reference Figure 6 , wherein the radial dimension of the second oxide layer 4 is equal to the radial dimension of the first oxide layer 2.

[0118] In some embodiments, the difference between the thickness of the first oxide layer 2 and the thickness of the second oxide layer 4 is 0-15 μm. The difference between the thickness of the first oxide layer 2 and the thickness of the second oxide layer 4 can be any point value within the above range, which is not enumerated here. By setting the difference between the thickness of the two oxide layers, the electrical properties of the silicon-based heterogeneous substrate can be adjusted, the performance of the device can be optimized, and the internal stress generated during the bonding process can be further reduced.

[0119] Specifically, the thickness of the first oxide layer 2 is greater than the thickness of the second oxide layer 4. This configuration helps to improve the mechanical stability of the substrate and resist external pressure or strain through the unevenness of stress distribution.

[0120] For example, Fig.37 As shown, before edge removal processing is performed on the supporting substrate 3 and / or the functional substrate 8 forming the first oxide layer 2, after the first oxide layer 2 is formed on one side surface of the supporting substrate 3, the method further includes: forming a second oxide layer 4 on the side surface of the supporting substrate 3 facing away from the first oxide layer 2 to obtain a supporting substrate c.

[0121] In some embodiments, before forming the first oxide layer 2 on one side surface of the supporting substrate 3, the method further includes: forming a first trap layer 6 between the first oxide layer 2 and the supporting substrate 3 and / or forming a second trap layer 7 on the side surface of the supporting substrate 3 away from the first oxide layer 2, and the thickness range of the first trap layer 6 and the second trap layer 7 are both 0-5 μm. The thickness of the first trap layer 6 and the second trap layer 7 can be any point value within the above range, which is not enumerated here. By adding a trap layer, the crystal quality of the substrate material in the silicon-based heterogeneous substrate can be improved, defects and impurities can be reduced, and by limiting the thickness of the first trap layer 6 and the second trap layer 7, it is avoided that the thickness is too large to affect the carrier migration, thereby reducing the performance of the prepared device.

[0122] Specifically, the thickness of the first trap layer 6 and the second trap layer 7 is in the range of 0.3-3 μm. The thickness of the first trap layer 6 and the second trap layer 7 can be any value within the above range, which is not enumerated here. By further adjusting the thickness of the trap layer, the distribution and mobility of the carriers can be adjusted, and the electrical characteristics and optoelectronic performance of the device can be optimized.

[0123] In some embodiments, the radial dimension of the second trap layer 7 is greater than the radial dimension of the functional film layer 1. Through this arrangement, thermal stress can be further released and the bonding yield can be improved.

[0124] In some embodiments, reference Fig.14 , wherein the radial dimension of the first trap layer 6 is equal to the radial dimension of the second trap layer 7 , and the radial dimension of the second trap layer 7 is equal to the radial dimension of the first oxide layer 2 .

[0125] Specifically, Fig.38 As shown, a first trap layer 6 is formed between the first oxide layer 2 and the supporting substrate 3 , including: performing a vapor deposition process on one side surface of the supporting substrate 3 to obtain a supporting substrate e having the first trap layer 6 .

[0126] For example, Fig.38 As shown, a first oxide layer 2 is formed on one side surface of a supporting substrate 3, including: oxidizing a supporting substrate e having a first trap layer 6 so that the first trap layer 6 forms a first oxide layer 2 on the surface on a side away from the supporting substrate, thereby obtaining a supporting substrate f having a first oxide layer 2 and a first trap layer 6.

[0127] For example, Fig.38 As shown, a second trap layer 7 is formed on a surface of a support substrate 3 facing away from the first oxide layer 2, including: performing vapor deposition treatment on both sides of the support substrate 3 to obtain a support substrate j having a first trap layer 6 and a second trap layer 7. By preparing the first trap layer 6 and the second trap layer 7, free carriers in the silicon-based substrate can be captured to avoid the generation of surface parasitic conductivity effect.

[0128] For example, Fig.38 As shown, a first oxide layer 2 is formed on a surface of one side of a supporting substrate 3, including: oxidizing a supporting substrate j having a first trap layer 6 and a second trap layer 7 so that the first trap layer 6 forms a first oxide layer 2 on a surface on a side away from the supporting substrate, thereby obtaining a supporting substrate k having a first oxide layer 2, a first trap layer 6 and a second trap layer 7.

[0129] In some embodiments, after forming a first trap layer 6 on one side surface of the supporting substrate 3 and / or forming a second trap layer 7 on another side surface of the supporting substrate 3 , the method further includes: forming a second oxide layer 4 on a surface of the supporting substrate 3 away from the first trap layer 6 .

[0130] For example, Fig.38 As shown, the second oxide layer 4 is formed on the surface of the supporting substrate 3 on the side away from the first trap layer 6, including: the supporting substrate f having the first oxide layer 2 and the first trap layer 6 is oxidized to form the second oxide layer 4 on the surface of the supporting substrate f on the side away from the first trap layer 6, and a supporting substrate h having the first oxide layer 2, the second oxide layer 4 and the first trap layer 6 is obtained.

[0131] In some embodiments, Fig.38 As shown, the second oxide layer 4 is formed on the surface of the supporting substrate 3 on the side away from the first trap layer 6, including: oxidizing the supporting substrate k having the first oxide layer 2, the first trap layer 6 and the second trap layer 7 so that the second oxide layer 4 is formed on the surface of the supporting substrate k on the side away from the first trap layer 6, and obtaining the supporting substrate m having the first oxide layer 2, the second oxide layer 4, the first trap layer 6 and the second trap layer 7.

[0132] In some embodiments, the vapor deposition process includes chemical vapor deposition (CVD) or physical vapor deposition (PVD), and the temperature during the vapor deposition process is 300-1000° C. The temperature during the vapor deposition process can be any point value within the above range, which is not enumerated here.

[0133] In some embodiments, after forming the first trap layer 6 on one side surface of the support substrate 3 , the method further comprises: performing a planarization process on the support substrate 3 having the first trap layer 6 .

[0134] Specifically, the planarization process includes: removing the thickness of the first trap layer 6 on the side away from the support substrate 3 , and the thickness ranges from 50 to 200 nm.

[0135] S300: Perform edge removal processing on the support substrate 3 and / or the functional substrate 8 forming the first oxide layer 2 to form a chamfer structure on one side edge of the support substrate 3 having the first oxide layer 2 and / or one side edge of the functional film layer 1 facing the first oxide layer 2, and bond the support substrate 3 having the first oxide layer 2 and the functional substrate 8 after edge removal processing to form a bonding structure; in the bonding structure, the functional film layer 1 is bonded to the first oxide layer 2; remove the non-functional layer 202 in the bonding structure to obtain a heterogeneous substrate structure. The heterogeneous substrate structure obtained by the above method has good quality and no wafer fragmentation occurs, which greatly improves the bonding yield during wafer bonding.

[0136] In some embodiments, the heterogeneous substrate structure includes a functional thin film layer 1, a first oxide layer 2 and a supporting substrate 3, wherein the supporting substrate 3 has a first substrate region 31 close to the first oxide layer 2 and a second substrate region 32 away from the first oxide layer 2; the radial dimension of the functional thin film layer 1 is at least smaller than the radial dimension of the second substrate region 32.

[0137] In some embodiments, the chamfer structure includes a first chamfer structure 100, and edge removal processing is performed on the support substrate 3 on which the first oxide layer 2 is formed, including:

[0138] The supporting substrate on which the first oxide layer 2 is formed is chamfered to form a first chamfered structure 100 at the edge of the first oxide layer 2 and the supporting substrate 3 close to the first oxide layer 2, so as to form a first substrate region 31, wherein the radial dimension of the first substrate region 31 is smaller than the radial dimension of the second substrate region 32. By providing the first chamfered structure 100, it is possible to avoid the silicon-based substrate with edge damage from easily causing a wider unbonded area and bonding holes during the bonding process.

[0139] Specifically, the radial dimensions of the first oxide layer 2 and the first substrate region 31 gradually increase in a direction close to the second substrate region 32. This arrangement can better release thermal stress in subsequent heat treatment processes and improve bonding quality.

[0140] Specifically, refer to Figure 3 The radial dimension of the first substrate region 31 is smaller than the radial dimension of the second substrate region 32 , and the radial dimension of the second oxide layer 2 is smaller than the radial dimension of the second substrate region 32 .

[0141] Specifically, refer to Figure 3 The first substrate region 31 has a first substrate surface on the side close to the first oxide layer 2, and the second substrate region 32 has a second substrate surface on the side close to the first oxide layer 2, and the difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface is 0-5 mm. The difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface can be any point value within the above range, which is not enumerated here. By setting the difference between the radial dimensions of the first substrate surface and the second substrate surface, the effective use area of ​​the wafer can be increased.

[0142] Specifically, the difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface is 1-5 mm. The difference between the radial dimension of the first substrate surface and the radial dimension of the second substrate surface can be any point value within the above range, which is not enumerated here. By further limiting the difference, the effective use area of ​​the wafer during bonding can be further guaranteed, and the occurrence of wafer fragmentation during transfer can be avoided.

[0143] In some embodiments, the first substrate region 31 has a first thickness, the second substrate region 32 has a second thickness, and the ratio between the first thickness and the second thickness is in the range of 0.001-0.235. The ratio between the first thickness and the second thickness can be any point value within the above range, which is not enumerated here. By setting the ratio of the above two thicknesses, it is possible to avoid the influence on the thermal stress and stability of the heterogeneous substrate structure due to the first substrate region 31 being too thick.

[0144] For example, Fig.37 As shown, the chamfer structure includes a first chamfer structure 100, and edge removal processing is performed on the support substrate a forming the first oxide layer 2, including:

[0145] The supporting substrate a with the first oxide layer 2 is chamfered to form a first chamfered structure 100 at the edge of the first oxide layer 2 and the supporting substrate 3 close to the first oxide layer 2 to form a first substrate region 31, thereby obtaining a supporting substrate b with the first chamfered structure 100.

[0146] For example, Fig.37 As shown, the chamfered structure includes a first chamfered structure 100, and edge removal processing is performed on the supporting substrate c forming the first oxide layer 2 and the second oxide layer 4, including: chamfering the supporting substrate c forming the first oxide layer 2 and the second oxide layer 4 to form the first chamfered structure 100 at the edge of the first oxide layer 2 and the supporting substrate 3 close to the first oxide layer 2 to form a first substrate area 31, and obtain a supporting substrate d with the first chamfered structure 100.

[0147] In some embodiments, the chamfer structure includes a second chamfer structure 200, and the second chamfer structure 200 is provided at the edge of the functional film layer 1 on the side facing the first oxide layer 2. By providing the second chamfer structure 200, dislocation defects caused by edge damaged functional wafers during the bonding process can be avoided, and the functional wafer can also be prevented from being broken during the bonding process, thereby improving the bonding yield.

[0148] Specifically, the radial dimension of the functional film layer 1 gradually decreases in the direction close to the first oxide layer 2. Through the above arrangement, the edge of the functional film layer 1 can be made smoother, thereby improving the bonding quality.

[0149] Specifically, refer to Figure 1 and Figure 2 , wherein the radial dimension of the functional film layer 1 is smaller than the radial dimension of the first oxide layer 2. This arrangement can ensure that the surface of the functional film layer 1 is smooth, thereby avoiding the occurrence of functional wafer fragmentation during bonding transfer.

[0150] For example, Fig.39As shown, the chamfer structure includes a second chamfer structure 200, and the functional substrate 8 is subjected to edge removal processing, including: chamfering the functional substrate 8 to form a second chamfer structure 200 at the edge of the functional thin film layer 1 on the side facing the first oxide layer 2, thereby obtaining a functional substrate A having a second chamfer structure 200.

[0151] In some embodiments, before edge removal of the functional substrate is performed, the method further includes: forming a functional oxide layer 5 on a surface of the functional substrate 8 close to the first oxide layer 2, wherein the functional substrate 8 includes a non-functional layer 202, a functional thin film layer 1 formed on the non-functional layer, and a functional oxide layer 5. When the functional wafer is transferred, the functional oxide layer 5 can better protect and isolate the functional thin film layer, thereby ensuring the stability of the performance during the subsequent device preparation.

[0152] For example, Fig.39 As shown, before performing edge removal processing on the functional substrate 8, the method further includes: forming a functional oxide layer 5 on a surface of the functional substrate 8 close to the first oxide layer to obtain a functional substrate C having a functional oxide layer.

[0153] In some embodiments, before performing edge removal treatment on the functional substrate 8, the method further includes: providing a silicon oxide substrate 9, bonding the silicon oxide substrate 8 and the functional substrate 9 and then performing annealing treatment to obtain a first bonding structure, and performing edge removal treatment and grinding and thinning treatment on the first bonding structure to obtain a second bonding structure having a second chamfer structure.

[0154] For example, Fig.40 As shown, before the functional substrate 8 is subjected to edge removal treatment, the method further includes: providing a silicon oxide substrate 9, bonding the silicon oxide substrate 9 and the functional substrate 8, and then performing annealing treatment to obtain a first bonding structure, and performing edge removal treatment and grinding and thinning treatment on the first bonding structure H to obtain a second bonding structure I having a second chamfered structure. The bonding strength of the first bonding structure can be improved by annealing treatment.

[0155] Specifically, the annealing treatment includes: performing the annealing treatment in a vacuum environment or in a protective atmosphere formed by at least one of nitrogen and argon, wherein the annealing treatment temperature is 50-250°C.

[0156] In some embodiments, before performing edge removal processing on the functional substrate, the method further includes: providing a silicon oxide substrate 9, bonding the silicon oxide substrate 9 and the functional substrate 8, and then performing annealing processing to obtain a first bonding structure H, and performing grinding and thinning processing on the first bonding structure H. The bonding strength of the first bonding structure can be improved by annealing processing.

[0157] Specifically, the annealing treatment includes: performing the annealing treatment in a vacuum environment or in a protective atmosphere formed by at least one of nitrogen and argon, wherein the annealing treatment temperature is 50-250°C.

[0158] For example, Fig.40 As shown, before edge removal of the functional substrate 8 is performed, the method further includes: providing a silicon oxide substrate 9, bonding the silicon oxide substrate 9 and the functional substrate 8, and then annealing to obtain a first bonding structure H, and grinding and thinning the first bonding structure H to obtain a third bonding structure K.

[0159] In some embodiments, the chamfer structure includes a third chamfer structure 300, and the functional substrate 8 is edge-removed, including: the functional substrate 8 having the functional oxide layer 5 is chamfered to form a third chamfer structure 300 at the edge of the functional oxide layer 5 and the functional film layer 1 near the functional oxide layer 5. By setting the third chamfer structure 300, not only can the functional oxide layer 5 be better protected and isolated from the functional film layer 1 when the functional wafer is transferred, thereby ensuring the stability of the performance during the subsequent preparation of the device, but also the edges of the functional oxide layer 5 and the functional film layer 1 can be smooth, avoiding the generation of unbonded areas during wafer transfer, and improving the bonding quality. Specifically, the radial dimensions of the functional oxide layer 5 and the functional film layer 1 gradually decrease in the direction close to the first oxide layer 2. This setting can further release the thermal stress in the subsequent heat treatment process and improve the bonding quality.

[0160] Specifically, refer to Figure 7 and Figure 8 , wherein the radial dimension of the functional oxide layer 5 is smaller than the radial dimension of the supporting substrate 3 .

[0161] In some embodiments, the difference between the functional oxide layer 5 and the first oxide layer 1 is in the range of 0-15 μm.

[0162] For example, Fig.39 As shown, the chamfer structure includes a third chamfer structure 300, and the functional substrate 8 is edge removed, including: chamfering the functional substrate C having a functional oxide layer to form a third chamfer structure 300 at the edge of the functional oxide layer 5 and the functional thin film layer 1 close to the functional oxide layer 5, to obtain a functional substrate D having a third chamfer structure 300.

[0163] In some embodiments, the chamfer structure includes a fourth chamfer structure 400, and edge removal processing is performed on the support substrate 3 forming the first oxide layer 2, including: chamfering the support substrate 3 having the first trap layer 6 to form the fourth chamfer structure 400 at the edge of the first trap layer 6, the first oxide layer 2 and the support substrate 3 close to the first oxide layer 2, so as to form the first substrate region 31. By adding the trap layer, the crystal quality of the substrate material in the silicon-based heterogeneous substrate can be improved, and defects and impurities can be reduced.

[0164] Specifically, the radial dimensions of the first trap layer 6, the first oxide layer 2 and the first substrate region 31 gradually increase in a direction approaching the second substrate region 31. Through this arrangement, thermal stress can be further released and bonding yield can be improved.

[0165] Specifically, refer to Fig.24 , wherein the radial dimension of the first trap layer 6 is smaller than the radial dimension of the second trap layer 7 , and the radial dimension of the second trap layer 7 is larger than the radial dimension of the first oxide layer 2 .

[0166] In some embodiments, the thickness of the first trap layer 6 and the second trap layer 7 are both in the range of 0-5 μm. By limiting the thickness of the first trap layer 6 and the second trap layer 7, it is avoided that the thickness is too large to affect the carrier migration, thereby reducing the performance of the prepared device.

[0167] Specifically, the thickness of the first trap layer 6 and the second trap layer 7 are both in the range of 0.3-3 μm. By adjusting the thickness of the trap layer, the distribution and mobility of carriers can be adjusted, and the electrical characteristics and optoelectronic performance of the device can be optimized.

[0168] For example, Fig.38 As shown, the chamfered structure includes a fourth chamfered structure 400, and the edge removal treatment is performed on the supporting substrate forming the first oxide layer, including: chamfering the supporting substrate f having the first trap layer to form the fourth chamfered structure 400 at the first trap layer 6, the first oxide layer 2 and the edge of the supporting substrate close to the first oxide layer 2 to form a first substrate region 31, and obtaining a supporting substrate g having the fourth chamfered structure 400.

[0169] In some embodiments, Fig.38 As shown, the chamfered structure includes a fourth chamfered structure 400, and the edge removal treatment is performed on the supporting substrate forming the first oxide layer, including: chamfering the supporting substrate k having the first oxide layer 2, the first trap layer 6 and the second trap layer 7 to form the fourth chamfered structure 400 at the edge of the first trap layer 6, the first oxide layer 2 and the supporting substrate close to the first oxide layer 2 to form a first substrate area 31, and obtain a supporting substrate l having the fourth chamfered structure 400 and the second trap layer 7.

[0170] In some embodiments, Fig.38 As shown, the chamfered structure includes a fourth chamfered structure 400, and edge removal processing is performed on the supporting substrate forming the first oxide layer, including: chamfering the supporting substrate h having the first oxide layer 2, the second oxide layer 4 and the first trap layer 6 to form the fourth chamfered structure 400 at the edge of the first trap layer 6, the first oxide layer 2 and the supporting substrate close to the first oxide layer 2 to form a first substrate area 31, and obtain a supporting substrate i having the fourth chamfered structure 400 and the second oxide layer 4.

[0171] In some embodiments, Fig.38 As shown, the chamfered structure includes a fourth chamfered structure 400, and the edge removal treatment is performed on the supporting substrate forming the first oxide layer, including: the supporting substrate m having the first oxide layer, the second oxide layer, the first trap layer and the second trap layer is chamfered to form the fourth chamfered structure 400 on the first trap layer 6, the first oxide layer 2 and the edge of the supporting substrate close to the first oxide layer 2 to form a first substrate area 31, and obtain the supporting substrate n having the fourth chamfered structure 400, the first trap layer 6, the second trap layer 7 and the second oxide layer 4.

[0172] In some embodiments, before the support substrate 3 having the first oxide layer 2 and the functional substrate 8 are bonded, the method further includes: performing ion implantation on one side surface of the functional substrate 8 to form a defect layer 202 at a preset depth of the functional substrate 8, thereby obtaining a functional substrate 8 having a defect layer 201. Through the ion implantation peeling transfer technology, a high-quality thin film can be peeled off from the original material and transferred to another substrate, retaining the excellent crystal quality of the material.

[0173] For example, Fig.39 As shown, before the supporting substrate 3 having the first oxide layer 2 and the functional substrate 8 are bonded, the method further includes: performing ion implantation on a surface of one side of the functional substrate 8 to form a defect layer 201 at a preset depth of the functional substrate 8 to obtain a functional substrate F having the defect layer 201.

[0174] For example, Fig.39 As shown, after the edge removal treatment is performed on the functional substrate 8 and before the supporting substrate 3 having the first oxide layer 2 and the functional substrate 8 are bonded, the method also includes: performing ion implantation on a side surface of the functional substrate D having the third chamfered structure 300 to form a defect layer 201 at a preset depth of the functional substrate D, thereby obtaining a functional substrate E having the third chamfered structure 300 and the defect layer 201.

[0175] For example, Fig.39As shown, before the supporting substrate 3 having the first oxide layer 2 and the functional substrate 8 are bonded, the method further includes: performing ion implantation on a side surface of the functional substrate C having the functional oxide layer 5 to form a defect layer 201 at a preset depth of the functional substrate C, thereby obtaining a functional substrate G having the functional oxide layer 5 and the defect layer 201.

[0176] For example, Fig.39 As shown, before the supporting substrate 3 having the first oxide layer 2 and the functional substrate 8 are bonded, the method further includes: performing ion implantation on a side surface of the functional substrate A having the second chamfered structure 200 to form a defect layer 201 at a preset depth of the functional substrate A, thereby obtaining a functional substrate B having the defect layer 201.

[0177] For example, Fig.40 As shown, before the supporting substrate 3 having the first oxide layer 2 and the functional substrate 8 are bonded, the method also includes: performing ion implantation on a side surface of the second bonding structure I having the second chamfered structure 200 to form a defect layer 201 at a preset depth of the functional substrate of the second bonding structure I, thereby obtaining a functional substrate J having the defect layer 201.

[0178] For example, Fig.40 As shown, before the supporting substrate having the first oxide layer 2 and the functional substrate 8 are bonded, the method also includes: performing ion implantation on a side surface of the third bonding structure K to form a defect layer 201 at a preset depth of the functional substrate K of the third bonding structure K, thereby obtaining a functional substrate L having a defect layer 201.

[0179] In some embodiments, the ion species used in the process of performing ion implantation on the surface of the functional substrate 8 includes at least one of hydrogen ions, helium ions, or argon ions.

[0180] Specifically, during the ion implantation process on the surface of the functional substrate 8, the implantation energy is 20KeV-300KeV, and the implantation dose is 1E14 ions / cm 2 to 1E17 ions / cm 2 The higher the ion implantation energy, the deeper the ions can penetrate into the wafer. However, high-energy ion implantation may cause damage to the wafer crystal structure. Therefore, the present invention limits the ion implantation energy and implantation dose.

[0181] In some embodiments, the support substrate 3 having the first oxide layer 2 after edge removal processing is bonded to the functional substrate 8 to form a bonding structure, wherein the bonding structure includes a bonding structure having a defect layer 201 and a bonding structure without the defect layer 201 .

[0182] In some embodiments, removing the non-functional layer 202 in the bonding structure includes: annealing the bonding structure having the defective layer 201 to peel off the non-functional layer 202 along the defective layer 201 to obtain a bonding structure having a first damaged layer, and then post-annealing and flattening the bonding structure having the first damaged layer to obtain a silicon-based heterogeneous substrate structure.

[0183] In some embodiments, the non-functional layer 202 in the bonding structure is removed, including: annealing and grinding and thinning the bonding structure without the defective layer 201 to obtain a bonding structure with a second damaged layer, and then flattening the bonding structure with the second damaged layer to obtain a silicon-based heterogeneous substrate structure.

[0184] Specifically, the annealing treatment includes: performing the annealing treatment in a vacuum environment or in a protective atmosphere formed by at least one of nitrogen and argon, wherein the annealing treatment temperature is 50-250°C.

[0185] Specifically, the post-annealing treatment includes: performing the post-annealing treatment in a vacuum environment or in a protective atmosphere formed by at least one of nitrogen, oxygen and argon, wherein the temperature of the post-annealing treatment is 250-650°C.

[0186] This embodiment also provides a semiconductor device, comprising the silicon-based heterogeneous substrate structure described in the above embodiment.

[0187] The specific embodiments of the present application are introduced below with reference to the accompanying drawings in combination with the above-mentioned silicon-based heterogeneous substrate structure and its preparation method. The following embodiments describe the technical solution of the present application in more detail, and these embodiments are only used for illustrative purposes, because various modifications and changes within the scope of the disclosure of the present application are obvious to those skilled in the art. The reagents used in the embodiments can be obtained commercially or synthesized according to conventional methods, and can be used directly without further treatment, and the instruments and devices used in the embodiments can be obtained commercially.

[0188] Example 1

[0189] This embodiment provides a method for preparing a silicon-based heterogeneous substrate structure, comprising the following steps:

[0190] S100: providing a support substrate 3 and a functional substrate 8, wherein the functional substrate 8 comprises a non-functional layer 202 and a functional thin film layer 1 formed on the non-functional layer 202, the support substrate 3 is made of polycrystalline silicon, the functional substrate 8 is made of single-crystal lithium niobate, the thickness of the functional thin film layer 1 is 0.05-20 μm, and the thickness of the support substrate 3 is 200-1000 μm;

[0191] S200: performing oxidation treatment on one side surface of the support substrate 3 to form a first oxide layer 2 on one side surface of the support substrate 3, thereby obtaining a support substrate a having the first oxide layer 2, wherein the first oxide layer 2 is made of silicon oxide and has a thickness of 0-15 μm;

[0192] S300: performing chamfering on the functional substrate 8, thereby forming a second chamfered structure 200 on the edge of the functional thin film layer 1 on the side facing the first oxide layer 2, thereby obtaining a functional substrate A having the second chamfered structure 200;

[0193] S400: bonding the functional substrate A and the supporting substrate a to obtain a bonding structure without the defect layer 201, annealing the bonding structure at a temperature of 50-250° C. in a vacuum environment or in a protective atmosphere formed by at least one of nitrogen and argon, then grinding and thinning the annealed bonding structure to obtain a bonding structure with a second damaged layer, and then flattening the bonding structure with the second damaged layer to obtain a bonding structure as shown in FIG. Figure 1 The silicon-based heterogeneous substrate structure shown.

[0194] In this embodiment, if Fig.41 As shown, there is no wafer breakage after wafer bonding.

[0195] Comparative Example 1

[0196] This comparative example provides a method for preparing a silicon-based heterogeneous substrate structure, comprising the following steps:

[0197] S100: providing a support substrate 3 and a functional substrate 8, wherein the functional substrate 8 comprises a non-functional layer 202 and a functional thin film layer 1 formed on the non-functional layer 202, the support substrate 3 is made of polycrystalline silicon, the functional substrate 8 is made of single-crystal lithium niobate, the thickness of the functional thin film layer 1 is 0.05-20 μm, and the thickness of the support substrate 3 is 200-1000 μm;

[0198] S200: performing oxidation treatment on one side surface of the support substrate 3 to form a first oxide layer 2 on one side surface of the support substrate 3, thereby obtaining a support substrate having the first oxide layer 2, wherein the first oxide layer 2 is made of silicon oxide and has a thickness of 0-15 μm;

[0199] S300: Bonding the functional substrate 8 and the supporting substrate having the first oxide layer 2 to obtain a bonding structure without the defect layer 201, annealing the bonding structure at a temperature of 50-250° C., and annealing the bonding structure in a vacuum environment or in a protective atmosphere formed by at least one of nitrogen and argon, then grinding and thinning the annealed bonding structure to obtain a bonding structure with a second damaged layer, and then flattening the bonding structure with the second damaged layer to obtain a bonding structure as shown in FIG. Figure 1 The silicon-based heterogeneous substrate structure shown.

[0200] In this comparative example, Fig.42 As shown, wafer breakage occurs after wafer bonding.

[0201] The above description has fully disclosed the specific implementation methods of the present application. It should be pointed out that any changes made by technicians familiar with the field to the specific implementation methods of the present application do not deviate from the scope of the claims of the present application. Accordingly, the scope of the claims of the present application is not limited to the above specific implementation methods.

Claims

1. A silicon-based heterogeneous substrate structure, characterized in that: include: A support substrate having a first oxide layer on one surface; A functional thin film layer located on a surface of the first oxide layer facing away from the supporting substrate; A chamfer structure is provided on an edge of one side of the support substrate having the first oxide layer and / or an edge of one side of the functional thin film layer facing the first oxide layer.

2. The heterogeneous substrate structure according to claim 1, characterized in that: The support substrate comprises a first substrate region close to the first oxide layer and a second substrate region far away from the first oxide layer; the radial dimension of the functional thin film layer is at least smaller than the radial dimension of the second substrate region.

3. The heterogeneous substrate structure according to claim 2, characterized in that: The radial dimension of the first substrate region is smaller than the radial dimension of the second substrate region.

4. The heterogeneous substrate structure according to claim 2, characterized in that: The support substrate satisfies at least one of the following characteristics: The first substrate region has a first substrate surface on a side close to the first oxide layer, the second substrate region has a second substrate surface on a side close to the first oxide layer, and a difference between a radial dimension of the first substrate surface and a radial dimension of the second substrate surface is 0-5 mm; The first substrate region has a first thickness, the second substrate region has a second thickness, and a ratio between the first thickness and the second thickness ranges from 0.001 to 0.

235.

5. The heterogeneous substrate structure according to any one of claims 1 to 4, characterized in that: The chamfered structure includes a first chamfered structure, and the first chamfered structure is provided at edges of the first oxide layer and the support substrate close to the first oxide layer.

6. The heterogeneous substrate structure according to claim 1, characterized in that: The heterogeneous substrate structure also satisfies at least one of the following characteristics: The chamfer structure includes a second chamfer structure, and the second chamfer structure is provided at an edge of the functional film layer on a side facing the first oxide layer; The heterogeneous substrate structure further includes a functional oxide layer located on a surface of a side of the functional thin film layer close to the first oxide layer, and the chamfer structure includes a third chamfer structure, and the third chamfer structure is provided at the edge of the functional oxide layer and the functional thin film layer close to the functional oxide layer; The difference between the functional oxide layer and the first oxide layer ranges from 0 to 15 μm.

7. The heterogeneous substrate structure according to claim 1, characterized in that: The heterogeneous substrate structure further includes a second oxide layer located on a surface of the support substrate facing away from the first oxide layer, and the second oxide layer satisfies at least one of the following characteristics: The radial dimension of the second oxide layer is greater than the radial dimension of the functional thin film layer; The difference between the thickness of the first oxide layer and the thickness of the second oxide layer is 0-15 μm.

8. The heterogeneous substrate structure according to claim 1, characterized in that: The heterogeneous substrate structure further includes a first trap layer located between the first oxide layer and the supporting substrate and / or a second trap layer located on a surface of the supporting substrate facing away from the first oxide layer, wherein the first trap layer and the second trap layer satisfy at least one of the following characteristics: The radial dimension of the second trap layer is greater than the radial dimension of the functional thin film layer; The chamfered structure includes a fourth chamfered structure, and the fourth chamfered structure is provided on the first trap layer, the first oxide layer and the edge of the support substrate close to the first oxide layer; The thickness of the first trap layer and the second trap layer are both in the range of 0-5 μm.

9. The heterogeneous substrate structure according to any one of claims 1 to 8, characterized in that: The heterogeneous substrate structure satisfies at least one of the following characteristics: The thickness of the functional film layer is 0.05-20 μm; The thickness of the first oxide layer is 0-15 μm; The thickness of the support substrate is 200-1000 μm.

10. A method for preparing a silicon-based heterogeneous substrate structure, characterized in that: The preparation method is used to prepare the heterogeneous substrate structure according to any one of claims 1 to 9, and the preparation method comprises: Providing a supporting substrate and a functional substrate, wherein the functional substrate comprises a non-functional layer and a functional thin film layer formed on the non-functional layer; forming a first oxide layer on a surface of one side of the support substrate; The supporting substrate forming the first oxide layer and / or the functional substrate are subjected to edge removal treatment to form a chamfer structure on an edge of one side of the supporting substrate having the first oxide layer and / or an edge of one side of the functional thin film layer facing the first oxide layer, and the supporting substrate having the first oxide layer and the functional substrate after the edge removal treatment are bonded to form a bonding structure; the functional thin film layer in the bonding structure is bonded to the first oxide layer; and the non-functional layer in the bonding structure is removed to obtain a heterogeneous substrate structure.

11. The preparation method according to claim 10, characterized in that: The heterogeneous substrate structure comprises the functional thin film layer, the first oxide layer and the supporting substrate, wherein the supporting substrate has a first substrate region close to the first oxide layer and a second substrate region far from the first oxide layer; The radial dimension of the functional thin film layer is at least smaller than the radial dimension of the second substrate region.

12. The preparation method according to claim 11, characterized in that: The chamfer structure includes a first chamfer structure, and edge removal processing is performed on the support substrate on which the first oxide layer is formed, including: The supporting substrate for forming the first oxide layer is chamfered to form the first chamfered structure at the first oxide layer and the edge of the supporting substrate close to the first oxide layer to form the first substrate region, wherein the radial dimension of the first substrate region is smaller than the radial dimension of the second substrate region.

13. The preparation method according to claim 10, characterized in that: The chamfer structure includes a second chamfer structure, and edge removal processing is performed on the functional substrate, including: chamfering the functional substrate to form the second chamfer structure at the edge of the functional thin film layer on a side facing the first oxide layer.

14. The method according to claim 10, characterized in that Before edge removal of the functional substrate, the method further includes: forming a functional oxide layer on a surface of the functional substrate close to the first oxide layer, wherein the functional substrate includes a non-functional layer, a functional thin film layer formed on the non-functional layer, and a functional oxide layer.

15. The method according to claim 14, characterized in that The chamfer structure includes a third chamfer structure, and edge removal processing is performed on the functional substrate, including: chamfering the functional substrate having the functional oxide layer to form the third chamfer structure at the edge of the functional oxide layer and the functional thin film layer close to the functional oxide layer; The difference between the functional oxide layer and the first oxide layer ranges from 0 to 15 μm.

16. The method according to claim 10, characterized in that Before forming a first oxide layer on one side surface of the supporting substrate, the method further includes: forming a first trap layer between the first oxide layer and the supporting substrate and / or forming a second trap layer on a side surface of the supporting substrate away from the first oxide layer, wherein the radial dimension of the second trap layer is greater than the radial dimension of the functional thin film layer, and the thickness range of the first trap layer and the second trap layer are both 0-5 μm.

17. The preparation method according to claim 16, characterized in that: The chamfered structure includes a fourth chamfered structure, and edge removal processing is performed on the supporting substrate forming the first oxide layer, including: chamfering the supporting substrate having the first trap layer to form the fourth chamfered structure at the edge of the first trap layer, the first oxide layer and the supporting substrate close to the first oxide layer to form the first substrate area.

18. A semiconductor device, characterized in that: It comprises the silicon-based heterogeneous substrate structure as described in any one of claims 1-9.

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