Surge protection devices and systems

Abstract

The present application relates to a surge protection device and system, wherein the surge protection device is connected to an external signal input terminal and a target port respectively; the surge protection device comprises a semiconductor discharge tube; the anode of the semiconductor discharge tube is provided with a first spike structure, and the cathode of the semiconductor discharge tube is provided with a second spike structure; the first spike structure and the second spike structure are arranged relatively; the signal input terminal, the surge protection device and the target port are all grounded. Through the present application, the problem that the existing surge protection device is difficult to apply to high-speed signal ports and cannot meet the high-speed signal transmission under normal protection state is solved, and the high-speed signal transmission under normal protection state is achieved.

Description

Technical Field

[0001] The present application relates to the field of electromagnetic compatibility technology, and in particular to a surge protection device and system. Background Art

[0002] Surge protection technology can be used in the protection design of multiple surge ports such as power ports and signal ports, such as High Definition Multimedia Interface (HDMI) and RS485 ports. It can provide surge protection for the subsequent chips of the ports, preventing high-voltage surges from coupling surge energy into electronic devices through external wiring, causing device loss inside the device, and even causing safety accidents such as explosions of electronic devices.

[0003] In the prior art, the signal transmission frequency of electronic equipment is getting higher and higher, but if the existing surge protection device is applied to the high-speed signal port, it often causes problems such as signal distortion and cannot meet the high-speed signal transmission under normal protection state.

[0004] With regard to the problem in the related art that the existing surge protection devices are difficult to apply to high-speed signal ports and cannot meet the requirements of high-speed signal transmission under normal protection conditions, no effective solution has been proposed yet. Summary of the invention

[0005] In this embodiment, a surge protection device and system are provided to solve the problem in the related art that the existing surge protection devices are difficult to apply to high-speed signal ports and cannot meet the requirements of high-speed signal transmission under normal protection conditions.

[0006] In a first aspect, a surge protection device is provided in this embodiment, wherein the protection device is connected to an external signal input terminal and a target port respectively; the surge protection device comprises a semiconductor discharge tube; wherein,

[0007] The anode of the semiconductor discharge tube is provided with a first spike structure, and the cathode of the semiconductor discharge tube is provided with a second spike structure; the first spike structure and the second spike structure are arranged opposite to each other;

[0008] The signal input terminal, the surge protection device and the target port are all grounded.

[0009] In some embodiments, a reserved channel is provided between the first peak structure and the second peak structure.

[0010] In some embodiments, the width of the reserved channel is 0.5 mm to 1.5 mm.

[0011] In some of the embodiments, the surge protection device further comprises a clamping type protection device;

[0012] The clamping protection device is connected in series with the semiconductor discharge tube.

[0013] In some of the embodiments, the clamping protection device is a transient suppression diode or a varistor.

[0014] In some of the embodiments, the surge protection device further comprises a suppression circuit; wherein,

[0015] The suppression circuit is connected in parallel with the semiconductor discharge tube.

[0016] In some of the embodiments, the suppression circuit includes a first magnetic bead and a capacitor C1;

[0017] The first magnetic bead and the capacitor C1 are connected in series.

[0018] In some of these embodiments, the suppression circuit further includes a second magnetic bead;

[0019] The second magnetic bead and the capacitor C1 are connected in series.

[0020] In some of the embodiments, the tip of the spike structure is coated with an anti-oxidation material layer.

[0021] In a second aspect, a surge protection system is provided in this embodiment, and the system includes the surge protection device described in any one of the above-mentioned first aspects.

[0022] Compared with the related art, in the surge protection device and system provided in this embodiment, the surge protection device is respectively connected to the external signal input terminal and the target port; the surge protection device includes a semiconductor discharge tube; the anode of the semiconductor discharge tube is provided with a first spike structure, and the cathode of the semiconductor discharge tube is provided with a second spike structure; the first spike structure and the second spike structure are arranged relatively; the signal input terminal, the surge protection device and the target port are all grounded, which solves the problem that the existing surge protection device is difficult to apply to high-speed signal ports and cannot meet the high-speed signal transmission under normal protection state, and realizes the improvement of signal transmission distance, the reduction of signal delay, and the satisfaction of high-speed signal transmission under normal protection state.

[0023] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0025] Figure 1is a schematic structural diagram of a surge protection device provided in one embodiment of the present application;

[0026] Figure 2 is a schematic diagram of a semiconductor discharge tube provided in one embodiment of the present application;

[0027] Figure 3 is a schematic diagram of a suppression circuit provided in an embodiment of the present application;

[0028] Figure 4 This is a schematic diagram of the connection between a clamping protection device and a semiconductor discharge tube provided in an embodiment of the present application;

[0029] Figure 5 This is a connection architecture diagram of a surge protection device provided in one embodiment of the present application;

[0030] Figure 6 It is a structural block diagram of a surge protection device provided in a preferred embodiment of the present application.

[0031] In the figure: 100, signal input terminal; 200, surge protection device; 300, target port; 400, main control chip; 210, semiconductor discharge tube; 211, first spike structure; 212, second spike structure; 220, clamping type protection device; 230, suppression circuit. DETAILED DESCRIPTION

[0032] In order to more clearly understand the purpose, technical solutions and advantages of the present application, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments.

[0033] Unless otherwise defined, the technical terms or scientific terms involved in this application shall have the general meaning understood by people with general skills in the technical field to which this application belongs. The words "one", "a", "the", "these" and the like in this application do not indicate a quantitative limitation, and they may be singular or plural. The terms "include", "comprise", "have" and any variants thereof involved in this application are intended to cover non-exclusive inclusions; for example, a process, method and system, product or device comprising a series of steps or modules (units) is not limited to the listed steps or modules (units), but may include unlisted steps or modules (units), or may include other steps or modules (units) inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships, for example, "A and / or B" may mean: A exists alone, A and B exist at the same time, and B exists alone. Generally, the character " / " indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", "third", etc. in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.

[0034] In this embodiment, a surge protection device is provided. Figure 1 Schematic diagram of the structure of the surge protection device of this embodiment. Figure 1 As shown, the surge protection device 200 is connected to the external signal input terminal 100 and the target port 300 respectively; the surge protection device 200 includes a semiconductor discharge tube 210; wherein,

[0035] The anode of the semiconductor discharge tube 210 is provided with a first spike structure 211, and the cathode of the semiconductor discharge tube 210 is provided with a second spike structure 212; the first spike structure 211 and the second spike structure 212 are arranged opposite to each other;

[0036] The signal input terminal 100 , the surge protection device 200 , and the target port 300 are all grounded.

[0037] In this embodiment, the surge protection device 200 is respectively connected to the external signal input terminal 100 and the target port 300. The signal input terminal 100 is a signal interface for surge input, and the target port 300 can generally be HDMI, RS485, etc., and the target port 300 can be connected to a main control chip 400.

[0038] The surge protection device 200 includes a semiconductor discharge tube 210 (Thyristor Surge Suppressors, TSS), such as Figure 2 As shown, a double-electrode form is adopted, a single pin is led out in the PN structure of the semiconductor discharge tube 210, an anode with a first spike structure 211 is constructed on the single pin, and correspondingly, a cathode with a second spike structure 212 is constructed on the plane at the same time, the first spike structure 211 and the second spike structure 212 are arranged relatively, that is, the peak positions in the two spike structures are relative, so as to optimize the inter-electrode structure of the PN pole inside the TSS, reduce the generation of the internal junction capacitance of the TSS, and thus reduce the influence of the parasitic capacitance of the TSS on the high-speed signal routing. The two spike structures are sealed, and the peak positions in the two spike structures are coated with an anti-oxidation material layer, such as a stainless steel coating, and a high-conductivity material is added to the peak positions in the two spike structures. It can be understood that a reserved channel is provided between the first peak structure 211 and the second peak structure 212, and the channel is the path position of the surge, so that there is basically no junction capacitance inside the TSS, and the width of the reserved channel is set according to the surge intensity and junction capacitance requirements in actual applications, that is, the distance between the peak position of the first peak structure 211 and the peak position of the second peak structure 212 is reasonably set. In this embodiment, the width of the reserved channel is usually 0.5mm~1.5mm, which can meet the channel design requirements to stably achieve surge protection.

[0039] It should be noted that, as a two-terminal semiconductor device, the semiconductor discharge tube TSS will produce an instantaneous avalanche effect when the voltage exceeds its breakdown voltage, realize energy transfer and protection, and effectively protect the circuit from damage by transient surge voltage. However, when the traditional semiconductor discharge tube TSS is applied to high-speed signal routing, it will cause high-speed signal distortion and signal transmission abnormality, resulting in a reduction in signal transmission distance and serious signal delay. In this embodiment, by adding a first spike structure 211 and a second spike structure 212 to the anode of the semiconductor discharge tube 210 and the cathode of the semiconductor discharge tube 210, respectively, and the first spike structure 211 and the second spike structure 212 are arranged relative to each other, the inter-electrode structure of the PN pole inside the TSS is optimized to reduce the generation of the internal junction capacitance of the TSS, thereby reducing the influence of the parasitic capacitance of the TSS on the high-speed signal routing, improving the signal transmission distance, reducing the signal delay, and realizing the function of satisfying high-speed signal transmission under normal protection.

[0040] Furthermore, the surge protection device 200 further includes a clamping type protection device 220, which is connected in series with the semiconductor discharge tube 210. The clamping type protection device 220 includes, but is not limited to, a transient suppression diode and a varistor. In this embodiment, by connecting the clamping type protection device 220 in series, the leakage current is suppressed on the basis of reducing the junction capacitance, so as to avoid the protection device being unable to be closed due to the risk of freewheeling during the short circuit process, thereby affecting the normal circuit operation.

[0041] In addition, the surge protection device 200 is also provided with a suppression circuit 230, which is connected in parallel with the semiconductor discharge tube 210. The suppression circuit 230 can be implemented by at least one magnetic bead connected in series with a capacitor, or can be implemented by a resistor, so as to reduce the surge peak of the semiconductor discharge tube TSS and improve the surge protection level by adding the suppression circuit 230 outside the semiconductor discharge tube TSS. Exemplarily, the suppression circuit 230 includes a first magnetic bead and a capacitor C1, and the first magnetic bead and the capacitor C1 are connected in series; or, the suppression circuit 230 also includes a first magnetic bead, a capacitor C1, and a second magnetic bead, and the first magnetic bead, the capacitor C1, and the second magnetic bead are connected in series in sequence, such as Figure 3 As shown, two coil structures are wound separately, capacitor C1 is welded between the two coils, insulating material is sprayed on the capacitor, ferrite material is used to plastic-encapsulate the structure of the first magnetic bead, the second magnetic bead and the capacitor, and pins are reserved for connecting the protection circuit part in the surge protection device 200. It can be understood that the surge frequency is mostly hundreds of megahertz, and the use of magnetic beads, capacitors and magnetic beads in series can better suppress the peak after the surge impact, that is, it is more suitable for high frequencies.

[0042] Surge protection technology can be used in the protection design of multiple surge ports such as power ports and signal ports, and can provide surge protection for the downstream chips of the ports, preventing high-voltage surges from coupling surge energy into the electronic equipment through external wiring, causing device loss inside the equipment, and even causing safety accidents such as explosions of electronic equipment. In the prior art, the signal transmission frequency of electronic equipment is getting higher and higher, but if the existing surge protection device is applied to high-speed signal ports, it often causes problems such as signal distortion and cannot meet the requirements of high-speed signal transmission under normal protection conditions.

[0043] Compared with the prior art, the surge protection device 200 of the present application is respectively connected to the external signal input terminal 100 and the target port 300; the surge protection device 200 includes a semiconductor discharge tube 210; the anode of the semiconductor discharge tube 210 is provided with a first spike structure 211, and the cathode of the semiconductor discharge tube 210 is provided with a second spike structure 212; the first spike structure 211 and the second spike structure 212 are arranged opposite to each other; the signal input terminal 100, the surge protection device 200 and the target port 300 are all grounded. Based on this, by adding a first spike structure 211 and a second spike structure 212 to the anode of the semiconductor discharge tube 210 and the cathode of the semiconductor discharge tube 210 respectively, and the first spike structure 211 and the second spike structure 212 are arranged relatively to each other, the inter-electrode structure of the PN pole inside the TSS is optimized to reduce the generation of the internal junction capacitance of the TSS, thereby reducing the influence of the parasitic capacitance of the TSS on the high-speed signal routing, solving the problem that the existing surge protection device is difficult to apply to the high-speed signal port and cannot meet the high-speed signal transmission under the normal protection state, and realizing the improvement of the signal transmission distance, the reduction of the signal delay, and the satisfaction of the high-speed signal transmission under the normal protection state.

[0044] In some of the embodiments, a reserved channel is provided between the first peak structure 211 and the second peak structure 212 .

[0045] Specifically, a first spike structure 211 is provided at the anode of the semiconductor discharge tube 210, and a second spike structure 212 is provided at the cathode of the semiconductor discharge tube 210. The first spike structure 211 and the second spike structure 212 are arranged relatively to each other, and a reserved channel is provided between the first spike structure 211 and the second spike structure 212. The channel serves as a surge passage position, and the spike structure is sealed.

[0046] It should be noted that in this embodiment, it is necessary to control the width of the reserved channel, that is, the distance between the peak position of the first peak structure 211 and the peak position of the first peak structure 211. The width of the reserved channel is set according to the requirements of surge strength and junction capacitance in actual applications. Usually, the width of the reserved channel is preferably 0.5mm~1.5mm to meet the channel design requirements to stably achieve surge protection.

[0047] Through this embodiment, a reserved channel is provided between the first spike structure 211 and the second spike structure 212, and the channel serves as a surge path, so that an optimized PN structure is adopted to construct a new surge channel, so that there is basically no junction capacitance inside the TSS, so as to effectively cope with surge current and achieve surge protection.

[0048] In some of the embodiments, the surge protection device 200 further includes a clamping protection device 220;

[0049] The clamping protection device 220 is connected in series with the semiconductor discharge tube 210 .

[0050] Specifically, Figure 4 As shown, the surge protection device 200 in this embodiment further includes a clamping type protection device 220, which is connected in series with the semiconductor discharge tube 210 to form the surge protection device 200, and the two ends of which are respectively connected to the external signal input terminal 100 and the target port 300. The clamping type protection device 220 can be a transient suppression diode or a varistor.

[0051] It should be noted that in this embodiment, by connecting the semiconductor discharge tube 210 in series with the clamping protection device 220, the leakage current is further suppressed on the basis of reducing the junction capacitance, thereby avoiding the surge protection device 200 being unable to be closed due to the risk of follow-current during the short circuit process, thereby affecting the normal circuit operation.

[0052] Through this embodiment, a clamping protection device 220 is also provided in the surge protection device 200 and is connected in series with the semiconductor discharge tube 210, so as to suppress the leakage current on the basis of reducing the junction capacitance, and avoid the protection device being unable to be closed due to the risk of follow-current during the short circuit process, thereby ensuring the normal operation of the circuit and improving the reliability of the equipment.

[0053] In some embodiments, the surge protection device 200 further includes a suppression circuit 230 ; wherein the suppression circuit 230 is connected in parallel with the semiconductor discharge tube 210 .

[0054] In this embodiment, the surge protection device 200 further includes a suppression circuit 230, which is connected in parallel with the semiconductor discharge tube 210. The suppression circuit 230 can be implemented by at least one magnetic bead connected in series with a capacitor, or by a resistor, so as to reduce the surge spike of the semiconductor discharge tube TSS by adding the suppression circuit 230 outside the semiconductor discharge tube TSS, thereby improving the surge protection level. It should be noted that, when the semiconductor discharge tube 210 is connected in series with the clamping type protection device 220, the suppression circuit 230 is connected in parallel to the two ends of the series structure composed of the clamping type protection device 220 and the semiconductor discharge tube 210, thereby constructing a new series and parallel architecture, and simultaneously reducing the influence of the junction capacitance and the surge spike.

[0055] Exemplarily, the suppression circuit 230 is composed of a first magnetic bead and a capacitor C1, and the first magnetic bead and the capacitor C1 are connected in series; or, the suppression circuit 230 is composed of a first magnetic bead, a capacitor C1, and a second magnetic bead, and the first magnetic bead, the capacitor C1, and the second magnetic bead are connected in series in sequence. It can be understood that the surge frequency is mostly a frequency of hundreds of megahertz, and the use of a magnetic bead capacitor magnetic bead in series can better suppress the peak after the surge impact, that is, it is more suitable for high frequencies.

[0056] According to this embodiment, a suppression circuit 230 is provided in the surge protection device 200 . The suppression circuit 230 is connected in parallel with the semiconductor discharge tube 210 , so as to reduce the surge peak of the semiconductor discharge tube TSS and improve the surge protection level.

[0057] In some of the embodiments, the suppression circuit 230 includes a first magnetic bead and a capacitor C1;

[0058] The first magnetic bead and the capacitor C1 are connected in series.

[0059] Specifically, the suppression circuit 230 can be implemented by at least one magnetic bead connected in series with a capacitor. For example, the suppression circuit 230 is composed of a first magnetic bead and a capacitor C1, and the first magnetic bead and the capacitor C1 are connected in series; or, the suppression circuit 230 is composed of a first magnetic bead, a capacitor C1, and a second magnetic bead, and the first magnetic bead, the capacitor C1, and the second magnetic bead are connected in series in sequence.

[0060] The circuit structure in which the first magnetic bead, the capacitor C1 and the second magnetic bead are connected in series is described in detail, two coil structures are wound respectively, the capacitor C1 is welded to the middle of the two coils, an insulating material is sprayed on the capacitor, the whole structure is sealed with ferrite material, and pins are reserved for connecting the protection circuit part in the surge protection device 200. Among them, the surge frequency is mostly hundreds of megahertz, and the form of magnetic beads, capacitors and magnetic beads connected in series can better suppress the peak after the surge impact, that is, it is more suitable for high frequencies.

[0061] Through this embodiment, the suppression circuit 230 is formed by the first magnetic bead and the capacitor C1 connected in series, and the suppression circuit 230 is connected in parallel with the semiconductor discharge tube 210, so as to effectively reduce the surge peak of the semiconductor discharge tube TSS.

[0062] In some of the embodiments, the tip of the spike structure is coated with an anti-oxidation material layer.

[0063] Specifically, a single pin is led out from the PN structure of the semiconductor discharge tube 210, and an anode with a first spike structure 211 is constructed on the single pin, and a cathode with a second spike structure 212 is constructed on the plane, and the peak positions in the first spike structure 211 and the second spike structure 212 are relative. The peak positions in the first spike structure 211 and the second spike structure 212 are coated with an anti-oxidation material layer, such as a stainless steel coating, and high-conductivity materials can be added to the peak positions in the first spike structure 211 and the second spike structure.

[0064] Through this embodiment, the peak positions in the first peak structure 211 and the second peak structure are coated with an anti-oxidation material layer, which effectively prevents oxidation, thereby ensuring the normal operation of the device and improving the reliability of the device.

[0065] The overall architecture of this embodiment is described and illustrated below.

[0066] Figure 5 is a connection architecture diagram of the surge protection device of this embodiment, such as Figure 5 As shown, the surge protection device 200 is respectively connected to the external signal input terminal 100 and the target port 300, and the signal input terminal 100, the surge protection device 200 and the target port 300 are all grounded; wherein, the surge protection device 200 includes a semiconductor discharge tube 210 and a suppression circuit 230, and the suppression circuit 230 and the semiconductor discharge tube 210 are connected in parallel.

[0067] Specifically, a single pin is led out from the PN structure of the semiconductor discharge tube 210, and an anode with a first spike structure 211 is constructed on the single pin, and a cathode with a second spike structure 212 is constructed on the plane. The peak positions of the first spike structure 211 and the second spike structure 212 are relative, so as to optimize the inter-electrode structure of the PN pole inside the TSS and reduce the generation of the junction capacitance inside the TSS. A reserved channel is provided between the first spike structure 211 and the second spike structure 212, and the channel is the path position of the surge. According to the requirements of the surge intensity and the junction capacitance in the actual application, the distance between the peak position of the first spike structure 211 and the peak position of the second spike structure 212 is reasonably set to stably realize the surge protection. The two spike structures are sealed, wherein the peak positions of the two spike structures are coated with an anti-oxidation material layer, and a high-conductivity material is added to the peak positions of the two spike structures.

[0068] It should be noted that when the traditional semiconductor discharge tube TSS is applied to high-speed signal routing, it will cause high-speed signal distortion and signal transmission abnormality, resulting in a reduction in signal transmission distance and serious signal delay. In this embodiment, by adding a first spike structure 211 and a second spike structure 212 to the anode of the semiconductor discharge tube 210 and the cathode of the semiconductor discharge tube 210, respectively, and the first spike structure 211 and the second spike structure 212 are arranged relatively, the inter-electrode structure of the PN pole inside the TSS is optimized to reduce the generation of the internal junction capacitance of the TSS, thereby reducing the influence of the parasitic capacitance of the TSS on the high-speed signal routing, improving the signal transmission distance, reducing the signal delay, and achieving the function of satisfying high-speed signal transmission under normal protection.

[0069] The suppression circuit 230 in this embodiment can be implemented by at least one magnetic bead connected in series with a capacitor. For example, the suppression circuit 230 is composed of a first magnetic bead and a capacitor C1, and the first magnetic bead and the capacitor C1 are connected in series; or, the suppression circuit 230 is composed of a first magnetic bead, a capacitor C1, and a second magnetic bead, and the first magnetic bead, the capacitor C1, and the second magnetic bead are connected in series in sequence. Taking the combination of the first magnetic bead, the capacitor C1, and the second magnetic bead as an example, two coil structures are wound separately, the capacitor C1 is welded to the middle of the two coils, an insulating material is sprayed on the capacitor, and the entire structure is plastic-sealed with a ferrite material, and a pin is reserved for connecting the protection circuit part in the surge protection device 200, so that by adding the suppression circuit 230 outside the semiconductor discharge tube TSS, the surge spike of the semiconductor discharge tube TSS is reduced, and the surge protection level is improved.

[0070] When a surge is input to the above-mentioned signal input terminal 100, the surge is processed and consumed by the connected surge protection device 200. It is understandable that filters can be provided before and after the surge protection device 200 to reduce surges or eliminate residual high-frequency noise. The protected and filtered power or signal reaches the target port 300, ensuring that the target port 300 works safely, and can be particularly applied to high-speed signal routing, such as HDMI with 4K resolution, 5G antenna interface, etc.

[0071] Through this embodiment, the surge protection device 200 is connected to the external signal input terminal 100 and the target port 300 respectively. The surge protection device 200 includes a semiconductor discharge tube 210 and a suppression circuit 230. The anode of the semiconductor discharge tube 210 is provided with a first spike structure 211, and the cathode of the semiconductor discharge tube 210 is provided with a second spike structure 212. The first spike structure 211 and the second spike structure 212 are arranged opposite to each other, and the suppression circuit 230 and the semiconductor discharge tube 210 are connected in parallel, so as to optimize the inter-electrode structure of the PN pole inside the TSS, reduce the generation of the internal junction capacitance of the TSS, thereby reducing the influence of the parasitic capacitance of the TSS on the high-speed signal routing, and while effectively optimizing the junction capacitance of the semiconductor discharge tube 210, by constructing a parallel architecture, reduce the influence of the surge spike, and improve the surge protection level.

[0072] The present embodiment is described and illustrated below through preferred embodiments.

[0073] Figure 6 : is a structural block diagram of the surge protection device of this preferred embodiment, such as Figure 6As shown, the surge protection device 200 is respectively connected to the external signal input terminal 100 and the target port 300, and the signal input terminal 100, the surge protection device 200 and the target port 300 are all grounded; wherein, the target port 300 includes an HDMI chip and RS485, and the HDMI chip and RS485 are both connected to the main control chip 400; the surge protection device 200 includes a semiconductor discharge tube 210, a clamping type protection device 220 and a suppression circuit 230.

[0074] In this embodiment, a single pin is led out from the PN structure of the semiconductor discharge tube 210, and an anode with a first spike structure 211 is constructed on the single pin, and a cathode with a second spike structure 212 is constructed on the plane. The peak positions of the first spike structure 211 and the second spike structure 212 are relative, and a reserved channel is provided between the first spike structure 211 and the second spike structure 212, and the channel is the path position of the surge. Among them, the two spike structures are sealed, and the peak positions of the two spike structures are coated with an anti-oxidation material layer, and the peak positions of the two spike structures are added with a high conductive material, and the width of the reserved channel is set according to the requirements of the surge strength and junction capacitance in actual applications. The width of the reserved channel is usually 0.5mm~1.5mm, which can meet the channel design requirements to stably achieve surge protection.

[0075] It should be noted that, as a two-terminal semiconductor device, the semiconductor discharge tube TSS will produce an instantaneous avalanche effect when the voltage exceeds its breakdown voltage, realize energy transfer and protection, and effectively protect the circuit from damage by transient surge voltage. However, when the traditional semiconductor discharge tube TSS is applied to high-speed signal routing, it will cause high-speed signal distortion and signal transmission abnormality, resulting in a reduction in signal transmission distance and serious signal delay. In this embodiment, by adding a first spike structure 211 and a second spike structure 212 to the anode of the semiconductor discharge tube 210 and the cathode of the semiconductor discharge tube 210, respectively, and the first spike structure 211 and the second spike structure 212 are arranged relative to each other, the inter-electrode structure of the PN pole inside the TSS is optimized to reduce the generation of the internal junction capacitance of the TSS, thereby reducing the influence of the parasitic capacitance of the TSS on the high-speed signal routing, improving the signal transmission distance, reducing the signal delay, and realizing the function of satisfying high-speed signal transmission under normal protection.

[0076] The clamping protection device 220 is connected in series with the semiconductor discharge tube 210, and the clamping protection device 220 includes but is not limited to a transient suppression diode and a varistor. By connecting the clamping protection device 220 in series, the leakage current is suppressed on the basis of reducing the junction capacitance, so as to avoid the protection device being unable to be closed due to the risk of continuous current during the short circuit process, thereby affecting the normal circuit operation.

[0077] Further, the suppression circuit 230 is connected in parallel to the two ends of the series structure composed of the clamping protection device 220 and the semiconductor discharge tube 210. The suppression circuit 230 can be realized by connecting at least one magnetic bead in series with a capacitor, or by a resistor. By adding the suppression circuit 230 outside the semiconductor discharge tube TSS, the surge spike of the semiconductor discharge tube TSS is reduced, and the surge protection level is improved. It can be understood that the surge frequency is mostly a frequency of hundreds of megahertz. The use of magnetic beads, capacitors and magnetic beads in series can better suppress the peak after the surge impact, that is, it is more suitable for high frequencies. For example, the suppression circuit 230 is composed of a first magnetic bead and a capacitor C1, and the first magnetic bead and the capacitor C1 are connected in series; or, the suppression circuit 230 includes a first magnetic bead, a capacitor C1 and a second magnetic bead connected in series in sequence. Specifically, two coil structures are wound separately, and the capacitor C1 is welded to the middle of the two coils, and an insulating material is sprayed on the capacitor. The entire structure is sealed with a ferrite material, and a pin is reserved for connecting the protection circuit part in the surge protection device 200.

[0078] Through this embodiment, the surge protection device 200 is respectively connected to the external signal input terminal 100 and the target port 300, and the signal input terminal 100, the surge protection device 200 and the target port 300 are all grounded; wherein the target port 300 includes an HDMI chip and RS485, and the HDMI chip and RS485 are both connected to the main control chip 400; the surge protection device 200 includes a semiconductor discharge tube 210, a clamping type protection device 220 and a suppression circuit 230, the semiconductor discharge tube 210 is connected in series with the clamping type protection device 220, and the suppression circuit 230 is connected in parallel to the two ends of the series structure composed of the clamping type protection device 220 and the semiconductor discharge tube 210. Based on this, a new protection architecture is adopted to optimize the junction capacitance and leakage current problems existing in the traditional TSS, which can be applied to high-speed signal and power ports, such as HDMI with 4K resolution, 5G antenna interface, etc., to broaden the scope of application of the surge protection device 200 and reduce the high-speed signal distortion and signal integrity problems caused by the junction capacitance. In addition, a parallel architecture is constructed by combining magnetic beads and capacitors to reduce the impact of surge spikes and further improve the level of surge protection.

[0079] It should be understood that the specific embodiments described herein are only used to explain the application, rather than to limit it. Based on the embodiments provided in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the protection scope of this application.

[0080] Obviously, the drawings are only some examples or embodiments of the present application. For ordinary technicians in the field, the present application can also be applied to other similar situations based on these drawings without creative work. In addition, it is understandable that although the work done in this development process may be complicated and lengthy, for ordinary technicians in the field, certain changes in design, manufacturing or production based on the technical content disclosed in this application are only conventional technical means and should not be regarded as insufficient content disclosed in this application.

[0081] The term "embodiment" in this application refers to a specific feature, structure or characteristic described in conjunction with the embodiment that can be included in at least one embodiment of the present application. The appearance of this phrase in various locations in the specification does not necessarily mean the same embodiment, nor does it mean that it is mutually exclusive with other embodiments and is independent or optional. It is clearly or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.

[0082] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of patent protection. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the scope of protection of the present application. Therefore, the scope of protection of the present application shall be subject to the attached claims.

Claims

1. A surge protection device, characterized in that: The surge protection device is connected to the external signal input terminal and the target port respectively; the surge protection device includes a semiconductor discharge tube; wherein, The anode of the semiconductor discharge tube is provided with a first spike structure, and the cathode of the semiconductor discharge tube is provided with a second spike structure; the first spike structure and the second spike structure are arranged opposite to each other; The signal input terminal, the surge protection device and the target port are all grounded.

2. The surge protection device according to claim 1, characterized in that: A reserved channel is provided between the first peak structure and the second peak structure.

3. The surge protection device according to claim 2, characterized in that: The width of the reserved channel is 0.5 mm to 1.5 mm.

4. The surge protection device according to claim 1, characterized in that: The surge protection device also includes a clamping type protection device; The clamping protection device is connected in series with the semiconductor discharge tube.

5. The surge protection device according to claim 4, characterized in that: The clamping protection device is a transient suppression diode or a varistor.

6. The surge protection device according to claim 1, characterized in that: The surge protection device also includes a suppression circuit; wherein, The suppression circuit is connected in parallel with the semiconductor discharge tube.

7. The surge protection device according to claim 6, characterized in that: The suppression circuit includes a first magnetic bead and a capacitor C1; The first magnetic bead and the capacitor C1 are connected in series.

8. The surge protection device according to claim 7, characterized in that: The suppression circuit also includes a second magnetic bead; The second magnetic bead and the capacitor C1 are connected in series.

9. The surge protection device according to claim 1, characterized in that: The tip of the spike structure is coated with an anti-oxidation material layer.

10. A surge protection system, characterized in that: The system comprises the surge protection device according to any one of claims 1 to 9.

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