Short-circuit working condition dynamic resistance test circuit and method based on clamping circuit

Abstract

The invention discloses a short-circuit working condition dynamic resistance test circuit and method based on a clamping circuit, the dynamic resistance test circuit comprises a clamping circuit and a short-circuit test circuit, and the clamping circuit and the short-circuit test circuit are respectively connected with two ends of a device to be tested; the short-circuit test circuit is used for providing a short-circuit working condition for the to-be-tested device in a short-circuit test stage of the to-be-tested device; the clamping circuit is used for providing a stable measurement voltage level for the measurement circuit and providing a test working condition for the to-be-tested device in the dynamic resistance test stage of the to-be-tested device, and the dynamic resistance recession representation after the GaN HEMT short circuit working condition can be effectively measured.

Description

Technical Field

[0001] The present application generally relates to the technical field of dynamic operating condition characteristic testing, and specifically relates to a short-circuit operating condition dynamic resistance testing circuit and method based on a clamping circuit. Background Art

[0002] Gallium nitride power devices, with their low on-resistance, low parasitic capacitance, and zero reverse recovery charge, are among the best candidates for next-generation high-frequency, high-efficiency, and high-power density converters. However, GaN power devices differ significantly from traditional silicon power devices in terms of material growth, device structure, and process manufacturing. Under complex operating conditions, these devices exhibit dynamic resistance degradation. During actual operating conditions and dynamic resistance testing, device drain-source voltage levels often vary significantly, affecting the voltage measurement accuracy during the dynamic resistance measurement phase. Furthermore, the short-circuit test circuit structure cannot directly provide dynamic resistance measurement conditions for the device. This makes traditional device dynamic operating condition test circuits unsuitable for the dynamic resistance characteristics of GaN power devices after being subjected to short-circuit voltage. Summary of the Invention

[0003] In view of the above-mentioned defects or deficiencies in the prior art, it is desired to provide a short-circuit dynamic resistance test circuit and method based on a clamping circuit, which can effectively measure the dynamic resistance degradation characterization of GaN HEMT after short-circuit condition.

[0004] In a first aspect, an embodiment of the present application provides a short-circuit dynamic resistance test circuit based on a clamping circuit, comprising: a clamping circuit and a short-circuit test circuit. The clamping circuit and the short-circuit test circuit are respectively connected to two ends of the device under test; The short-circuit test circuit is used to provide a short-circuit working condition for the device under test during the short-circuit test phase of the device under test; The clamping circuit is used to provide a dynamic resistance test condition for the device under test during a dynamic resistance test phase of the device under test.

[0005] In some embodiments, the clamping circuit includes a first switch tube and a first capacitor. The first end of the first switch tube is connected to one end of the device under test, the second end of the switch tube is connected to one end of the first capacitor, the other end of the first capacitor is connected to the other end of the device under test, and the third end of the first switch tube is connected to the other end of the device under test.

[0006] In some embodiments, the short-circuit test circuit includes a first test branch, wherein the first test branch includes a second switch tube. The second switch tube is in an on state during a short-circuit test phase of the device under test, and is in an off state during a second pulse test phase of the device under test.

[0007] In some embodiments, the short-circuit test circuit further includes a second test branch, which is connected in parallel with the first test branch. The second test branch is turned on before the second switch tube is turned on.

[0008] In some embodiments, the second test branch includes a third switch and a first resistor. One end of the first resistor is connected to the first end of the second switch tube, the other end of the first resistor is connected to the first end of the third switch tube, and the second end of the third switch tube is connected to one end of the device under test.

[0009] In some embodiments, the clamping circuit further includes a second resistor. The second resistor is connected between the first capacitor and the other end of the device under test.

[0010] In some embodiments, the short circuit test circuit further includes a power supply branch, The power supply branch includes a DC power supply and a second capacitor connected in parallel.

[0011] In some embodiments, the test circuit further includes: a control circuit and a measurement circuit, The control circuit is connected to the clamping circuit, the short-circuit test circuit and the device under test, respectively, and is used to provide corresponding control signals to the clamping circuit, the short-circuit test circuit and the device under test; The measuring circuit is used to collect the voltage across both ends of the device under test and the current flowing through the device under test during the dynamic resistance test phase.

[0012] In some embodiments, the device under test is a gallium nitride power device.

[0013] In a second aspect, an embodiment of the present application provides a short-circuit dynamic resistance test method based on a clamp circuit, which is applied to the short-circuit dynamic resistance test circuit based on the clamp circuit. The method includes: During a short-circuit test phase of the device under test, controlling the clamping circuit and the short-circuit test circuit to provide a short-circuit working condition for the device under test; During the dynamic resistance test phase of the device under test, the clamping circuit and the short-circuit test circuit are controlled to provide a test condition for the device under test.

[0014] The embodiments of the present application provide a short-circuit condition dynamic resistance test circuit and method based on a clamping circuit. The short-circuit test circuit and the clamping circuit can provide short-circuit conditions and test conditions for the device under test, and collect the voltage and current of each condition through the test circuit, thereby realizing the analysis of the short-circuit condition of the device under test and the dynamic resistance characteristics after being subjected to the short-circuit condition. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Other features, objects and advantages of the present application will become more apparent upon reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 A schematic diagram of a short-circuit dynamic resistance test circuit based on a clamping circuit according to an embodiment of the present application; Figure 2 A schematic diagram of a short-circuit dynamic resistance test circuit based on a clamping circuit according to a specific embodiment of the present application; Figure 3 for Figure 2 The timing diagram corresponding to the embodiment shown; Figure 4 A schematic structural diagram of a short-circuit dynamic resistance test circuit based on a clamping circuit provided in another specific embodiment of the present application; Figure 5 for Figure 4 The timing diagram corresponding to the embodiment shown; Figure 6 A flowchart of a dynamic resistance testing method under short-circuit conditions based on a clamping circuit is provided in an embodiment of the present application. DETAILED DESCRIPTION

[0016] The present application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the relevant invention and are not intended to limit the invention. It should also be noted that, for ease of description, only portions relevant to the invention are shown in the accompanying drawings.

[0017] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in this application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0018] like Figure 1 As shown, the short-circuit condition dynamic resistance test circuit based on the clamp circuit includes a clamp circuit 10 and a short-circuit test circuit 20, and the clamp circuit 10 and the short-circuit test circuit 20 are respectively connected to two ends of the device under test DUT.

[0019] The short circuit test circuit 20 is used to provide a short circuit working condition for the device under test DUT during the short circuit test phase of the device under test DUT, and the clamping circuit 10 is used to provide a test working condition for the device under test DUT during the dynamic resistance test phase of the device under test DUT.

[0020] Furthermore, the short-circuit dynamic resistance test circuit based on the clamping circuit also includes a control circuit 30 and a measurement circuit 40 .

[0021] The control circuit 30 is connected to the clamp circuit 10, the short-circuit test circuit 20, and the device under test (DUT), respectively, and is used to provide corresponding control signals to the clamp circuit 10, the short-circuit test circuit 20, and the device under test (DUT). Specifically, the control circuit 30 provides corresponding pulse signals to the short-circuit test circuit 20 and the DUT during the test period, and provides a constant voltage to the clamp circuit 10. Optionally, the constant voltage provided by the control circuit 30 to the clamp circuit 10 is equal to the sum of the first switch threshold voltage and the required first capacitor clamping voltage.

[0022] The measurement circuit 40 is used to collect the voltage across the DUT and the current flowing through the DUT during the dynamic resistance test phase.

[0023] Specifically, the voltage measurement device in the measurement circuit 40 is connected to both ends of the clamp circuit to ensure voltage measurement accuracy during the dynamic resistance test phase. The current measurement device in the measurement circuit 40 is connected to the device under test (DUT) to measure the current value of the DUT. This achieves the purpose of using the measurement circuit 40 to obtain the relevant parameters for calculating the dynamic resistance.

[0024] Specifically, the device under test (DUT) performs a short-circuit test under the control of the control circuit 30. The clamping circuit 10 and the short-circuit test circuit 20, under the control of the control circuit 30, provide a short-circuit operating condition for the device under test (DUT) during the short-circuit test phase of the device under test (DUT), and provide a test operating condition for the device under test (DUT) during the dynamic resistance test phase of the device under test (DUT). Furthermore, during the short-circuit test of the device under test (DUT), the measurement circuit 40 collects the voltage and current across the device under test (DUT) during the dynamic resistance test phase, thereby calculating the dynamic resistance of the device under test (DUT).

[0025] Therefore, the short-circuit condition dynamic resistance test circuit based on the clamping circuit provided in the embodiment of the present application can use the short-circuit test circuit and the clamping circuit to provide short-circuit conditions and test conditions for the device under test, and collect the voltage and current of each condition through the test circuit, thereby realizing the analysis of the short-circuit condition of the device under test and the dynamic resistance characteristics after being subjected to the short-circuit condition.

[0026] In one possible embodiment, Figure 2 As shown, the clamping circuit 10 includes a first switch tube Q1 and a first capacitor C1.

[0027] Among them, the first end of the first switch tube Q1 is connected to one end of the device under test DUT, the second end of the switch tube Q1 is connected to one end of the first capacitor C1, the other end of the first capacitor C1 is connected to the other end of the device under test DUT, and the third end of the first switch tube is connected to the other end of the device under test.

[0028] Optionally, the clamping circuit 10 further includes a second resistor R2.

[0029] The second resistor R2 is connected between the first capacitor C1 and the other end of the device under test DUT.

[0030] The short-circuit test circuit 20 includes a first test branch 21 , and the first test branch 21 includes a second switch tube Q2 .

[0031] The second switch tube Q2 is in the on state during the short-circuit test phase of the device under test, and is in the off state during the second pulse phase of the device under test.

[0032] Specifically, if Figure 3 As shown, the control circuit 30 provides a constant voltage to the clamp circuit 10, causing the first switch Q1 in the clamp circuit 10 to turn on first. At time t11, the second switch Q2 in the short-circuit test circuit 20 turns on. At this time, the gate-source voltage difference of the first switch Q1 exceeds the Q1 threshold voltage, and the main circuit charges the first capacitor C1 in the clamp circuit 10. During the charging process, the source voltage of the first switch Q1 rises until the gate-source voltage difference of the first switch Q1 is less than the Q1 threshold voltage. At this point, charging ends and Q1 turns off, achieving voltage clamping on the first capacitor C1. The control circuit 30 controls the device under test (DUT) to turn on and perform a short-circuit test. At this time, the DUT is in a short-circuit condition under the control of the second switch Q2. Then, at time t12 when the first capacitor C1 is fully charged, the second switch tube Q2 is controlled to be turned off, so that the voltage from the first capacitor C1 is applied to the device under test DUT at time t12. The device under test DUT is controlled to be turned on again to discharge the first capacitor C1. The voltage and current of the device under test DUT during the dynamic resistance test phase are collected using the measurement circuit 40 to calculate the dynamic resistance of the device under test DUT after the short-circuit condition.

[0033] Thus, the dynamic resistance test circuit proposed in the embodiment of the present application utilizes a self-disabling first switch in the clamp circuit and a second switch in the short-circuit test circuit to charge the first capacitor. This effectively controls the charging time of the first capacitor and promptly provides a stable voltage to the device under test after the second switch is turned off, ensuring that the degradation characteristics of the device under test after being subjected to a short-circuit condition can be captured promptly and effectively. Compared with existing short-circuit test circuits, this circuit uses fewer switching devices, effectively simplifying the circuit.

[0034] However, in this embodiment, before time t11, the voltage of the first capacitor C1 is approximately 0V, so that at the beginning of the second switch tube Q2 being turned on, that is, during the charging process of the first capacitor C1 and the rising stage of the voltage of the first switch tube Q1, the second switch tube Q2 will be briefly short-circuited. Based on this, the embodiment of the present application also proposes that the short-circuit test circuit 20 also includes a second test branch 22.

[0035] like Figure 4 As shown, the second test branch 22 is connected in parallel with the first test branch 21 , and the second test branch 22 is turned on before the second switch tube Q2 is turned on.

[0036] Specifically, the second test branch 22 includes a third switch Q3 and a first resistor R1. One end of the first resistor R1 is connected to a first end of the second switch Q2, the other end of the first resistor R1 is connected to a first end of the third switch Q3, and a second end of the third switch Q3 is connected to one end of the device under test (DUT).

[0037] During the test, if Figure 5 As shown, at time t21, the third switch tube Q3 in the second test branch 22 replaces the second switch tube Q2 in the first test branch 21 to be turned on, so as to charge the first capacitor C1 through the second test branch 23, and utilize the first resistor R1 in the second test branch 22 for voltage division, thereby effectively preventing the third switch tube Q3 from being short-circuited in the early stage of the charging stage.

[0038] At time t22, the control circuit 30 controls the device under test DUT to perform a short-circuit test. In the first half of the short-circuit test, the third switch tube Q3 of the second test branch 22 is controlled to be turned on and the second switch tube Q2 of the first test branch 21 is controlled to be turned off, and the second test branch 22 is used to provide a load short-circuit working condition for the device under test DUT; in the second half of the short-circuit test, the third switch tube Q3 of the second test branch 22 is controlled to be turned off and the second switch tube Q2 of the first test branch 21 is controlled to be turned on, and the first test branch 21 is used to provide a short-circuit working condition for the device under test DUT.

[0039] Optionally, in the second half of the short-circuit test, the second switch tube Q2 of the first test branch 21 may be controlled to be turned on first, and then the third switch tube Q3 of the second test branch 22 may be controlled to be turned off.

[0040] Furthermore, at time t23 , the control circuit 30 controls the device under test DUT to perform a second pulse test, and before time t23 , the control circuit 30 controls the second switch tube Q2 to be turned off.

[0041] It should be understood that in Figure 4In the illustrated embodiment, when the third switch Q3 of the second test branch 22 is controlled to be turned off, the second switch Q2 of the first test branch 21 can also be directly used to perform a hard switch short circuit test on the device under test DUT.

[0042] Therefore, the dynamic resistance test circuit proposed in the embodiment of the present application can provide a variety of test conditions for the device under test while ensuring the reliable operation of the switch tube in the short-circuit test circuit, so as to meet the needs of various dynamic resistance tests.

[0043] In one possible embodiment, Figure 2 or Figure 4 As shown, the short circuit test circuit 20 also includes a DC power supply V DC and the second capacitor C bank .

[0044] Among them, the DC power supply V DC and the second capacitor C bank in parallel.

[0045] In some embodiments, the first switch transistor Q1 , the second switch transistor Q2 , and the third switch transistor Q3 may be Si-based MOSFETs, SiC-based MOSFETs, or Si-based IGBTs and SiC-based IGBTs with integrated anti-parallel diodes.

[0046] The first terminals of the first switch tube Q1 , the second switch tube Q2 and the third switch tube Q3 are drains, and the second terminals are sources.

[0047] The device under test (DUT) is a gallium nitride power device (GaN HEMT), one end of the DUT is a drain, and the other end is a source.

[0048] Optional, such as Figure 2 or Figure 4 As shown, the other end of the device under test (DUT) is grounded via a coaxial shunt (SHUNT) to measure the current flowing through the DUT. The other end of the second resistor R2 in the clamp circuit 10 is connected to the ground side of the coaxial shunt (SHUNT). The negative side of the short-circuit test circuit 20 is also connected to the ground side of the coaxial shunt (SHUNT).

[0049] In an embodiment of the present application, the measurement circuit 40 is used to collect the voltage across the clamping circuit, and to measure the current flowing through the device under test DUT using the coaxial shunt SHUNT, especially the on-state voltage and on-state current in the dynamic resistance test phase after the short-circuit condition, thereby calculating the dynamic resistance characteristics of the device under test DUT after the short-circuit condition.

[0050] In another embodiment of the present application, Figure 6As shown, the dynamic resistance test method under short-circuit conditions based on a clamping circuit is applied to the aforementioned dynamic resistance test circuit under short-circuit conditions based on a clamping circuit, and includes: Step 601 : During a short-circuit test phase of the device under test, the clamping circuit and the short-circuit test circuit are controlled to provide a short-circuit working condition for the device under test.

[0051] Step 602 : During a dynamic resistance test phase of the device under test, the clamping circuit and the short-circuit test circuit are controlled to provide a test condition for the device under test.

[0052] Specifically, the control circuit controls the switching tubes in the clamping circuit and the short-circuit test circuit so that a short-circuit working condition can be provided for the device under test during the short-circuit test phase of the device under test, and a test working condition can be provided during the dynamic resistance test phase, so that the measurement circuit can timely and effectively obtain the dynamic resistance characteristics of the device under test after being subjected to the short-circuit working condition.

[0053] It should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0054] Unless otherwise defined, the technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art in the art of the present invention. The terms used herein are only for describing specific implementation purposes and are not intended to limit the present invention. Terms such as "disposed" appearing in this document may indicate that one component is directly attached to another component or that one component is attached to another component through an intermediate component. Features described in this document in one embodiment may be applied to another embodiment alone or in combination with other features, unless the feature is not applicable in the other embodiment or otherwise specified.

[0055] The present invention has been described through the above embodiments, but it should be understood that the above embodiments are for illustrative and illustrative purposes only and are not intended to limit the present invention to the described embodiments. Those skilled in the art will appreciate that various variations and modifications may be made based on the teachings of the present invention, and such variations and modifications fall within the scope of protection claimed in the present invention.

Claims

1. A short-circuit condition dynamic resistance test circuit based on a clamp circuit, characterized in that: include: Clamping circuit and short circuit test circuit, The clamping circuit and the short-circuit test circuit are respectively connected to two ends of the device under test; The short-circuit test circuit is used to provide a short-circuit working condition for the device under test during the short-circuit test phase of the device under test; The clamping circuit is used to provide a test condition for the device under test during a dynamic resistance test phase of the device under test.

2. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 1, characterized in that: The clamping circuit includes a first switch tube and a first capacitor. The first end of the first switch tube is connected to one end of the device under test, the second end of the switch tube is connected to one end of the first capacitor, the other end of the first capacitor is connected to the other end of the device under test, and the third end of the first switch tube is connected to the other end of the device under test.

3. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 1, characterized in that: The short-circuit test circuit includes a first test branch, wherein the first test branch includes a second switch tube, The second switch tube is in an on state during the short-circuit test phase of the device under test, and is in an off state during the second pulse test phase of the device under test.

4. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 3, characterized in that: The short-circuit test circuit further includes a second test branch, which is connected in parallel with the first test branch. The second test branch is turned on before the second switch tube is turned on.

5. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 4, characterized in that: The second test branch includes a third switch tube and a first resistor. One end of the first resistor is connected to the first end of the second switch tube, the other end of the first resistor is connected to the first end of the third switch tube, and the second end of the third switch tube is connected to one end of the device under test.

6. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 2, characterized in that: The clamping circuit further includes a second resistor, The second resistor is connected between the first capacitor and the other end of the device under test.

7. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 3 or 4, characterized in that: The short circuit test circuit also includes a power supply branch, The power branch includes a DC power supply and a second capacitor connected in parallel.

8. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to any one of claims 1 to 6, characterized in that: The test circuit also includes: a control circuit and a measurement circuit. The control circuit is connected to the clamping circuit, the short-circuit test circuit and the device under test respectively, and is used to provide corresponding control signals for the clamping circuit, the short-circuit test circuit and the device under test; The measuring circuit is used to collect the voltage across the two ends of the device under test and the current flowing through the device under test during the dynamic resistance test phase of the device under test.

9. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to any one of claims 1 to 6, characterized in that: The device under test is a gallium nitride power device.

10. A short-circuit condition dynamic resistance test method based on a clamping circuit, characterized in that: Applied to the short-circuit condition dynamic resistance test circuit based on the clamp circuit as claimed in any one of claims 1 to 9, the method comprising: Controlling the clamping circuit and the short-circuit test circuit to provide a short-circuit working condition for the device under test during a short-circuit test phase of the device under test; During the dynamic resistance test phase of the device under test, the clamping circuit and the short circuit test circuit are controlled to provide a test condition for the device under test.

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