Short-circuit dynamic resistance test circuit and method based on clamp circuit
By designing a dynamic resistance test circuit for short-circuit working conditions based on clamp circuit, the problem that traditional test circuits cannot effectively measure the dynamic resistance of gallium nitride power devices is solved, and the precise analysis of the short-circuit working conditions and dynamic resistance characteristics of the device is achieved.
Patent Information
- Application Number
- CN202411868941.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2025-04-11
- Estimated Expiration
- 2044-12-18
AI Technical Summary
Traditional device dynamic operating condition testing circuits cannot be effectively used for measuring the dynamic resistance characteristic of gallium nitride power devices after short-circuit voltage, especially because the device drain source voltage level changes greatly, which affects the voltage measurement accuracy.
A dynamic resistance test circuit for short-circuit working conditions based on clamping circuit is designed. The clamping circuit and the short-circuit testing circuit are respectively provided for the device to be tested, and the voltage and current of each working condition are collected through the measurement circuit.
The effective analysis of the short-circuit working conditions and dynamic resistance characteristics of gallium nitride power devices is achieved, and the accuracy and reliability of dynamic resistance measurement are improved.
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Figure CN119310349B_ABST
Abstract
Description
Technical Field
[0001] The present application generally relates to the technical field of dynamic operating condition characteristic testing, and specifically to a short-circuit operating condition dynamic resistance testing circuit and method based on a clamping circuit. Background Art
[0002] Gallium nitride power devices, with their low on-resistance, low parasitic capacitance and zero reverse recovery charge, have become one of the best candidate devices for the next generation of high-frequency, high-efficiency and high-power density converters. There is a big gap between gallium nitride power devices and traditional silicon power devices in terms of material growth, device structure and process manufacturing process. Such devices show dynamic resistance decay characteristics under actual complex working conditions. In actual working conditions and dynamic resistance tests, the drain-source voltage level of the device usually varies greatly, affecting the voltage measurement accuracy in the dynamic resistance measurement stage. At the same time, the short-circuit test circuit structure cannot directly provide dynamic resistance measurement conditions for the device, which makes the traditional device dynamic working condition test circuit not well suitable for the dynamic resistance characteristics of gallium nitride power devices after being subjected to short-circuit voltage. Summary of the invention
[0003] In view of the above-mentioned defects or deficiencies in the prior art, it is desirable to provide a short-circuit condition dynamic resistance test circuit and method based on a clamp circuit, which can effectively measure the dynamic resistance decay characterization of a GaN HEMT after a short-circuit condition.
[0004] In a first aspect, an embodiment of the present application provides a short-circuit condition dynamic resistance test circuit based on a clamp circuit, comprising: a clamp circuit and a short-circuit test circuit,
[0005] The clamping circuit and the short-circuit test circuit are respectively connected to two ends of the device under test;
[0006] The short-circuit test circuit is used to provide a short-circuit working condition for the device under test during the short-circuit test phase of the device under test;
[0007] The clamping circuit is used to provide a dynamic resistance test condition for the device under test during a dynamic resistance test phase of the device under test.
[0008] In some embodiments, the clamping circuit includes a first switch tube and a first capacitor.
[0009] The first end of the first switch tube is connected to one end of the device under test, the second end of the switch tube is connected to one end of the first capacitor, the other end of the first capacitor is connected to the other end of the device under test, and the third end of the first switch tube is connected to the other end of the device under test.
[0010] In some embodiments, the short circuit test circuit includes a first test branch, wherein the first test branch includes a second switch tube,
[0011] The second switch tube is in an on state during the short-circuit test phase of the device under test, and is in an off state during the second pulse test phase of the device under test.
[0012] In some embodiments, the short circuit test circuit further includes a second test branch, wherein the second test branch is connected in parallel with the first test branch.
[0013] The second test branch is turned on before the second switch tube is turned on.
[0014] In some embodiments, the second test branch includes a third switch tube and a first resistor.
[0015] One end of the first resistor is connected to the first end of the second switch tube, the other end of the first resistor is connected to the first end of the third switch tube, and the second end of the third switch tube is connected to one end of the device under test.
[0016] In some embodiments, the clamping circuit further includes a second resistor,
[0017] The second resistor is connected between the first capacitor and the other end of the device under test.
[0018] In some embodiments, the short circuit test circuit further includes a power supply branch,
[0019] The power branch includes a DC power supply and a second capacitor connected in parallel.
[0020] In some embodiments, the test circuit further includes: a control circuit and a measurement circuit.
[0021] The control circuit is connected to the clamping circuit, the short-circuit test circuit and the device under test respectively, and is used to provide corresponding control signals for the clamping circuit, the short-circuit test circuit and the device under test;
[0022] The measuring circuit is used to collect the voltage across the two ends of the device under test and the current flowing through the device under test during the dynamic resistance test phase of the device under test.
[0023] In some embodiments, the device under test is a gallium nitride power device.
[0024] In a second aspect, an embodiment of the present application provides a short-circuit condition dynamic resistance test method based on a clamp circuit, which is applied to the short-circuit condition dynamic resistance test circuit based on the clamp circuit, and the method includes:
[0025] Controlling the clamping circuit and the short-circuit test circuit to provide a short-circuit working condition for the device under test during a short-circuit test phase of the device under test;
[0026] During the dynamic resistance test phase of the device under test, the clamping circuit and the short circuit test circuit are controlled to provide a test condition for the device under test.
[0027] The short-circuit condition dynamic resistance test circuit and method based on the clamping circuit provided in the embodiments of the present application can use the short-circuit test circuit and the clamping circuit to provide short-circuit conditions and test conditions for the device under test, and collect the voltage and current of each condition through the test circuit, thereby realizing the analysis of the short-circuit condition of the device under test and the dynamic resistance characteristics after being subjected to the short-circuit condition. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:
[0029] Figure 1 A schematic diagram of a short-circuit condition dynamic resistance test circuit based on a clamping circuit provided in an embodiment of the present application;
[0030] Figure 2 A schematic diagram of a short-circuit condition dynamic resistance test circuit based on a clamping circuit provided in a specific embodiment of the present application;
[0031] Figure 3 for Figure 2 The timing diagram corresponding to the embodiment shown;
[0032] Figure 4 A schematic diagram of a short-circuit condition dynamic resistance test circuit based on a clamping circuit provided in another specific embodiment of the present application;
[0033] Figure 5 for Figure 4 The timing diagram corresponding to the embodiment shown;
[0034] Figure 6 A flow chart of a method for testing dynamic resistance under short-circuit conditions based on a clamping circuit is provided in an embodiment of the present application. DETAILED DESCRIPTION
[0035] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.
[0036] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0037] like Figure 1 As shown, the short-circuit condition dynamic resistance test circuit based on the clamp circuit includes a clamp circuit 10 and a short-circuit test circuit 20, and the clamp circuit 10 and the short-circuit test circuit 20 are respectively connected to two ends of the device under test DUT.
[0038] The short-circuit test circuit 20 is used to provide a short-circuit condition for the device under test DUT during the short-circuit test phase of the device under test DUT, and the clamping circuit 10 is used to provide a test condition for the device under test DUT during the dynamic resistance test phase of the device under test DUT.
[0039] Furthermore, the short-circuit condition dynamic resistance test circuit based on the clamping circuit also includes a control circuit 30 and a measurement circuit 40 .
[0040] The control circuit 30 is respectively connected to the clamp circuit 10, the short circuit test circuit 20 and the device under test DUT, and is used to provide corresponding control signals for the clamp circuit 10, the short circuit test circuit 20 and the device under test DUT. Specifically, the control circuit 30 provides corresponding pulse signals for the short circuit test circuit 20 and the DUT during the test, and provides a constant voltage for the clamp circuit 10. Optionally, the constant voltage provided by the control circuit 30 to the clamp circuit 10 is equal to the sum of the first switch tube threshold voltage and the required first capacitor clamp voltage.
[0041] The measuring circuit 40 is used to collect the voltage across the device under test (DUT) and the current flowing through the device under test (DUT) during the dynamic resistance test phase.
[0042] Specifically, the voltage measuring device in the measuring circuit 40 is connected to both ends of the clamping circuit to ensure the voltage measurement accuracy in the dynamic resistance test phase, and the current measuring device in the measuring circuit 40 is connected to the device under test DUT to measure the current value of the device under test DUT. Thus, the purpose of obtaining the relevant parameters for calculating the dynamic resistance by using the measuring circuit 40 is achieved.
[0043] Specifically, the device under test DUT performs a short circuit test under the control of the control circuit 30, and the clamp circuit 10 and the short circuit test circuit 20 provide a short circuit condition for the device under test DUT during the short circuit test phase of the device under test DUT, and provide a test condition for the device under test DUT during the dynamic resistance test phase of the device under test DUT under the control of the control circuit 30. And during the short circuit test of the device under test DUT, the voltage and current at both ends of the device under test DUT during the dynamic resistance test phase are collected by the measuring circuit 40, so as to calculate the dynamic resistance of the device under test DUT.
[0044] Therefore, the short-circuit condition dynamic resistance test circuit based on the clamping circuit provided in the embodiment of the present application can use the short-circuit test circuit and the clamping circuit to provide short-circuit conditions and test conditions for the device under test, and collect the voltage and current of each condition through the test circuit, thereby realizing the analysis of the short-circuit condition of the device under test and the dynamic resistance characteristics after being subjected to the short-circuit condition.
[0045] In a possible embodiment, if Figure 2 As shown, the clamping circuit 10 includes a first switch tube Q1 and a first capacitor C1.
[0046] Among them, the first end of the first switch tube Q1 is connected to one end of the device under test DUT, the second end of the switch tube Q1 is connected to one end of the first capacitor C1, the other end of the first capacitor C1 is connected to the other end of the device under test DUT, and the third end of the first switch tube is connected to the other end of the device under test.
[0047] Optionally, the clamping circuit 10 further includes a second resistor R2.
[0048] The second resistor R2 is connected between the first capacitor C1 and the other end of the device under test DUT.
[0049] The short-circuit test circuit 20 includes a first test branch 21 , and the first test branch 21 includes a second switch tube Q2 .
[0050] The second switch tube Q2 is in the on state during the short-circuit test phase of the device under test, and is in the off state during the second pulse phase of the device under test.
[0051] Specifically, if Figure 3 As shown, the control circuit 30 provides a constant voltage to the clamp circuit 10, so that the first switch tube Q1 in the clamp circuit 10 is turned on first, and the second switch tube Q2 in the short-circuit test circuit 20 is turned on at time t11. At this time, the difference between the gate-source voltage of the first switch tube Q1 is greater than the threshold voltage of Q1, and the main circuit charges the first capacitor C1 in the clamp circuit 10. During the charging process, the source voltage of the first switch tube Q1 rises until the difference between the gate-source voltage of the first switch tube Q1 is less than the threshold voltage of Q1. When the charging is completed, Q1 is automatically turned off, and the voltage clamping of the first capacitor C1 is realized. The control circuit 30 controls the device under test DUT to turn on and perform a short-circuit test. At this time, the device under test DUT is in a short-circuit condition under the control of the conduction of the second switch tube Q2. Then, at time t12 when the first capacitor C1 is fully charged, the second switch tube Q2 is controlled to be turned off, so that the voltage from the first capacitor C1 is applied to the device under test DUT at time t12, and the device under test DUT is controlled to be turned on again to discharge the first capacitor C1, and the voltage and current of the device under test DUT during the dynamic resistance test phase are collected by the measuring circuit 40 to calculate the dynamic resistance of the device under test DUT after the short-circuit condition.
[0052] Therefore, the dynamic resistance test circuit proposed in the embodiment of the present application uses the first switch tube that is self-shutdown in the clamping circuit and the second switch tube in the short-circuit test circuit to charge the first capacitor, which can effectively control the charging time of the first capacitor and provide a stable voltage to the device under test in time after the second switch tube is shut down, ensuring that the degradation characteristics of the device under test after being subjected to a short-circuit condition can be captured in time and effectively. Compared with the existing short-circuit test circuit, fewer switch tube devices are used, effectively simplifying the circuit.
[0053] However, in this embodiment, before time t11, the voltage of the first capacitor C1 is approximately 0V, so that at the beginning of the second switch tube Q2 being turned on, that is, during the charging process of the first capacitor C1 and the rising stage of the voltage of the first switch tube Q1, the second switch tube Q2 will be briefly short-circuited. Based on this, the embodiment of the present application also proposes that the short-circuit test circuit 20 also includes a second test branch 22.
[0054] like Figure 4 As shown, the second test branch 22 is connected in parallel with the first test branch 21 , and the second test branch 22 is turned on before the second switch tube Q2 is turned on.
[0055] Specifically, the second test branch 22 includes a third switch tube Q3 and a first resistor R1. One end of the first resistor R1 is connected to a first end of the second switch tube Q2, the other end of the first resistor R1 is connected to a first end of the third switch tube Q3, and the second end of the third switch tube Q3 is connected to one end of the device under test DUT.
[0056] During the test, if Figure 5 As shown, at time t21, the third switch tube Q3 in the second test branch 22 replaces the second switch tube Q2 in the first test branch 21 to charge the first capacitor C1 through the second test branch 23, and uses the first resistor R1 in the second test branch 22 for voltage division, effectively preventing the third switch tube Q3 from being short-circuited in the early stage of the charging stage.
[0057] At time t22, the control circuit 30 controls the device under test DUT to perform a short-circuit test. In the first half of the short-circuit test, the third switch tube Q3 of the second test branch 22 is controlled to be turned on and the second switch tube Q2 of the first test branch 21 is controlled to be turned off, and the second test branch 22 is used to provide a load short-circuit condition for the device under test DUT; in the second half of the short-circuit test, the third switch tube Q3 of the second test branch 22 is controlled to be turned off and the second switch tube Q2 of the first test branch 21 is controlled to be turned on, and the first test branch 21 is used to provide a short-circuit condition for the device under test DUT.
[0058] Optionally, in the second half of the short-circuit test, the second switch tube Q2 of the first test branch 21 may be controlled to be turned on first, and then the third switch tube Q3 of the second test branch 22 may be controlled to be turned off.
[0059] And, at time t23, the control circuit 30 controls the device under test DUT to perform a second pulse test, and before time t23, the control circuit 30 controls the second switch tube Q2 to be turned off.
[0060] It should be understood that in Figure 4 In the illustrated embodiment, when the third switch tube Q3 of the second test branch 22 is controlled to be turned off, the second switch tube Q2 of the first test branch 21 can also be directly used to perform a hard switch short circuit test on the device under test DUT.
[0061] Therefore, the dynamic resistance test circuit proposed in the embodiment of the present application can provide a variety of test conditions for the device under test while ensuring the reliable operation of the switch tube in the short-circuit test circuit to meet the needs of various dynamic resistance tests.
[0062] In a possible embodiment, if Figure 2 or Figure 4 As shown, the short circuit test circuit 20 also includes a DC power supply V DC and the second capacitor C bank .
[0063] Among them, the DC power supply V DC and the second capacitor C bank in parallel.
[0064] In some embodiments, the first switch tube Q1 , the second switch tube Q2 , and the third switch tube Q3 may be Si-based MOSFETs, SiC-based MOSFETs, or Si-based IGBTs and SiC-based IGBTs with integrated anti-parallel diodes.
[0065] Among them, the first ends of the first switch tube Q1, the second switch tube Q2 and the third switch tube Q3 are drains, and the second ends are sources.
[0066] The device under test (DUT) is a gallium nitride power device (GaN HEMT), one end of the device under test (DUT) is a drain, and the other end is a source.
[0067] Optional, such as Figure 2 or Figure 4 As shown, the other end of the device under test DUT is grounded through the coaxial shunt SHUNT to measure the current flowing through the device under test DUT. The other end of the second resistor R2 in the clamp circuit 10 is connected to the ground side of the coaxial shunt SHUNT. The negative side of the short circuit test circuit 20 is also connected to the ground side of the coaxial shunt SHUNT.
[0068] In an embodiment of the present application, the measurement circuit 40 is used to collect the voltage across the clamping circuit, and to measure the current flowing through the device under test DUT using a coaxial shunt SHUNT, especially the on-state voltage and on-state current in the dynamic resistance test phase after a short-circuit condition, thereby calculating the dynamic resistance characteristics of the device under test DUT after a short-circuit condition.
[0069] In another embodiment of the present application, Figure 6 As shown, the short-circuit condition dynamic resistance test method based on the clamp circuit is applied to the short-circuit condition dynamic resistance test circuit based on the clamp circuit, including:
[0070] Step 601 : During the short-circuit test phase of the device under test, the clamping circuit and the short-circuit test circuit are controlled to provide a short-circuit working condition for the device under test.
[0071] Step 602 : During the dynamic resistance test phase of the device under test, the clamp circuit and the short circuit test circuit are controlled to provide a test condition for the device under test.
[0072] Specifically, the switch tubes in the clamping circuit and the short-circuit test circuit are controlled by the control circuit, so that short-circuit conditions can be provided for the device under test during the short-circuit test phase of the device under test, and test conditions can be provided during the dynamic resistance test phase, so that the measurement circuit can timely and effectively obtain the dynamic resistance characteristics of the device under test after being subjected to the short-circuit condition.
[0073] It should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0074] Unless otherwise defined, the technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art in the technical field of the present invention. The terms used herein are only for describing specific implementation purposes and are not intended to limit the present invention. Terms such as "setting" appearing in this article can indicate that one component is directly attached to another component, or that one component is attached to another component through an intermediate. Features described in one embodiment herein can be applied to another embodiment alone or in combination with other features, unless the feature is not applicable in the other embodiment or otherwise specified.
[0075] The present invention has been described through the above-mentioned embodiments, but it should be understood that the above-mentioned embodiments are only for the purpose of example and illustration, and are not intended to limit the present invention to the described embodiments. It can be understood by those skilled in the art that more variations and modifications can be made according to the teachings of the present invention, and these variations and modifications all fall within the scope of the protection claimed by the present invention.
Claims
1. A short-circuit condition dynamic resistance test circuit based on a clamp circuit, characterized in that: include: Clamping circuit and short circuit test circuit, The clamping circuit and the short-circuit test circuit are respectively connected to two ends of the device under test; The short-circuit test circuit is used to provide a short-circuit working condition for the device under test during the short-circuit test phase of the device under test; The clamping circuit is used to provide a test condition for the device under test during a dynamic resistance test phase of the device under test; Wherein, the clamping circuit includes a first switch tube and a first capacitor, The first end of the first switch tube is connected to one end of the device under test, the second end of the switch tube is connected to one end of the first capacitor, the other end of the first capacitor is connected to the other end of the device under test, and the third end of the first switch tube is connected to the other end of the device under test. The short-circuit test circuit includes a first test branch, wherein the first test branch includes a second switch tube, The second switch tube is in an on state during a short circuit test phase of the device under test, and is in an off state during a second pulse test phase of the device under test; and The short-circuit test circuit further includes a second test branch, which is connected in parallel with the first test branch. The second test branch is turned on before the second switch tube is turned on; Wherein, the second test branch includes a third switch tube and a first resistor, One end of the first resistor is connected to the first end of the second switch tube, the other end of the first resistor is connected to the first end of the third switch tube, and the second end of the third switch tube is connected to one end of the device under test.
2. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 1, characterized in that: The clamping circuit further includes a second resistor, The second resistor is connected between the first capacitor and the other end of the device under test.
3. The short-circuit condition dynamic resistance test circuit based on the clamp circuit according to claim 1, characterized in that: The short circuit test circuit also includes a power supply branch, The power branch includes a DC power supply and a second capacitor connected in parallel.
4. The short-circuit condition dynamic resistance test circuit based on the clamping circuit according to claim 1 or 2, characterized in that: The test circuit also includes: a control circuit and a measurement circuit. The control circuit is connected to the clamping circuit, the short-circuit test circuit and the device under test respectively, and is used to provide corresponding control signals for the clamping circuit, the short-circuit test circuit and the device under test; The measuring circuit is used to collect the voltage across the two ends of the device under test and the current flowing through the device under test during the dynamic resistance test phase of the device under test.
5. The short-circuit condition dynamic resistance test circuit based on the clamping circuit according to claim 1 or 2, characterized in that: The device under test is a gallium nitride power device.
6. A short-circuit condition dynamic resistance test method based on a clamping circuit, characterized in that: Applied to the short-circuit condition dynamic resistance test circuit based on the clamp circuit as described in any one of claims 1 to 5, the method comprises: Controlling the clamping circuit and the short-circuit test circuit to provide a short-circuit working condition for the device under test during a short-circuit test phase of the device under test; During the dynamic resistance test phase of the device under test, the clamping circuit and the short circuit test circuit are controlled to provide a test condition for the device under test.
Citation Information
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