Display panel test circuit

Abstract

The present invention relates to a display panel test circuit. The display panel test circuit has a structure in which at least two selected from a pre-lighting test circuit for performing a pre-lighting test on a display panel, a lighting test circuit for performing a lighting test on the display panel, an open-short test circuit for performing an open-short test on the display panel, and a crack test circuit for performing a crack test on the display panel are integrated.

Description

TECHNICAL FIELD

[0001] Embodiments relate generally to a display apparatus. More particularly, embodiments of the present inventive concept relate to a display panel test circuit that can perform a pre-lighting test, a lighting test, an open-short test, and a crack test on a display panel included in a display apparatus. BACKGROUND

[0002] Generally, a display apparatus includes a display panel including a plurality of pixels and a display panel driving circuit that drives the display panel. Here, the pixel can include a red sub-pixel, a blue sub-pixel, and a green sub-pixel. Further, the pixel can have an RGB structure in which one red sub-pixel, one blue sub-pixel, and one green sub-pixel are arranged in a row or a pentile structure in which one red sub-pixel, one blue sub-pixel, and two green sub-pixels are arranged. Recently, the pixel having the pentile structure is widely used, and as the resolution of the display apparatus increases, the pentile structure is more suitable for a relatively high resolution. In order to perform a pre-lighting test, a lighting test, an open-short test, and a crack test on the display panel in a manufacturing process of the display apparatus, a display panel test circuit including a pre-lighting test circuit, a lighting test circuit, an open-short test circuit, and a crack test circuit can be provided in a non-display area of the display panel, for example, a lower area of the display panel. Here, since the display panel test circuit occupies a part of the non-display area of the display panel, the display panel test circuit can be regarded as a dead zone of the display panel that causes the display apparatus to have a wide bezel, although the display panel test circuit is not used after the display apparatus is manufactured. In particular, a conventional display panel test circuit has a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, which causes the dead zone of the display panel to increase. SUMMARY

[0003] Some embodiments provide a display panel test circuit having a structure in which at least two selected from a pre-lighting test circuit that performs a pre-lighting test on a display panel, a lighting test circuit that performs a lighting test on the display panel, an open-short test circuit that performs an open-short test on the display panel, and a crack test circuit that performs a crack test on the display panel are integrated.

[0004] According to an embodiment, a display panel test circuit can include a first transistor including a first terminal connected with a first data line connected with a first red sub-pixel and a first blue sub-pixel, a gate terminal receiving a red light-up test signal, and a second terminal connected with a red light-up voltage line supplying a red light-up voltage; a second transistor including a first terminal connected with the first data line, a gate terminal receiving a blue light-up test signal, and a second terminal connected with a blue light-up voltage line supplying a blue light-up voltage; a third transistor including a first terminal connected with a second data line connected with a first green sub-pixel, a gate terminal receiving a first green light-up test signal, and a second terminal connected with a green light-up voltage line supplying a green light-up voltage; a fourth transistor including a first terminal connected with a third data line connected with a second red sub-pixel and a second blue sub-pixel, a gate terminal receiving the red light-up test signal, and a second terminal connected with the blue light-up voltage line; a fifth transistor including a first terminal connected with the third data line, a gate terminal receiving the blue light-up test signal, and a second terminal connected with the red light-up voltage line; a sixth transistor including a first terminal connected with a fourth data line connected with a second green sub-pixel, a gate terminal receiving a second green light-up test signal, and a second terminal connected with the green light-up voltage line; a seventh transistor including a first terminal connected with the second data line, a gate terminal receiving a crack test signal, and a second terminal connected with a crack detection line passing through a non-display area of the display panel; and an eighth transistor including a first terminal connected with the fourth data line, a gate terminal receiving the crack test signal, and a second terminal connected with the crack detection line.

[0005] In an embodiment, when a light-up test is performed on the display panel, the red light-up test signal, the blue light-up test signal, the first green light-up test signal, and the second green light-up test signal can have a turn-on voltage level, the red light-up voltage, the blue light-up voltage, and the green light-up voltage can have a light-up voltage level, and the crack test signal can have a turn-off voltage level.

[0006] In an embodiment, when a first open / short test is performed on the display panel, the red light-up test signal and the second green light-up test signal can have a turn-on voltage level, the first green light-up test signal and the blue light-up test signal can have a turn-off voltage level, the red light-up voltage can have a non-light-up voltage level, the blue light-up voltage and the green light-up voltage can have a light-up voltage level, and the crack test signal can have a turn-on voltage level.

[0007] In an embodiment, when the second open-circuit short-circuit test is performed on the display panel, the red light-up test signal and the first green light-up test signal can have a turn-on voltage level, the second green light-up test signal and the blue light-up test signal can have a turn-off voltage level, the blue light-up voltage can have a non-light-up voltage level, the red light-up voltage and the green light-up voltage can have a light-up voltage level, and the crack test signal can have a turn-on voltage level.

[0008] In an embodiment, when the crack test is performed on the display panel, one of the red light-up test signal and the blue light-up test signal can have a turn-on voltage level, the other of the red light-up test signal and the blue light-up test signal can have a turn-off voltage level, the first green light-up test signal and the second green light-up test signal can have a turn-off voltage level, the red light-up voltage, the blue light-up voltage, and the green light-up voltage can have a non-light-up voltage level, and the crack test signal can have a turn-on voltage level.

[0009] In an embodiment, the display panel test circuit can further include a ninth transistor including a first terminal connected with a first data line, a gate terminal receiving a first pre-light-up test signal, and a second terminal connected with a pre-light-up test pad, a tenth transistor including a first terminal connected with a second data line, a gate terminal receiving a second pre-light-up test signal, and a second terminal connected with the pre-light-up test pad, an eleventh transistor including a first terminal connected with a third data line, a gate terminal receiving a third pre-light-up test signal, and a second terminal connected with the pre-light-up test pad, and a twelfth transistor including a first terminal connected with a fourth data line, a gate terminal receiving a fourth pre-light-up test signal, and a second terminal connected with the pre-light-up test pad.

[0010] In an embodiment, when the pre-light-up test is performed on the display panel, the red light-up test signal, the blue light-up test signal, the first green light-up test signal, and the second green light-up test signal can have a turn-off voltage level, the crack test signal can have a turn-off voltage level, the first pre-light-up test signal, the second pre-light-up test signal, the third pre-light-up test signal, and the fourth pre-light-up test signal can have a turn-on voltage level, and a pre-light-up voltage having a light-up voltage level can be applied via the pre-light-up test pad.

[0011] In an embodiment, the ninth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor can be disposed between the green light-up voltage line and the blue light-up voltage line or the red light-up voltage line.

[0012] According to an embodiment, a display panel test circuit can include a first transistor including a first terminal connected with a first data line to which a first red sub-pixel and a first blue sub-pixel are connected, a gate terminal receiving a red light-up test signal, and a second terminal connected with a red light-up voltage line to which a red light-up voltage is supplied; a second transistor including a first terminal connected with the first data line, a gate terminal receiving a blue light-up test signal, and a second terminal connected with a blue light-up voltage line to which a blue light-up voltage is supplied; a third transistor including a first terminal connected with a second data line to which a first green sub-pixel is connected, a gate terminal receiving a first green light-up test signal, and a second terminal connected with a pre-light-up test pad and a green light-up voltage line to which a green light-up voltage is supplied; a fourth transistor including a first terminal connected with a third data line to which a second red sub-pixel and a second blue sub-pixel are connected, a gate terminal receiving a red light-up test signal, and a second terminal connected with the blue light-up voltage line; a fifth transistor including a first terminal connected with the third data line, a gate terminal receiving a blue light-up test signal, and a second terminal connected with the red light-up voltage line; a sixth transistor including a first terminal connected with a fourth data line to which a second green sub-pixel is connected, a gate terminal receiving a second green light-up test signal, and a second terminal connected with the pre-light-up test pad and the green light-up voltage line; a seventh transistor including a first terminal connected with the second data line, a gate terminal receiving a crack test signal, and a second terminal connected with a crack detection line passing through a non-display area of a display panel; an eighth transistor including a first terminal connected with the fourth data line, a gate terminal receiving the crack test signal, and a second terminal connected with the crack detection line; a ninth transistor including a first terminal connected with the first data line, a gate terminal receiving a first pre-light-up test signal, and a second terminal connected with the pre-light-up test pad and the green light-up voltage line; and a tenth transistor including a first terminal connected with the third data line, a gate terminal receiving a second pre-light-up test signal, and a second terminal connected with the pre-light-up test pad and the green light-up voltage line.

[0013] In an embodiment, when a light-up test is performed on a display panel, a red light-up test signal, a blue light-up test signal, a first green light-up test signal, and a second green light-up test signal can have a turn-on voltage level, a red light-up voltage, a blue light-up voltage, and a green light-up voltage can have a light-up voltage level, a crack test signal can have a turn-off voltage level, and a first pre-light-up test signal and a second pre-light-up test signal can have a turn-off voltage level.

[0014] In an embodiment, when performing the first open-short test on the display panel, the red light-up test signal and the second green light-up test signal can have a turn-on voltage level, the first green light-up test signal and the blue light-up test signal can have a turn-off voltage level, the red light-up voltage can have a non-light-up voltage level, the blue light-up voltage and the green light-up voltage can have a light-up voltage level, the crack test signal can have a turn-on voltage level, and the first pre-light-up test signal and the second pre-light-up test signal can have a turn-off voltage level.

[0015] In an embodiment, when performing the second open-short test on the display panel, the red light-up test signal and the first green light-up test signal can have a turn-on voltage level, the second green light-up test signal and the blue light-up test signal can have a turn-off voltage level, the blue light-up voltage can have a non-light-up voltage level, the red light-up voltage and the green light-up voltage can have a light-up voltage level, the crack test signal can have a turn-on voltage level, and the first pre-light-up test signal and the second pre-light-up test signal can have a turn-off voltage level.

[0016] In an embodiment, when performing the crack test on the display panel, one of the red light-up test signal and the blue light-up test signal can have a turn-on voltage level, the other of the red light-up test signal and the blue light-up test signal can have a turn-off voltage level, the first green light-up test signal and the second green light-up test signal can have a turn-off voltage level, the red light-up voltage, the blue light-up voltage, and the green light-up voltage can have a non-light-up voltage level, the crack test signal can have a turn-on voltage level, and the first pre-light-up test signal and the second pre-light-up test signal can have a turn-off voltage level.

[0017] In an embodiment, when performing the pre-light-up test on the display panel, the red light-up test signal and the blue light-up test signal can have a turn-off voltage level, the crack test signal can have a turn-off voltage level, the first pre-light-up test signal, the second pre-light-up test signal, the first green light-up test signal, and the second green light-up test signal can have a turn-on voltage level, and a pre-light-up voltage having a light-up voltage level can be applied via a pre-light-up test pad.

[0018] According to an embodiment, a display panel test circuit can include a first transistor including a first terminal connected with a first data line to which a first red sub-pixel and a first blue sub-pixel are connected, a gate terminal to receive a red lighting test signal, and a second terminal connected with a red lighting voltage line to which a red lighting voltage is supplied; a second transistor including a first terminal connected with the first data line, a gate terminal to receive a blue lighting test signal, and a second terminal connected with a blue lighting voltage line to which a blue lighting voltage is supplied; a third transistor including a first terminal connected with a second data line to which a first green sub-pixel is connected, a gate terminal to receive a green lighting test signal, and a second terminal connected with a first test voltage line to which a first test voltage is supplied; a fourth transistor including a first terminal connected with a third data line to which a second red sub-pixel and a second blue sub-pixel are connected, a gate terminal to receive the red lighting test signal, and a second terminal connected with the blue lighting voltage line; a fifth transistor including a first terminal connected with the third data line, a gate terminal to receive the blue lighting test signal, and a second terminal connected with the red lighting voltage line; a sixth transistor including a first terminal connected with a fourth data line to which a second green sub-pixel is connected, a gate terminal to receive the green lighting test signal, and a second terminal connected with a second test voltage line to which a second test voltage is supplied; a seventh transistor including a first terminal connected with the second data line, a gate terminal to receive a crack test signal, and a second terminal connected with a crack detection line passing through a non-display area of the display panel; an eighth transistor including a first terminal connected with the fourth data line, a gate terminal to receive the crack test signal, and a second terminal connected with the crack detection line; a ninth transistor including a first terminal connected with the second data line, a gate terminal to receive a pre-lighting test signal, and a second terminal connected with a first pre-lighting test pad connected to the first data line; a tenth transistor including a first terminal connected with the fourth data line, a gate terminal to receive the pre-lighting test signal, and a second terminal connected with a second pre-lighting test pad connected to the third data line; an eleventh transistor including a first terminal connected with the first data line, a gate terminal to receive an open-short test signal, and a second terminal connected with the first test voltage line; and a twelfth transistor including a first terminal connected with the third data line, a gate terminal to receive the open-short test signal, and a second terminal connected with the second test voltage line.

[0019] In an embodiment, when a lighting test is performed on the display panel, the red lighting test signal, the blue lighting test signal, and the green lighting test signal can have a turn-on voltage level, the red lighting voltage and the blue lighting voltage can have a lighting voltage level, the crack test signal can have a turn-off voltage level, the open-short test signal can have a turn-off voltage level, the first test voltage and the second test voltage can have a lighting voltage level, and the pre-lighting test signal can have a turn-off voltage level.

[0020] In an embodiment, when performing the first open-short test on the display panel, the green turn-on test signal can have a turn-on voltage level, the red and blue turn-on test signals can have an off voltage level, the red and blue turn-on voltages can have a non-turn-on voltage level, the crack test signal can have an off voltage level, the open-short test signal can have a turn-on voltage level, the first test voltage can have a non-turn-on voltage level, the second test voltage can have a turn-on voltage level, and the pre-turn-on test signal can have an off voltage level.

[0021] In an embodiment, when performing the second open-short test on the display panel, the green turn-on test signal can have a turn-on voltage level, the red and blue turn-on test signals can have an off voltage level, the red and blue turn-on voltages can have a non-turn-on voltage level, the crack test signal can have an off voltage level, the open-short test signal can have a turn-on voltage level, the first test voltage can have a turn-on voltage level, the second test voltage can have a non-turn-on voltage level, and the pre-turn-on test signal can have an off voltage level.

[0022] In an embodiment, when performing the crack test on the display panel, the red, green, and blue turn-on test signals can have an off voltage level, the red and blue turn-on voltages can have a non-turn-on voltage level, the crack test signal can have a turn-on voltage level, the open-short test signal can have a turn-on voltage level, the first and second test voltages can have a non-turn-on voltage level, and the pre-turn-on test signal can have an off voltage level.

[0023] In an embodiment, when performing the pre-turn-on test on the display panel, the red, green, and blue turn-on test signals can have an off voltage level, the red and blue turn-on voltages can have a non-turn-on voltage level, the crack test signal can have an off voltage level, the open-short test signal can have an off voltage level, the first and second test voltages can have a non-turn-on voltage level, the pre-turn-on test signal can have a turn-on voltage level, and a pre-turn-on voltage having a turn-on voltage level can be applied via the first and second pre-turn-on test pads.

[0024] Accordingly, the display panel test circuit according to the embodiments can have a structure in which at least two selected from a pre-lighting test circuit performing a pre-lighting test on a display panel, a lighting test circuit performing a lighting test on a display panel, an open-short test circuit performing an open-short test on a display panel, and a crack test circuit performing a crack test on a display panel are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit can reduce a dead zone of a display panel when the display panel test circuit is provided (or mounted) in a non-display area of the display panel. However, the effects of the inventive concept are not limited thereto. Accordingly, the effects of the inventive concept can be extended without departing from the spirit and scope of the inventive concept. BRIEF DESCRIPTION OF DRAWINGS

[0025] The illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0026] Figure 1 is a block diagram illustrating a display panel according to an embodiment.

[0027] Figure 2 is a circuit diagram illustrating an example of a display panel test circuit included in the display panel of Figure 1 .

[0028] Figure 3 is a diagram for describing an operation of the display panel test circuit of Figure 2 .

[0029] Figure 4 is a circuit diagram illustrating another example of a display panel test circuit included in the display panel of Figure 1 .

[0030] Figure 5 is a circuit diagram illustrating still another example of a display panel test circuit included in the display panel of Figure 1 .

[0031] Figure 6 is a circuit diagram illustrating still another example of a display panel test circuit included in the display panel of Figure 1 .

[0032] Figure 7 is a circuit diagram illustrating still another example of a display panel test circuit included in the display panel of Figure 1 .

[0033] Figure 8 is a diagram for describing an operation of the display panel test circuit of Figure 7 .

[0034] Figure 9 is a block diagram illustrating a display apparatus according to an embodiment.

[0035] Figure 10 is a block diagram illustrating an electronic apparatus according to an embodiment.

[0036] Figure 11 is a diagram illustrating an example in which the electronic apparatus of Figure 10 is implemented as a smart phone. DETAILED DESCRIPTION

[0037] Hereinafter, embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0038] Figure 1 is a block diagram illustrating a display panel according to an embodiment.

[0039] Referring to Figure 1 , the display panel 100 can include a display area 110 and a non-display area 120. The display area 110 can include a plurality of pixels having a honeycomb structure. For example, as shown in Figure 1 , each of the pixels can include one red sub-pixel R, one blue sub-pixel B, and two green sub-pixels G. In the display panel 100, a display panel test circuit 200 that performs a pre-point-on test (e.g., a test for detecting a pixel point-on defect before deposition), a point-on test (e.g., a test for detecting a pixel point-on defect after deposition), an open-short test (e.g., a test for detecting an open of a data line and a short between data lines), and a crack test (e.g., a test for detecting a crack occurring in a region around a display area of the display panel) for the display panel 100 can be provided (or mounted). Here, the display panel test circuit 200 can be disposed in the non-display area 120 (e.g., a lower area of the display panel 100) of the display panel 100. As shown in Figure 1As illustrated in FIG. 1, although the display panel test circuit 200 is not used after the display device is manufactured, the display panel test circuit 200 occupies a portion of the non-display area 120 of the display panel 100 and thus causes the display device to have a wide bezel. That is, the display panel test circuit 200 is regarded as a dead zone. For this reason, the display panel test circuit 200 can have a structure in which at least two are integrated from among a pre-lighting test circuit that performs a pre-lighting test on the display panel 100, a lighting test circuit that performs a lighting test on the display panel 100, an open-short test circuit that performs an open-short test on the display panel 100, and a crack test circuit that performs a crack test on the display panel 100. Thus, compared to a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, when the display panel test circuit 200 is provided in the non-display area 120 of the display panel 100, the display panel test circuit 200 can reduce the dead zone of the display panel 100. This will be described with reference to Figures 2 to 7 The display panel test circuit 200 is described in detail.

[0040] Figure 2 is a circuit diagram illustrating an example of the display panel test circuit included in the display panel of Figure 1 , and Figure 3 is a diagram for describing the operation of the display panel test circuit of Figure 2 .

[0041] Referring to Figure 2 and Figure 3 , the display panel test circuit 200-1 can include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and an eighth transistor T8. Here, the display panel test circuit 200-1 can not include a component corresponding to a pre-lighting test circuit for performing a pre-lighting test. Since the display panel test circuit 200-1 is illustrated in Figure 2 with respect to two adjacent pixels (that is, four adjacent data lines DL1, DL2, DL3, and DL4), it should be understood that the display panel test circuit 200-1 has a structure in which the configuration illustrated in Figure 2 is repeatedly provided.

[0042] The first transistor T1 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving a red light-up test signal TEST_GATE_R, and a second terminal connected with a red light-up voltage line supplying a red light-up voltage DC_R. Accordingly, when the red light-up test signal TEST_GATE_R has an on-voltage level, the first transistor T1 can transmit the red light-up voltage DC_R to the first data line DL1. The second transistor T2 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving a blue light-up test signal TEST_GATE_B, and a second terminal connected with a blue light-up voltage line supplying a blue light-up voltage DC_B. Accordingly, when the blue light-up test signal TEST_GATE_B has an on-voltage level, the second transistor T2 can transmit the blue light-up voltage DC_B to the first data line DL1. The third transistor T3 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving a first green light-up test signal TEST_GATE_G1, and a second terminal connected with a green light-up voltage line supplying a green light-up voltage DC_G. Accordingly, when the first green light-up test signal TEST_GATE_G1 has an on-voltage level, the third transistor T3 can transmit the green light-up voltage DC_G to the second data line DL2.

[0043] The fourth transistor T4 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the red light-up test signal TEST_GATE_R, and a second terminal connected with a blue light-up voltage line supplying a blue light-up voltage DC_B. Accordingly, when the red light-up test signal TEST_GATE_R has an on-voltage level, the fourth transistor T4 can transmit the blue light-up voltage DC_B to the third data line DL3. The fifth transistor T5 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the blue light-up test signal TEST_GATE_B, and a second terminal connected with a red light-up voltage line supplying a red light-up voltage DC_R. Accordingly, when the blue light-up test signal TEST_GATE_B has an on-voltage level, the fifth transistor T5 can transmit the red light-up voltage DC_R to the third data line DL3. The sixth transistor T6 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the second green light-up test signal TEST_GATE_G2, and a second terminal connected with a green light-up voltage line transmitting a green light-up voltage DC_G. Accordingly, when the second green light-up test signal TEST_GATE_G2 has an on-voltage level, the sixth transistor T6 can transmit the green light-up voltage DC_G to the fourth data line DL4.

[0044] The seventh transistor T7 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving the crack test signal MCD_GATE, and a second terminal connected with a crack detection line VGH passing through the non-display area 120 of the display panel 100. Accordingly, when the crack test signal MCD_GATE has an on-voltage level, the seventh transistor T7 can transmit a voltage of the crack detection line VGH to the second data line DL2. The eighth transistor T8 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the crack test signal MCD_GATE, and a second terminal connected with the crack detection line VGH passing through the non-display area 120 of the display panel 100. Accordingly, when the crack test signal MCD_GATE has an on-voltage level, the eighth transistor T8 can transmit a voltage of the crack detection line VGH to the fourth data line DL4. The crack detection line VGH can pass through the non-display area 120 of the display panel 100, one end of the crack detection line VGH can be connected with the red light-up voltage line, the blue light-up voltage line, or the green light-up voltage line, and the other end of the crack detection line VGH can be connected with the seventh transistor T7 and the eighth transistor T8. In an embodiment, as Figure 3As shown in FIG. 2A, the display panel test circuit 200-1 can perform a lighting test (i.e., indicated by DC LIGHTING TEST), an open / short test (i.e., indicated by OS TEST1 and OS TEST2), and a crack test (i.e., indicated by MCD TEST) on the display panel 100 using the first to eighth transistors T1 to T8.

[0045] In an embodiment, when the display panel test circuit 200-1 performs the lighting test (i.e., indicated by DC LIGHTING TEST) on the display panel 100, the red lighting test signal TEST_GATE_R, the blue lighting test signal TEST_GATE_B, the first green lighting test signal TEST_GATE_G1, and the second green lighting test signal TEST_GATE_G2 can have an on voltage level (e.g., indicated by L), the red lighting voltage DC_R, the blue lighting voltage DC_B, and the green lighting voltage DC_G can have a lighting voltage level (e.g., indicated by L), and the crack test signal MCD_GATE can have an off voltage level (e.g., indicated by H). Accordingly, the first to sixth transistors T1 to T6 can be turned on (here, the first and second transistors T1 and T2 can be alternately turned on, and the fourth and fifth transistors T4 and T5 can be alternately turned on), and the seventh and eighth transistors T7 and T8 can be turned off. Here, the first and second red sub-pixels R should emit light because the red lighting voltage DC_R has the lighting voltage level and the red lighting voltage DC_R is applied to the first and second red sub-pixels R via the first and third data lines DL1 and DL3. Also, the first and second blue sub-pixels B should emit light because the blue lighting voltage DC_B has the lighting voltage level and the blue lighting voltage DC_B is applied to the first and second blue sub-pixels B via the first and third data lines DL1 and DL3. Further, the first and second green sub-pixels G should emit light because the green lighting voltage DC_G has the lighting voltage level and the green lighting voltage DC_G is applied to the first and second green sub-pixels G via the second and fourth data lines DL2 and DL4. Accordingly, the display panel test circuit 200-1 can perform the lighting test (i.e., indicated by DC LIGHTING TEST) on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0046] In an embodiment, when the display panel test circuit 200-1 performs the first open-short test on the display panel 100 (i.e., indicated by OS TEST1), the red turn-on test signal TEST_GATE_R and the second green turn-on test signal TEST_GATE_G2 can have an on voltage level (e.g., indicated by L), the first green turn-on test signal TEST_GATE_G1 and the blue turn-on test signal TEST_GATE_B can have an off voltage level (e.g., indicated by H), the red turn-on voltage DC_R can have a non-turn-on voltage level (e.g., indicated by H), the blue turn-on voltage DC_B and the green turn-on voltage DC_G can have a turn-on voltage level (e.g., indicated by L), and the crack test signal MCD_GATE can have an on voltage level (e.g., indicated by L). Accordingly, the first transistor T1, the fourth transistor T4, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 can be turned on, and the second transistor T2, the third transistor T3, and the fifth transistor T5 can be turned off. Here, the first red sub-pixel R and the first blue sub-pixel B connected to the first data line DL1 to which the red turn-on voltage DC_R is applied through the first transistor T1 should not emit light because the red turn-on voltage DC_R has a non-turn-on voltage level. Also, the first green sub-pixel G connected to the second data line DL2 to which the voltage of the crack detection line VGH is applied through the seventh transistor T7 should not emit light because the voltage of the crack detection line VGH has a non-turn-on voltage level. On the other hand, the second green sub-pixel G connected to the fourth data line DL4 to which the green turn-on voltage DC_G is applied through the sixth transistor T6 should emit light because the green turn-on voltage DC_G has a turn-on voltage level. Also, the second red sub-pixel R and the second blue sub-pixel B connected to the third data line DL3 to which the blue turn-on voltage DC_B is applied through the fourth transistor T4 should emit light because the blue turn-on voltage DC_B has a turn-on voltage level. Accordingly, the display panel test circuit 200-1 can perform the first open-short test (i.e., indicated by OS TEST1) on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0047] Furthermore, when the display panel test circuit 200-1 performs the second open-short test (i.e., indicated by OS TEST2) on the display panel 100, the red lighting test signal TEST_GATE_R and the first green lighting test signal TEST_GATE_G1 can have an on voltage level (e.g., indicated by L), the second green lighting test signal TEST_GATE_G2 and the blue lighting test signal TEST_GATE_B can have an off voltage level (e.g., indicated by H), the blue lighting voltage DC_B can have a non-lighting voltage level (e.g., indicated by H), the red lighting voltage DC_R and the green lighting voltage DC_G can have a lighting voltage level (e.g., indicated by L), and the crack test signal MCD_GATE can have an on voltage level (e.g., indicated by L). Thus, the first transistor T1, the third transistor T3, the fourth transistor T4, the seventh transistor T7, and the eighth transistor T8 can be on, and the second transistor T2, the fifth transistor T5, and the sixth transistor T6 can be off. Here, the first red sub-pixel R and the first blue sub-pixel B connected with the first data line DL1 to which the red lighting voltage DC_R is applied via the first transistor T1 should emit light because the red lighting voltage DC_R has a lighting voltage level. Furthermore, the first green sub-pixel G connected with the second data line DL2 to which the green lighting voltage DC_G is applied via the third transistor T3 should emit light because the green lighting voltage DC_G has a lighting voltage level. On the other hand, the second red sub-pixel R and the second blue sub-pixel B connected with the third data line DL3 to which the blue lighting voltage DC_B is applied via the fourth transistor T4 should not emit light because the blue lighting voltage DC_B has a non-lighting voltage level. Furthermore, the second green sub-pixel G connected with the fourth data line DL4 to which the voltage of the crack detection line VGH is applied via the eighth transistor T8 should not emit light because the voltage of the crack detection line VGH has a non-lighting voltage level. Thus, the display panel test circuit 200-1 can perform the second open-short test (i.e., indicated by OS TEST2) on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0048] In an embodiment, when the display panel test circuit 200-1 performs a crack test on the display panel 100 (i.e., indicated by MCD TEST), one of the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have an on voltage level (e.g., indicated by L), the other of the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have an off voltage level (e.g., indicated by H), the first green lighting test signal TEST_GATE_G1 and the second green lighting test signal TEST_GATE_G2 can have an off voltage level (e.g., indicated by H), the red lighting voltage DC_R, the blue lighting voltage DC_B, and the green lighting voltage DC_G can have a non-lighting voltage level (e.g., indicated by H), and the crack test signal MCD_GATE can have an on voltage level (e.g., indicated by L). Thus, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be off, and the seventh transistor T7 and the eighth transistor T8 can be on. As described above, the crack detection line VGH can pass through the non-display area 120 of the display panel 100, one end of the crack detection line VGH can be connected with the red lighting voltage line, the blue lighting voltage line, or the green lighting voltage line, and the other end of the crack detection line VGH can be connected with the seventh transistor T7 and the eighth transistor T8. Thus, when the voltage having the non-lighting voltage level is applied to the crack detection line VGH while the seventh transistor T7 and the eighth transistor T8 are on, the first green sub-pixel G connected with the second data line DL2 and the second green sub-pixel G connected with the fourth data line DL4 should not emit light. Thus, if the first green sub-pixel G connected with the second data line DL2 and / or the second green sub-pixel G connected with the fourth data line DL4 emit light when the voltage having the non-lighting voltage level is applied to the crack detection line VGH while the seventh transistor T7 and the eighth transistor T8 are on, it can be determined that a crack occurs in the non-display area 120 of the display panel 100. In this way, the display panel test circuit 200-1 can perform a crack test (i.e., indicated by MCD TEST) on the display panel 100.

[0049] In short, the display panel test circuit 200-1 can have a structure in which at least two of the lighting test circuit selected to perform a lighting test (i.e., indicated by DC LIGHTING TEST) on the display panel 100, the open-short test circuit to perform an open-short test (i.e., indicated by OS TEST1 and OS TEST2) on the display panel 100, and the crack test circuit to perform a crack test (i.e., indicated by MCD TEST) on the display panel 100 are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit 200-1 can reduce a dead zone of the display panel 100 when the display panel test circuit 200-1 is provided (or mounted) in the non-display area 120 of the display panel 100. In other words, the display panel test circuit 200-1 can perform the lighting test (i.e., indicated by DC LIGHTING TEST), the open-short test (i.e., indicated by OS TEST1 and OS TEST2), and the crack test (i.e., indicated by MCD TEST) on the display panel 100 based on the structure in which the lighting test circuit, the open-short test circuit, and the crack test circuit are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit 200-1 can reduce the number of transistors, and thus can reduce the dead zone of the display panel 100. Although Figure 2 Although FIG. 1 illustrates that the first through eighth transistors T1 through T8 are implemented by p-channel metal-oxide-semiconductor (PMOS) transistors, the implementation of the first through eighth transistors T1 through T8 is not limited thereto. For example, the first through eighth transistors T1 through T8 can be implemented by n-channel metal-oxide-semiconductor (NMOS) transistors. For example, a part of the first through eighth transistors T1 through T8 can be implemented by PMOS transistors, and the remaining part of the first through eighth transistors T1 through T8 can be implemented by NMOS transistors.

[0050] Figure 4 is a circuit diagram illustrating another example of a display panel test circuit included in a display panel of Figure 1

[0051] Referring to Figure 4 ​, the display panel test circuit 200-2 can include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, and a twelfth transistor T12. That is, the display panel test circuit 200-2 can have a structure in which components (that is, the ninth transistor T9 to the twelfth transistor T12) corresponding to a pre-lighting test circuit for performing a pre-lighting test are added to the structure of the display panel test circuit 200-1 of Figure 2 . Accordingly, in describing the display panel test circuit 200-2, a description repeated with the display panel test circuit 200-1 of Figure 2 will not be repeated, and only components (that is, the ninth transistor T9 to the twelfth transistor T12) corresponding to the pre-lighting test circuit for performing a pre-lighting test will be described below. Since the display panel test circuit 200-2 is illustrated with reference to two adjacent pixels (that is, four adjacent data lines DL1, DL2, DL3, and DL4) in Figure 4 , it should be understood that the display panel test circuit 200-2 has a structure in which the configuration shown in Figure 4 is repeatedly provided.

[0052] The ninth transistor T9 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving the first pre-lighting test signal DFT_A, and a second terminal connected with the pre-lighting test pad PAD. Accordingly, when the first pre-lighting test signal DFT_A has an on-voltage level, the ninth transistor T9 can transmit a pre-lighting voltage having a lighting voltage level, which is applied via the pre-lighting test pad PAD, to the first data line DL1. The tenth transistor T10 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving the second pre-lighting test signal DFT_B, and a second terminal connected with the pre-lighting test pad PAD. Accordingly, when the second pre-lighting test signal DFT_B has an on-voltage level, the tenth transistor T10 can transmit a pre-lighting voltage having a lighting voltage level, which is applied via the pre-lighting test pad PAD, to the second data line DL2. The eleventh transistor T11 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the third pre-lighting test signal DFT_C, and a second terminal connected with the pre-lighting test pad PAD. Accordingly, when the third pre-lighting test signal DFT_C has an on-voltage level, the eleventh transistor T11 can transmit a pre-lighting voltage having a lighting voltage level, which is applied via the pre-lighting test pad PAD, to the third data line DL3. The twelfth transistor T12 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the fourth pre-lighting test signal DFT_D, and a second terminal connected with the pre-lighting test pad PAD. Accordingly, when the fourth pre-lighting test signal DFT_D has an on-voltage level, the twelfth transistor T12 can transmit a pre-lighting voltage having a lighting voltage level, which is applied via the pre-lighting test pad PAD, to the fourth data line DL4.

[0053] In an embodiment, when the display panel test circuit 200-2 performs the pre-lighting test on the display panel 100, the red lighting test signal TEST_GATE_R, the blue lighting test signal TEST_GATE_B, the first green lighting test signal TEST_GATE_G1, and the second green lighting test signal TEST_GATE_G2 can have a cutoff voltage level, the crack test signal MCD_GATE can have a cutoff voltage level, the first pre-lighting test signal DFT_A, the second pre-lighting test signal DFT_B, the third pre-lighting test signal DFT_C, and the fourth pre-lighting test signal DFT_D can have a turn-on voltage level, and a pre-lighting voltage having a lighting voltage level can be applied via the pre-lighting test pad PAD. Accordingly, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 can be turned off, and the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the twelfth transistor T12 can be turned on. Here, because the pre-lighting voltage having the lighting voltage level is applied via the pre-lighting test pad PAD and the ninth transistor T9 to the twelfth transistor T12 are turned on, the pre-lighting voltage having the lighting voltage level can be applied to the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B via the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4. Accordingly, the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B should emit light. Accordingly, the display panel test circuit 200-2 can perform the pre-lighting test on the display panel 100 by checking whether the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B emit light.

[0054] In short, the display panel test circuit 200-2 can have a structure in which at least two of the pre-lighting test circuit selected to perform the pre-lighting test on the display panel 100, the lighting test circuit to perform the lighting test (i.e., indicated by DC LIGHTING TEST) on the display panel 100, the open-short test circuit to perform the open-short test (i.e., indicated by OS TEST1 and OS TEST2) on the display panel 100, and the crack test circuit to perform the crack test (i.e., indicated by MCD TEST) on the display panel 100 are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit 200-2 can reduce a dead zone of the display panel 100 when the display panel test circuit 200-2 is provided (or mounted) in the non-display area 120 of the display panel 100. In other words, the display panel test circuit 200-2 can perform the pre-lighting test, the lighting test (i.e., indicated by DC LIGHTING TEST), the open-short test (i.e., indicated by OS TEST1 and OS TEST2), and the crack test (i.e., indicated by MCD TEST) on the display panel 100 based on the structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit 200-2 can reduce the number of transistors, and thus can reduce the dead zone of the display panel 100. Although the first to twelfth transistors T1 to T12 are illustrated as being implemented by PMOS transistors in Figure 4

[0055] Figure 5 is a circuit diagram illustrating another example of a display panel test circuit included in a display panel of Figure 1

[0056] Referring to Figure 5 ​​, the display panel test circuit 200-3 can include the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the twelfth transistor T12. That is, except that the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the twelfth transistor T12 are disposed between the green light-up voltage line that supplies the green light-up voltage DC_G and the blue light-up voltage line that supplies the blue light-up voltage DC_B or the red light-up voltage line that supplies the red light-up voltage DC_R, the display panel test circuit 200-3 can be substantially the same as the display panel test circuit 200-2 of Figure 4 . Thus, the description regarding the first transistor T1 to the twelfth transistor T12 included in the display panel test circuit 200-3 will not be repeated. Since the display panel test circuit 200-3 is illustrated with respect to two adjacent pixels (that is, four adjacent data lines DL1, DL2, DL3, and DL4) in Figure 5 , it should be understood that the display panel test circuit 200-3 has a structure in which the configurations shown in Figure 5 are repeatedly disposed. Furthermore, although the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the twelfth transistor T12 are illustrated as being disposed between the green light-up voltage line and the blue light-up voltage line in Figure 5 , the structure of the display panel test circuit 200-3 is not limited thereto. For example, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the twelfth transistor T12 can be disposed between the red light-up voltage line and the blue light-up voltage line or between the crack detection line VGH and the blue light-up voltage line.

[0057] Figure 6 is a circuit diagram illustrating yet another example of a display panel test circuit included in a display panel of Figure 1 .

[0058] Referring to Figure 6 , the display panel test circuit 200-4 can include the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, and the tenth transistor T10. Since the display panel test circuit 200-4 is illustrated with respect to two adjacent pixels (that is, four adjacent data lines DL1, DL2, DL3, and DL4) in Figure 6 , it should be understood that the display panel test circuit 200-4 has a structure in which the configurations shown in Figure 6 are repeatedly disposed.

[0059] The first transistor T1 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving the red light-up test signal TEST_GATE_R, and a second terminal connected with a red light-up voltage line supplying the red light-up voltage DC_R. Accordingly, when the red light-up test signal TEST_GATE_R has an on-voltage level, the first transistor T1 can transmit the red light-up voltage DC_R to the first data line DL1. The second transistor T2 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving the blue light-up test signal TEST_GATE_B, and a second terminal connected with a blue light-up voltage line supplying the blue light-up voltage DC_B. Accordingly, when the blue light-up test signal TEST_GATE_B has an on-voltage level, the second transistor T2 can transmit the blue light-up voltage DC_B to the first data line DL1. The third transistor T3 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving the first green light-up test signal TEST_GATE_G1 (i.e., DFT_B), and a second terminal connected with the pre-light-up test pad PAD and a green light-up voltage line supplying the green light-up voltage DC_G. Accordingly, when the first green light-up test signal TEST_GATE_G1 (i.e., DFT_B) has an on-voltage level, the third transistor T3 can transmit the green light-up voltage DC_G or a pre-light-up voltage having a light-up voltage level applied via the pre-light-up test pad PAD to the second data line DL2.

[0060] The fourth transistor T4 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the red light-up test signal TEST_GATE_R, and a second terminal connected with the blue light-up voltage line supplying the blue light-up voltage DC_B. Accordingly, when the red light-up test signal TEST_GATE_R has an on-voltage level, the fourth transistor T4 can transmit the blue light-up voltage DC_B to the third data line DL3. The fifth transistor T5 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the blue light-up test signal TEST_GATE_B, and a second terminal connected with the red light-up voltage line supplying the red light-up voltage DC_R. Accordingly, when the blue light-up test signal TEST_GATE_B has an on-voltage level, the fifth transistor T5 can transmit the red light-up voltage DC_R to the third data line DL3. The sixth transistor T6 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the second green light-up test signal TEST_GATE_G2 (i.e., DFT_D), and a second terminal connected with the pre-light-up test pad PAD and the green light-up voltage line transmitting the green light-up voltage DC_G. Accordingly, when the second green light-up test signal TEST_GATE_G2 (i.e., DFT_D) has an on-voltage level, the sixth transistor T6 can transmit the green light-up voltage DC_G or a pre-light-up voltage having a light-up voltage level applied via the pre-light-up test pad PAD to the fourth data line DL4.

[0061] The seventh transistor T7 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving the crack test signal MCD_GATE, and a second terminal connected with the crack detection line VGH passing through the non-display area 120 of the display panel 100. Accordingly, when the crack test signal MCD_GATE has an on-voltage level, the seventh transistor T7 can transmit the voltage of the crack detection line VGH to the second data line DL2. The eighth transistor T8 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the crack test signal MCD_GATE, and a second terminal connected with the crack detection line VGH passing through the non-display area 120 of the display panel 100. Accordingly, when the crack test signal MCD_GATE has an on-voltage level, the eighth transistor T8 can transmit the voltage of the crack detection line VGH to the fourth data line DL4. The crack detection line VGH can pass through the non-display area 120 of the display panel 100, one end of the crack detection line VGH can be connected with the red lighting voltage line, the blue lighting voltage line, or the green lighting voltage line, and the other end of the crack detection line VGH can be connected with the seventh transistor T7 and the eighth transistor T8. The ninth transistor T9 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving the first pre-lighting test signal DFT_A, and a second terminal connected with the pre-lighting test pad PAD and the green lighting voltage line supplying the green lighting voltage DC_G. Accordingly, when the first pre-lighting test signal DFT_A has an on-voltage level, the ninth transistor T9 can transmit the green lighting voltage DC_G or the pre-lighting voltage having a lighting voltage level applied via the pre-lighting test pad PAD to the first data line DL1. The tenth transistor T10 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the third pre-lighting test signal DFT_C, and a second terminal connected with the pre-lighting test pad PAD and the green lighting voltage line supplying the green lighting voltage DC_G. Accordingly, when the third pre-lighting test signal DFT_C has an on-voltage level, the tenth transistor T10 can transmit the green lighting voltage DC_G or the pre-lighting voltage having a lighting voltage level applied via the pre-lighting test pad PAD to the third data line DL3. In an embodiment, as shown in FIG. 2A, the display panel test circuit 200-4 can perform the pre-lighting test, the lighting test, the open-short test, and the crack test on the display panel 100 using the first transistor T1 to the tenth transistor T10. Figure 6

[0062] ​In an embodiment, when the display panel test circuit 200-4 performs a burn-in test on the display panel 100, the red burn-in test signal TEST_GATE_R, the blue burn-in test signal TEST_GATE_B, the first green burn-in test signal TEST_GATE_G1 (i.e., DFT_B), and the second green burn-in test signal TETS_GATE_G2 (i.e., DFT_D) can have an on voltage level, the red burn-in voltage DC_R, the blue burn-in voltage DC_B, and the green burn-in voltage DC_G can have a burn-in voltage level, the crack test signal MCD_GATE can have an off voltage level, and the first pre-burn-in test signal DFT_A and the third pre-burn-in test signal DFT_C can have an off voltage level. Accordingly, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned on (here, the first transistor T1 and the second transistor T2 can be alternately turned on, and the fourth transistor T4 and the fifth transistor T5 can be alternately turned on), and the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, and the tenth transistor T10 can be turned off. Here, the first red sub-pixel R and the second red sub-pixel R should emit light because the red burn-in voltage DC_R has a burn-in voltage level and the red burn-in voltage DC_R is applied to the first red sub-pixel R and the second red sub-pixel R via the first data line DL1 and the third data line DL3. In addition, the first blue sub-pixel B and the second blue sub-pixel B should emit light because the blue burn-in voltage DC_B has a burn-in voltage level and the blue burn-in voltage DC_B is applied to the first blue sub-pixel B and the second blue sub-pixel B via the first data line DL1 and the third data line DL3. Further, the first green sub-pixel G and the second green sub-pixel G should emit light because the green burn-in voltage DC_G has a burn-in voltage level and the green burn-in voltage DC_G is applied to the first green sub-pixel G and the second green sub-pixel G via the second data line DL2 and the fourth data line DL4. Accordingly, the display panel test circuit 200-4 can perform a burn-in test on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0063] In an embodiment, when the display panel test circuit 200-4 performs the first open-short test on the display panel 100, the red turn-on test signal TEST_GATE_R and the second green turn-on test signal TEST_GATE_G2 (i.e., DFT_D) can have an on voltage level, the first green turn-on test signal TEST_GATE_G1 (i.e., DFT_B) and the blue turn-on test signal TEST_GATE_B can have an off voltage level, the red turn-on voltage DC_R can have a non-turn-on voltage level, the blue turn-on voltage DC_B and the green turn-on voltage DC_G can have a turn-on voltage level, the crack test signal MCD_GATE can have an on voltage level, and the first pre-turn-on test signal DFT_A and the third pre-turn-on test signal DFT_C can have an off voltage level. Accordingly, the first transistor T1, the fourth transistor T4, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 can be turned on, and the second transistor T2, the third transistor T3, the fifth transistor T5, the ninth transistor T9, and the tenth transistor T10 can be turned off. Here, the first red sub-pixel R and the first blue sub-pixel B connected with the first data line DL1 to which the red turn-on voltage DC_R is applied through the first transistor T1 should not emit light because the red turn-on voltage DC_R has a non-turn-on voltage level. Also, the first green sub-pixel G connected with the second data line DL2 to which the voltage of the crack detection line VGH is applied through the seventh transistor T7 should not emit light because the voltage of the crack detection line VGH has a non-turn-on voltage level. On the other hand, the second green sub-pixel G connected with the fourth data line DL4 to which the green turn-on voltage DC_G is applied through the sixth transistor T6 should emit light because the green turn-on voltage DC_G has a turn-on voltage level. Also, the second red sub-pixel R and the second blue sub-pixel B connected with the third data line DL3 to which the blue turn-on voltage DC_B is applied through the fourth transistor T4 should emit light because the blue turn-on voltage DC_B has a turn-on voltage level. Accordingly, the display panel test circuit 200-4 can perform the first open-short test on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0064] Furthermore, when the display panel test circuit 200-4 performs the second open-short test on the display panel 100, the red turn-on test signal TEST_GATE_R and the first green turn-on test signal TEST_GATE_G1 (i.e., DFT_B) can have an on voltage level, the second green turn-on test signal TEST_GATE_G2 (i.e., DFT_D) and the blue turn-on test signal TEST_GATE_B can have an off voltage level, the blue turn-on voltage DC_B can have a non-turn-on voltage level, the red turn-on voltage DC_R and the green turn-on voltage DC_G can have a turn-on voltage level, the crack test signal MCD_GATE can have an on voltage level, and the first pre-turn-on test signal DFT_A and the third pre-turn-on test signal DFT_C can have an off voltage level. Accordingly, the first transistor T1, the third transistor T3, the fourth transistor T4, the seventh transistor T7, and the eighth transistor T8 can be turned on, and the second transistor T2, the fifth transistor T5, the sixth transistor T6, the ninth transistor T9, and the tenth transistor T10 can be turned off. Here, the first red sub-pixel R and the first blue sub-pixel B connected with the first data line DL1 to which the red turn-on voltage DC_R is applied through the first transistor T1 should emit light because the red turn-on voltage DC_R has a turn-on voltage level. Furthermore, the first green sub-pixel G connected with the second data line DL2 to which the green turn-on voltage DC_G is applied through the third transistor T3 should emit light because the green turn-on voltage DC_G has a turn-on voltage level. On the other hand, the second red sub-pixel R and the second blue sub-pixel B connected with the third data line DL3 to which the blue turn-on voltage DC_B is applied through the fourth transistor T4 should not emit light because the blue turn-on voltage DC_B has a non-turn-on voltage level. Furthermore, the second green sub-pixel G connected with the fourth data line DL4 to which the voltage of the crack detection line VGH is applied through the eighth transistor T8 should not emit light because the voltage of the crack detection line VGH has a non-turn-on voltage level. Accordingly, the display panel test circuit 200-4 can perform the second open-short test on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0065] In an embodiment, when the display panel test circuit 200-4 performs a crack test on the display panel 100, one of the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have a turn-on voltage level, the other of the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have a turn-off voltage level, the first green lighting test signal TEST_GATE_G1 (i.e., DFT_B) and the second green lighting test signal TEST_GATE_G2 (i.e., DFT_D) can have a turn-off voltage level, the red lighting voltage DC_R, the blue lighting voltage DC_B, and the green lighting voltage DC_G can have a non-lighting voltage level, the crack test signal MCD_GATE can have a turn-on voltage level, and the first pre-lighting test signal DFT_A and the third pre-lighting test signal DFT_C can have a turn-off voltage level. Accordingly, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the ninth transistor T9, and the tenth transistor T10 can be turned off, and the seventh transistor T7 and the eighth transistor T8 can be turned on. As described above, the crack detection line VGH can pass through the non-display area 120 of the display panel 100, one end of the crack detection line VGH can be connected with the red lighting voltage line, the blue lighting voltage line, or the green lighting voltage line, and the other end of the crack detection line VGH can be connected with the seventh transistor T7 and the eighth transistor T8. Accordingly, when the voltage having the non-lighting voltage level is applied to the crack detection line VGH while the seventh transistor T7 and the eighth transistor T8 are turned on, the first green sub-pixel G connected with the second data line DL2 and the second green sub-pixel G connected with the fourth data line DL4 should not emit light. Accordingly, if the first green sub-pixel G connected with the second data line DL2 and / or the second green sub-pixel G connected with the fourth data line DL4 emit light when the voltage having the non-lighting voltage level is applied to the crack detection line VGH while the seventh transistor T7 and the eighth transistor T8 are turned on, it can be determined that a crack occurs in the non-display area 120 of the display panel 100. In this way, the display panel test circuit 200-4 can perform a crack test on the display panel 100.

[0066] In an embodiment, when the display panel test circuit 200-4 performs the pre-lighting test on the display panel 100, the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have the off voltage level, the crack test signal MCD_GATE can have the off voltage level, the first pre-lighting test signal DFT_A, the third pre-lighting test signal DFT_C, the first green lighting test signal TEST_GATE_G1 (i.e., DFT_B), and the second green pre-lighting test signal TEST_GATE_G2 (i.e., DFT_D) can have the on voltage level, and the pre-lighting voltage having the lighting voltage level can be applied via the pre-lighting test pad PAD. Accordingly, the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, and the eighth transistor T8 can be turned off, and the third transistor T3, the sixth transistor T6, the ninth transistor T9, and the tenth transistor T10 can be turned on. Here, because the pre-lighting voltage having the lighting voltage level is applied via the pre-lighting test pad PAD and the third transistor T3, the sixth transistor T6, the ninth transistor T9, and the tenth transistor T10 are turned on, the pre-lighting voltage having the lighting voltage level can be applied to the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B via the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4. Accordingly, the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B should emit light. Accordingly, the display panel test circuit 200-4 can perform the pre-lighting test on the display panel 100 by checking whether the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B emit light.

[0067] In short, the display panel test circuit 200-4 can have a structure in which at least two selected from a pre-lighting test circuit that performs a pre-lighting test on the display panel 100, a lighting test circuit that performs a lighting test on the display panel 100, an open-short test circuit that performs an open-short test on the display panel 100, and a crack test circuit that performs a crack test on the display panel 100 are integrated. Accordingly, when the display panel test circuit 200-4 is provided (or mounted) in the non-display area 120 of the display panel 100, the display panel test circuit 200-4 can reduce a dead zone of the display panel 100, as compared with a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured. In other words, the display panel test circuit 200-4 can perform the pre-lighting test, the lighting test, the open-short test, and the crack test on the display panel 100 based on the structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are integrated. Accordingly, the display panel test circuit 200-4 can reduce the number of transistors, and thus can reduce the dead zone of the display panel 100, as compared with the conventional display panel test circuit having the structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured. Although Figure 6 Although the first to tenth transistors T1 to T10 are illustrated as being implemented by PMOS transistors in FIG. 1, embodiments of the first to tenth transistors T1 to T10 are not limited thereto. For example, the first to tenth transistors T1 to T10 can be implemented by NMOS transistors. For example, a part of the first to tenth transistors T1 to T10 can be implemented by PMOS transistors, and the remaining part of the first to tenth transistors T1 to T10 can be implemented by NMOS transistors.

[0068] Figure 7 is a circuit diagram illustrating another example of a display panel test circuit included in a display panel of Figure 1 , and Figure 8 is a diagram for describing an operation of the display panel test circuit of Figure 7 .

[0069] Referring to Figure 7 and Figure 8 , the display panel test circuit 200-5 can include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, and a twelfth transistor T12. Because Figure 7The display panel test circuit 200-5 is illustrated in relation to two adjacent pixels, i.e., four adjacent data lines DL1, DL2, DL3, and DL4, but it should be understood that the display panel test circuit 200-5 has Figure 7 The configuration shown in FIG. 2-5 is repeatedly arranged.

[0070] The first transistor T1 can include a first terminal connected to the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving a red lighting test signal TEST_GATE_R, and a second terminal connected to a red lighting voltage line supplying a red lighting voltage DC_R. Thus, when the red lighting test signal TEST_GATE_R has an on-voltage level, the first transistor T1 can transmit the red lighting voltage DC_R to the first data line DL1. The second transistor T2 can include a first terminal connected to the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving a blue lighting test signal TEST_GATE_B, and a second terminal connected to a blue lighting voltage line supplying a blue lighting voltage DC_B. Thus, when the blue lighting test signal TEST_GATE_B has an on-voltage level, the second transistor T2 can transmit the blue lighting voltage DC_B to the first data line DL1. The third transistor T3 can include a first terminal connected to the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving a green lighting test signal TEST_GATE_G, and a second terminal connected to a first test voltage line supplying a first test voltage TEST_DATA1. Thus, when the green lighting test signal TEST_GATE_G has an on-voltage level, the third transistor T3 can transmit the first test voltage TEST_DATA1 to the second data line DL2.

[0071] The fourth transistor T4 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the red light-up test signal TEST_GATE_R, and a second terminal connected with a blue light-up voltage line supplying a blue light-up voltage DC_B. Accordingly, when the red light-up test signal TEST_GATE_R has an on-voltage level, the fourth transistor T4 can transmit the blue light-up voltage DC_B to the third data line DL3. The fifth transistor T5 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the blue light-up test signal TEST_GATE_B, and a second terminal connected with a red light-up voltage line supplying a red light-up voltage DC_R. Accordingly, when the blue light-up test signal TEST_GATE_B has an on-voltage level, the fifth transistor T5 can transmit the red light-up voltage DC_R to the third data line DL3. The sixth transistor T6 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the green light-up test signal TEST_GATE_G, and a second terminal connected with a second test voltage line supplying a second test voltage TEST_DATA2. Accordingly, when the green light-up test signal TEST_GATE_G has an on-voltage level, the sixth transistor T6 can transmit the second test voltage TEST_DATA2 to the fourth data line DL4.

[0072] The seventh transistor T7 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving the crack test signal MCD_GATE, and a second terminal connected with a crack detection line VGH passing through the non-display area 120 of the display panel 100. Accordingly, when the crack test signal MCD_GATE has an on-voltage level, the seventh transistor T7 can transmit a voltage of the crack detection line VGH to the second data line DL2. The eighth transistor T8 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the crack test signal MCD_GATE, and a second terminal connected with the crack detection line VGH passing through the non-display area 120 of the display panel 100. Accordingly, when the crack test signal MCD_GATE has an on-voltage level, the eighth transistor T8 can transmit a voltage of the crack detection line VGH to the fourth data line DL4. The crack detection line VGH can pass through the non-display area 120 of the display panel 100, one end of the crack detection line VGH can be connected with the red light-up voltage line, the blue light-up voltage line, or the green light-up voltage line, and the other end of the crack detection line VGH can be connected with the seventh transistor T7 and the eighth transistor T8.

[0073] The ninth transistor T9 can include a first terminal connected with the second data line DL2 to which the first green sub-pixel G is connected, a gate terminal receiving the pre-lighting test signal DFT_GATE, and a second terminal connected with the first pre-lighting test pad PAD connected to the first data line DL1. Accordingly, when the pre-lighting test signal DFT_GATE has an on-voltage level, the ninth transistor T9 can transmit a pre-lighting voltage having a lighting voltage level, which is applied via the first pre-lighting test pad PAD, to the second data line DL2. The tenth transistor T10 can include a first terminal connected with the fourth data line DL4 to which the second green sub-pixel G is connected, a gate terminal receiving the pre-lighting test signal DFT_GATE, and a second terminal connected with the second pre-lighting test pad PAD connected to the third data line DL3. Accordingly, when the pre-lighting test signal DFT_GATE has an on-voltage level, the tenth transistor T10 can transmit a pre-lighting voltage having a lighting voltage level, which is applied via the second pre-lighting test pad PAD, to the fourth data line DL4. The eleventh transistor T11 can include a first terminal connected with the first data line DL1 to which the first red sub-pixel R and the first blue sub-pixel B are connected, a gate terminal receiving the open-short test signal TEST_GATE_OS, and a second terminal connected with the first test voltage line supplying the first test voltage TEST_DATA1. Accordingly, when the open-short test signal TEST_GATE_OS has an on-voltage level, the eleventh transistor T11 can transmit the first test voltage TEST_DATA1 to the first data line DL1. The twelfth transistor T12 can include a first terminal connected with the third data line DL3 to which the second red sub-pixel R and the second blue sub-pixel B are connected, a gate terminal receiving the open-short test signal TEST_GATE_OS, and a second terminal connected with the second test voltage line supplying the second test voltage TEST_DATA2. Accordingly, when the open-short test signal TEST_GATE_OS has an on-voltage level, the twelfth transistor T12 can transmit the second test voltage TEST_DATA2 to the third data line DL3. In an embodiment, as shown in FIG. 2B, the display panel test circuit 200-5 can perform the pre-lighting test (i.e., indicated by DFT TEST), the lighting test (i.e., indicated by DC LIGHTING TEST), the open-short test (i.e., indicated by OS TEST1 and OS TEST2), and the crack test (i.e., indicated by MCD TEST) on the display panel 100 using the first transistor T1 to the twelfth transistor T12. Figure 8 The display panel test circuit 200-5 can perform the pre-lighting test (i.e., indicated by DFT TEST), the lighting test (i.e., indicated by DC LIGHTING TEST), the open-short test (i.e., indicated by OS TEST1 and OS TEST2), and the crack test (i.e., indicated by MCD TEST) on the display panel 100 using the first transistor T1 to the twelfth transistor T12.

[0074] In an embodiment, when the display panel test circuit 200-5 performs the lighting test on the display panel 100 (i.e., indicated by DC LIGHTING TEST), the red lighting test signal TEST_GATE_R, the blue lighting test signal TEST_GATE_B, the green lighting test signal TEST_GATE_G can have the on voltage level (e.g., indicated by L), the red lighting voltage DC_R and the blue lighting voltage DC_B can have the lighting voltage level (e.g., indicated by L), the crack test signal MCD_GATE can have the off voltage level (e.g., indicated by H), the open-short test signal TEST_GATE_OS can have the off voltage level (e.g., indicated by H), the first test voltage TEST_DATA1 and the second test voltage TEST_DATA2 can have the lighting voltage level (e.g., indicated by L), and the pre-lighting test signal DFT_GATE can have the off voltage level (e.g., indicated by H). Thus, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned on (here, the first transistor T1 and the second transistor T2 can be turned on alternately, and the fourth transistor T4 and the fifth transistor T5 can be turned on alternately), and the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, and the twelfth transistor T12 can be turned off. Here, the first red sub-pixel R and the second red sub-pixel R should emit light because the red lighting voltage DC_R has the lighting voltage level and the red lighting voltage DC_R is applied to the first red sub-pixel R and the second red sub-pixel R via the first data line DL1 and the third data line DL3. In addition, the first blue sub-pixel B and the second blue sub-pixel B should emit light because the blue lighting voltage DC_B has the lighting voltage level and the blue lighting voltage DC_B is applied to the first blue sub-pixel B and the second blue sub-pixel B via the first data line DL1 and the third data line DL3. Further, the first green sub-pixel G and the second green sub-pixel G should emit light because the first test voltage TEST_DATA1 and the second test voltage TEST_DATA2 have the lighting voltage level and the first test voltage TEST_DATA1 and the second test voltage TEST_DATA2 are applied to the first green sub-pixel G and the second green sub-pixel G via the second data line DL2 and the fourth data line DL4. Thus, the display panel test circuit 200-5 can perform the lighting test (i.e., indicated by DC LIGHTING TEST) on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0075] In an embodiment, when the display panel test circuit 200-5 performs the first open-short test (i.e., indicated by OS TEST1) on the display panel 100, the green lighting test signal TEST_GATE_G can have an on voltage level (e.g., indicated by L), the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have an off voltage level (e.g., indicated by H), the red lighting voltage DC_R and the blue lighting voltage DC_B can have a non-lighting voltage level (e.g., indicated by H), the crack test signal MCD_GATE can have an off voltage level (e.g., indicated by H), the open-short test signal TEST_GATE_OS can have an on voltage level (e.g., indicated by L), the first test voltage TEST_DATA1 can have a non-lighting voltage level (e.g., indicated by H), the second test voltage TEST_DATA2 can have a lighting voltage level (e.g., indicated by L), and the pre-lighting test signal DFT_GATE can have an off voltage level (e.g., indicated by H). Thus, the third transistor T3, the sixth transistor T6, the eleventh transistor T11, and the twelfth transistor T12 can be turned on, and the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, and the tenth transistor T10 can be turned off. Here, the first green sub-pixel G connected with the second data line DL2 to which the first test voltage TEST_DATA1 is applied via the third transistor T3 should not emit light because the first test voltage TEST_DATA1 has a non-lighting voltage level. Also, the first red sub-pixel R and the first blue sub-pixel B connected with the first data line DL1 to which the first test voltage TEST_DATA1 is applied via the eleventh transistor T11 should not emit light because the first test voltage TEST_DATA1 has a non-lighting voltage level. On the other hand, the second green sub-pixel G connected with the fourth data line DL4 to which the second test voltage TEST_DATA2 is applied via the sixth transistor T6 should emit light because the second test voltage TEST_DATA2 has a lighting voltage level. Also, the second red sub-pixel R and the second blue sub-pixel B connected with the third data line DL3 to which the second test voltage TEST_DATA2 is applied via the twelfth transistor T12 should emit light because the second test voltage TEST_DATA2 has a lighting voltage level. Thus, the display panel test circuit 200-5 can perform the first open-short test (i.e., indicated by OS TEST1) on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0076] Further, when the display panel test circuit 200-5 performs the second open-short test (i.e., indicated by OS TEST2) on the display panel 100, the green lighting test signal TEST_GATE_G can have an on voltage level (e.g., indicated by L), the red lighting test signal TEST_GATE_R and the blue lighting test signal TEST_GATE_B can have an off voltage level (e.g., indicated by H), the red lighting voltage DC_R and the blue lighting voltage DC_B can have a non-lighting voltage level (e.g., indicated by H), the crack test signal MCD_GATE can have an off voltage level (e.g., indicated by H), the open-short test signal TEST_GATE_OS can have an on voltage level (e.g., indicated by L), the first test voltage TEST_DATA1 can have a lighting voltage level (e.g., indicated by L), the second test voltage TEST_DATA2 can have a non-lighting voltage level (e.g., indicated by H), and the pre-lighting test signal DFT_GATE can have an off voltage level (e.g., indicated by H). Thus, the third transistor T3, the sixth transistor T6, the eleventh transistor T11, and the twelfth transistor T12 can be on, and the first transistor T1, the second transistor T2, the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, and the tenth transistor T10 can be off. Here, the first green sub-pixel G connected with the second data line DL2 to which the first test voltage TEST_DATA1 is applied via the third transistor T3 should emit light because the first test voltage TEST_DATA1 has a lighting voltage level. Further, the first red sub-pixel R and the first blue sub-pixel B connected with the first data line DL1 to which the first test voltage TEST_DATA1 is applied via the eleventh transistor T11 should emit light because the first test voltage TEST_DATA1 has a lighting voltage level. On the other hand, the second green sub-pixel G connected with the fourth data line DL4 to which the second test voltage TEST_DATA2 is applied via the sixth transistor T6 should not emit light because the second test voltage TEST_DATA2 has a non-lighting voltage level. Further, the second red sub-pixel R and the second blue sub-pixel B connected with the third data line DL3 to which the second test voltage TEST_DATA2 is applied via the twelfth transistor T12 should not emit light because the second test voltage TEST_DATA2 has a non-lighting voltage level. Thus, the display panel test circuit 200-5 can perform the second open-short test (i.e., indicated by OS TEST2) on the display panel 100 by checking whether the first red sub-pixel R, the first blue sub-pixel B, the first green sub-pixel G, the second red sub-pixel R, the second blue sub-pixel B, and the second green sub-pixel G emit light.

[0077] In an embodiment, when the display panel test circuit 200-5 performs the crack test on the display panel 100 (i.e., indicated by MCD TEST), the red lighting test signal TEST_GATE_R, the green lighting test signal TEST_GATE_G, and the blue lighting test signal TEST_GATE_B can have a cutoff voltage level (e.g., indicated by H), the red lighting voltage DC_R and the blue lighting voltage DC_B can have a non-lighting voltage level (e.g., indicated by H), the crack test signal MCD_GATE can have a turn-on voltage level (e.g., indicated by L), the open-short test signal TEST_GATE_OS can have a turn-on voltage level (e.g., indicated by L), the first test voltage TEST_DATA1 and the second test voltage TEST_DATA2 can have a non-lighting voltage level (e.g., indicated by H), and the pre-lighting test signal DFT_GATE can have a cutoff voltage level (e.g., indicated by H). Thus, the seventh transistor T7, the eighth transistor T8, the eleventh transistor T11, and the twelfth transistor T12 can be turned on, and the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the ninth transistor T9, and the tenth transistor T10 can be turned off. As described above, the crack detection line VGH can pass through the non-display area 120 of the display panel 100, one end of the crack detection line VGH can be connected with the red lighting voltage line, the blue lighting voltage line, or the green lighting voltage line, and the other end of the crack detection line VGH can be connected with the seventh transistor T7 and the eighth transistor T8. Thus, when the voltage having the non-lighting voltage level is applied to the crack detection line VGH while the seventh transistor T7 and the eighth transistor T8 are turned on, the first green sub-pixel G connected with the second data line DL2 and the second green sub-pixel G connected with the fourth data line DL4 should not emit light. Thus, if the first green sub-pixel G connected with the second data line DL2 and / or the second green sub-pixel G connected with the fourth data line DL4 emit light when the voltage having the non-lighting voltage level is applied to the crack detection line VGH while the seventh transistor T7 and the eighth transistor T8 are turned on, it can be determined that a crack occurs in the non-display area 120 of the display panel 100. In this way, the display panel test circuit 200-5 can perform the crack test (i.e., indicated by MCD TEST) on the display panel 100.

[0078] In an embodiment, when the display panel test circuit 200-5 performs the pre-lighting test on the display panel 100 (i.e., indicated by DFT TEST), the red lighting test signal TEST_GATE_R, the blue lighting test signal TEST_GATE_B, and the green lighting test signal TEST_GATE_G can have a cutoff voltage level (e.g., indicated by H), the red lighting voltage DC_R and the blue lighting voltage DC_B can have a non-lighting voltage level (e.g., indicated by H), the crack test signal MCD_GATE can have a cutoff voltage level (e.g., indicated by H), the open-short test signal TEST_GATE_OS can have a cutoff voltage level (e.g., indicated by H), the first test voltage TEST_DATA1 and the second test voltage TEST_DATA2 can have a non-lighting voltage level (e.g., indicated by H), the pre-lighting test signal DFT_GATE can have a conductive voltage level (e.g., indicated by L), and the pre-lighting voltage having a lighting voltage level can be applied via the pre-lighting test pad PAD. Accordingly, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the eleventh transistor T11, and the twelfth transistor T12 can be cut off, and the ninth transistor T9 and the tenth transistor T10 can be turned on. Here, because the pre-lighting voltage having a lighting voltage level is applied via the pre-lighting test pad PAD and the ninth transistor T9 and the tenth transistor T10 are turned on, the pre-lighting voltage having a lighting voltage level can be applied to the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B via the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4. Accordingly, the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B should emit light. Accordingly, the display panel test circuit 200-5 can perform the pre-lighting test (i.e., indicated by DFT TEST) on the display panel 100 by checking whether the first red sub-pixel R, the first green sub-pixel G, the first blue sub-pixel B, the second red sub-pixel R, the second green sub-pixel G, and the second blue sub-pixel B emit light.

[0079] In short, the display panel test circuit 200-5 can have a structure in which at least two are integrated from among a pre-lighting test circuit that performs a pre-lighting test on the display panel 100 (i.e., indicated by DFT TEST), a lighting test circuit that performs a lighting test on the display panel 100 (i.e., indicated by DC LIGHTING TEST), an open-short test circuit that performs an open-short test on the display panel 100 (i.e., indicated by OS TEST1 and OS TEST2), and a crack test circuit that performs a crack test on the display panel 100 (i.e., indicated by MCD TEST). Accordingly, compared to a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit 200-5 can reduce a dead zone of the display panel 100 when the display panel test circuit 200-5 is provided (or mounted) in the non-display area 120 of the display panel 100. In other words, the display panel test circuit 200-5 can perform the pre-lighting test (i.e., indicated by DFT TEST), the lighting test (i.e., indicated by DC LIGHTING TEST), the open-short test (i.e., indicated by OS TEST1 and OS TEST2), and the crack test (i.e., indicated by MCD TEST) on the display panel 100 based on the structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit 200-5 can reduce the number of transistors, and thus can reduce the dead zone of the display panel 100. Although Figure 7 Although FIG. 1 illustrates that the first through twelfth transistors T1 through T12 are implemented by PMOS transistors, embodiments of the first through twelfth transistors T1 through T12 are not limited thereto. For example, the first through twelfth transistors T1 through T12 can be implemented by NMOS transistors. For example, a part of the first through twelfth transistors T1 through T12 can be implemented by PMOS transistors, and the remaining part of the first through twelfth transistors T1 through T12 can be implemented by NMOS transistors.

[0080] Figure 9 FIG. 1 is a block diagram illustrating a display apparatus according to an embodiment.

[0081] Referring to Figure 9The display device 500 can include the display panel 100 and the display panel driving circuit 300. In an embodiment, the display device 500 can be an organic light emitting display device. In another embodiment, the display device 500 can be a liquid crystal display device. However, the display device 500 is not limited thereto. The display panel 100 can include a plurality of pixels 111. Here, each of the pixels 111 can have a honeycomb structure provided with one red sub-pixel, one blue sub-pixel, and two green sub-pixels. The display panel driving circuit 300 can drive the display panel 100. In an embodiment, the display panel driving circuit 300 can include a scan driver, a data driver, and a timing controller. The scan driver can be electrically connected with the display panel 100 via a scan line. Accordingly, the scan driver can provide a scan signal SS to the red sub-pixel, the blue sub-pixel, and the green sub-pixel included in the display panel 100. The data driver can be electrically connected with the display panel 100 via a data line. Accordingly, the data driver can provide a data signal DS to the red sub-pixel, the blue sub-pixel, and the green sub-pixel included in the display panel 100. The timing controller can control the scan driver and the data driver. In some embodiments, the timing controller can compensate for image data input from an external component (e.g., degradation compensation, etc.) to generate the data signal DS.

[0082] The display panel 100 can include a display panel test circuit provided (or mounted) in a non-display area of the display panel 100. The display panel test circuit can have a structure in which a pre-lighting test circuit performing a pre-lighting test on the display panel 100, a lighting test circuit performing a lighting test on the display panel 100, an open-short test circuit performing an open-short test on the display panel 100, and a crack test circuit performing a crack test on the display panel 100 are integrated, or a structure in which a pre-lighting test circuit performing a pre-lighting test on the display panel 100, a lighting test circuit performing a lighting test on the display panel 100, an open-short test circuit performing an open-short test on the display panel 100, and a crack test circuit performing a crack test on the display panel 100 are integrated. Accordingly, compared to a conventional display panel test circuit having a structure in which the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, or a structure in which the pre-lighting test circuit, the lighting test circuit, the open-short test circuit, and the crack test circuit are separately and independently configured, the display panel test circuit can reduce a dead area of the display panel 100 when the display panel test circuit is provided in the non-display area of the display panel 100. In an embodiment, the display panel test circuit can have the structure shown in FIG. 1A. In another embodiment, the display panel test circuit can have the structure shown in FIG. 1B. In yet another embodiment, the display panel test circuit can have the structure shown in FIG. 1C. In yet another embodiment, the display panel test circuit can have the structure shown in FIG. 1D. Figure 2 Figure 4 Figure 5 Figure 5 ​​Figure 6 In yet another embodiment, the display panel test circuit can have a structure as shown in Figure 7 In yet another embodiment, the display panel test circuit can have a structure as shown in

[0083] Figure 10 is a block diagram illustrating an electronic device according to an embodiment, and Figure 11 is a diagram illustrating Figure 10 an electronic device of

[0084] Referring to Figure 10 and Figure 11 , the electronic device 1000 can include a processor 1010, a memory device 1020, a storage device 1030, an input / output (I / O) device 1040, a power supply 1050, and a display device 1060. Here, the display device 1060 can be the display device 500 of Figure 9 . Further, the electronic device 1000 can further include a plurality of ports for communication with a video card, a sound card, a memory card, a universal serial bus (USB) device, other electronic devices, etc. In an embodiment, as shown in Figure 11 , the electronic device 1000 can be implemented as a smart phone. However, the electronic device 1000 is not limited thereto. For example, the electronic device 1000 can be implemented as a cellular phone, a video phone, a smart pad, a smart watch, a tablet PC, a car navigation system, a computer monitor, a laptop, a head-mounted display (HMD) device, etc.

[0085] The processor 1010 can perform various computing functions. The processor 1010 can be a microprocessor, a central processing unit (CPU), an application processor (AP), and the like. The processor 1010 can be coupled with other components via an address bus, a control bus, a data bus, and the like. Further, the processor 1010 can be coupled with an expansion bus such as a peripheral component interconnect (PCI) bus. The memory device 1020 can store data for the operation of the electronic device 1000. For example, the memory device 1020 can include at least one nonvolatile memory device such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase-change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, and a ferroelectric random access memory (FRAM) device, and / or at least one volatile memory device such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, and a mobile DRAM device. The storage device 1030 can include a solid state drive (SSD) device, a hard disk drive (HDD) device, and a CD-ROM device, and the like. The I / O device 1040 can include an input device such as a keypad, a key pad, a mouse device, a touch pad, and a touch screen, and an output device such as a printer and a speaker. In some embodiments, the display device 1060 can be included in the I / O device 1040. The power supply 1050 can provide power for the operation of the electronic device 1000.

[0086] The display device 1060 can display an image corresponding to visual information of the electronic device 1000. The display device 1060 can be coupled with other components via a bus or other communication link. The display device 1000 can include a display panel including a plurality of pixels (here, each of the pixels has a honeycomb structure in which one red sub-pixel, one blue sub-pixel, and two green sub-pixels are disposed) and a display panel driving circuit that drives the display panel. The display panel can include a display panel test circuit provided in a non-display area of the display panel. Here, the display panel test circuit can have a structure in which a pre-lighting test circuit that performs a pre-lighting test on the display panel, a lighting test circuit that performs a lighting test on the display panel, an open-short test circuit that performs an open-short test on the display panel, and a crack test circuit that performs a crack test on the display panel are integrated or a structure in which a pre-lighting test circuit that performs a pre-lighting test on the display panel, a lighting test circuit that performs a lighting test on the display panel, an open-short test circuit that performs an open-short test on the display panel, and a crack test circuit that performs a crack test on the display panel are integrated. Accordingly, compared with a conventional display panel test circuit having a structure in which a lighting test circuit, an open-short test circuit, and a crack test circuit are separately and independently configured or a structure in which a pre-lighting test circuit, a lighting test circuit, an open-short test circuit, and a crack test circuit are separately and independently configured, when the display panel test circuit is provided in the non-display area of the display panel, the display panel test circuit can reduce a dead zone of the display panel, which causes a wide bezel of the display device 1060. As described above with reference to FIGS. 1 to 5, the display device 1060 including the display panel having a reduced (or minimized) dead zone can have a reduced (or minimized) bezel and thus can have an elegant design. Figures 2 to 8 Having described these, the repeated description related thereto will not be repeated. Accordingly, the display device 1060 including the display panel having a reduced (or minimized) dead zone can have a reduced (or minimized) bezel and thus can have an elegant design.

[0087] The inventive concept can be applicable to a display device and an electronic device including the display device. For example, the inventive concept can be applicable to a smart phone, a cellular phone, a video phone, a smart pad, a smart watch, a tablet PC, a car navigation system, a TV, a computer monitor, a laptop computer, a head-mounted display (HMD) device, and an MP3 player, etc.

[0088] The foregoing is illustrative of specific embodiments and is not meant to be limiting upon the scope of the inventive concept. Although a few embodiments have been described in detail above, other modifications are possible. For example, the logic flows can be modified to include more or fewer operations. Moreover, the operations can be modified to include more or fewer steps. Other embodiments can be implemented using other techniques for performing the same functions described above. Further, each of the embodiments could be implemented individually, or multiple embodiments could be combined in a single implementation. Accordingly, many modifications can be made by one of ordinary skill in the art without departing from the spirit and scope of the inventive concept. Therefore, the above description should not be construed as limiting, but merely as illustrative of the present inventive concept.

Claims

1. A display panel test circuit, comprising: a first transistor including a first terminal connected with a first data line connected with a first red sub-pixel and a first blue sub-pixel, a gate terminal receiving a red lighting test signal, and a second terminal connected with a red lighting voltage line supplying a red lighting voltage; a second transistor including a first terminal connected with the first data line, a gate terminal receiving a blue lighting test signal, and a second terminal connected with a blue lighting voltage line supplying a blue lighting voltage; a third transistor including a first terminal connected with a second data line connected with a first green sub-pixel, a gate terminal receiving a first green lighting test signal, and a second terminal connected with a green lighting voltage line supplying a green lighting voltage; a fourth transistor including a first terminal connected with a third data line connected with a second red sub-pixel and a second blue sub-pixel, a gate terminal receiving the red lighting test signal, and a second terminal connected with the blue lighting voltage line; a fifth transistor including a first terminal connected with the third data line, a gate terminal receiving the blue lighting test signal, and a second terminal connected with the red lighting voltage line; a sixth transistor including a first terminal connected with a fourth data line connected with a second green sub-pixel, a gate terminal receiving a second green lighting test signal, and a second terminal connected with the green lighting voltage line; a seventh transistor including a first terminal connected with the second data line, a gate terminal receiving a crack test signal, and a second terminal connected with a crack detection line passing through a non-display area of a display panel; and an eighth transistor including a first terminal connected with the fourth data line, a gate terminal receiving the crack test signal, and a second terminal connected with the crack detection line, wherein, when performing a crack test on the display panel, one of the red lighting test signal and the blue lighting test signal has a turn-on voltage level, the other of the red lighting test signal and the blue lighting test signal has a turn-off voltage level, the first green lighting test signal and the second green lighting test signal have turn-off voltage levels, the red lighting voltage, the blue lighting voltage, and the green lighting voltage have non-lighting voltage levels, and the crack test signal has a turn-on voltage level. When performing a lighting test on the display panel, the red lighting test signal, the blue lighting test signal, the first green lighting test signal, and the second green lighting test signal have turn-on voltage levels, the red lighting voltage, the blue lighting voltage, and the green lighting voltage have lighting voltage levels, and the crack test signal has a turn-off voltage level.

2. The display panel test circuit of claim 1, wherein, ​ 3. The display panel test circuit of claim 1, wherein, When a first open-short test is performed on the display panel, the red light-up test signal and the second green light-up test signal have a turn-on voltage level, the first green light-up test signal and the blue light-up test signal have a turn-off voltage level, the red light-up voltage has a non-light-up voltage level, the blue light-up voltage and the green light-up voltage have a light-up voltage level, and the crack test signal has a turn-on voltage level.

4. The display panel test circuit of claim 1, wherein, When a second open-short test is performed on the display panel, the red light-up test signal and the first green light-up test signal have a turn-on voltage level, the second green light-up test signal and the blue light-up test signal have a turn-off voltage level, the blue light-up voltage has a non-light-up voltage level, the red light-up voltage and the green light-up voltage have a light-up voltage level, and the crack test signal has a turn-on voltage level. 5.The display panel test circuit of claim 1, further comprising: a ninth transistor including a first terminal connected to the first data line, a gate terminal receiving a first pre-light-up test signal, and a second terminal connected to a pre-light-up test pad; a tenth transistor including a first terminal connected to the second data line, a gate terminal receiving a second pre-light-up test signal, and a second terminal connected to the pre-light-up test pad; an eleventh transistor including a first terminal connected to the third data line, a gate terminal receiving a third pre-light-up test signal, and a second terminal connected to the pre-light-up test pad; and a twelfth transistor including a first terminal connected to the fourth data line, a gate terminal receiving a fourth pre-light-up test signal, and a second terminal connected to the pre-light-up test pad. When a pre-light-up test is performed on the display panel, the red light-up test signal, the blue light-up test signal, the first green light-up test signal, and the second green light-up test signal have a turn-off voltage level, the crack test signal has a turn-off voltage level, the first pre-light-up test signal, the second pre-light-up test signal, the third pre-light-up test signal, and the fourth pre-light-up test signal have a turn-on voltage level, and a pre-light-up voltage having a light-up voltage level is applied via the pre-light-up test pad.

6. The display panel test circuit of claim 5, wherein, The ninth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor are disposed between the green light-up voltage line and the blue light-up voltage line or the red light-up voltage line.

7. The display panel test circuit of claim 5, wherein, 8.A display panel test circuit comprising: a first transistor including a first terminal connected to a first data line to which a first red sub-pixel and a first blue sub-pixel are connected, a gate terminal receiving a red light-up test signal, and a second terminal connected to a red light-up voltage line supplying a red light-up voltage; a second transistor including a first terminal connected to the first data line, a gate terminal receiving a blue light-up test signal, and a second terminal connected to a blue light-up voltage line supplying a blue light-up voltage; and a third transistor including a first terminal connected to a second data line, a gate terminal receiving a first green light-up test signal, and a second terminal connected to a green light-up voltage line supplying a green light-up voltage. a third transistor including a first terminal connected to a second data line connected with the first green sub-pixel, a gate terminal receiving a first green lighting test signal, and a second terminal connected to a pre-lighting test pad and a green lighting voltage line supplying a green lighting voltage; a fourth transistor including a first terminal connected to a third data line connected with the second red sub-pixel and the second blue sub-pixel, a gate terminal receiving the red lighting test signal, and a second terminal connected to the blue lighting voltage line; a fifth transistor including a first terminal connected to the third data line, a gate terminal receiving the blue lighting test signal, and a second terminal connected to the red lighting voltage line; a sixth transistor including a first terminal connected to a fourth data line connected with the second green sub-pixel, a gate terminal receiving a second green lighting test signal, and a second terminal connected to the pre-lighting test pad and the green lighting voltage line; a seventh transistor including a first terminal connected to the second data line, a gate terminal receiving a crack test signal, and a second terminal connected to a crack detection line passing through a non-display area of the display panel; an eighth transistor including a first terminal connected to the fourth data line, a gate terminal receiving the crack test signal, and a second terminal connected to the crack detection line; a ninth transistor including a first terminal connected to the first data line, a gate terminal receiving a first pre-lighting test signal, and a second terminal connected to the pre-lighting test pad and the green lighting voltage line; and a tenth transistor including a first terminal connected to the third data line, a gate terminal receiving a second pre-lighting test signal, and a second terminal connected to the pre-lighting test pad and the green lighting voltage line. When performing a lighting test on the display panel, the red lighting test signal, the blue lighting test signal, the first green lighting test signal, and the second green lighting test signal have a turn-on voltage level, the red lighting voltage, the blue lighting voltage, and the green lighting voltage have a lighting voltage level, the crack test signal has a turn-off voltage level, and the first pre-lighting test signal and the second pre-lighting test signal have a turn-off voltage level.

9. The display panel test circuit of claim 8, wherein, When performing a first open-circuit / short-circuit test on the display panel, the red lighting test signal and the second green lighting test signal have a turn-on voltage level, the first green lighting test signal and the blue lighting test signal have a turn-off voltage level, the red lighting voltage has a non-lighting voltage level, the blue lighting voltage and the green lighting voltage have a lighting voltage level, the crack test signal has a turn-on voltage level, and the first pre-lighting test signal and the second pre-lighting test signal have a turn-off voltage level.

10. The display panel test circuit of claim 8, wherein, ​ 11. The display panel test circuit of claim 8, wherein, When performing a second open-short test on the display panel, the red lighting test signal and the first green lighting test signal have a turn-on voltage level, the second green lighting test signal and the blue lighting test signal have a turn-off voltage level, the blue lighting voltage has a non-lighting voltage level, the red lighting voltage and the green lighting voltage have a lighting voltage level, the crack test signal has a turn-on voltage level, and the first pre-lighting test signal and the second pre-lighting test signal have a turn-off voltage level.

12. The display panel test circuit of claim 8, wherein, When performing a crack test on the display panel, one of the red lighting test signal and the blue lighting test signal has a turn-on voltage level, the other of the red lighting test signal and the blue lighting test signal has a turn-off voltage level, the first green lighting test signal and the second green lighting test signal have a turn-off voltage level, the red lighting voltage, the blue lighting voltage, and the green lighting voltage have a non-lighting voltage level, the crack test signal has a turn-on voltage level, and the first pre-lighting test signal and the second pre-lighting test signal have a turn-off voltage level.

13. The display panel test circuit of claim 8, wherein, When performing a pre-lighting test on the display panel, the red lighting test signal and the blue lighting test signal have a turn-off voltage level, the crack test signal has a turn-off voltage level, the first pre-lighting test signal, the second pre-lighting test signal, the first green lighting test signal, and the second green lighting test signal have a turn-on voltage level, and a pre-lighting voltage having a lighting voltage level is applied via the pre-lighting test pad.

14. A display panel test circuit, comprising: a first transistor including a first terminal connected to a first data line to which a first red sub-pixel and a first blue sub-pixel are connected, a gate terminal receiving a red lighting test signal, and a second terminal connected to a red lighting voltage line supplying a red lighting voltage; a second transistor including a first terminal connected to the first data line, a gate terminal receiving a blue lighting test signal, and a second terminal connected to a blue lighting voltage line supplying a blue lighting voltage; a third transistor including a first terminal connected to a second data line to which a first green sub-pixel is connected, a gate terminal receiving a green lighting test signal, and a second terminal connected to a first test voltage line supplying a first test voltage; a fourth transistor including a first terminal connected to a third data line to which a second red sub-pixel and a second blue sub-pixel are connected, a gate terminal receiving the red lighting test signal, and a second terminal connected to the blue lighting voltage line; a fifth transistor including a first terminal connected to the third data line, a gate terminal receiving the blue lighting test signal, and a second terminal connected to the red lighting voltage line; a sixth transistor including a first terminal connected to a fourth data line to which a second green sub-pixel is connected, a gate terminal receiving the green lighting test signal, and a second terminal connected to a second test voltage line supplying a second test voltage; and a seventh transistor including a first terminal connected to the fourth data line, a gate terminal receiving the green lighting test signal, and a second terminal connected to the first test voltage line. a seventh transistor including a first terminal connected to the second data line, a gate terminal receiving a crack test signal, and a second terminal connected to a crack detection line passing through a non-display area of the display panel; an eighth transistor including a first terminal connected to the fourth data line, a gate terminal receiving the crack test signal, and a second terminal connected to the crack detection line; a ninth transistor including a first terminal connected to the second data line, a gate terminal receiving a pre-lighting test signal, and a second terminal connected to a first pre-lighting test pad connected to the first data line; a tenth transistor including a first terminal connected to the fourth data line, a gate terminal receiving the pre-lighting test signal, and a second terminal connected to a second pre-lighting test pad connected to the third data line; an eleventh transistor including a first terminal connected to the first data line, a gate terminal receiving an open-short test signal, and a second terminal connected to the first test voltage line; and a twelfth transistor including a first terminal connected to the third data line, a gate terminal receiving the open-short test signal, and a second terminal connected to the second test voltage line.

15. The display panel test circuit of claim 14, wherein, When performing a lighting test on the display panel, the red lighting test signal, the blue lighting test signal, and the green lighting test signal have a turn-on voltage level, the red lighting voltage and the blue lighting voltage have a lighting voltage level, the crack test signal has a turn-off voltage level, the open-short test signal has a turn-off voltage level, the first test voltage and the second test voltage have a lighting voltage level, and the pre-lighting test signal has a turn-off voltage level.

16. The display panel test circuit of claim 14, wherein, When performing a first open-short test on the display panel, the green lighting test signal has a turn-on voltage level, the red lighting test signal and the blue lighting test signal have a turn-off voltage level, the red lighting voltage and the blue lighting voltage have a non-lighting voltage level, the crack test signal has a turn-off voltage level, the open-short test signal has a turn-on voltage level, the first test voltage has a non-lighting voltage level, the second test voltage has a lighting voltage level, and the pre-lighting test signal has a turn-off voltage level.

17. The display panel test circuit of claim 14, wherein, When performing a second open-short test on the display panel, the green lighting test signal has a turn-on voltage level, the red lighting test signal and the blue lighting test signal have a turn-off voltage level, the red lighting voltage and the blue lighting voltage have a non-lighting voltage level, the crack test signal has a turn-off voltage level, the open-short test signal has a turn-on voltage level, the first test voltage has a lighting voltage level, the second test voltage has a non-lighting voltage level, and the pre-lighting test signal has a turn-off voltage level.

18. The display panel test circuit of claim 14, wherein, When performing a crack test on the display panel, the red, green, and blue light-up test signals have an off voltage level, the red and blue light-up voltages have a non-light-up voltage level, the crack test signal has a turn-on voltage level, the open-short test signal has a turn-on voltage level, the first and second test voltages have a non-light-up voltage level, and the pre-light-up test signal has an off voltage level.

19. The display panel test circuit of claim 14, wherein, When performing a pre-light-up test on the display panel, the red, green, and blue light-up test signals have an off voltage level, the red and blue light-up voltages have a non-light-up voltage level, the crack test signal has an off voltage level, the open-short test signal has an off voltage level, the first and second test voltages have a non-light-up voltage level, the pre-light-up test signal has a turn-on voltage level, and a pre-light-up voltage having a light-up voltage level is applied via the first and second pre-light-up test pads.

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