Method for monitoring failure of semiconductor switch and inverter circuit

Abstract

The invention relates to a method for monitoring a semiconductor switch having a control terminal, a current input terminal and a current output terminal, comprising: detecting a desaturation voltage applied to a capacitor at a first point in time and a second point in time; determining a drain-source voltage applied between the current input terminal and the current output terminal of the semiconductor switch at the first time point from the desaturation voltage detected at the first time point and at the second time point; repeatedly detecting and determining at a plurality of different first time points, and obtaining a set of drain-source-voltages at the plurality of different first time points; and determining a functional capability of the semiconductor switch from a set of drain-source-voltages at a plurality of different first time points. The invention also relates to an inverter circuit for controlling an electric machine.

Description

Technical Field

[0001] The invention relates to a method for monitoring a semiconductor switch and an inverter circuit for carrying out the method. Background Art

[0002] Thermomechanical stress due to load and temperature variations in semiconductor switches (e.g., MOSFETs or IGBTs) is the main cause of failures in switches. Thermomechanical stress may cause various failures, such as heel cracks in the bond wire due to cyclic displacement of the wire, solder fatigue at the die attach (the resistance of the die attach solder layer increases as the solder layer degrades), or debonding of the bond wire (temperature variations cause length changes of the wire, and since both wire ends are mechanically fixed, micro-movements occur, which cause stress at the connection interface of the bond wire and ultimately lead to debonding of the bond wire).

[0003] The drain-source voltage V DSon Or by measuring the on-resistance R DS (or R DSon ) and compare it with previously measured values ​​to identify such faults. Any significant change in the drain-source-voltage or its on-resistance can indicate degradation or premature failure of the bond wire or solder layer. However, the measurement is strongly affected by parasitic elements in the assembly (bond wires, etc.). Also, random sampling calibration is required to compensate for the influence of the interconnects. Therefore, V DSon or R DS The determination is not very precise and moreover requires complex circuitry to measure V DSon , especially in high-voltage, HV switches. In the latter case, a separation or isolation of the high-voltage area from the evaluation electronics is also necessary, which makes the transmission of the measured signals from the power electronics to the evaluation electronics very complicated due to the isolation and interference immunity. DS The measurement in turn strongly depends on the load current.

[0004] Other methods for identifying faults are, for example, measuring the gate peak current or the Miller plateau length when the gate driver is switched off. Summary of the invention

[0005] According to the invention, a method for monitoring a semiconductor switch and an inverter circuit for carrying out the method are proposed having the features of the independent claims. Advantageous embodiments are the subject matter of the dependent claims and the following description.

[0006] The invention makes use of the measure that, in order to monitor a semiconductor switch having a control terminal, a current input terminal and a current output terminal, in particular an electrical connection, it is not necessary to measure them directly, but rather to monitor the voltage dropped between the current input terminal and the current output terminal (drain-source voltage or collector-emitter voltage). In particular, instead, a simple circuit (which is also referred to as a desaturation circuit below) is inserted between the current input terminal and the potential terminal, wherein the current input terminal is connected to the potential terminal via a diode switched in the blocking direction, one terminal point of a capacitor (the other terminal point of which is grounded), a resistor element and a current source. The drain-source voltage can be determined from the voltage applied to the capacitor.

[0007] This is particularly advantageous, since for the described circuit configuration, solutions known per se in semiconductor switches for desaturation protection (English: desaturation (DeSat) protection) with a minimum of additional components can be used, thereby significantly reducing expenditure and costs. Commercially available gate driver ICs (hereinafter simply gate drivers) can have a desaturation terminal to which the drain terminal of the semiconductor switch is connected via a desaturation circuit as described above. The gate driver can thus monitor the semiconductor switch for overcurrent or short circuit and block in the event of a fault. Within the scope of the invention, a degraded or even failed electrical connection of the semiconductor switch is now detected by specifically analyzing the voltage in the desaturation circuit.

[0008] Specifically, a desaturation voltage applied to the capacitor is detected at a first time point and a second time point, and a drain-source voltage applied between a current input terminal and a current output terminal of the semiconductor switch at the first time point is determined based on the desaturation voltages detected at the first time point and the second time point. These steps are repeated at multiple different first time points to obtain a set of drain-source voltages at multiple different first time points. Then, the functional capability of the semiconductor switch is determined from the set of drain-source voltages at multiple different first time points.

[0009] The present invention overcomes the disadvantages of the prior art and, in particular, leads to a series of advantages. DSon There is no need to measure R DS Instead of measuring the voltage of the switch or the on-resistance of the switch in the on-state, the voltage of the switch or the on-resistance of the switch in the on-state can be easily derived from the desaturation voltage.

[0010] In order to transmit the measurement signal to the evaluation electronics (control device), the data interface can be advantageously used in the correspondingly equipped gate driver, so that no additional signal transmission is then required. The isolation of the measured signal is then also produced by the isolation of the gate driver.

[0011] The proposed scheme can be used for online monitoring of the status of semiconductor switches and online fault identification.

[0012] There is no additional space requirement, since it is not necessary to add an accurate current sensor with a high bandwidth to each switch. This is particularly advantageous in TO housings that are connected to busbars or printed circuit boards, since there is usually only a small amount of installation space available. Furthermore, the invention can be advantageously used in power modules that contain a plurality of chips in parallel.

[0013] The proposed method is almost independent of the load current and temperature of the desaturation circuit.

[0014] Existing temperature sensors for the switches as well as phase current measurements can be used for identification purposes without the need for additional sensors.

[0015] The present invention exhibits particular advantages in semiconductor switches, which are used in inverter circuits for driving electric machines, especially in vehicles, for example as driving drives or traction drives, because large currents flow here and the evaluation is therefore simplified. As is known, inverter circuits or converter circuits are used to connect the AC voltage terminals of the electric machine to the DC voltage terminals of a power grid, such as, for example, the vehicle power grid, and to convert the voltage accordingly. For this purpose, the inverter circuit has a plurality of semiconductor switches, which can be opened (non-conductive) and closed (conductive) respectively according to the driving signal. The semiconductor switches can include MOSFETs and IGBTs, such as gallium nitride (GaN) or silicon carbide (SiC) FETs. The onboard power grid can be a low-voltage power grid or a high-voltage power grid, wherein in the latter case a low-voltage power grid is additionally present for supplying power to the components of the inverter circuit. The high-voltage power grid and the low-voltage power grid can be coupled in the vehicle by a suitable DC voltage converter. The rated voltage level of the high-voltage power grid (hereinafter also referred to as the high-voltage level) can be, for example, significantly greater than the permissible contact voltage, in particular 60V, for example up to several hundred volts. For example, in current electric vehicles, high voltage levels of 400 V or 800 V are often used. The rated voltage level of the low-voltage network can correspond to a common vehicle low voltage of, for example, 12 V or 24 V, for example.

[0016] In one embodiment, the inverter circuit may include a plurality of high-side semiconductor switches and a plurality of low-side semiconductor switches, and at least one gate driver for one or more semiconductor switches. The gate driver is used to apply a control signal to a control terminal of the semiconductor switch (e.g., a gate terminal of a MOSFET). The gate driver may include a desaturation terminal.

[0017] Further advantages and embodiments of the invention are apparent from the description and the accompanying drawings.

[0018] The invention is schematically illustrated by means of exemplary embodiments in the drawings and is described below with reference to the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A circuit arrangement with a semiconductor switch, a gate driver and a desaturation circuit, on which the present invention is based, is shown.

[0020] Figure 2 The two views a) and b) show a sinusoidal load current profile and the associated desaturation voltage, as measured in one embodiment of the invention.

[0021] Figure 3 FIG. 4 shows the drain-source voltage V in a semiconductor switch for different load currents and blocking layer temperature values, as can be determined by measurement in one embodiment of the invention. DSon The change curve.

[0022] Figure 4 A cutout of one embodiment of an inverter circuit according to the present invention is shown.

[0023] Figure 5 A cutout of another embodiment of an inverter circuit according to the present invention is shown. DETAILED DESCRIPTION

[0024] exist Figure 1 A circuit assembly on which the present invention is based is schematically shown in FIG. 1 and is denoted overall by 100. The circuit assembly has a semiconductor switch 10 and a gate driver 20 for driving (and monitoring) the semiconductor switch 10. The circuit assembly can be part of an inverter circuit in particular.

[0025] The semiconductor switch 10 has a current input terminal 10-1, a control terminal 10-2 and a current output terminal 10-3. Here, the semiconductor switch 10 is shown as a MOSFET or SiC-MOSFET, so that the terminals are usually and hereinafter referred to as drain, gate and source. However, the semiconductor switch may also refer to an IGBT, in which case the terminals are then usually referred to as collector, gate and emitter.

[0026] The gate driver 20 comprises a terminal or pin DESAT, via which the semiconductor switch 10 can be monitored in the case of a correct wiring. The internal components of the gate driver 20 are only partially shown, but generally the terminal DESAT is connected via a current source (here I C ) is connected to a voltage supply (here VCC2) via a terminal VCC2 and to a comparator (here an operational amplifier) ​​which converts a voltage V applied to a DESAT pin to DSAT and the internal threshold voltage (here V DSAT_th ) and introduce protective measures based on the comparison results.

[0027] A desaturation circuit 30 is arranged between the current input terminal or drain terminal 10 - 1 of the semiconductor switch 10 and the desaturation terminal DESAT of the gate driver 20 . The desaturation circuit 30 has a resistor device (hereinafter also referred to as a resistor) R DSAT , Blanking capacitor C DSAT and diode D DSAT The diode is connected to the drain terminal 10-1 of a semiconductor switch 10 to be monitored. It should be noted that the diode can also be connected to the drain terminals of multiple semiconductor switches to be monitored. DSAT and resistor device R DSAT The capacitor C is connected in series DSAT One terminal point of the capacitor is connected to the ground, and the other terminal point of the capacitor is grounded.

[0028] When the circuit assembly 100 is turned on, the current source I C For blanking capacitor C DSAT charging, and the diode D DSAT is conducting. C The current intensity can be adjustable, but can also be fixedly predetermined in some gate drivers. In normal operation, the voltage of the capacitor is clamped to the forward voltage of the diode. In the event of a short circuit or generally in the event of very high load currents through the semiconductor switch, the diode becomes non-conductive and thus the desaturation voltage V is applied to the DESAT terminal or the capacitor. DSAT The gate driver is quickly charged to a threshold voltage (via a current source), which triggers the desaturation protection function on the gate driver side and causes the semiconductor switch to turn off. The turn-off process can be performed as a soft blocking process to avoid damage to the switch due to overvoltage occurring during turn-off.

[0029] In such a circuit assembly, according to the design of the present invention, the drain-source voltage V DSon It can also be derived from available measurements. Basically, V DS on is obtained by the following equations (1) and (2):

[0030] V DSAT =I C ×R DSAT +V F，DSAT +V DSon (1)

[0031] V DSon =V Desat -I C ×R DSAT -V F,DSAT (2)

[0032] Where V F,DSAT It represents the forward voltage of the diode.

[0033] However, the diode’s forward voltage V F,DSAT and device R DSAT The resistance (value) is highly temperature dependent, which negatively affects the calculated value R DSon accuracy.

[0034] Figure 2 In view a), a diagram 200 schematically shows the load current I for a typical sinusoidal case, for example in the motor operation of the electric machine. L (t) over the time t, and in view b) in the diagram 210 a measurable desaturation voltage V DSAT The value of t n The peak and load current at tn +1 The desaturation voltage V DSAT (t n ) or V DSAT (t n+1 ) value.

[0035] Typical inverter circuits usually already have load or phase current measurement, so that no additional current sensor is needed. This sensor is used in the embodiment of the present invention and is arranged on the load side. If, for example, it is a high-voltage network, the output of the sensor must be isolated and then sent to a control device for evaluation, which is usually located in the low-voltage network.

[0036] V DSAT can be used in gate drivers (see also Figure 4 ) or using an external voltage measurement circuit (see also Figure 5 ) is measured; because this measurement is also carried out in the high-voltage power grid, the high-voltage power grid must also be isolated from the low-voltage power grid.

[0037] The first measurement is at the first time point t n occurs, where the first load current IL (t n ) as the drain current (I D ) flows through the semiconductor switch 10. Then the following equation applies:

[0038] V DSon (t n )=V DSAT (t n )-I C ×R DSAT (t n )-V F,DSAT (t n )=V DSAT (t n )-V drop (t n ) (3)

[0039] This equation has the voltage drop V at the desaturation resistor device and the desaturation diode from the following equation drop (t n ):

[0040] V drop (t n )=I C ×R DSAT (t n )+V F,DSAT (t n ) (4)

[0041] If the first measurement is performed at the apex of the current wave or at a sufficiently high value, this is advantageous for the signal-to-noise ratio.

[0042] In the next step, the measurement takes place at another time t in the load current cycle. n+1 (See Figure 2 ). For this the following equation applies:

[0043] V DSon (t n+1 )=V DSAT (t n+1 )-I C ×R DSAT (t n+1 )-V F，DSAT (t n+1 )=V DSAT (t n+1 )-V drop (t n+1 ) (5)

[0044] V drop (t n+1 )=I C ×R DSAT (tn+1 )+V F，DSAT (t n+1 ) (6)

[0045] If, in one embodiment, the second measurement is carried out at a time with the lowest possible current, while the semiconductor switch is still conductive, for example at or near the zero crossing (see Figure 2 ), then a very simple evaluation is obtained, since the load current at the second time point is very low or almost zero, and therefore the voltage drop across the switch, i.e. V DSon (t n+1 )≈0.

[0046] It is particularly important to note that the semiconductor switch 10 is n and the second time point t n+1 Advantageously, the following situation is obtained, in which at the first time t n The desaturation voltage detected is greater than the desaturation voltage at the second time point t n+1 The detected desaturation voltage is larger, in particular significantly larger, for example 2 times or more larger.

[0047] The following equation applies here:

[0048] V DSAT (t n+1 )=I C ×R DSAT (t n+1 )+V F，DSAT (t n+1 )=V drop (t n+1 ) (7)

[0049] If the two measurements are very close to each other in terms of duration (e.g. within a few 10-100 milliseconds), it can be assumed that the temperature of the semiconductor switch, the desaturation diode and the desaturation resistor has not changed significantly. n ,t n+1 In other words, if the semiconductor switch 10 is at a first time point t n and the second time point t n+1 When the voltage is not non-conductive, V drop No change. Then the following equation applies:

[0050] V drop (t n )=V drop (t n+1 ) (8)

[0051] Therefore, V dropThe effects in the measurement can be neglected, so that the following equation applies:

[0052] V DSon (I L (t n ), T j )=V DSAT (t n )-I C ×R DSAT (t n )-V F，DSAT (t n )=V DSAT (t n )-V DSAT (t n+1 ) (9)

[0053] Therefore, from the V DSAT (That is, for the first time point V DSAT (t n ) and V for the second time point DSAT (t n+1 )) for two consecutive measurements of the load current I L (t n+1 ) is (substantially) zero in the second measurement or at the second point in time, it follows that for a specific load current I L (t n ) and a specific blocking layer temperature T j The drain-source voltage V DSon (I L (t n ),T j ).

[0054] On resistance R DSon (I L (t n ),T j ) can be obtained from the drain-source-voltage V DSon (I L (t n ),T j ) and load current I L (t n ) is used to determine the drain-source voltage V using equation (9), but this is not necessary for the present invention. DSon (I L (t n ),T j ) thereafter, the value is suitably stored in a storage mechanism, such as local non-volatile storage or remote storage (such as a cloud), as a table of given temperatures and load currents.

[0055] By comparing a current drain-source voltage (and / or a current on-resistance) with a previous value, or by comparing a current drain-source voltage at a first point in time with a drain-source voltage at a first previous point in time, the functional capacity of the semiconductor switch can be monitored or checked. In particular, the functional capacity can be determined from the comparison result, wherein a malfunction can be inferred in the case of a significant deviation (i.e., when the difference between the drain-source voltage at a first current point in time and the drain-source voltage at a first previous point in time exceeds a threshold value). Such a malfunction can include, for example, a poor electrical connection.

[0056] If an insufficient functional capacity of the semiconductor switch is determined, measures such as a repair request, an entry into a fault memory, etc. can be triggered or executed.

[0057] In order to be able to calculate V DSon and / or R DSon A reasonable comparison with the previously measured value should be (within the permissible tolerance) the same load current I L (Drain current I D ) and (within the permissible tolerance) the same blocking layer temperature T j The comparison is performed under . For control and protection purposes, the load current is usually measured in converters anyway. Therefore, if a high-resolution and accurate load current is available, this value can be used for the analysis. For protection and frequency reduction purposes, the blocking layer temperature is usually also determined (e.g. estimated) in converters.

[0058] Figure 3 The drain-source voltage V is shown in the diagram 300. DSon (I L (t n ),T j ) as determined or stored as described above over time or the number of switching cycles. In this case, in the example shown, for three different temperature / load current pairs (T ji / I Di , i=1, 2, 3) shows three graphs 310 , 320 and 330 .

[0059] It can be seen that first no significant change in the value can be identified in the time period 301, and then in the time period 302 the value gradually increases before the value rises strongly in the region 303. This means that the electrical connection of the semiconductor switch in the region 301 is little to not damaged; this represents a region of normal wear or degradation. In the region 302, increasing degradation or degradation occurs, which can include bond wire detachment and / or solder defects. In the region 303, failure is immediately preceded or has already occurred.

[0060] If, in particular, it is detected in the embodiment of the present invention that the semiconductor switch is located in the area 302, this can be determined as insufficient functional capacity of the semiconductor switch and measures such as repair requests, fault memory entries, etc. can be triggered or executed. For example, the detection can be carried out by comparison with previous values. For example, a fault is detected when the deviation of the current value from the comparison value is greater than a permissible tolerance threshold. For example, a moving average value can be determined as a comparison value.

[0061] exist Figure 4 Schematically and in the form of a circuit diagram, a cutout of a design of an inverter circuit according to an embodiment of the present invention is shown and is generally denoted by 400. The inverter circuit can be used to control an electric motor (not shown), for example, in a vehicle. The inverter circuit is designed to monitor a semiconductor switch 10, which is arranged here as a so-called high switch in a half-bridge assembly together with another semiconductor switch 11 as a low switch. However, it should be pointed out that, in addition or as an alternative, the low switch 11 can also be monitored.

[0062] The inverter circuit 400 has a gate driver 20, a desaturation circuit 30 and a control device 410. The control device 410 can be a local control device of the inverter circuit, such as an electric motor control device (so-called MCU, English: motor control unit), or all data can be transmitted to a remote control device or the cloud, and then all data can be analyzed remotely. In this example, the use of a local control device is shown.

[0063] The half-bridge assembly is connected to the terminal B+ on the supply side and to the terminal B- on the ground side, which terminals can be supplied, for example, by the DC voltage intermediate circuit of the vehicle and / or the high-voltage power grid. The center tap of the half-bridge assembly serves as the load terminal V OUT For example, it is connected to the stator winding or phase winding of the motor.

[0064] By selectively driving the semiconductor switches 10 and 11 , a desired load current I L In the example shown, the load current is measured by a current measuring circuit 420 which can be connected, for example, to corresponding current sensors 421 in the phase windings or their feeders.

[0065] The temperature measurement is achieved by a temperature sensor 431, such as a PTC or NTC, which is connected to the analog input AI of the gate driver 20. The temperature sensor 431 can be mounted on the power module or on the housing of the semiconductor switch 10 and can detect the temperature T of the semiconductor switch 10. S .

[0066] Control unit 410 contains a logic unit 411 which implements the functions of control unit 410 in terms of programming.

[0067] The modules for carrying out the embodiments of the present invention are shown separately and are especially independent of the logic unit 411. As explained, they can also be implemented in other locations or in other control devices. However, the implementation in the MCU is advantageous because there is already a lot of required information or data available.

[0068] The logic unit 411 determines in particular PWM signals PWM_1 and PWM_2 for driving the semiconductor switches 10 and 11, which are conducted to the input terminals IN- and IN+ of the gate driver 20 and to the ADC unit 412. The gate driver 20 outputs the driving signal of the semiconductor switch 10 (here, a separate signal for switching on and off) at the output terminal OUTH or OUTL, which is connected to the gate driver 20 via the current limiting resistor R ON and R OFF The semiconductor switch 11 is connected to the gate 10 - 2 . One or more separate gate drivers (not shown) are provided for the semiconductor switch 11 , which can be designed and wired like the gate driver 20 , or corresponding further terminals (not shown) are provided in the gate driver 20 .

[0069] The ADC unit 412 is used to detect and digitize different input signals, as shown, which come, for example, from the gate driver 20 and the current measuring circuit 420 or within the control device 410. In order to determine the first and second suitable time points for the measurement, such as the peak and the zero crossing, the PWM signals PWM_1 and PWM_2 are used. From the signals PWM_1 and PWM_2, it can also be derived when the semiconductor switch 10 or 11 is conducting or not conducting. The variables used in equation (9) can only be determined on the conducting semiconductor switch 10.

[0070] Data necessary for further methods, such as, for example, the load current or the drain current I L (=I D ) is transmitted to the computing module 414 and / or the storage module 416.

[0071] Data can be digitally exchanged between the gate driver 20 and the control device 410 via a digital data interface 413 , for example an SPI interface, including in the present example the temperature T t of the semiconductor switch 10 . S and the desaturation voltage V DSAT . The desaturation voltage V DSAT is transmitted to the calculation module 414, which calculates the drain-source voltage V as described above. DSon , and transmit them to the storage module 416.

[0072] A fault signal (output "Fault") can also be received from the gate driver 20 via the ADC unit 412 (or the data interface 413). For further analysis, the fault state of the gate driver can then also be read out via the data interface 413. In the event of a fault or receipt of a fault signal, the desaturation value should not be used for state monitoring of the switch.

[0073] The current blocking layer temperature T of the semiconductor switch 10 is determined by the program unit for the thermal model 415 j_est For this purpose, in addition to the temperature measured at the semiconductor switch 10 , the coolant temperature T Cool and / or ambient temperature T Amb For example, the blocking layer temperature T can be calculated based on the coolant temperature, the thermal resistance from the "blocking layer to cooling" and the current power consumption. j_est , which in turn can be determined from the load current and the drain-source voltage, for example. Alternatively, the semiconductor switch 10 with respect to R can also be measured and stored at different load currents. DS Temperature characteristic curve. According to the given I D (or I L ) DS , the blocking layer temperature can be easily estimated.

[0074] In the storage module 416, as described above and for example in Figure 3 The detected values ​​shown in are stored, in particular, as a time series and for a specific load current / blocking layer temperature pair.

[0075] In the fault detection module 417 , as explained above, fault detection is performed based on the stored values.

[0076] exist Figure 5 A cutout of another embodiment 500 of an inverter circuit is shown schematically and in the form of a circuit diagram, which essentially corresponds to the embodiment according to Figure 4 Embodiment 400. Figure 4 Unlike the embodiment of , the desaturation voltage is not transmitted digitally from the gate driver 20 via the data interface 413 , but is measured and transmitted by a separate desaturation voltage measuring circuit 530 .

[0077] As explained, the half-bridge assembly can be arranged in the high-voltage power grid, and the control device 410 and the two Figure 4 and 5The power supply of the other modules in the 420 , 530 is realized by the low-voltage grid. The separation or isolation between the high-voltage grid and one of the low-voltage grids is shown by the gate driver 20 and the dashed lines in the modules 420 , 530 .

Claims

1. A method for monitoring a semiconductor switch (10), the semiconductor switch having a control terminal (10-2), a current input terminal (10-1) and a current output terminal (10-3), wherein the current input terminal (10-1) is connected via a diode (D DSAT ), capacitor (C DSAT ) a terminal point, a resistor device (R DSAT ) and a current source (IC) are connected to a potential terminal (VCC), wherein a capacitor (C DSAT ) is grounded, the method comprising the following steps: a) At the first time point (t n ) and the second time point (t n+1 ) detection is applied to the capacitor (C DSAT ) on the desaturation voltage (V DSAT ); b) From the first time point (t n ) and at the second time point (t n+1 ) detects the desaturation voltage (V DSAT ) to determine the first time point (t n ) a drain-source voltage applied between a current input terminal (10-1) and a current output terminal (10-3) of a semiconductor switch (10); c) repeating steps a) and b) at a plurality of different first time points, and obtaining sets of drain-source voltages at a plurality of different first time points (310, 320, 330); d) determining the functional capability of the semiconductor switch (10) from a set (310, 320, 330) of drain-source voltages at a plurality of different first points in time.

2. The method according to claim 1, wherein the desaturation voltage applied to the capacitor (C DSAT ) on the desaturation voltage (V DSAT ).

3. The method according to claim 1 or 2, wherein the current input terminal (10-1) is connected via a diode (D DSAT ), capacitor (C DSAT ) terminal points and resistor components (R DSAT ) is connected to a desaturation terminal (DESAT) of a gate driver (20), wherein the desaturation terminal (DESAT) of the gate driver (20) is connected to a current source (I C ) is connected to the potential terminal (VCC).

4. The method according to claim 3, wherein the gate driver (20) detects the voltage applied to the capacitor (C DSAT ) on the desaturation voltage (V DSAT ).

5. The method according to claim 1 , wherein the semiconductor switch ( 10 ) is switched at a first time (t n ) and the second time point (t n+1 ) is conductive, and the semiconductor switch (10) is turned on at a first time point (t n ) and the second time point (t n+1 ) are particularly non-conductive; and / or wherein at a first time point (t n ) and the second time point (t n+1 ) has a maximum of 10 milliseconds or a maximum of 25 milliseconds or a maximum of 50 milliseconds or a maximum of 100 milliseconds.

6. The method according to any one of the preceding claims, wherein at a first point in time (t n ) detects the desaturation voltage (V DSAT ) is greater than at the second time point (t n+1 ) detects the desaturation voltage (V DSAT ).

7. A method according to any one of the preceding claims, wherein: The second time point (t n+1 ) corresponds to the time point with the smallest possible current or the zero crossing of the load current curve (200).

8. The method according to any one of the preceding claims, wherein the first time point (t n ) corresponds to the point in time with the highest possible current or the peak of the load current curve (200).

9. The method according to any of the preceding claims, wherein determining the functional capability of the semiconductor switch (10) from a set (310, 320, 330) of drain-source voltages at a plurality of different first points in time comprises: The drain-source voltage at a current first point in time is compared with the drain-source voltage at a previous first point in time, and the functional capability is determined based on the comparison result.

10. The method according to claim 9, wherein the same load current (I L ) and / or within the permissible tolerance range the same blocking layer temperature (T j ), the drain-source voltage at the current first time point is compared with the drain-source voltage at the previous first time point.

11. The method according to claim 9 or 10, further comprising: If the difference between the drain-source voltage at the current first point in time and the drain-source voltage at the previous first point in time exceeds a threshold value, it is determined that the functional capacity of the semiconductor switch (10) is insufficient.

12. The method according to any one of the preceding claims, further comprising: When it is determined that the functional capacity of the semiconductor switch (10) is insufficient, measures are performed.

13. The method according to any one of the preceding claims, further comprising: A set of drain-source voltages (310, 320, 330) at a plurality of different first time points is stored in a storage device (416).

14. The method according to claim 1, wherein as semiconductor switches (10) upper switches and / or lower switches of a half-bridge assembly are monitored.

15. An inverter circuit (400) for controlling an electric machine, comprising at least one semiconductor switch (10) and a control device (410), wherein the inverter circuit (400) is designed to carry out the method according to any one of the preceding claims.

16. The inverter circuit according to claim 15, comprising a gate driver (20) with a desaturation terminal (DESAT), wherein the current input terminal (10-1) of the semiconductor switch (10) is connected via a diode (D DSAT ), capacitor (C DSAT ) terminal points and resistor components (R DSAT ) is connected to a desaturation terminal (DESAT) of a gate driver (20), wherein the desaturation terminal (DESAT) of the gate driver (20) is connected via a current source (I C ) is connected to the potential terminal (VCC).

17. The inverter circuit according to claim 16, further comprising a circuit for detecting a desaturation voltage (V DSAT ) of a desaturation voltage measuring circuit (530), the desaturation voltage measuring circuit being connected to the control device (410) in a manner separated in potential.

18. The inverter circuit according to claim 16, wherein: The gate driver (20) is connected to the control device (410) via a digital data interface (413) to transmit a desaturation voltage (V DSAT ).

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