Flash memory data reading method, solid-state storage device, and firmware program product

Abstract

A flash memory data reading method, a solid-state storage device, and a firmware program product can reduce the firmware's RRT traversal time and quickly find a suitable reread voltage code. The flash memory data reading method includes: correcting the user data read from the flash memory unit based on the default read voltage through an ECC circuit; when the number of error bits of the user data exceeds the specified number of bits, rereading the flash memory page of the flash memory unit based on a pre-stored reread voltage code so that the number of error bits of the user data reaches less than the specified number of bits, and the specified number of bits is the number of bits that the ECC circuit can correct errors. There are multiple reread voltage codes, each of which is composed of an offset field and a weight field. The reread voltage code is selected in sequence according to the size of the weight field, and the reread voltage corresponding to the selected reread voltage code is applied to the flash memory page for rereading according to the offset field of the selected reread voltage code.

Description

Technical Field

[0001] The present application relates to the field of flash memory and solid-state storage, and in particular to a method for reading stored data, a solid-state storage device, and a firmware program product. Background Art

[0002] At present, solid-state storage devices (commonly known as "solid-state drives", or SSDs) have replaced traditional mechanical hard disks (or HDDs) to become the most mainstream storage devices due to their advantages such as good performance, low power consumption, shock and drop resistance, low noise, and small size. Unlike traditional mechanical hard disks that use a mechanical structure of "head + motor + disk", solid-state drives use a semiconductor storage chip structure of "flash memory media + master control". As its storage medium, flash memory is a non-volatile memory. Even if power is lost, the data stored in the flash memory will not be lost. Taking NAND flash memory as an example, an example of a basic storage unit (cell) of NAND flash memory is a floating gate transistor similar to NMOS. A floating gate for storing electrons is formed on a semiconductor where current is unidirectionally conducted between the source and the drain. The floating gate uses a conductive material and is surrounded by an insulating layer above and below. The electrons stored in the floating gate will not disappear due to power failure. Regarding the storage information, for example, the state where there are no electrons in the floating gate can be set to "1", and the state where a certain amount of electrons are stored can be set to "0". This kind of flash memory that stores 1 bit of data in one storage unit is called SLC (Single Level Cell). On the other hand, in order to further increase the popularity of flash memory as a storage medium for SSDs, high-density storage and low bit cost have always been the development direction of flash memory technology. One way to increase the density of flash memory is the logical method, that is, to allow a storage unit to store more bits of data. At present, in the process of using the logical method to increase storage density, MLC, TLC, and QLC types of flash memory have appeared on the basis of SLC. Among them, a flash memory that stores 2 bits of data in one storage unit is called MLC (Multiple Level Cell), a flash memory that stores 3 bits of data in one storage unit is called TLC (Triple Level Cell), and a flash memory that stores 4 bits of data in one storage unit is called QLC (Quad Level Cell), and so on. For any of the above types of flash memory, a storage unit of the flash memory is divided into multiple states according to the number of injected electrons, so as to achieve the purpose of storing a specific number of bits of data. Taking MLC as an example, assuming that a storage unit can inject up to 100 electrons, then 0~5 electrons, 20~40 electrons, 50~70 electrons, and 80~100 electrons injected represent 4 states respectively, and each state is encoded with 2 bits. Thus, the MLC can store data in four states, namely, "00", "01", "10" and "11".Figure 7 The figure shows the threshold voltage distribution diagram of MLC flash memory. From the perspective of flash memory organization, the low-order data and high-order data of 2-bit data are stored in different flash memory pages, and these two flash memory pages share a word line. When reading low-order data, only a voltage (usually also called reference voltage) V is applied to the control electrode. B That is, when reading high-bit data, a voltage V needs to be applied to the control electrode. A and V C At least one of the following. Figure 7 It can be seen that each reference voltage is located between two adjacent threshold voltage distributions, and a certain width of spacing is formed between the two adjacent threshold voltage distributions. The width of the spacing represents the level of fault tolerance of the flash memory. Specifically, the wider the spacing, the more accidental loss or injection of electrons is allowed, and the better the fault tolerance of the flash memory.

[0003] However, as the flash memory is used continuously, the number of erase and write cycles (PEC) of the memory cell increases, and the degree of wear increases, which can cause a portion or all of the threshold voltage distribution in the threshold voltage distribution diagram to shift. In addition, during the use of the flash memory, as the number of times the flash memory block is read increases, more and more electrons may enter the floating gate transistor, which can also cause the threshold voltage distribution to shift (that is, read interference can also cause the threshold voltage distribution to shift). As a result, in Figure 7 In the figure, the threshold voltage distribution shifts from the original state shown in the implementation to the state shown in the dotted line. At this time, the reference voltage may partially overlap with a certain threshold voltage distribution, which may cause data reading errors. In addition, even if the flash memory is not used for a long time, the electrons stored in the floating gate will escape through the insulating layer under the action of the intrinsic electric field over time. In other words, data retention problems can also cause the threshold voltage distribution to shift.

[0004] In order to avoid the above situation, some measures need to be taken on the SSD software and hardware at the system level to solve the data unreliability problem of flash memory to ensure the reliability of user data. Generally speaking, the controller of the flash memory will first use the ECC (Error Correction Code) error correction engine to correct the error bits of the flash memory data. Specifically, before writing the user data A into the flash memory, it is first ECC-encoded, and the generated check data A is connected to the user data and written into the flash memory together. Then, after the data is stored in the flash memory, the data is bit-flipped due to factors such as read interference or data retention, so that the user data A becomes user data B. In this case, when the data is read, the user data B and the check data B pass through the ECC error correction engine. If the number of bits where the data is flipped does not exceed the error correction capability of ECC, the data obtained after ECC error correction is the original user data A. If the number of bits where the data is erroneous exceeds the error correction capability of ECC, the decoded data will be different data. Therefore, in the case where the number of bits where the data is erroneous exceeds the error correction capability of ECC, other error correction measures need to be further adopted.

[0005] As a means, rereading (also called read retry or read retry) is usually used. Specifically, when the number of error bits in user data exceeds the error correction capability of ECC, the firmware rereads the user data by changing the read voltage applied to the control electrode. On the other hand, since there are many factors that cause bit flipping, the distribution of threshold voltage in actual scenarios is not limited to Figure 1 Therefore, a read retry table RRT (Read Retry Table) is usually stored in the memory of the solid-state drive, and the read retry table stores at least one set of reread voltage codes. A set of reread voltages can be formed through a set of reread voltage codes.

[0006] However, if there are too many groups of reread voltage codes recorded in the read retry table, it will take a long time to traverse the reread voltage codes, which will cause the product to respond to the read command with a longer delay. Therefore, it is very important to find the most suitable reread voltage code in a shorter time. Summary of the invention

[0007] Technical problem to be solved by the invention

[0008] The present application is formed to solve the above technical problems, and its purpose is to provide a method for reading flash memory data, which can reduce the firmware's traversal time for RRT and quickly find a suitable reread voltage code. On this basis, the present application further provides a solid-state storage device and a firmware program product that can implement the above flash memory data reading method.

[0009] Technical solutions adopted to solve technical problems

[0010] A technical solution of the present application provides a method for reading flash memory data, comprising:

[0011] Correcting errors of user data read from the flash memory cell based on a default read voltage by an ECC circuit; and

[0012] When the number of error bits of the user data exceeds a specified number of bits, the flash memory page of the flash memory unit is reread based on a pre-stored reread voltage code so that the number of error bits of the user data is less than the specified number of bits, and the specified number of bits is the number of bits that the ECC circuit can correct errors, wherein:

[0013] The number of the re-read voltage codes is multiple,

[0014] Each of the re-read voltage codes is composed of an offset field and a weight field.

[0015] The reread voltage code is selected in sequence according to the size of the weight field, and the reread voltage corresponding to the selected reread voltage code is applied to the flash memory page according to the offset field of the selected reread voltage code to perform the rereading.

[0016] According to the flash memory data reading method described in the technical solution, compared with the existing read retry table, a weight field is added to each reread voltage code to characterize the historical usage frequency of each reread voltage code. The higher the historical usage frequency, the higher the success probability of rereading based on the group of reread voltage codes. Therefore, by traversing the reread voltage codes in the read retry table based on the size of the weight field, the reread voltage that can achieve successful reading can be found more quickly than in the prior art, thereby reducing the firmware's overhead in traversing the read retry table. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram showing an electronic system including a host device and a solid-state storage device connected to each other, and components not related to the present application are omitted.

[0018] Figure 2 This is a flowchart showing the main steps of a flash memory data reading method according to one embodiment of the present application.

[0019] Figure 3 It is a schematic diagram of the initial state of a read retry table for implementing a flash memory data reading method according to an embodiment of the present application.

[0020] Figure 4 yes Figure 3 FIG. 4 is a schematic diagram of a first change state of the read retry table shown.

[0021] Figure 5 yes Figure 3 FIG. 4 is a schematic diagram of a second change state of the read retry table shown.

[0022] Figure 6 yes Figure 3 FIG. 4 is a schematic diagram of a third change state of the read retry table shown in FIG.

[0023] Figure 7 Schematic diagram showing the threshold voltage distribution of MLC flash memory. DETAILED DESCRIPTION

[0024] First, refer to Figure 1 , the main architecture of the electronic system to which the flash memory data reading method described in this application is applied is described. It should be noted that the architecture of the electronic system described here is only an example, and other types of architectures may also be used, or appropriate changes may be made based on the architecture.

[0025] like Figure 1As shown, the electronic system mainly includes a host device 100, an external bus 110 and a solid-state storage device 120. The host device 100 mainly includes a host-side processor 101 and a host-side memory 102. Through the cooperation of the host-side processor 101 and the host-side memory 102, specific functions can be realized. In addition, according to actual needs, the host device 100 may also include a host-side controller (not shown in the figure). For example, through the cooperation of the host-side processor 101 and the host-side memory 102, the host device 100 can have the function of sending various commands (or requests) to the solid-state storage device 120 to access the flash memory array 123 in the solid-state storage device 120. The external bus 110 is used to connect the host device 100 and the solid-state storage device 120. Generally speaking, the external bus 110 is, for example, a USB bus, a SATA bus or a PCIe bus. The solid-state storage device 120 mainly includes a main control unit 121, a memory unit 122 and a flash memory array 123. The main control unit 121 is communicatively connected to the memory unit 122 and the flash array 123. The main control unit 121 receives commands sent from the host device 100 via the external bus 110 and communicates with the flash array 123 based on these commands, and enables the flash array 123 to perform corresponding actions according to the received commands. For example, the host device 100 can send commands such as write, read, and erase to the main control unit 121 of the solid-state storage device 120, and the main control unit 121 enables the flash array 123 to perform corresponding actions after receiving these commands. From a macroscopic perspective, the flash array 123 includes one or more Dies (or LUNs), each Die includes one or more Planes (sometimes called planes), each Plane includes one or more Blocks (also called flash blocks), each Block includes multiple Pages (also called flash pages), and each Page corresponds to a word line (Word Line) and is composed of a large number of basic storage units. The Die or LUN of the flash array 123 is the basic unit for receiving or executing commands. Different Dies or LUNs can receive or execute different commands at the same time, but in a Die or LUN, only one command can be executed independently at a time. That is to say, while a write operation is being performed on a flash memory page in a Die or LUN, other flash memory pages cannot be read. In the current mainstream flash memory units, each Die can include four or six Planes, each Plane has its own independent registers (flash memory registers and page registers), and the size of each page register is equal to the size of a flash memory page. They are RAM inside the flash memory, which is used to cache data to be written to the flash memory array (Array) or read from the flash memory array. As explained above, the basic operations of flash memory are writing, reading and erasing. The smallest unit for writing and reading is a flash memory page, and the smallest unit for erasing is a flash memory block.

[0026] Below, refer to Figure 2 , the main process of the flash memory data reading method of one embodiment of the present application is described. However, it should be noted that the steps in the process described in this embodiment are all main steps, not all steps. In addition, as long as the technical effect claimed by the present application can be achieved and the purpose of the invention of the present application can be achieved, the order of the steps shown can be appropriately changed. In addition, for the convenience of explanation and understanding, in this embodiment, the flash memory unit is an MLC unit for example.

[0027] Figure 2 A flowchart showing the main steps of a method for reading flash memory data according to an embodiment of the present application is shown. First, in step ST1, the user data read from the flash memory cell based on the default read voltage is corrected by an ECC circuit (i.e., an ECC error correction engine). Specifically, the memory cell 122 of the solid-state storage device 120 pre-stores a default read voltage corresponding to a basic storage cell in the flash memory array 123. For example, in the case where the flash memory is an MLC cell, three default read voltages for reading low-order data and high-order data are pre-stored in the memory cell 122. When the user performs an operation corresponding to a read request through the operating system of the host device 100, the file system converts the read request into a corresponding read command via the driver. That is, in response to a read request at the operating system level, a read instruction pre-stored in the host-side memory 102 is sent to the host-side processor 101, and then sent to the solid-state storage device 120 via the external bus 110. After receiving the above-mentioned read instruction, the main control unit 121 of the solid-state storage device 120 finds the corresponding default read voltage from the memory unit 122 according to the read instruction, and applies the default read voltage to the control electrode of each basic storage unit connected to the word line via the corresponding word line to obtain the required user data. For the obtained user data, in order to test the reliability of the user data, the main control unit 121 uses the ECC circuit (ECC error correction engine) to correct the above-mentioned user data read from the flash memory array 123 based on the above-mentioned default read voltage.

[0028] Then, in step ST2, it is determined whether the number of error bits of the user data exceeds the error correction capability of the ECC circuit. If the number of error bits of the user data does not exceed the error correction capability of the ECC circuit, the error correction result of the user data is output to the host device 100 (step STA). On the other hand, if the number of error bits of the user data exceeds the error correction capability of the ECC circuit, the process proceeds to step ST3.

[0029] In step ST3, since it is determined that the number of error bits in the above-mentioned user data exceeds the prescribed number of bits, that is, exceeds the error correction capability of the ECC circuit, the reread voltage code is selected in sequence from the multiple pre-stored reread voltage codes according to the size of the weight field to perform the reread operation until the number of error bits in the user data finally output does not exceed the error correction capability of the ECC circuit. In other words, the reread operation is successfully performed.

[0030] Figure 3 FIG. 2 shows a read retry table (ReadRetry Table) for implementing the flash memory data reading method of this embodiment. Figure 3 As shown, in this embodiment, an example is shown in which the read reread table includes four groups of reread voltage codes. However, it should be noted that this is only an example, and the number of groups of reread voltage codes included in the read reread table is not limited to four groups, and can be set accordingly according to actual conditions and product requirements. In addition, by observing Figure 3 It can be found that, unlike the re-read voltage code recorded in the existing read retry table, Figure 3 Each reread voltage code recorded in the read retry table shown includes not only an offset field, but also a weight field. Since the flash memory cell described in the present embodiment is an MLC cell, three default read voltages are required to completely read a 2-bit data. Therefore, in order to avoid failure of any one or more of the three default read voltages due to excessive wear (i.e., too many erase and write times) or read interference (i.e., data reading errors due to a shift in the threshold voltage distribution of a certain part), each reread voltage code includes three offset fields to correct each of the three default read voltages. In addition, in the present embodiment, each offset field occupies 1 byte, i.e., 8 bits of storage space. Figure 3 1 is shown in hexadecimal. Each offset field represents a voltage offset relative to each of the three default read voltages, and is a scalar. A mapping relationship table is pre-stored in the memory unit 122 of the solid-state storage device 120, and the mapping relationship shows the mapping relationship between each offset field of each re-read voltage code and the corresponding voltage offset, or shows the mapping relationship between each offset field and the corresponding voltage offset as a whole without distinguishing each re-read voltage code.

[0031] For ease of understanding, the second group of reread voltage codes is used as an example for explanation. In the second group of reread voltage codes, the first offset field records "00h", and the voltage offset corresponding to the first offset field in the mapping relationship table is 0V. This indicates that the default read voltage corresponding to the first offset field does not need to be offset. On the other hand, in the second group of reread voltage codes, the second offset field records "FDh". At this time, the firmware will send "FDh" to the flash memory array 123, and the flash memory array 123 will compare it with "FFh" to obtain the difference, that is, "02h". On this basis, the flash memory array 123 can determine the voltage offset corresponding to "02h" by querying the internal mapping relationship table, so that when performing a reread operation, the default read voltage corresponding to the second offset field is offset to the left or right by the amount corresponding to "02h". As for whether to offset to the left or right, it depends on the actual setting of the flash memory array 123. In addition, in the second group of reread voltage codes, the third offset field records "03h". At this time, after receiving the code, the flash memory array 123 will compare "03h" with "00h" to obtain the difference value "03h". On this basis, the flash memory array 123 can determine the voltage offset corresponding to "03h" by querying the mapping relationship table, so that when performing a reread operation, the default read voltage corresponding to the third offset field is offset to the right or left by the amount corresponding to "03h". Similarly, whether to offset to the right or to the left depends on the actual setting of the flash memory array 123.

[0032] Furthermore, as mentioned above (and also as Figure 3 As shown in FIG. 1 ), each re-read voltage code includes a weight field, which represents the priority of the re-read voltage code selected. Figure 3 In the embodiment, the plurality of groups (four groups in the embodiment) of reread voltage codes include a plurality of groups (two groups in the embodiment) of ordinary reread voltage codes and a plurality of groups (two groups in the embodiment) of special reread voltage codes. The ordinary reread voltage codes and the special reread voltage codes include ordinary weight fields and special weight fields, respectively. In particular, the special reread voltage codes are reread voltage codes corresponding to a specific reading scenario, or in other words, each special reread voltage code is a reread voltage code associated with each relevant condition.

[0033] The ordinary weight field in the ordinary reread voltage code changes according to the usage of the ordinary reread voltage code (for example, the number of times it is used). Specifically, when the ordinary reread voltage code is selected and used for the reread operation and the rereading is successfully achieved, the ordinary weight field in the ordinary reread voltage code will increase by a pre-set ordinary value, and the size of the ordinary value is determined according to the ordinary operating parameters of the flash memory page that serves as the minimum read unit. The ordinary operating parameters of the flash memory page include, for example, the operating temperature of the flash memory page, but are not limited to this, and may also include other types of operating parameters. For example, when a certain ordinary reread voltage code is selected and used for the reread operation and the rereading is successfully achieved, the ordinary weight field of the ordinary reread voltage code increases by "01h" (converted to decimal is "1"). Figure 3 Taking the third group of reread voltage codes in as an example, its normal weight field was originally "00h". After the third group of reread voltage codes was selected and successfully used for the reread operation, the normal weight field increased by 1 and became "01h".

[0034] On the other hand, unlike the ordinary weight field, the special weight field does not change under the condition that "the special reread voltage code containing the special weight field is selected for the reread operation and the rereading is successfully achieved", but a temporary change occurs when the relevant conditions are met. That is to say, when the relevant conditions associated with a special reread voltage code are met, the special weight field of the special reread voltage code will temporarily increase a pre-set special value, and its special value is greater than the ordinary value. After the reread operation is successfully performed, the special value added by the special weight field is cancelled. In other words, the special value is subtracted from the special weight field to which the special value is added, so that the special weight field is restored to its original value. In this embodiment, the above-mentioned relevant conditions include:

[0035] (1) Whether the word line connected to the flash memory page as the minimum read unit is an edge word line (Edge WL);

[0036] (2) Whether the number of reads of a flash memory page, which is the minimum read unit, is greater than a specified reference number of reads (i.e., there is a risk of read disturbance).

[0037] For ease of understanding, the following combination Figure 3 The first group of re-read voltage codes and the second group of re-read voltage codes in the figure describe how the above two related conditions are applied.

[0038] like Figure 3As shown, the first group of reread voltage codes is a special reread voltage code associated with the first related condition in the above-mentioned related conditions. Specifically, when the firmware determines through query that the word line connected to the flash memory page to be read is an edge word line when performing a reread operation, it is determined that the first related condition is met, and its special weight field is temporarily increased by a pre-set special value, such as "64h" (converted to decimal as "100"). In addition, the second group of reread voltage codes is a special reread voltage code associated with the second related condition in the above-mentioned related conditions. Specifically, when the firmware determines through query that the number of reads of the flash memory page to be read (for example, 2005 times) has exceeded the specified benchmark read number (for example, 2000 times) when performing a reread operation, it is determined that the second related condition is met, and its special weight field is temporarily increased by a pre-set special value, such as "64h" (converted to decimal as "100"). Then, after successfully completing the reread operation of the flash memory page to be read, the special weight field of the first group of reread voltage codes or the special weight field of the second reread voltage code is subtracted by "64h" to restore to the original value "00h".

[0039] It should be noted that, during the design and verification process of the chip, it has been confirmed that in certain scenarios (i.e., the above-mentioned relevant conditions are met), the reread voltage will inevitably shift accordingly. That is to say, for each of the above scenarios (in other words, when each of the above-mentioned relevant conditions is met), a voltage rereading operation is required. At this time, a special value greater than the increase in the ordinary weight field is temporarily added to ensure that the reread voltage code corresponding to the scenario can be selected first, so that the correct rereading can be achieved quickly. In this way, the accuracy of the rereading can be improved, and the time spent on rereading can be saved. In addition, there is no need to spend a lot of time to count past historical data. At the same time, after the rereading is successfully achieved, the temporarily increased special value is subtracted from the above-mentioned rereading voltage code. In this way, it is possible not to interfere with the selection of other rereading voltage codes.

[0040] The following, combined Figures 3 to 6 , how to select the reread voltage code during the reread operation is explained, wherein, Figure 3 It is the initial state of the read retry table. In the initial state, the weight fields of each reread voltage code in the read retry table are all "00h".

[0041] Assume that 70 rereads were successful in the subsequent read operations. If the third group of reread voltage codes is selected and the number of successful rereads is 30, its weight field changes from "00h" to "1Eh" (i.e. "30" in decimal), and if the fourth group of reread voltage codes is selected and the number of successful rereads is 40, its weight field changes from "00h" to "28h" (i.e. "40" in decimal). Thus, the read retry table is changed from Figure 3 The status shown changes to Figure 4 The state shown, wherein the weight fields (special weight fields) of the first group of reread voltage codes and the second group of reread voltage codes are both "00h", while the weight field of the third group of reread voltage codes is "1Eh" and the weight field of the fourth group of reread voltage codes is "28h". Assume that a new round of read operations is performed at this time and a reread operation is required based on the failure of the read of the default read voltage. At this time, the firmware first determines whether this round of read operations meets the relevant conditions. If it is determined that no relevant conditions are met, the size of the special weight field of the first and second groups of reread voltage codes will not be changed, and the sizes of the weight fields of the first to fourth groups of reread voltage codes will be directly compared. According to Figure 4 It can be seen that the four weight fields can be represented in a list as ("00h", "00h", "1Eh", "28h"), and the fourth weight field has the largest value. Therefore, the firmware first selects the fourth group of reread voltage codes for the reread operation of the flash memory page. If the data stored in the flash memory page is successfully read based on the fourth group of reread voltage codes, the current round of reading operation is terminated. On the other hand, if the data stored in the flash memory page is still not successfully read based on the fourth group of reread voltage codes, the voltage reread code with the second largest value of the weight field, that is, the third group of voltage reread codes, is selected for the reread operation, and so on. In other words, when there are N groups of voltage reread codes, one group of voltage reread codes is selected in turn according to the size of the weight field to participate in the reread operation until the reread operation is successful.

[0042] On the other hand, if the firmware determines that a relevant condition, such as the first relevant condition, is satisfied (i.e., it is determined that the word line connected to the flash memory page as the minimum read unit is an edge word line), the size of the special weight field of the first group of reread voltage codes is changed from "00h" to "64h". Figure 4 The status shown changes to Figure 5 The state shown. Among them, the weight field of the first group of reread voltage codes is "64h", the weight field (special weight field) of the second group of reread voltage codes is "00h", and the weight field of the third group of reread voltage codes is "1Eh" and the weight field of the fourth group of reread voltage codes is "28h". According to Figure 5It can be seen that the four weight fields can be represented in a list as ("64h", "00h", "1Eh", "28h"), and the value of the first weight field is the largest. Therefore, the firmware first selects the first group of reread voltage codes for the reread operation of the flash memory page. If the data stored in the flash memory page is successfully read based on the first group of reread voltage codes, the current round of reading operation is terminated. On the other hand, if the data stored in the flash memory page is still not successfully read based on the first group of reread voltage codes, the voltage reread code with the second largest value of the weight field, that is, the fourth group of voltage reread codes, is selected for the reread operation, and so on. After the reread is successfully implemented, the weight field of the first group of reread voltage codes is restored from "64h" to "00h".

[0043] Similarly, if the firmware determines that the second related condition is satisfied (i.e., whether the number of reads of the flash memory page as the minimum read unit is greater than the specified reference number of reads), it is considered that the possibility of being disturbed by the read is high, and the size of the special weight field of the second group of reread voltage codes is changed from "00h" to "64h". Figure 4 The status shown changes to Figure 6 The state shown. Among them, the weight field of the first group of reread voltage codes is "00h", the weight field of the second group of reread voltage codes (special weight field) is "64h", and the weight field of the third group of reread voltage codes is "1Eh" and the weight field of the fourth group of reread voltage codes is "28h". According to Figure 5 It can be seen that the four weight fields can be represented in a list as ("00h", "64h", "1Eh", "28h"), and the second weight field has the largest value. Therefore, the firmware first selects the second group of reread voltage codes for the reread operation of the flash memory page. If the data stored in the flash memory page is successfully read based on the second group of reread voltage codes, the current round of reading operation is terminated. On the other hand, if the data stored in the flash memory page is still not successfully read based on the second group of reread voltage codes, the voltage reread code with the second largest value of the weight field, that is, the fourth group of voltage reread codes, is selected for the reread operation, and so on. After the reread is successfully implemented, the weight field of the second group of reread voltage codes is restored from "64h" to "00h".

[0044] According to the flash memory data reading method described in this embodiment, compared with the existing read retry table, a weight field is added to each reread voltage code to characterize the historical usage frequency of each reread voltage code. The higher the historical usage frequency, the higher the success probability of rereading based on the group of reread voltage codes. Therefore, by traversing the reread voltage codes in the read retry table based on the size of the weight field, the reread voltage that can achieve successful reading can be found more quickly than in the prior art, thereby reducing the firmware's overhead in traversing the read retry table.

[0045] It should be noted that in the above implementation, the normal value is "01h" and the special value is "64h" as an example, but it is not limited to this. It can be set according to the specific working parameters of the flash memory page as long as the special value is greater than the normal value.

[0046] Furthermore, in the above-mentioned embodiments, the flash memory cell is described as an MLC cell as an example, but the type of the flash memory cell is not limited thereto, and the flash memory cell may also be an SLC cell or a TLC cell.

[0047] It should be understood that the present invention is not limited to the exact construction that has been described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A method for reading flash memory data, comprising: Correcting errors of user data read from the flash memory cell based on a default read voltage by an ECC circuit; as well as When the number of error bits of the user data exceeds a specified number of bits, the flash memory page of the flash memory unit is reread based on a pre-stored reread voltage code so that the number of error bits of the user data is less than the specified number of bits, wherein the specified number of bits is the number of bits that the ECC circuit can correct errors. It is characterized in that A plurality of the re-read voltage codes are pre-stored, Each of the re-read voltage codes is composed of an offset field and a weight field. The reread voltage code is selected in sequence according to the size of the weight field, and a reread voltage corresponding to the selected reread voltage code is applied to the flash memory page according to the offset field of the selected reread voltage code to perform the rereading, The plurality of re-read voltage codes include a common re-read voltage code, In the case where one of the common re-read voltage codes among the re-read voltage codes is selected and the re-reading is successfully performed, The weight field of the common reread voltage code increases a pre-set common value, and the common value is determined according to the common working parameters of the flash memory page. The plurality of re-read voltage codes include special re-read voltage codes, each special re-read voltage code is associated with a relevant condition, In the case where the rereading of the flash memory page satisfies the relevant condition, before the flash memory page is reread, the weight field of the special reread voltage code associated with the relevant condition is temporarily increased by a pre-set special value so that the special reread voltage code associated with the relevant condition is selected first, and the special value is determined according to the special operating parameters of the flash memory page, and In the case where the flash memory page is successfully reread, the special value is subtracted from the weight field increased by the special value, The relevant conditions include at least any one of the following: The word line to which the flash memory page is connected is an edge word line; and The number of reads of the flash memory page is greater than a specified reference number of reads.

2. The method for reading flash memory data according to claim 1, wherein: The common operating parameters include the temperature of the flash memory page.

3. The method for reading flash memory data according to claim 1, wherein: The special operating parameters include the type of word lines connected to the flash memory page and the number of reads of the flash memory page.

4. The method for reading flash memory data according to claim 1, wherein: The flash memory cell is an SLC cell, an MLC cell, or a TLC cell.

5. A solid-state storage device, comprising a memory, a control unit having a processor, and a firmware program stored in the memory, characterized in that: The firmware program is executed by the processor to implement the flash memory data reading method according to any one of claims 1 to 4.

6. A firmware program product, comprising a firmware program, characterized in that: When the firmware program is executed by a processor, the flash memory data reading method according to any one of claims 1 to 4 is implemented.

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