Virtual address and physical address conversion method and device for storage and calculation integrated architecture

Abstract

The invention discloses a virtual address and physical address conversion method and device for a storage and calculation integrated framework, and the method comprises the steps: firstly responding to a virtual address issued by a central processing unit, building a first comparison table in a memory, and enabling the first comparison table to be a comparison table of the virtual address and a temporary address in the memory; acquiring a temporary physical address of a virtual address to be converted based on the first comparison table; and then converting the temporary physical address into an actual physical address based on the regional page table, thereby avoiding the technical problems of overlong address conversion time and relatively high address conversion resource overhead in the storage and calculation integrated architecture.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and specifically relates to a method and device for converting virtual addresses and physical addresses for a storage-computing integrated architecture. Background Art

[0002] The integrated storage and computing architecture is a memory-centric computing architecture that deploys computing units within memory units. The integrated storage and computing architecture can transfer computing from the central processing unit CPU to the memory, avoid data movement between the processor and the memory, reduce data access latency, and avoid the overhead caused by large-scale data migration.

[0003] Usually when there are computing tasks, they are computing tasks enabled by the CPU when executing applications. When the CPU executes applications, it uses virtual addresses. When allocating memory to the process, it is necessary to map the virtual addresses to physical addresses. The physical addresses are the address space actually accessed by the application. However, in the storage and computing integrated architecture, the page table cache information in the CPU cannot be used directly in the memory. Therefore, the memory cannot directly convert the virtual addresses in the application into physical addresses, which makes the address conversion time-consuming and increases the resource overhead.

[0004] Therefore, how to reduce the address conversion time in the storage-computing integrated architecture and reduce the resource overhead of address conversion is a technical problem to be solved by technical personnel in this field. Summary of the invention

[0005] The purpose of the present invention is to solve the technical problems in the prior art that the address conversion time of the storage-computing integrated architecture is too long and the resource overhead of the address conversion is too large.

[0006] To achieve the above technical objectives, on the one hand, the present invention provides an address conversion method for a storage-computing integrated architecture, the method comprising: In response to the virtual address sent by the central processing unit, a first comparison table is established in the memory, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; Acquire a temporary physical address of the virtual address to be converted based on the first comparison table; The temporary physical address is converted into an actual physical address based on the region page table.

[0007] Furthermore, the establishing of the first comparison table in the memory specifically includes: Initialize the reference table to be filled and allocate space for it; Mapping the virtual address to the memory to obtain a corresponding temporary address; The mapping metadata including the virtual address and the corresponding temporary address is written into the to-be-filled comparison table to obtain a first comparison table.

[0008] Furthermore, the regional page table specifically includes multiple first-level regional tables, second-level regional tables and third-level regional tables. The first-level regional table specifically includes continuously allocated memory access addresses that are less than a first threshold, the second-level regional table is used to store the physical address of data that is less than a second threshold, and the third-level regional table is a page table of preset specifications.

[0009] Further, the acquiring the temporary physical address of the virtual address to be converted based on the first comparison table specifically includes: Get the virtual address to be converted; Perform a table lookup operation in the first comparison table to determine the corresponding temporary address; The corresponding temporary address is used as the temporary physical address.

[0010] Further, the converting the temporary physical address into the actual physical address based on the regional page table specifically includes: A three-level region table corresponding to the index bit of the temporary physical address in the region page table; Determine the base address and the offset in the corresponding three-level area table according to the mark bit of the temporary physical address; The actual physical address is obtained by combining the base address and the offset.

[0011] Furthermore, when converting the temporary physical address into the actual physical address, the method further includes: Every time an actual physical address is converted, it is placed in a reply queue, and the reply queue is used to send the cache data corresponding to the converted actual physical address and its corresponding original memory access instruction to the logical operation unit in the storage and computing integrated architecture.

[0012] On the other hand, the present invention also provides an address conversion device for a storage-computing integrated architecture, the device comprising: An establishing module, configured to establish a first comparison table in the memory in response to the virtual address sent by the central processing unit, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; A generating module, used for acquiring a temporary physical address of the virtual address to be converted based on the first comparison table; The conversion module is used to convert the temporary physical address into an actual physical address based on the regional page table.

[0013] The present invention provides a method for converting virtual addresses and physical addresses for a storage-computing integrated architecture. Compared with the prior art, the method first responds to the virtual address issued by the central processing unit, and establishes a first comparison table in the memory, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; then, based on the first comparison table, the temporary physical address of the virtual address to be converted is obtained; and then, based on the regional page table, the temporary physical address is converted into an actual physical address, thereby avoiding the technical problems of long address conversion time and large address conversion resource overhead in the storage-computing integrated architecture. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 The figure is a flow chart of a method for converting a virtual address to a physical address for a storage-computing integrated architecture provided in an embodiment of the present specification; Figure 2 The figure shows a schematic diagram of the structure of a virtual address and physical address conversion device for a storage-computing integrated architecture provided in an embodiment of the present specification. DETAILED DESCRIPTION

[0016] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0017] like Figure 1The flowchart of the method for converting virtual addresses and physical addresses for a storage-computing integrated architecture provided by the embodiment of this specification is shown. Although this specification provides the method operation steps or device structures shown in the following embodiments or drawings, the method or device may include more or fewer operation steps or module units after partial merger based on routine or no creative labor. In the steps or structures where there is no necessary causal relationship logically, the execution order of these steps or the module structure of the device is not limited to the execution order or module structure shown in the embodiments or drawings of this specification. When the method or module structure is applied in actual devices, servers or terminal products, it can be executed sequentially or in parallel according to the method or module structure shown in the embodiments or drawings (for example, in a parallel processor or multi-threaded processing environment, or even in a distributed processing, server cluster implementation environment).

[0018] The virtual address and physical address conversion method for the storage-computing integrated architecture provided in the present description embodiment is as follows Figure 1 As shown, the method specifically comprises the following steps: Step S101, in response to the virtual address sent by the central processing unit, a first comparison table is established in the memory, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory.

[0019] Specifically, the first comparison table may be established by a memory management device, or by a memory controller or other functional modules. After receiving the virtual address sent by the central processing unit, the corresponding drive system is started and then the first comparison table is established.

[0020] In the embodiment of the present application, the step of establishing a first comparison table in the memory specifically includes: Initialize the reference table to be filled and allocate space for it; Mapping the virtual address to the memory to obtain a corresponding temporary address; The mapping metadata including the virtual address and the corresponding temporary address is written into the to-be-filled comparison table to obtain a first comparison table.

[0021] First, the to-be-filled comparison table is initialized and space is allocated for it when the kernel starts. Then the virtual address is mapped to the memory to obtain the corresponding temporary address. The PIM driver, i.e., the driver of the storage-computing integrated architecture, writes the mapping metadata including the PIM physical address, i.e., the temporary address and its 1:1 mapping virtual address, into the to-be-filled comparison table to obtain the first comparison table. In this table, the mapping data unit required for converting the PIM virtual address to the memory data address is obtained.

[0022] Step S102: Obtain a temporary physical address of the virtual address to be converted based on the first comparison table.

[0023] Specifically, the PIM temporary physical address required for physical address conversion is generated by combining the virtual address transmitted by the CPU with the address conversion comparison table in the PIM. When the CPU issues a data memory access instruction, the mmp() function is started to create space for the virtual address where the data in the memory access instruction is located. When the space is allocated, specifically, the temporary physical address of the virtual address to be converted is obtained based on the first comparison table, which specifically includes: Get the virtual address to be converted; Perform a table lookup operation in the first comparison table to determine the corresponding temporary address; The corresponding temporary address is used as the temporary physical address.

[0024] Specifically, because the temporary physical address is also a temporary address in the memory, after the temporary physical address is determined, the corresponding actual physical address can be determined according to the temporary physical address.

[0025] Step S103: Convert the temporary physical address into an actual physical address based on the regional page table.

[0026] Among them, the regional page table specifically includes multiple first-level regional tables, second-level regional tables and third-level regional tables. The first-level regional table specifically includes continuously allocated memory access addresses less than a first threshold, and the second-level regional table is used to store the physical addresses of data less than a second threshold. The third-level regional table is a page table of preset specifications. In other words, the first-level regional table includes a small number of continuously allocated memory access addresses, and the second-level regional table is used to store the physical addresses of part of the data. The third-level regional page table is designed similarly to a conventional small page format. After a multi-layer page table cache design, it can be ensured that the data in each regional page table is continuous in the region.

[0027] In the embodiment of the present application, converting the temporary physical address into the actual physical address based on the regional page table specifically includes: A three-level region table corresponding to the index bit of the temporary physical address in the region page table; Determine the base address and the offset in the corresponding three-level area table according to the mark bit of the temporary physical address; The actual physical address is obtained by combining the base address and the offset.

[0028] Specifically, when converting the temporary physical address to the actual physical address, bits 47-41 of the temporary physical address are used for indexing to find the corresponding first-level or second-level regional page table, and then bits 40-21 of the temporary physical address are used for indexing to find the corresponding third-level regional page table. That is to say, bits 47-21 of the temporary physical address are index bits, which are used to determine the third-level regional page table of the temporary physical address in the regional page table. Bits 20-12 of the temporary physical address mark the base address of the actual physical address required by the temporary physical address in the memory, and bits 11-0 of the temporary physical address represent the offset of the actual physical address, wherein bits 20-0 of the temporary physical address are also the mark bits. After combining the base address with the address offset, the required actual physical address is obtained.

[0029] Specifically, in order to speed up the address translation, we adopted a dual address engine strategy, one for the address translation engine and the other for the data access engine. The advantage of this design is that it supports fast context switching between multiple pointer tracking operations, allowing it to use the idle time of memory access to calculate addresses from different pointer tracking operations. The specific execution operation is that the PIM temporary physical address is passed from the memory access queue to the address access device in sequence. The address access device converts the temporary physical address into a physical address through the regional page table, and finally returns the physical address to the data access engine through the reply queue. That is to say, when the central processing unit CPU issues a memory access instruction, this memory access instruction is first loaded into The address translation engine (module) processes the queued applications in sequence. When the address translation engine (module) encounters a data access instruction, the address is sent to the access queue. The access engine (module) uses the regional page table conversion method to convert the queued temporary physical address into an actual physical address, and sends it to the memory controller, which performs the data access operation. Each time an actual physical address is converted, the memory access instruction originally stored in the access queue is placed in the reply queue. The reply queue is used to send the cache data corresponding to the converted actual physical address and its corresponding original memory access instruction to the logical operation unit in the storage and computing integrated architecture.

[0030] Based on the above-mentioned method for converting virtual addresses and physical addresses for a storage-computing integrated architecture, one or more embodiments of this specification also provide a platform and terminal for converting virtual addresses and physical addresses for a storage-computing integrated architecture. The platform or terminal may include a device, software, module, plug-in, server, client, etc. that uses the method described in the embodiments of this specification and is combined with a device for implementing necessary hardware. Based on the same innovative concept, the system in one or more embodiments provided in the embodiments of this specification is as described in the following embodiments. Since the implementation scheme and method for solving the problem of the system are similar, the implementation of the specific system in the embodiments of this specification can refer to the implementation of the aforementioned method, and the repetitions will not be repeated. The terms "unit" or "module" used below can be a combination of software and / or hardware that implements predetermined functions. Although the system described in the following embodiments is preferably implemented in software, hardware and a combination of software and hardware are also possible and conceived.

[0031] Specifically, Figure 2 Schematic diagram of the module structure of an embodiment of a virtual address and physical address conversion device for storage and computing integrated architecture provided in this specification, such as Figure 2 As shown, the virtual address and physical address conversion device for the storage-computing integrated architecture provided in this specification includes: Establishing module 201, used for establishing a first comparison table in the memory in response to the virtual address sent by the central processing unit, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; A generating module 202, configured to obtain a temporary physical address of the virtual address to be converted based on the first comparison table; The conversion module 203 is used to convert the temporary physical address into an actual physical address based on the regional page table.

[0032] It should be noted that the above-mentioned system may also include other implementation modes according to the description of the corresponding method embodiment. The specific implementation modes may refer to the description of the above-mentioned corresponding method embodiment, which will not be described one by one here.

[0033] The present application also provides an electronic device, including: processor; a memory for storing instructions executable by the processor; The processor is configured to execute the method provided in the above embodiment.

[0034] The electronic device provided by the embodiment of the present application stores the executable instructions of the processor in the memory. When the processor executes the executable instructions, it can first respond to the virtual address issued by the central processing unit and establish a first comparison table in the memory, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; then, based on the first comparison table, the temporary physical address of the virtual address to be converted is obtained; and then, based on the regional page table, the temporary physical address is converted into the actual physical address, thereby avoiding the technical problems of too long address conversion time and large address conversion resource overhead in the storage and computing integrated architecture.

[0035] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0036] The methods or devices described in the above embodiments provided in this specification can implement business logic through computer programs and record them on storage media, and the storage media can be read and executed by computers to achieve the effects of the solutions described in the embodiments of this specification, such as: In response to the virtual address sent by the central processing unit, a first comparison table is established in the memory, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; Acquire a temporary physical address of the virtual address to be converted based on the first comparison table; The temporary physical address is converted into an actual physical address based on the region page table.

[0037] The storage medium may include a physical device for storing information, which is usually a medium that digitizes information and then stores it in an electrical, magnetic or optical manner. The storage medium may include: a device that stores information in an electrical energy manner, such as various memories, such as RAM, ROM, etc.; a device that stores information in a magnetic energy manner, such as a hard disk, a floppy disk, a magnetic tape, a magnetic core memory, a magnetic bubble memory, a USB flash drive; a device that stores information in an optical manner, such as a CD or a DVD. Of course, there are other readable storage media, such as quantum memory, graphene memory, etc.

[0038] The embodiments of this specification are not limited to complying with industry communication standards, standard computer resource data update and data storage rules, or the situations described in one or more embodiments of this specification. Certain industry standards or slightly modified implementation plans based on the implementation described in the custom method or embodiment can also achieve the same, equivalent or similar, or predictable implementation effects after deformation of the above-mentioned embodiments. The embodiments obtained by using these modified or deformed data acquisition, storage, judgment, processing methods, etc. can still fall within the scope of the optional implementation plans of the embodiments of this specification.

[0039] The controller can be implemented in any appropriate manner, for example, the controller can take the form of a computer-readable medium such as a microprocessor or processor and a computer-readable program code (such as software or firmware) that can be executed by the (micro)processor, a logic gate, a switch, an application specific integrated circuit (ASIC), a programmable logic controller, and an embedded microcontroller. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, ATMEL AT91SAM, MICROCHIP PIC18F26K20, and SILICONE LABS C8051F320. The memory controller can also be implemented as part of the control logic of the memory. It is also known to those skilled in the art that in addition to implementing the controller in a purely computer-readable program code manner, the controller can be implemented in the form of a logic gate, a switch, an application specific integrated circuit, a programmable logic controller, and an embedded microcontroller by logically programming the method steps. Therefore, such a controller can be considered as a hardware component, and the devices included therein for implementing various functions can also be considered as structures within the hardware component. Or even, the devices for implementing various functions can be considered as both software modules for implementing the method and structures within the hardware component.

[0040] The device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. There may be other divisions in actual implementation, such as multiple units or plug-ins may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed may be through some interface, indirect coupling or communication connection of the device or unit, which may be electrical, mechanical or other forms.

[0041] These computer program instructions may also be loaded onto a computer or other programmable resource data updating device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions executed on the computer or other programmable device for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0042] Each embodiment in this specification is described in a progressive manner, and the same and similar parts between the embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. In the description of this specification, the description of the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of this specification. In this specification, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction.

[0043] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A method for converting virtual addresses to physical addresses for a storage-computing integrated architecture, characterized in that: The method comprises: In response to the virtual address sent by the central processing unit, a first comparison table is established in the memory, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; Acquire a temporary physical address of the virtual address to be converted based on the first comparison table; The temporary physical address is converted into an actual physical address based on the region page table.

2. The address conversion method for storage-computing integrated architecture according to claim 1, characterized in that: The step of establishing a first comparison table in the memory specifically includes: Initialize the reference table to be filled and allocate space for it; Mapping the virtual address to the memory to obtain a corresponding temporary address; The mapping metadata including the virtual address and the corresponding temporary address is written into the to-be-filled comparison table to obtain a first comparison table.

3. The address conversion method for storage-computing integrated architecture according to claim 1, characterized in that: The regional page table specifically includes multiple first-level regional tables, second-level regional tables and third-level regional tables. The first-level regional table specifically includes continuously allocated memory access addresses that are less than a first threshold, the second-level regional table is used to store the physical address of data that is less than a second threshold, and the third-level regional table is a page table of preset specifications.

4. The address conversion method for storage-computing integrated architecture according to claim 1, characterized in that: The obtaining the temporary physical address of the virtual address to be converted based on the first comparison table specifically includes: Get the virtual address to be converted; Perform a table lookup operation in the first comparison table to determine the corresponding temporary address; The corresponding temporary address is used as the temporary physical address.

5. The address conversion method for storage-computing integrated architecture according to claim 1, characterized in that: The converting the temporary physical address into the actual physical address based on the regional page table specifically includes: A three-level region table corresponding to the index bit of the temporary physical address in the region page table; Determine the base address and the offset in the corresponding three-level area table according to the mark bit of the temporary physical address; The actual physical address is obtained by combining the base address and the offset.

6. The address conversion method for storage-computing integrated architecture according to claim 1, characterized in that: When converting the temporary physical address to the actual physical address, the method further includes: Every time an actual physical address is converted, it is placed in a reply queue, and the reply queue is used to send the cache data corresponding to the converted actual physical address and its corresponding original memory access instruction to the logical operation unit in the storage and computing integrated architecture.

7. An address conversion device for a storage-computing integrated architecture, characterized in that: The device comprises: An establishing module, configured to establish a first comparison table in the memory in response to the virtual address sent by the central processing unit, wherein the first comparison table is a comparison table between the virtual address and the temporary address in the memory; A generating module, used for acquiring a temporary physical address of the virtual address to be converted based on the first comparison table; The conversion module is used to convert the temporary physical address into an actual physical address based on the regional page table.

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