Display screen refreshing method and display driving device

Abstract

The invention provides a display screen refreshing method and a display driving device. The display effect of a display screen can be improved. The method comprises the steps that a display driving device sequentially outputs a high-frequency clock signal and a time sequence signal to a display screen, the time sequence signal comprises overturning from a first level to a second level, and the time sequence signal is used for driving refreshing of the display screen.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display screen refresh method and a display driving device. Background Art

[0002] As an important part of the information industry, display technology has always played a very important role in the development of information technology. A display driver can drive the display of a display screen. For example, the display driver outputs a timing signal through a gate driver on array (GOA) to drive the refresh of the display screen.

[0003] The timing signal involves level flipping, which has a long delay and cannot meet the time requirement corresponding to the refresh rate of the display. Such a design can easily lead to abnormal display effects at the boundaries of the display screen. Summary of the invention

[0004] The present application provides a display screen refresh method and a display driving device, which can improve the display effect.

[0005] In a first aspect, the present application provides a method for refreshing a display screen, which is applied to a display driver device, for example, can be executed by the display driver device. The display driver device can be a display driver chip, or a component in a display driver chip, or a display driver integrated circuit. The method includes: outputting a high-frequency clock signal and a timing signal to the display screen in sequence, wherein the timing signal includes a flip from a first level to a second level, and the timing signal is used to drive the refresh of the display screen.

[0006] Taking into account that in the prior art solution, when the display screen is driven to refresh by a timing signal, there will be a long delay in the level flipping of the timing signal which cannot meet the time requirement corresponding to the refresh rate of the display screen. In this application, a high-frequency clock signal is output before the timing signal is output, which can shorten the level flipping time corresponding to the timing signal to meet the high refresh rate requirement of the display screen, thereby improving the display effect.

[0007] In a possible design, the high-frequency clock signal includes a pulse signal, such as a pulse signal with a square wave waveform and / or a pulse signal with a sine wave waveform. The pulse signal can accelerate the level flip corresponding to the timing signal.

[0008] In a possible design, the waveform of the timing signal satisfies: flipping from the first level to the second level and maintaining the second level. For example, the first level is a low level and the second level is a high level; or, the first level is a high level and the second level is a low level. In addition, it can be understood that the higher the frequency of the high-frequency clock signal, the shorter the flipping time of the timing signal from the first level to the second level.

[0009] In a possible design, the timing signal includes a video synchronization signal VFE. For example, the display driving device includes a GOA, and a high-frequency clock signal and a timing signal are outputted through the GOA. The timing signal can be understood as VFE.

[0010] In a possible design, the sequentially outputting the high-frequency clock signal and the timing signal to the display screen includes: sequentially outputting the high-frequency clock signal and the timing signal to the first display area on the display screen, so that the refresh rate of the first display area is greater than the refresh rate of the second display area; wherein the first display area and the second display area are adjacent to each other on the display screen. Such a design can be applied to a scenario where a local area of ​​the same display screen has a high refresh rate requirement, and the high-frequency clock signal and the timing signal are transmitted successively to drive the display refresh, which can meet the refresh time requirement corresponding to the high refresh rate.

[0011] In one possible design, before sequentially outputting the high-frequency clock signal and the timing signal to the first display area on the display screen, it also includes: obtaining first information, wherein the first information indicates that the refresh rate of the first display area is greater than the refresh rate of the second display area. The present application supports triggering the display driver to transmit the high-frequency clock signal and the timing signal to the specified area of ​​the display screen in sequence through information indication, and can be applied to a variety of display scene requirements.

[0012] In a possible design, it also includes: generating the high-frequency clock signal through a clock module.

[0013] In a second aspect, the present application provides a display driver device, which may be a display driver chip, or a component in a display driver chip. The display driver device includes a processing module and an output module; wherein the processing module is used to generate a high-frequency clock signal and a timing signal; and the output module is used to sequentially output the high-frequency clock signal and the timing signal to a display screen, wherein the timing signal includes a flip from a first level to a second level, and the timing signal is used to drive the refresh of the display screen.

[0014] In one possible design, the high-frequency clock signal includes a pulse signal.

[0015] In a possible design, the waveform of the timing signal satisfies: flipping from the first level to the second level and maintaining the second level.

[0016] In a possible design, the higher the frequency of the high-frequency clock signal is, the shorter the switching time of the timing signal from the first level to the second level is.

[0017] In one possible design, the timing signal includes a video synchronization signal VFE.

[0018] In one possible design, the output module is specifically used to: output the high-frequency clock signal and the timing signal in sequence to a first display area on a display screen, so that the refresh rate of the first display area is greater than the refresh rate of the second display area; wherein the first display area and the second display area are adjacent to each other on the display screen.

[0019] In a possible design, the apparatus further includes an acquisition module, where the acquisition module is used to acquire first information, where the first information indicates that a refresh rate of the first display area is greater than a refresh rate of the second display area.

[0020] In one possible design, the processing module is further used to generate the high-frequency clock signal through a clock module. In a third aspect, the present application provides an electronic device, comprising: a processor and a memory; the memory is used to store one or more computer programs, the one or more computer programs include computer execution instructions, and when the computing device is running, the processor executes the one or more computer programs stored in the memory, so that the computing device executes the method described in the first aspect and any one of the designs of the first aspect.

[0021] In a third aspect, the present application provides a communication device, comprising: a processor and a communication interface, wherein the communication interface is used to receive signals from other devices outside the communication device and transmit them to the processor or send signals from the processor to other devices outside the communication device, and the processor executes code instructions through a logic circuit to implement the method described in the first aspect and any one of the designs in the first aspect.

[0022] In a fourth aspect, an embodiment of the present application provides a chip system, the chip system comprising: a processor and an interface. The processor is used to call and run instructions from the interface, and when the processor executes the instruction, the method described in the first aspect and any one of the designs in the first aspect is implemented.

[0023] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, which is used to store a computer program or instruction. When the computer program or instruction is executed by a processor, the method described in the above-mentioned first aspect and any one of the designs in the first aspect is implemented.

[0024] In a sixth aspect, an embodiment of the present application provides a computer program product comprising instructions, which, when executed on a computer, implements the method described in the first aspect and any one of the designs in the first aspect.

[0025] Regarding the beneficial effects of any technical solution in the second to sixth aspects mentioned above, reference can be made to the beneficial effects discussion of the corresponding technical solution in the first aspect, and the repeated parts will not be listed here. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of the structure of an electronic device;

[0027] Figure 2A It is a schematic diagram of the structure of the display driver chip DDIC;

[0028] Figure 2B The figure is a schematic diagram of the generation and output process of the timing signal;

[0029] Figure 3 It is a waveform diagram of a timing signal;

[0030] Figure 4 A schematic diagram of a flow chart of a method for refreshing a display screen provided in an embodiment of the present application;

[0031] Figure 5A One of the waveform diagrams of a high-frequency clock signal combined with a timing signal;

[0032] Figure 5B One of the waveform diagrams of a high-frequency clock signal combined with a timing signal;

[0033] Fig. 6A One of the waveform diagrams of a high-frequency clock signal combined with a timing signal;

[0034] Figure 6B One of the waveform diagrams of a high-frequency clock signal combined with a timing signal;

[0035] Fig. 7A One of the waveform diagrams of a high-frequency clock signal combined with a timing signal;

[0036] Figure 7B One of the waveform diagrams of a high-frequency clock signal combined with a timing signal;

[0037] Figure 8 A schematic diagram of the distribution of a display screen provided in an embodiment of the present application;

[0038] Fig. 9 A schematic diagram of a flow chart of a method for refreshing a display screen provided in an embodiment of the present application;

[0039] Fig.10 A schematic diagram of the distribution of another display screen provided in an embodiment of the present application;

[0040] Fig.11 A schematic diagram of the structure of a display driving device provided in an embodiment of the present application;

[0041] Fig.12 A schematic diagram of the structure of a chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings.

[0043] The at least one (item) involved in the present application as follows indicates one (item) or more (items). More than one (item) refers to two (items) or more than two (items). "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. In addition, it should be understood that although the terms first, second, etc. may be used to describe each object in the present application, these objects should not be limited to these terms. These terms are only used to distinguish each object from each other.

[0044] The terms "including" and "having" and any variations thereof mentioned in the following description of the present application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes other steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices. It should be noted that in the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any method or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other methods or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete manner.

[0045] Figure 1 The electronic device 100 includes a display driving device 101 and a display screen 102 .

[0046] The display driver 101 may be any chip or integrated circuit with display driving capability, and the display driver 101 is used to drive and control the display of the display screen 102. In the embodiment of the present application, the display driver 101 may be provided independently of the display screen 102, or the display driver 101 may be provided in the display screen 102.

[0047] The display driver 101 involved in the present application may be a display driver IC (DDIC) or other driver chips or driver integrated circuits; the display screen 102 may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens, where N is a positive integer greater than 1.

[0048] It can be understood that the display driving device can also be replaced by describing as a display driving module, a display driving unit, a display driving circuit, a driving device, a driving module, a driving unit or other names; the display screen can also be replaced by describing as a display panel, a display module, a display unit, a display device or other names, which is not limited to the embodiments of the present application.

[0049] The following is an introduction using the display driver device as DDIC as an example. DDIC outputs drive signals and data to the display screen in the form of electrical signals to control the screen brightness and color, so that image information such as letters and pictures can be displayed on the screen. Figure 2A As shown, the composition of DDIC includes source driver (Source IC), gate driver (Gate IC), timing controller chip (TCON) and power management chip (PMIC). Among them, the display power management chip is responsible for the power management of the entire display system to ensure the effective use and energy saving of the equipment. TCON is responsible for managing the refresh rate, frame rate and scanning order of the display screen, and controlling the operation of the source driver and gate driver to ensure the correctness and efficiency of the screen display. The source driver (Source IC) controls the brightness, grayscale, color, etc. of a single pixel on the display screen through voltage. The gate driver (Gate IC) is responsible for the switching of each column of transistors. Only when the transistor is turned on, the source driver can control the brightness, grayscale, color, etc. of a single pixel through voltage. The gate driver involved in the embodiment of the present application is implemented using GOA technology.

[0050] In a possible implementation, the display driver 101 may also be provided with a memory, and the memory is used to store instructions and data. For example, the memory may pre-store program instructions and display-related control parameters such as brightness, color, grayscale, refresh rate, display effect requirements, etc., and then when the display driver 101 drives the display screen 102 to dynamically display the image information to be displayed, the TCON may run the program instructions according to the control parameters in the memory to correctly control the operation of the source driver and the gate driver.

[0051] In one possible implementation, a processor is provided in the electronic device, and the display driver 101 can receive display-related control parameters from the processor and store them in its memory. The processor can be any chip or integrated circuit with computing capability. For example, the processor can be an application processor (AP), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), other programmable logic devices, transistor logic devices, or any combination thereof. The general-purpose processor can be a microprocessor, such as a microcontroller unit (MCU), or can be other conventional processors. The processor can include one or more processing units, and different processing units can be independent devices or integrated in one or more processors.

[0052] It can be understood that the processor can also be replaced by describing as a processing module, a processing circuit or other names; the memory can also be replaced by describing as a storage module, a storage unit or other names, and the embodiments of the present application are not limited to this.

[0053] The electronic device 100 may be a portable electronic device including functions such as a personal digital assistant and / or a music player, such as a mobile phone, a tablet computer, a wearable device with a wireless communication function (such as a smart watch), etc. Exemplary embodiments of portable electronic devices include but are not limited to: Or a portable electronic device with other operating systems. The portable electronic device may also be other portable electronic devices, such as a laptop computer with a touch-sensitive surface (e.g., a touch panel). It should also be understood that in some other embodiments of the present application, the electronic device may not be a portable electronic device, but a desktop computer with a touch-sensitive surface (e.g., a touch panel), and the embodiments of the present application are not limited to this.

[0054] Currently, in addition to controlling the switching of transistors through GOA, DDIC can also output a timing signal through GOA to drive the refresh of the display screen. For example, the timing signal is used to power the display screen to drive the refresh of the display screen. Figure 2B As shown in the figure, the generation and output process of the timing signal is as follows: TCON converts the control parameter into an analog signal (such as a low voltage signal), and the low voltage signal is converted into a high voltage signal through a level shift (LVS), and then the high voltage signal is output through GOA. The high voltage signal can be understood as a timing signal for driving the refresh of the display screen.

[0055] like Figure 3 As shown in (a), the waveform of the timing signal can satisfy: after flipping from a low level to a high level, it remains at a high level; or, Figure 3 (b) shows that the waveform of the timing signal can satisfy: after flipping from high level to low level, it remains at low level. Figure 3 The duration between t1 and t2 indicates the level flip duration of the timing signal. If the level flip duration of the timing signal exceeds the effective frame time of the display and does not meet the time requirement corresponding to the refresh rate of the display, it is easy to cause abnormal display effects at the boundary of the display screen.

[0056] Based on this, an embodiment of the present application provides a refresh method for a display screen, which can shorten the level flipping time of a timing signal, meet the time requirement corresponding to the refresh rate of the display screen, and thus improve the display effect.

[0057] Figure 4 An implementation process of the method provided for the embodiment of the present application mainly includes the following steps.

[0058] S401, the display driving device generates a high-frequency clock signal and a timing signal.

[0059] Taking the display driver device as DDIC as an example, TCON and LVS are deployed in DDIC. TCON can insert a high-frequency clock signal before converting the control parameters into a low-voltage signal, and then obtain a high-frequency clock signal and a timing signal after the voltage conversion of LVS, and in terms of timing, the high-frequency clock signal comes first and the timing signal comes later.

[0060] Among them, the waveform of the timing signal can satisfy the flipping from the first level to the second level and maintain the second level. As the timing signal introduced above, the first level is a low level and the second level is a high level; or, the first level is a high level and the second level is a low level. In the embodiment of the present application, the actual voltage corresponding to the level ranges from -16v to +16v. In a possible design, TCON can determine the actual voltage value corresponding to the second level according to the control parameters. For example, TCON reads from the memory that the target voltage required for the display effect of the display screen is +12v, then the actual voltage value corresponding to the second level is +12v; the actual voltage value corresponding to the first level can be pre-set, such as 0v, -16v or other initial voltage values, and the embodiment of the present application is not limited to this.

[0061] The high-frequency clock signal can be used to accelerate the flipping of the timing signal from the first level to the second level, or it can also be understood that adding a high-frequency clock signal before the timing signal can accumulate charge to shorten the level flipping time of the timing signal. In addition, it can be understood that the higher the frequency of the high-frequency clock signal, the shorter the flipping time of the timing signal from the first level to the second level. In a possible implementation, the TCON can generate a high-frequency clock signal using a clock module.

[0062] In a possible implementation, the high-frequency clock signal may include a pulse signal. Optionally, the TCON may determine the frequency, number of pulses and other parameters of the pulse signal according to display-related control parameters; or, the TCON may determine the frequency, number of pulses and other parameters of the pulse signal according to the power consumption cost related to the pulse signal frequency. For example, the TCON sets the parameters of the pulse signal according to the refresh rate required by the display screen, so that the level flipping time is less than the effective frame time of the display screen.

[0063] Exemplarily, the waveforms of the pulse signals included in the high-frequency clock signal may all be rectangular waves, or square waves. Figure 5A It shows that the display driving device generates a square wave pulse signal and a timing signal in sequence, and the timing signal is flipped from a low level to a high level and remains at a high level. Figure 5B It shows that the display driving device generates a square wave pulse signal and a timing signal in sequence, and the timing signal is flipped from a high level to a low level and remains at a low level.

[0064] Exemplarily, the waveforms of the pulse signals included in the high-frequency clock signal may all be sinusoidal waves. Fig. 6A It shows that the display driving device generates a sinusoidal pulse signal and a timing signal in sequence, and the timing signal is flipped from a low level to a high level and remains at a high level. Figure 6BIt shows that the display driving device generates a sinusoidal pulse signal and a timing signal in sequence, and the timing signal is flipped from a high level to a low level and remains at a low level.

[0065] Exemplarily, the waveform of the pulse signal included in the high-frequency clock signal may include both a sine wave and a square wave. Optionally, the number and position of the sine waves in the high-frequency clock signal may be pre-configured in the memory of the display driver, or may be specified by the processor of the aforementioned electronic device, which is not limited in the embodiments of the present application. Fig. 7A It is shown that the display driving device generates a pulse signal and a timing signal in sequence, and the timing signal is flipped from a low level to a high level and remains at a high level; Figure 7B It is shown that the display driving device generates a pulse signal and a timing signal in sequence, and the timing signal is flipped from a high level to a low level and remains at a low level; Fig. 7A and Figure 7B The waveforms of the pulse signals include sine waves and square waves.

[0066] S402, the display driving device sequentially outputs a high-frequency clock signal and a timing signal to the display screen.

[0067] Corresponding to the DDIC in S401, the DDIC can output a high-frequency clock signal and a timing signal to the display screen in sequence through the GOA. It can be understood that the timing signal is used to drive the refresh of the display screen. For example, the timing signal is used to provide power to the display screen to drive the refresh of the display screen.

[0068] Optionally, the timing signal mentioned above in the embodiment of the present application may also be replaced by a video synchronization (video front-end, VFE) signal, and the timing signal output by the GOA may also be replaced by a GOA VFE signal, which is not limited in the embodiment of the present application.

[0069] In the above method, a high-frequency clock signal (pulse signal) is output before the timing signal (VFE signal) is output. This can shorten the process of establishing the timing signal, thereby meeting the high refresh rate requirements of the display screen and improving the display effect. Examples of application scenarios of this method are as follows: the electronic device includes only one display screen, and the display screen requires a high refresh rate, such as 120Hz; or, the electronic device includes multiple display screens, and the multiple display screens include display screens that require a high refresh rate and display screens with a low refresh rate. The display driver can specifically output a high-frequency clock signal and a timing signal to the display screen that requires a high refresh rate in sequence. Figure 8The electronic device shown in the figure includes three electronic screens, among which the refresh rate of electronic screen 1 is a high refresh rate, and the refresh rates of the other two electronic screens (electronic screen 2 and electronic screen 3) are low refresh rates. Optionally, the high refresh rate described in the embodiment of the present application is greater than or equal to 60 Hz, for example, the high refresh rate may be 90 Hz, 120 Hz or 240 Hz. The low refresh rate is less than 60 Hz, for example, the low refresh rate may be 30 Hz.

[0070] Furthermore, it is understandable that, corresponding to multiple display screens having high refresh rate requirements but different refresh rate values, the display driving device outputs different parameters such as frequency and number of pulses of the high-frequency clock signal to different display screens.

[0071] Fig. 9 Another implementation process of the method provided for the embodiment of the present application mainly includes the following steps.

[0072] S901: A display driving apparatus obtains first information, where the first information indicates that a refresh rate of a first display area on a display screen is greater than a refresh rate of a second display area.

[0073] For example, the display driving device obtains the first information from a processor in the electronic device. Wherein, the first display area and the second display area are located adjacent to each other on the display screen. Fig.10 It illustrates that a display screen is divided into three display areas from top to bottom, which are respectively recorded as area 1, area 2, and area 3; wherein the refresh rate of area 2 is greater than the refresh rates of area 1 and area 3, for example, the refresh rate of area 2 is 120 Hz, and the refresh rates of area 1 and area 3 are 60 Hz, then area 2 can be understood as an example of the first display area, and area 1 and area 3 can be understood as two examples of the second display area.

[0074] Optionally, the first display area may be preconfigured as a display area with a higher refresh rate than its adjacent display areas, and the configuration may be stored in a memory of the display driver device. Then, the display driver device may not execute S901, but directly read the memory to determine the first display area. It can be understood that S901 is an optional step. Fig. 9 Indicated by dotted line.

[0075] S902, the display driving device generates a high-frequency clock signal and a timing signal.

[0076] This step can be implemented with reference to the description in S401, and will not be described in detail in this embodiment of the present application.

[0077] S903: The display driving device sequentially outputs the high-frequency clock signal and the timing signal to the first display area of ​​the display screen.

[0078] This step can be implemented with reference to the description in S402, and will not be described in detail in the embodiment of the present application. This step can achieve that the refresh rate of the first display area is greater than the refresh rate of the second display area.

[0079] In the above method, the high-frequency clock signal is output before the timing signal is output, which can shorten the establishment process of the timing signal, thereby meeting the high refresh rate requirements of some areas on the display screen and improving the display effect.

[0080] Furthermore, it is understandable that, corresponding to multiple display areas having high refresh rate requirements but different refresh rate values, the display driving device outputs different parameters such as frequency and number of pulses of the high-frequency clock signal to different display areas.

[0081] Based on the same concept, refer to Fig.11 , the embodiment of the present application further provides a signal display driving device 1100. The signal processing device 1100 includes a processing module 1101 and an output module 1102. The processing module 1101 and the output module 1102 can be implemented in the form of a processor calling software; for example, the device includes a processor, the processor is connected to a memory, and instructions are stored in the memory. The processor calls the instructions stored in the memory to implement any of the above methods or implement the functions of each unit of the device, wherein the processor is, for example, a general-purpose processor, such as a central processing unit (CPU) or a microprocessor, and the memory is a memory inside the device or a memory outside the device. Alternatively, the processing module 1101 and the output module 1102 can be implemented in the form of a hardware circuit, and the functions of some or all of the units can be realized by designing the hardware circuit, and the hardware circuit can be understood as one or more processors; for example, in one implementation, the hardware circuit is an application-specific integrated circuit (ASIC), and the functions of some or all of the above units are realized by designing the logical relationship of the components in the circuit; for example, in another implementation, the hardware circuit can be realized by a programmable logic device (PLD), taking a field programmable gate array (FPGA) as an example, which can include a large number of logic gate circuits, and the connection relationship between the logic gate circuits is configured by configuring the configuration file, so as to realize the functions of some or all of the above units. All units of the above device can be realized in the form of a processor calling software, or in the form of a hardware circuit, or in part by a processor calling software, and the rest by a hardware circuit.

[0082] Among them, the processing module 1101 is used to generate a high-frequency clock signal and a timing signal; the output module 1102 is used to output the high-frequency clock signal and the timing signal to the display screen in sequence, the timing signal includes a flip from a first level to a second level, and the timing signal is used to drive the refresh of the display screen.

[0083] Based on the same technical concept, the embodiment of the present application also provides a chip, such as Fig.12 As shown, the chip 1200 includes at least one processor 1201 and a communication interface 1203. In an optional design, a memory 1202 may also be included. In the chip 1200, the processor 1201 may transmit data through the communication interface 1203 when communicating with other devices. Fig.12 The processor 1201 in the chip 1200 can call the computer execution instructions stored in the memory 1202 so that the chip 1200 can execute any of the above method embodiments.

[0084] In a possible implementation, the processor 1201 may be coupled to the memory 1202 via the interface 1203. The specific connection medium between the processor 1201 and the memory 1202 is not limited in the embodiment of the present application. For example, the bus 1204 may be used.

[0085] In another possible implementation, the chip may also directly include a memory 1202 in which a computer program or computer instructions are stored. For example, the memory 1202 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (doubledatarate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (synchlink DRAM, SLDRAM), and direct rambus RAM (DR RAM).

[0086] In a possible implementation, an embodiment of the present application provides a computer-readable storage medium, which stores a program code. When the program code runs on the computer, the computer executes the above method embodiment.

[0087] In a possible implementation, an embodiment of the present application provides a computer program product. When the computer program product is run on a computer, the computer is enabled to execute the above method embodiment.

[0088] It should be understood that all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module and will not be repeated here.

[0089] The method steps in the embodiments of the present application can be implemented by hardware, or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an erasable programmable read-only memory, an electrically erasable programmable read-only memory, a register, a hard disk, a mobile hard disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC. In addition, the ASIC can be located in a base station or a terminal. Of course, the processor and the storage medium can also be present in a base station or a terminal as discrete components.

[0090] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instruction is loaded and executed on a computer, the process or function described in the embodiment of the present application is executed in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device or other programmable device. The computer program or instruction may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program or instruction may be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired or wireless means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server, data center, etc. that integrates one or more available media. The available medium may be a magnetic medium, for example, a floppy disk, a hard disk, a tape; it may also be an optical medium, for example, a digital video disc; it may also be a semiconductor medium, for example, a solid-state hard disk. The computer-readable storage medium may be a volatile or nonvolatile storage medium, or may include both volatile and nonvolatile types of storage media.

[0091] In the various embodiments of the present application, unless otherwise specified or provided for in any logical conflict, the terms and / or descriptions between the different embodiments are consistent and may be referenced to each other, and the technical features in the different embodiments may be combined to form new embodiments according to their inherent logical relationships.

[0092] It is understood that the various numbers involved in the embodiments of the present application are only for the convenience of description and are not used to limit the scope of the embodiments of the present application. The size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic.

Claims

1. A method for refreshing a display screen, characterized in that: Applicable to display driver devices, including: A high-frequency clock signal and a timing signal are sequentially output to the display screen, wherein the timing signal includes a flip from a first level to a second level, and the timing signal is used to drive the refresh of the display screen.

2. The method according to claim 1, characterized in that The high-frequency clock signal includes a pulse signal.

3. The method according to claim 1 or 2, characterized in that The waveform of the timing signal satisfies: The first level is switched to the second level, and the second level is maintained.

4. The method according to any one of claims 1 to 3, characterized in that: The higher the frequency of the high-frequency clock signal is, the shorter the switching time of the timing signal from the first level to the second level is.

5. The method according to any one of claims 1 to 4, characterized in that: The timing signal includes a video synchronization signal VFE.

6. The method according to any one of claims 1 to 5, characterized in that: The step of sequentially outputting the high-frequency clock signal and the timing signal to the display screen comprises: The high-frequency clock signal and the timing signal are sequentially output to a first display area on a display screen so that a refresh rate of the first display area is greater than a refresh rate of a second display area; wherein the first display area and the second display area are adjacent to each other on the display screen.

7. The method according to claim 6, characterized in that Before sequentially outputting the high-frequency clock signal and the timing signal to the first display area on the display screen, the method further includes: First information is obtained, where the first information indicates that a refresh rate of the first display area is greater than a refresh rate of the second display area.

8. The method according to any one of claims 1 to 7, characterized in that: Also includes: The high frequency clock signal is generated by a clock module.

9. A display driving device, characterized in that: include: A processing module, used for generating a high-frequency clock signal and a timing signal; The output module is used to sequentially output the high-frequency clock signal and the timing signal to the display screen, wherein the timing signal includes a flip from a first level to a second level, and the timing signal is used to drive the refresh of the display screen.

10. The device according to claim 9, characterized in that The high-frequency clock signal includes a pulse signal.

11. The device according to claim 9 or 10, characterized in that The waveform of the timing signal satisfies: The first level is switched to the second level, and the second level is maintained.

12. The device according to any one of claims 9 to 11, characterized in that: The higher the frequency of the high-frequency clock signal is, the shorter the switching time of the timing signal from the first level to the second level is.

13. The device according to any one of claims 9 to 12, characterized in that: The timing signal includes a video synchronization signal VFE.

14. The device according to any one of claims 9 to 13, characterized in that: The output module is specifically used for: The high-frequency clock signal and the timing signal are sequentially output to a first display area on a display screen so that a refresh rate of the first display area is greater than a refresh rate of a second display area; wherein the first display area and the second display area are adjacent to each other on the display screen.

15. The device according to claim 14, characterized in that Also includes: The acquisition module is used to acquire first information, where the first information indicates that a refresh rate of the first display area is greater than a refresh rate of the second display area.

16. The device according to any one of claims 9 to 15, characterized in that: The processing module is further configured to generate the high-frequency clock signal through a clock module.

17. An electronic device, characterized in that: include: Processor and memory; The memory is used to store one or more computer programs, and the one or more computer programs include computer execution instructions. When the computing device is running, the processor executes the one or more computer programs stored in the memory, so that the computing device performs the method according to any one of claims 1 to 8.

18. A communication device, characterized in that: include: A processor and a communication interface, wherein the communication interface is used to receive signals from other devices outside the communication device and transmit them to the processor or send signals from the processor to other devices outside the communication device, and the processor executes code instructions through a logic circuit to implement the method as described in any one of claims 1-8.

19. A computer-readable storage medium, characterized in that: The storage medium stores a computer program or instruction. When the computer program or instruction is executed by the processor, the method according to any one of claims 1 to 8 is executed.

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