Backlight pixel driving circuit and display device

Abstract

The invention relates to a backlight pixel driving circuit and a display device. A backlight pixel driving circuit according to one embodiment of the present specification includes: an interface unit configured to receive dimming data; a storage unit configured to store the received dimming data; a controller configured to drive the backlight pixels based on dimming data; and an analog circuit block, in which the controller generates a channel enable signal synchronized with the pulse width modulation signal, and controls on-off of the analog circuit block using the channel enable signal. Correspondingly, the analog circuit block of the LED driving circuit is dynamically turned on and turned off, so that the effect of reducing the current consumption can be further improved.

Description

Technical Field

[0001] The present specification relates to a backlight pixel driving circuit, and more particularly, to a backlight pixel driving circuit that controls on-off of analog circuit blocks using a channel enable signal synchronized with a pulse width modulation (PWM) signal. Background Art

[0002] With the development of information technology, many related technologies have been developed in the field of display devices for displaying visual information as images or pictures. The display device includes a display panel including a plurality of sub-pixels, a drive circuit for supplying a signal for driving the display panel, and a power supply unit for supplying power to the display panel, and the drive circuit includes a gate drive circuit, a data drive circuit, etc., which respectively supply a gate signal, a data signal, etc. to the display panel.

[0003] Meanwhile, liquid crystal display devices, which have been widely used as flat panel display devices until recently, are non-emissive displays that cannot emit light themselves and require a light source that supplies light from the outside. A device that supplies light from the back of a liquid crystal display device is called a backlight unit (BLU).

[0004] Mini light emitting diodes (mini LEDs) are miniaturized LEDs used in backlight units to reduce the disadvantages of conventional LCDs, and since more chips with smaller sizes are used compared to LED driving circuits for conventional LCD operations, a method of reducing current consumption of an LED driving circuit for driving backlight pixels of mini LEDs is required. Mini LED backlight units (mini LED BLUs) can be classified into a pulse width modulation (PWM) type and a pulse amplitude modulation (PAM) type according to a driving method, and previously, low-power circuit design was performed for these two driving methods to reduce current consumption of analog circuit blocks. Summary of the invention

[0005] In order to improve the above-mentioned related technologies, the present specification provides a backlight pixel driving circuit. Since the analog circuit block itself is dynamically turned on and off, the backlight pixel driving circuit further improves the effect of reducing the current consumption of the analog circuit.

[0006] Embodiments of the present specification are directed to providing a backlight pixel driving circuit that controls on-off of analog circuit blocks using a channel enable signal synchronized with a pulse width modulation (PWM) signal.

[0007] Embodiments of the present specification are directed to providing a backlight pixel driving circuit that controls on-off of analog circuit blocks using a channel enable signal synchronized with a scan signal.

[0008] The technical problems of the present specification are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

[0009] A backlight pixel driving circuit according to one embodiment of the present specification includes: an interface unit configured to receive dimming data; a storage unit configured to store the received dimming data; a controller configured to drive the backlight pixels based on the dimming data; and an analog circuit block, wherein the controller generates a channel enable signal synchronized with a pulse width modulation signal and uses the channel enable signal to control the on-off of the analog circuit block.

[0010] According to another embodiment of the present specification, a backlight pixel driving circuit includes: an interface unit configured to receive dimming data; a storage unit configured to store the received dimming data; a controller configured to drive the backlight pixels based on the dimming data; and an analog circuit block, wherein the controller generates a channel enable signal synchronized with a scan signal and uses the channel enable signal to control the on-off of the analog circuit block.

[0011] Specific details of other embodiments are included in the detailed description and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above and other objects, features and advantages of the present invention will become more apparent to those skilled in the art by describing in detail exemplary embodiments of the present invention with reference to the accompanying drawings, in which:

[0013] Figure 1 is a block diagram of a display device according to one embodiment of the present specification;

[0014] Figure 2 is a diagram illustrating a pulse width modulation (PWM) driving method of a display device according to an embodiment of the present specification;

[0015] Figure 3 is a waveform diagram of a signal used in a PWM driving method according to an embodiment of the present specification;

[0016] Figure 4 is a block diagram illustrating a backlight pixel driving circuit and its operation according to a PWM driving method according to an embodiment of the present specification;

[0017] Figure 5 is a diagram illustrating a PWM signal generation process in a PWM driving method according to an embodiment of the present specification;

[0018] Figure 6is a block diagram illustrating a backlight pixel driving circuit and its operation according to a PWM driving method according to another embodiment of the present specification;

[0019] Figure 7 is a diagram illustrating a pulse amplitude modulation (PAM) driving method of a display device according to an embodiment of the present specification;

[0020] Figure 8 is a waveform diagram of a signal used in a PAM driving method according to an embodiment of the present specification;

[0021] Fig. 9 is a block diagram illustrating a backlight pixel driving circuit and its operation according to a PAM driving method according to one embodiment of the present specification;

[0022] Fig.10 is a waveform diagram illustrating signals used in a PWM driving method according to one embodiment of the present specification together with current consumption of an analog circuit block; and

[0023] Fig.11 is a waveform diagram illustrating signals used in a PAM driving method according to one embodiment of the present specification together with current consumption of an analog circuit block. DETAILED DESCRIPTION

[0024] The advantages and features of the present invention and methods for implementing the same will become apparent with reference to the embodiments described in detail below in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments to be described below and can be implemented in various different forms, and the embodiments are provided only to fully disclose the present invention and fully convey the scope of the present invention to those skilled in the art, and the present invention is limited only by the scope of the claims.

[0025] Since the shapes, sizes, proportions, angles, quantities, etc. disclosed in the accompanying drawings for describing the embodiments of the present invention are only exemplary, the present invention is not limited to the items shown in the drawings. Throughout the specification, the same reference numerals refer to the same components. In addition, when describing the present invention, when it is determined that the detailed description of the relevant known technology may unnecessarily obscure the main purpose of the present invention, the detailed description thereof will be omitted. When using "providing", "including", "having", "consisting of...", etc. mentioned in this specification, other parts may be added unless "only" is used. Unless otherwise explicitly stated, the case of representing a component in the singular includes the case of including the plural form.

[0026] In explaining the components, it should be understood that an error range is included even when there is no separate explicit description.

[0027] In the description of a positional relationship, when describing the positional relationship of two parts such as "on", "upper", "lower", etc., unless "immediately next to" or "directly" is used, one or more other parts may be located between the two parts.

[0028] In the description of a time relationship, when the time relationship is described as "after", "next", "then", "before", etc., discontinuous cases may also be included unless "immediately after" or "directly" is used.

[0029] A "unit" as used in this specification is a unit that processes at least one function or operation, and may mean, for example, a software component or a hardware component. The functions provided in a "unit" may be performed by multiple components alone, or integrated with other additional components. A "unit" of this specification may be implemented by a single circuit or multiple circuits.

[0030] The features of various embodiments of this specification may be partially or completely coupled or combined with each other, and technically, various types of interconnection and driving are possible, and the embodiments may be implemented independently of each other or may be implemented together with each other in a related relationship.

[0031] Hereinafter, a backlight pixel driving circuit according to an embodiment of the present specification will be described with reference to the accompanying drawings.

[0032] Figure 1 is a block diagram of a display device according to one embodiment of the present specification.

[0033] Reference Figure 1 The display device includes a light emitting diode (LED) array board 10, a control device board 20 and a power supply board 30.

[0034] The LED array board 10 includes an LED array 11 in which a plurality of LEDs are connected in series and an LED driving circuit (driver IC) 12 for driving backlight pixels. The plurality of LEDs constituting the LED array 11 may be mini LEDs, which are miniaturized LEDs for driving backlight pixels. The driving circuit 12 may be a device for controlling the operation of a plurality of LEDs provided in a backlight (not shown). The driving circuit 12 may control the operation of a switching circuit provided therein, and control the timing or intensity of a driving current transmitted to the LED. The driving circuit 12 may change the operation of the LED based on a control signal received from a microcontroller unit (MCU) 22 through a controller (not shown), or may change the operation of the LED based on a signal received from another driving circuit. If necessary, the driving circuit 12 may change the operation of the LED based on an algorithm and information previously stored in a storage unit (not shown).

[0035] The control device board 20 includes a power supply unit 21 that generates a voltage supplied to the drive circuit 12 and a microcontroller unit 22 for controlling the operation of the drive circuit 12. The microcontroller unit 22 may be a device that sends a control signal to the drive circuit 12 to control the drive timing, drive current, and drive voltage of the LED. The timing controller (not shown) and the microcontroller unit 22 may share some functions and may be integrally implemented for efficient data calculation when necessary, but are not limited thereto.

[0036] The power board 30 generates a VLED voltage supplied to the LED array 11. When a channel output voltage in the driving circuit 12 is detected and the channel output voltage drops to a preset voltage or lower, the VLED voltage performs the following functions: a direct current (DC)-DC control signal is applied to the microcontroller unit 22, and then the DC-DC output voltage is changed through a digital-to-analog converter (DAC) 23 in the microcontroller unit 22 to maintain the brightness of the LED at a constant level.

[0037] More specifically, the driving circuit 12 may include a digital logic operation unit, a digital-to-analog converter unit, a dimming controller, a register, and the like.

[0038] The digital logic operation unit can generate a pulse width modulation (PWM) signal or a pulse amplitude modulation (PAM) signal by calculating the digital serial clock signal SCLK received from the microcontroller unit 22. The digital logic operation unit may have a circuit implemented integrally or separately from the PWM generation unit, but is not limited thereto. The digital logic operation unit may perform a logic operation (e.g., an AND logic operation, an OR logic operation, etc.) on all or some of the serial clock signal SCLK, the local dimming signal L / D, the PWM clock signal PWMCLK, the vertical synchronization signal VSYNC, and the enable signal and output the result.

[0039] The digital-to-analog converter unit may convert the digital type signal transmitted from the digital logic operation unit into an analog type signal and transmit the analog type signal to the dimming controller.

[0040] The dimming controller can adjust the duty cycle of the PWM signal at a reference current value or less, and maintain the duty cycle of the PWM signal at a constant level at a current exceeding the reference current value. The dimming controller can define various hybrid driving conditions using multiple reference current values ​​stored in a register.

[0041] The register can be a memory-type circuit that stores information related to the operating mode of the driving circuit 12 (such as PWM drive, PAM drive, hybrid drive, etc.) or stores information related to the current channel of the driving circuit 12, the driving delay or deviation of the driving circuit 12, etc.

[0042] The driving circuit 12 may include a switch unit and one or more current channels CH electrically connected to the light emitting diode (LED) and transmitting the driving current of the light emitting diode (LED). For example, the first driving current ILED1 may be generated and controlled by the first channel CH1 alone, and the second driving current ILED2 may be generated and controlled by the second channel CH2 alone.

[0043] Meanwhile, when driving backlight pixels using mini LEDs, it is necessary to reduce the current consumption of the driving circuit 12. The mini LED backlight unit (mini LED BLU) can generally be driven by a pulse width modulation (PWM) method and / or a pulse amplitude modulation (PAM) method, and a solution is generally sought through low-power circuit design to reduce the current consumption of analog circuit blocks used for these two driving methods, but it is difficult to improve the efficiency of reducing the current consumption. Accordingly, a driving circuit capable of further reducing the current consumption for driving backlight pixels using mini LEDs will be described below.

[0044] Figure 2 is a diagram illustrating a PWM driving method of a display device according to an embodiment of the present specification.

[0045] The mini LED backlight unit (mini LED BLU) may be driven by a pulse width modulation (PWM) method and / or a pulse amplitude modulation (PAM) method, and the PWM method is a method of adjusting a time of current supplied to a pixel according to a brightness value of the pixel.

[0046] Reference Figure 2 According to an embodiment of the present specification, a backlight pixel driving circuit of a PWM driving method may include an interface unit for receiving local dimming data, a logic unit for generating a control signal based on the received dimming data, and a PWM generating unit for receiving the control signal from the logic unit and generating a PWM signal.

[0047] The logic unit may generate channel enable signals CH1_EN, CH2_EN, CH3_EN, . . . , and CHN_EN that respectively control on-off of the channels 40 of the LED array 11 , and the channel enable signals may be signals synchronized with a pulse width modulation (PWM) signal.

[0048] Figure 3 1 is a waveform diagram of signals used in a PWM driving method according to one embodiment of the present specification.

[0049] Reference Figure 3According to one embodiment of the present specification, the channel enable signal of the backlight pixel driving circuit is a signal synchronized with the PWM signal, and the on-off of the analog circuit block can be controlled by the channel enable signal. In other words, the operation of the analog circuit block can be activated (on state) or deactivated (off state) by the channel enable signal synchronized with the PWM signal.

[0050] As described above, the on-off of the analog circuit block itself can be dynamically controlled by utilizing a channel enable signal generated by a logic unit synchronized with a PWM signal, the analog circuit block including a current mirror unit that generates current and transmits the current to a channel and an amplifier unit that supplies the voltage required for the operation of the current mirror unit, and accordingly, the effect of reducing current consumption can be further improved.

[0051] A channel enable signal synchronized with a pulse width modulation (PWM) signal according to one embodiment of the present specification may be at an on level (i.e., a pulse on state) before the PWM signal, and may be at an off level (i.e., a pulse off state) after the PWM signal. Although the channel enable signal is synchronized with the PWM signal, since a stabilization time is required for the normal operation of the analog circuit, in the PWM driving method, the analog signal should be turned on before the time of generating the pulse of the PWM signal in consideration of the channel. In addition, a channel enable signal synchronized with a pulse width modulation (PWM) signal according to one embodiment of the present specification may be at an on level after the vertical synchronization signal VSYNC is at an off level.

[0052] Figure 3 It is illustrated that the channel enable signal CH_EN is at an on level at time d2 before the PWM signal, and is at an off level at time d3 after the PWM signal, and is at an on level at time d1 after the vertical synchronization signal VSYNC is at an off level. It should be noted that time d1, d2, d3 only means certain time intervals (delay times) to help understanding, and does not have a specific time value.

[0053] Figure 4 is a block diagram illustrating a backlight pixel driving circuit and its operation according to a PWM driving method according to one embodiment of the present specification.

[0054] like Figure 4 As described in, a backlight pixel driving circuit of a PWM driving method according to an embodiment of the present specification may include an interface unit for receiving local dimming data; a logic unit for generating a control signal based on the received dimming data; and a PWM generating unit, which receives the control signal from the logic unit and generates a PWM signal, and the backlight pixel driving circuit utilizes a channel enable signal generated by the logic unit and synchronized with the PWM signal to control the on-off of a logic circuit block.

[0055] More specifically, the backlight pixel driving circuit of the PWM driving method may also include: a first amplifier (AMP) unit for generating a voltage required to maintain a channel current, a second AMP unit for maintaining the same voltage at both ends of an N current mirror unit, a first switch unit and a second switch unit for PWM driving, a reference voltage generating unit for generating a reference voltage Vref, a reference current generating unit for converting the generated reference voltage into a current to generate a reference current Iref, a P current mirror unit for generating a channel current from the reference current generating unit, and an N current mirror unit for transmitting the current from the P current mirror unit to the channel.

[0056] The analog circuit block 50 of the backlight pixel driving circuit of the PWM driving method according to one embodiment of the present specification may include a current mirror unit that generates a current and transmits the current to a channel and an amplifier unit that supplies a voltage required for the operation of the current mirror unit. The current mirror unit includes a P current mirror unit for generating a channel current from a reference current generating unit and an N current mirror unit for transmitting the current from the P current mirror unit to the channel. The amplifier unit includes a first AMP unit that generates a voltage required to maintain the channel current and a second AMP unit for maintaining the same voltage at both ends of the N current mirror unit.

[0057] Meanwhile, the PWM generating unit may generate the PWM signal by a method using a PWM clock signal received from an external pin or a method using a serial clock signal SCLK used in an interface unit or a method generating the PWM signal by an internal oscillator of the driving circuit IC itself.

[0058] Figure 5 is a diagram illustrating a PWM signal generation process in a PWM driving method according to an embodiment of the present specification.

[0059] In case of the PWM driving method, local dimming data is received from a previous frame through an interface unit, the received dimming data is stored, and then a backlight pixel driving circuit is driven by applying a duty value and a delay value of a PWM signal in a next frame.

[0060] Reference Figure 5 , for a pulse width modulation (PWM) signal according to one embodiment of the present specification, local dimming data is received in a first frame 61 as a previous frame through an interface unit, and a load value and a delay value are determined in a second frame 62 as a next frame based on the received dimming data. Similarly, based on the dimming data received in the second frame 62, a load value and a delay value of the PWM signal are determined in a third frame 63 as a next frame.

[0061] In this way, a channel enable signal synchronized with a PWM signal in which a load value and a delay value are set is applied to the channel to control the on-off of the analog circuit block. In addition, in order to ensure the activation time of the analog circuit block, the channel enable signal can be set to be turned on before the PWM signal and turned off after the PWM signal. In short, the channel enable signal is synchronized with the PWM signal and is set to be at an on level before the PWM signal and at an off level after the PWM signal.

[0062] Figure 6 is a block diagram illustrating a backlight pixel driving circuit and its operation according to a PWM driving method according to another embodiment of the present specification.

[0063] because Figure 6 The backlight pixel driving circuit in the Figure 4 The driving circuit in FIG. 1 is removed from the first AMP unit generating the voltage required to maintain the channel current and the circuit of the first switch unit for PWM driving, so the circuit with the first AMP unit generating the voltage required to maintain the channel current will be briefly described. Figure 4 The description in the repeated part.

[0064] picture Figure 4 Like the driving circuit in, the backlight pixel driving circuit of the PWM driving method according to another embodiment of the present specification may include an interface unit, a logic unit and a PWM generating unit, and the on-off of the analog circuit block 50 is controlled by a channel enable signal generated by the logic unit and synchronized with the PWM signal.

[0065] More specifically, like Figure 4 Like the driving circuit in , the backlight pixel driving circuit of the PWM driving method according to another embodiment of the present specification includes a second AMP unit, a second switch unit, a reference voltage generating unit, a reference current generating unit, a P current mirror unit, and an N current mirror unit, but the difference is that the reference voltage generated from the reference voltage generating unit is directly used as a voltage for maintaining the channel current.

[0066] Therefore, the analog circuit block 50 of the backlight pixel driving circuit of the PWM driving method according to another embodiment of the present specification may include a current mirror unit that generates a current and transmits the current to a channel and an amplifier unit that supplies a voltage required for the operation of the current mirror unit, and the current mirror unit includes a P current mirror unit and an N current mirror unit. However, in the amplifier unit, the first AMP unit is omitted and only the second AMP unit is included.

[0067] Figure 7 is a diagram illustrating a PAM driving method of a display device according to an embodiment of the present specification.

[0068] The mini LED backlight unit (mini LED BLU) can be driven by a pulse width modulation (PWM) method and / or a pulse amplitude modulation (PAM) method, and the PAM method is a method of applying an analog voltage corresponding to a brightness value of the backlight pixel to a pixel, and adjusting and controlling the amplitude of a current flowing to the pixel according to the analog voltage.

[0069] Reference Figure 7 According to an embodiment of the present specification, a backlight pixel driving circuit of a PAM driving method may include: an interface unit for receiving local dimming data, a logic unit for storing the received dimming data in a register and generating a scanning signal (the scanning signal is a control signal) based on the received dimming data, and a sampling and holding unit 55 for sensing a gate voltage required to generate a channel current.

[0070] The logic unit may generate channel enable signals respectively controlling on-off of channels including one channel CH1 of the LED array 11 , and the channel enable signals may be signals synchronized with the scan signal.

[0071] Figure 8 is a waveform diagram of signals used in a PAM driving method according to one embodiment of the present specification.

[0072] Reference Figure 8 According to one embodiment of the present specification, the channel enable signal of the backlight pixel driving circuit is a signal synchronized with the scanning signal, and the on-off of the analog circuit block can be controlled by the channel enable signal. In other words, the operation of the analog circuit block can be activated (on state) or deactivated (off state) by the channel enable signal synchronized with the scanning signal.

[0073] As described above, the on-off of the analog circuit block itself can be dynamically controlled by utilizing the channel enable signal generated by the logic unit in synchronization with the scan signal, the analog circuit block including the current mirror unit that generates the current and transmits the current to the channel and the amplifier unit that supplies the voltage required for the operation of the current mirror unit, and accordingly, the effect of reducing the current consumption can be further improved. In this case, after the pulse of the vertical synchronization signal VSYNC is generated and a certain time has passed, the pulse of the scan signal synchronized with the channel enable signal is generated.

[0074] The channel enable signal synchronized with the scan signal according to one embodiment of the present specification may be at an on level (i.e., a pulse on state) before the scan signal, and may be at an off level (i.e., a pulse off state) after the scan signal. Although the channel enable signal is synchronized with the scan signal, since the normal operation of the analog circuit requires a stabilization time, the analog circuit should be turned on before performing the scan operation, and should be turned off after a certain time has passed after the sample and hold operation is completed.

[0075] Figure 8 It is illustrated that the scanning signal is at the on level at time d1 after the vertical synchronization signal VSYNC is at the off level, and the channel enable signal CH_EN1 is at the on level at time d1 before the scanning signal and at the off level at time d2 after the scanning signal (see the pulse at the back end of CH_EN1). It should be noted that time d1 and d2 only mean certain time intervals (delay time) to help understanding, and do not have specific time values. In addition, Figure 8 The falling edge of the vertical synchronization signal pulse and the rising edge of the channel enable signal pulse are exemplarily illustrated to occur simultaneously, but are not limited thereto, and the rising edge of the channel enable signal pulse may exist between the falling edge of the vertical synchronization signal pulse and the rising edge of the scan signal pulse, and refer to the following Fig.11 , which can appear simultaneously with the rising edge of the vertical synchronization signal pulse.

[0076] Fig. 9 is a block diagram illustrating a backlight pixel driving circuit and its operation according to a PAM driving method according to one embodiment of the present specification.

[0077] like Fig. 9 As shown in , a backlight pixel driving circuit of a PAM driving method according to an embodiment of the present specification may include an interface unit for receiving local dimming data, a logic unit for storing the received dimming data in a register and generating a scan signal (the scan signal is a control signal) based on the received dimming data, and a sampling and holding unit for sensing a gate voltage required to generate a channel current, and the on-off of the analog circuit block 50 is controlled by a channel enable signal generated by the logic unit and synchronized with the scan signal.

[0078] More specifically, the backlight pixel driving circuit of the PAM driving method may also include: a first AMP unit for generating a voltage required to maintain a channel current, a second AMP unit for maintaining the same voltage at both ends of an N current mirror unit, a first switch unit for maintaining a drain voltage of the N current mirror at a constant level, a second switch unit for performing a protection circuit from an LED power voltage, a reference voltage generating unit for generating a reference voltage Vref, a reference current generating unit for converting the generated reference voltage into a current to generate a reference current Iref, a P current mirror unit for generating a channel current from the reference current generating unit, and an N current mirror unit for transmitting the current from the P current mirror unit to the channel.

[0079] The analog circuit block 50 of the backlight pixel driving circuit of the PAM driving method according to one embodiment of the present specification may include: a current mirror unit that generates a current and transmits the current to a channel, and an amplifier unit that supplies a voltage required for the operation of the current mirror unit. The current mirror unit includes: a P current mirror unit for generating a channel current from a reference current generating unit, and an N current mirror unit for transmitting the current from the P current mirror unit to the channel. The amplifier unit includes: a first AMP unit that generates a voltage required to maintain the channel current, and a second AMP unit for maintaining the same voltage at both ends of the N current mirror unit.

[0080] Fig.10 is a waveform diagram illustrating signals used in a PWM driving method according to one embodiment of the present specification together with current consumption of an analog circuit block, and Fig.11 is a waveform diagram illustrating signals used in the PAM driving method together with current consumption of analog circuit blocks.

[0081] Compared with the operation of a conventional backlight pixel driving circuit in which an analog circuit block is always kept in an on state during one frame period, the reference Fig.10 and Fig.11 , the effect of directly reducing current consumption can be obtained when the analog circuit block is controlled to be in a shutdown state using a channel enable signal synchronized with a PWM signal or a scan signal.

[0082] Reference Fig.10 In the PWM driving method, for example, when the duty cycle of the PWM signal is driven at 50%, the current consumption of the analog circuit block can be reduced in response to the duty cycle of the PWM signal, i.e., 50%, and accordingly, the effect of significantly reducing the current consumption can be obtained.

[0083] Reference Fig.11 According to one embodiment of the present specification, the channel enable signal synchronized with the scan signal may be at an on level when the vertical synchronization signal is at an on level, and may be at an off level after the scan signal is at an off level. Figure 8 As mentioned in, the rising edge of the channel enable signal CHn_EN pulse can occur simultaneously with the rising edge 70a of the vertical synchronization signal VSYNC pulse. In addition, Fig.11 The falling edge of the channel enable signal pulse is illustrated to occur simultaneously with the falling edge 70b of the scan signal pulse to help intuitively understand signal synchronization, but as mentioned above, since the analog circuit should be turned off after a certain time has passed after the sampling and holding operation is completed, the channel enable signal should be turned off after a certain time has passed after the scan signal is at the off level (70b).

[0084] For reference, in Fig.10 and Fig.11 In the embodiment, SDI (Serial Data Input) is data supplied from an external circuit, and based on this, the duty ratio of the PWM signal can be determined, or the level of the channel current can be determined.

[0085] As seen so far, the backlight pixel driving circuit according to one embodiment of the present specification achieves the following advantages: since according to the backlight driving method, a channel enable signal synchronized with a pulse width modulation signal is used in a PWM driving method and a channel enable signal synchronized with a scanning signal is used in a PAM driving method to dynamically control the on-off of the analog circuit block itself in the driving circuit, the effect of reducing current consumption can be further enhanced.

[0086] According to an embodiment of the present specification, since a channel enable signal synchronized with a pulse width modulation (PWM) signal or a scan signal is used to dynamically turn on and off the analog circuit block of the light emitting diode (LED) driving circuit itself, the effect of reducing current consumption can be further improved.

[0087] According to the embodiments of the present specification, since the channel enable signal is turned on before the synchronized PWM signal or the scan signal and is turned off after the synchronized PWM signal or the scan signal, the activation time or the deactivation time of the analog circuit block can be ensured.

[0088] According to the embodiments of the present specification, since the channel enable signal is synchronized with the PWM signal and turned on in advance with a certain time difference and turned off later, on-off control of analog circuit blocks related to control of a PWM signal duty value and the like is possible.

[0089] The effects of the present specification are not limited to the above-mentioned effects, and other effects that are not mentioned will be clearly understood by those skilled in the art from the above description.

[0090] Although the embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications can be made without departing from the technical spirit of the present invention. Therefore, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but are intended to describe the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, the above-mentioned embodiments should be understood to be illustrative and non-restrictive in all aspects. The scope of the present invention should be interpreted by the claims, and should be interpreted as all technical concepts within the equivalent scope are included in the scope of the present invention.

[0091] CROSS-REFERENCE TO RELATED APPLICATIONS

[0092] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0005815, filed on January 15, 2024, which claims priority to and the benefit of Korean Patent Application No. 10-2023-0090069, filed on July 11, 2023, the entire contents of each of which are incorporated herein by reference in their entirety.

Claims

1. A backlight pixel driving circuit, the backlight pixel driving circuit comprising: An interface circuit configured to receive dimming data; a storage circuit, the storage circuit being configured to store the received dimming data; a control circuit configured to drive backlight pixels based on the dimming data; as well as Analog circuit blocks, The control circuit generates a channel enable signal synchronized with the pulse width modulation signal, and uses the channel enable signal to control the on-off of the analog circuit block.

2. The backlight pixel driving circuit according to claim 1, wherein: The channel enable signal becomes an on level earlier than the pulse width modulation signal, and becomes an off level later than the pulse width modulation signal.

3. The backlight pixel driving circuit according to claim 1, wherein: The channel enable signal changes to an on level after the vertical synchronization signal changes to an off level.

4. The backlight pixel driving circuit according to claim 1, wherein: Based on the dimming data received and stored in the previous frame, a load value and a delay value of the pulse width modulation signal are determined in the next frame.

5. The backlight pixel driving circuit according to claim 1, wherein: The analog circuit block comprises: a current mirror circuit configured to generate a current and transmit the current to a channel; and An amplifier circuit is configured to supply a voltage required to operate the current mirror circuit.

6. The backlight pixel driving circuit according to claim 1, wherein: When the channel enable signal is at an on level, the channel supplying the driving current to the backlight pixel and the analog circuit block are turned on; and When the channel enable signal is at a shutdown level, the channel and the analog circuit block are shut down.

7. A backlight pixel driving circuit, the backlight pixel driving circuit comprising: An interface circuit configured to receive dimming data; a storage circuit, the storage circuit being configured to store the received dimming data; a control circuit configured to drive backlight pixels based on the dimming data; as well as Analog circuit blocks, The control circuit generates a channel enable signal synchronized with the scan signal, and uses the channel enable signal to control the on-off of the analog circuit block.

8. The backlight pixel driving circuit according to claim 7, wherein: The scanning signal changes to an on level after the vertical sync signal changes to an off level.

9. The backlight pixel driving circuit according to claim 8, wherein: The channel enable signal becomes an on level earlier than the scan signal, and becomes an off level later than the scan signal.

10. The backlight pixel driving circuit according to claim 8, wherein: The channel enable signal becomes an on level when the vertical synchronization signal becomes an on level, and becomes an off level after the scan signal becomes an off level.

11. The backlight pixel driving circuit according to claim 7, wherein: The analog circuit block comprises: a current mirror circuit configured to generate a current and transmit the current to a channel; and An amplifier circuit is configured to supply a voltage required to operate the current mirror circuit.

12. The backlight pixel driving circuit according to claim 7, wherein: When the channel enable signal is at an on level, the channel supplying the driving current to the backlight pixel and the analog circuit block are turned on; and When the channel enable signal is at a shutdown level, the channel and the analog circuit block are shut down.

13. A display device, comprising: a backlight pixel array, the backlight pixel array comprising backlight pixels that receive a drive current through a channel and emit light; a backlight pixel driving circuit, the backlight pixel driving circuit comprising an analog circuit block configured to control the driving current supplied from the channel and configured to generate a channel enable signal, the channel enable signal enabling the channel when at an on level; as well as a power supply circuit configured to supply power for driving the backlight pixel driving circuit, The backlight pixel driving circuit synchronizes the channel enable signal with a pulse width modulation signal, and controls the power supplied from the power supply circuit to drive the analog circuit block through the channel enable signal, and the pulse width modulation signal causes the backlight pixel to emit light with a brightness corresponding to the duty cycle.

14. The display device according to claim 13, wherein: The channel enable signal becomes an on level earlier than the pulse width modulation signal, and becomes an off level later than the pulse width modulation signal.

15. The display device according to claim 13, wherein: The channel enable signal changes to an on level after the vertical synchronization signal changes to an off level.

16. The display device according to claim 13, wherein: Based on the dimming data received and stored by the backlight pixel driving circuit in the previous frame, a load value and a delay value of the pulse width modulation signal are determined in the next frame.

17. The display device according to claim 13, wherein: The analog circuit block comprises: a current mirror circuit configured to generate a current and transmit the current to the channel; and An amplifier circuit is configured to supply a voltage required to operate the current mirror circuit.

18. The display device according to claim 13, wherein: When the channel enable signal is at an on level, the analog circuit block is turned on; and When the channel enable signal is at a shutdown level, the analog circuit block is shut down.

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