Capacitor discharge

By using discharge controllers and multiple transistors for controlled breakdown in the inverter system, the problems of fast and safe discharge efficiency and high cost of DC link capacitors in electric vehicles are solved, and more efficient and compact discharge is achieved plan.

CN119315814APending Publication Date: 2025-01-14ANALOG DEVICES INT UNLTD CO
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Patent Information

Application Number
CN202410773073.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-02-16
Filing Date
2024-06-17
Publication Date
2025-01-14

AI Technical Summary

Technical Problem

The prior art has problems of low efficiency and high cost in fast and safe discharge of DC link capacitors in electric vehicle traction inverters, especially relying on large-sized discharge resistors, which increase system complexity and weight.

Method used

By introducing a discharge controller into the inverter system, multiple transistors are used for controlled breakdown, energy discharge of DC link capacitors is achieved, and dependence on traditional discharge resistors is avoided, and the existing inverter components are used for Discharge operation.

Benefits of technology

The system structure is simplified, the cost and volume are reduced, while the energy efficiency and response speed are improved, meeting the requirements of automotive safety regulations.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to capacitor discharge. An inverter system is provided that includes a DC input for connection to a DC power source. The inverter system includes a plurality of transistors that are controllable to convert a DC voltage to an AC voltage. The inverter system also includes a DC link capacitor coupled to a DC input of the inverter system; and a discharge controller configured to cause energy discharge from the DC link capacitor when the DC power supply is disconnected from the inverter system. The discharge controller is configured to cause discharge of energy from the DC link capacitor by turning on at least the first transistor and the second transistor to cause a controlled breakdown of the inverter system. At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operating region.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of and priority to U.S. Provisional Patent Application No. 63 / 526,313, filed on July 11, 2023, the contents of each of which are incorporated herein by reference in their entirety. Technical Field

[0003] The disclosure herein relates to the discharge of energy from a DC link capacitor. More specifically, the disclosure herein relates to releasing energy from a DC link capacitor coupled to a DC input of an inverter when a DC power source is disconnected from the DC input. Background Art

[0004] The recent surge in electric vehicle (EV) adoption and the push for electrification of various industrial machinery has resulted in several key safety requirements. Among these requirements, safety regulations imposed on automotive systems require that capacitors in EV traction inverters, especially DC link capacitors, be discharged quickly immediately after the ignition switch is turned off.

[0005] The safe discharge requirements apply to all electric vehicles allowed to operate on public roads, such as hybrid electric vehicles (HEV), plug-in electric vehicles (PEV), battery electric vehicles (BEV) and full electric vehicles (FEV).

[0006] Traditional approaches to addressing this safe discharge requirement revolve around the use of high power, bulky and expensive discharge resistors. These resistors are driven by power transistors to modulate and dissipate the energy stored in the DC link capacitor to meet the safe discharge requirement.

[0007] While some traditional approaches are effective to a certain extent, they are not without their challenges. The main problem lies in the need for additional components such as discharge resistors. These components not only increase the overall cost of the system, but also add bulk to the setup. Furthermore, the reliance on these components to quickly discharge the DC link capacitors presents inefficiencies in the design. Therefore, there is a pressing need for an improved solution that is more streamlined, efficient, and cost-effective while adhering to the safety standards set by automotive safety regulations. Summary of the invention

[0008] According to a first aspect of the present disclosure, a system is provided that includes an inverter, the inverter including a DC input for connecting to a DC power source. The inverter includes a plurality of transistors that are controllable to convert a DC voltage into an AC voltage. The system also includes a DC link capacitor coupled to the DC input of the inverter and a discharge controller that is configured to cause energy discharge from the DC link capacitor when the DC power source is disconnected from the DC output of the traction inverter. The discharge controller is configured to cause energy discharge from the DC link capacitor by turning on at least a first transistor and a second transistor of the inverter, thereby causing a controlled breakdown of the inverter. At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operating region.

[0009] Optionally, the discharge controller further comprises a first servo loop for controlling a first voltage across the first transistor.

[0010] Optionally, the first servo loop further comprises: a first voltage measurement circuit configured to measure a first voltage across the first transistor, and wherein the first servo loop is configured to set a first control signal for the first transistor based on the measured first voltage and a first reference track voltage so that the first voltage across the first transistor follows the reference track voltage.

[0011] Optionally, the first reference track voltage is set based on a target discharge profile of the DC link capacitor.

[0012] Optionally, the first reference track voltage is further based on a first temperature measurement associated with the first transistor.

[0013] Optionally, the system further comprises: a second servo loop for controlling a second voltage across the second transistor.

[0014] Optionally, the second servo loop further comprises: a second voltage measurement circuit configured to measure a second voltage across the second transistor, and wherein the second servo loop is configured to set a second control signal for the second transistor based on the measured second voltage and a second reference track voltage so that the second voltage across the second transistor follows the reference track voltage.

[0015] Optionally, the second reference track voltage is set based on the target discharge profile of the DC link capacitor.

[0016] Optionally, the second reference track voltage is further based on a second temperature measurement associated with the second transistor.

[0017] Optionally, the discharge controller is configured to set a second control signal for the second transistor to fully turn on the second transistor.

[0018] Optionally, the discharge controller is further configured to cause a discharge of energy from the DC link capacitor by turning on at least a third transistor and a fourth transistor of the inverter, thereby causing a controlled breakdown of a first inverter branch formed by the first transistor and the second transistor and a second inverter branch formed by the third transistor and the fourth transistor, wherein at least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operating region.

[0019] Optionally, the discharge controller is configured to discharge energy from the DC link capacitor to a predetermined capacitor voltage within a predetermined time period.

[0020] Optionally, each of the first transistor and the second transistor is any one of a silicon MOSFET, a SiC MOSFET, a GaN MOSFET or an IGBT.

[0021] Optionally, the first servo loop is a first digital servo loop.

[0022] Optionally, the first reference track voltage is stored in a look-up table in memory.

[0023] Optionally, the first servo loop is a first analog servo loop.

[0024] Optionally, the system further comprises a first analog reference generator configured to generate a first reference track voltage as an analog voltage signal.

[0025] According to a second aspect of the present disclosure, an electric vehicle including an inverter system is provided. The inverter system includes: an inverter including a DC input for connecting to a DC power source, wherein the inverter includes a plurality of transistors that are controllable to convert a DC voltage into an AC voltage; a DC link capacitor coupled to the DC input of the inverter; and a discharge controller configured to cause energy discharge from the DC link capacitor when the DC power source is disconnected from the DC input of the inverter. The discharge controller is configured to cause energy discharge from the DC link capacitor by turning on at least a first transistor and a second transistor of the inverter, thereby causing a controlled breakdown of the inverter. At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operating region.

[0026] According to a third aspect of the present disclosure, there is provided a method for discharging energy from a DC link capacitor in an inverter system, the inverter system comprising an inverter having a plurality of transistors, the plurality of transistors being controllable to convert a DC voltage into an AC voltage, the method comprising discharging the DC link capacitor by: turning on at least a first transistor and a second transistor of the inverter to cause a controlled breakdown, thereby causing energy discharge of the DC link capacitor, and controlling at least one of the first transistor and the second transistor to operate in a linear operating region.

[0027] Optionally, the method further comprises controlling a first voltage across the first transistor using a first servo loop circuit.

[0028] Optionally, the method further comprises measuring a first voltage across the first transistor and setting a first control signal for the first transistor based on the measured first voltage and a first reference track voltage such that the first voltage across the first transistor follows the reference track voltage.

[0029] Optionally, the first reference track voltage is set based on a target discharge profile of the DC link capacitor.

[0030] Optionally, the first reference track voltage is further based on a first temperature measurement associated with the first transistor.

[0031] Optionally, the method further comprises controlling a second voltage across the second transistor using a second servo loop.

[0032] Optionally, the method further comprises: measuring a second voltage across the second transistor, and setting a second control signal for the second transistor based on the measured second voltage and a second reference track voltage so that the second voltage across the second transistor follows the reference track voltage.

[0033] Optionally, the second reference track voltage is set based on the target discharge profile of the DC link capacitor.

[0034] Optionally, the second reference track voltage is further based on a second temperature measurement associated with the second transistor.

[0035] Optionally, the method further comprises setting a second control signal for the second transistor to fully turn on the second transistor.

[0036] Optionally, the method comprises: discharging energy from a DC link capacitor by turning on at least a third transistor and a fourth transistor of the traction inverter to cause a controlled breakdown of a first PWM inverter branch formed by the first transistor and the second transistor and a second PWM inverter branch formed by the third transistor and the fourth transistor, wherein at least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operating region.

[0037] Optionally, the method further comprises adjusting a corresponding control signal to each of the at least first and second transistors so that a corresponding voltage across the at least first and second transistors follows a corresponding reference track voltage.

[0038] Optionally, the method further comprises setting a corresponding reference track voltage based on a target discharge profile of the DC link capacitor.

[0039] Optionally, the method further comprises setting a corresponding reference track voltage for each of the at least first transistor and the second transistor based on the corresponding temperatures of the at least first transistor and the second transistor.

[0040] Optionally, the method further comprises setting a corresponding reference track voltage of each of at least the first transistor and the second transistor to the same voltage.

[0041] Optionally, the method further comprises setting a corresponding reference track voltage of one of the at least first transistor or the second transistor to zero.

[0042] Optionally, the method further comprises setting the reference track voltage based on an analog signal received at the inverter system.

[0043] Optionally, the method further comprises setting the reference track voltage based on a lookup table stored in a memory of a gate driver of the inverter system.

[0044] Optionally, the method further comprises discharging the DC link capacitor simultaneously through a plurality of PWM inverter branches. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0046] Figure 1 A conventional DC link discharge system is shown;

[0047] Figure 2 A DC link discharge system according to one aspect of the present invention is shown;

[0048] Figure 3 Shows Figure 2Some example details of the discharge controller 220;

[0049] Figure 4 Shown in use Figure 2 The DC link capacitor voltage during active discharge of the inverter system;

[0050] Figure 5 Shown in use Figure 2 A first example of a DC link capacitor voltage of an inverter system and a measured voltage of both power transistors 122 and 123 during active discharge;

[0051] Figure 6 Shown in use Figure 2 A first example of a DC link capacitor voltage of an inverter system; a gate drive voltage of both power transistors 122 and 123 during active discharge;

[0052] Figure 7 Shown in use Figure 2 A reference track voltage used by controllers 233 and 243 to control the gate voltages of power transistors 122 and 123 during a first example active discharge of a DC link capacitor voltage of an inverter system;

[0053] Figure 8 Shown in use Figure 2 A first example of a DC link capacitor voltage of an inverter system of FIG. 1 and a controlled breakdown current of power transistors 122 and 123 during active discharge;

[0054] Fig. 9 Shown in use Figure 2 A first example of the DC link capacitor voltage of the inverter system and the power in the power transistors 122 and 123 during active discharge;

[0055] Fig.10 Shown in use Figure 2 Energy losses in power transistors 122 and 123 during a first example active discharge of a DC link capacitor voltage of an inverter system;

[0056] Fig.11 shows the use of balanced power consumption Figure 2 A second example of an inverter system of a DC link capacitor voltage during active discharge;

[0057] Fig.12 shows the use of balanced power consumption Figure 2 A second example of a DC link capacitor voltage of an inverter system of the measured voltages of both power transistors 122 and 123 during active discharge;

[0058] Fig.13shows the use of balanced power consumption Figure 2 A second example of a DC link capacitor voltage of the inverter system; and gate drive voltages of both power transistors 122 and 123 during active discharge.

[0059] Fig.14 shows the use of balanced power consumption Figure 2 A second example of a DC link capacitor voltage of an inverter system during active discharge of a reference track voltage used by controllers 233 and 243 to control the gate voltage of both power transistors 122 and 123;

[0060] Fig.15 shows that the use of an arbitrary discharge profile Figure 2 A second example of a DC link capacitor voltage of an inverter system and a controlled breakdown current of both power transistors 122 and 123 during active discharge;

[0061] Fig.16 shows that the use of an arbitrary discharge profile Figure 2 A second example of the DC link capacitor voltage of the inverter system and the power in the power transistors 122 and 123 during active discharge;

[0062] Fig.17 shows that the use of an arbitrary discharge profile Figure 2 Energy losses in power transistors 122 and 123 during a second example active discharge of a DC link capacitor voltage of an inverter system;

[0063] Fig.18 shows the use of a discharge profile with an arbitrary Figure 2 A third example of an inverter system of a DC link capacitor voltage during active discharge;

[0064] Fig.19 shows the use of unbalanced power dissipation Figure 2 A third example of a DC link capacitor voltage of an inverter system of the measured voltages of both power transistors 122 and 123 during active discharge;

[0065] Fig. 20 shows the use of unbalanced power dissipation Figure 2 A third example of a DC link capacitor voltage of the inverter system; and gate drive voltages of both power transistors 122 and 123 during active discharge.

[0066] Fig.21 shows the use of unbalanced power dissipation Figure 2A third example of a DC link capacitor voltage of an inverter system during active discharge of a reference track voltage used by controllers 233 and 243 to control the gate voltage of both power transistors 122 and 123;

[0067] Fig. 22 shows the use of unbalanced power dissipation Figure 2 A third example of a DC link capacitor voltage of an inverter system of FIG. 1 and a controlled breakdown current of both power transistors 122 and 123 during active discharge;

[0068] Fig.23 shows the use of unbalanced power dissipation Figure 2 A third example of the DC link capacitor voltage of the inverter system of FIG. 1 shows the power in the power transistors 122 and 123 during active discharge;

[0069] Fig.24 shows the use of unbalanced power dissipation Figure 2 Energy losses in power transistors 122 and 123 during active discharge of a third example of a DC link capacitor voltage of an inverter system;

[0070] Fig.25 shows a detailed view of a digital discharge controller according to one aspect of the present disclosure;

[0071] Fig.26 Shown is a Fig.25 Use of voltage divider for digital discharge controller;

[0072] Fig. 27 shows a detailed view of a discharge controller according to another aspect of the present disclosure;

[0073] Fig.28 shows a detailed view of an analog discharge controller according to another aspect of the present disclosure;

[0074] Fig.29 Shown include Figure 2 DC link discharge system for vehicles;

[0075] Fig.30 A flow chart illustrating a method for discharging energy from a DC link capacitor in an inverter system according to another aspect of the present disclosure is shown;

[0076] Fig.31 Shows Figure 3 An alternative discharge controller to the discharge controller. DETAILED DESCRIPTION

[0077] Automotive safety regulations typically require that the DC link capacitors and other capacitors in an electric vehicle (EV) traction inverter be discharged to a specified potential, such as 60 V, within a specified time after the ignition switch is turned off, such as within two to five seconds. The urgency and accuracy required for this operation stems from the inherent safety risks posed by stored energy, which can be quantified as:

[0078]

[0079] For example, a 1mF capacitor charged at 850V has an energy equivalent to 312.05J, which can be dangerous if not managed properly.

[0080] In order to comply with these requirements, power transistor controlled discharge resistors have been commonly used in the past. In these arrangements, the power transistor controls the current flow from the capacitor to the discharge resistor so that when required, current can flow from the capacitor to the resistor so that the energy stored by the capacitor is dissipated by the discharge resistor. In these arrangements, several control techniques are employed, such as:

[0081] Single-pulse discharge. Here, when the capacitor needs to be discharged (for example, immediately after the ignition switch is turned off), the power transistor remains constantly turned on, causing the discharge resistor to dissipate a lot of energy, especially in the initial stage of discharge.

[0082] Constant power discharge. This method uses a discharge pulse width modulation (PWM) controller. The controller applies a pulse sequence to the gate of the power transistor, causing the current to discharge in pulses into the discharge resistor. The sequence can be designed to maintain a consistent rate of power dissipation through the discharge resistor.

[0083] Arbitrary power profile discharge. In this method, a discharge PWM controller is used to deliver a pulse sequence to the gate of the power transistor, causing the current to discharge into the discharge resistor in the form of pulses. The sequence can be calibrated so that the power dissipated by the discharge resistor follows a predetermined profile.

[0084] Figure 1 A conventional DC link discharge system 100 is shown. The conventional DC link discharge system includes a high voltage (HV) battery 110, which in this example provides 400V to 900V DC to a vehicle traction inverter 120. The HV battery 110 is connected to the vehicle traction inverter 120 via a battery switch 130. The vehicle traction inverter 120 converts DC power from the HV battery 110 to AC power for a motor 140 of an electric vehicle (EV).

[0085] In this example, the vehicle traction inverter 120 is a three-phase inverter that outputs a three-phase AC voltage. Therefore, it includes three branches of power transistors, wherein the first branch includes power transistors 121 and 122 connected in series, which can be controlled to output a first-phase AC voltage 123, the second branch includes power transistors 124 and 125 connected in series, which can be controlled to output a second-phase AC voltage 126, and the third branch includes power transistors 127 and 128 connected in parallel, which can be controlled to output a third-phase AC voltage 129. The power transistors 122, 123, 125, 126, 128, and 129 are mainly used as switches, such as by controlling the state of the power transistors (e.g., using pulse width modulation PWM to turn them on and off), so that the direct current from the HV battery 110 can be quickly converted into the three-phase alternating current of the three-phase motor 140. It should be understood that in alternative implementations, the inverter 120 may be configured to generate any number of AC phases, such as one, two, four, etc., and include a corresponding number of branches of power transistors. Figure 1 Not shown, but the system 100 may also include a controller configured to control the power transistors to achieve a desired AC signal at the AC output of the inverter 120 .

[0086] The vehicle traction inverter 120 also includes a DC link capacitor 150 that is used to smooth and stabilize the DC voltage provided to the vehicle traction inverter 120. The DC link capacitor 150 provides a means for absorbing voltage spikes and providing supplemental power during transient conditions, thereby ensuring consistent and efficient conversion of DC to AC for driving the motor 140.

[0087] The vehicle traction inverter 120 also includes a conventional discharge system 160 for discharging the energy stored in the DC link capacitor 150 when the ignition of the EV is turned off. The conventional discharge system 160 includes a discharge resistor 163 and a discharge PWM controller 165. The discharge resistor 163 is used to facilitate the dissipation of the energy stored in the DC link capacitor 150. The discharge PWM controller 165 regulates the discharge process by controlling the operation of the power transistor to control the power dissipated by the discharge resistor 163.

[0088] However, as outlined in the background section above, conventional DC link discharge systems require the incorporation of additional components such as discharge resistors and PWM discharge controllers. This adds weight and volume to the system, making it less compact and potentially impacting vehicle efficiency. Additionally, multiple components, each with their own failure modes, can reduce the reliability of the overall system. For example, a resistor can degrade over time, affecting its resistance value, which can change the discharge time, or can fail entirely. Additionally, conventional discharge systems have separate discharge resistors and PWM controllers, introducing additional complexity in system design, installation, and troubleshooting.

[0089] The present disclosure provides a novel inverter system that addresses automotive safety regulations related to the discharge of DC link capacitors and solves many of the shortcomings of conventional systems. The novel inverter system is equipped with a discharge controller that activates controlled breakdown of the inverter by turning on at least one of the first and second transistors when the DC power source is disconnected. Notably, at least one of these transistors operates in a linear operating region managed by the discharge controller.

[0090] The solution disclosed herein can eliminate the need for additional components such as bulky discharge resistors, which can not only reduce the overall weight and size of the system, but also reduce the associated cost of the system. In addition, by utilizing components already present in the traction inverter for discharge operations, the system can increase energy efficiency and improve response time. Therefore, the design proposed in the present disclosure can provide a streamlined, efficient and cost-effective solution that appropriately meets automotive safety regulations while providing excellent performance.

[0091] Figure 2 An inverter system 200 (e.g., a PWM inverter system) according to one aspect of the present invention is shown. The system 200 includes a discharge controller 210 for controlling a first transistor 121 and a second transistor 122 when it is desired that the capacitor 105 be discharged. The first transistor 121 and the second transistor 122 are part of a switching circuit 220 (also referred to as a switching network 220) and together form an inverter branch of the inverter system 200, and during normal inverter operation, they can be controlled by the controller ( Figure 2 The switching circuit 220 may include any number of transistors forming any number of inverter branches to generate any number of AC voltage phases (e.g., three inverter branches formed by six transistors to generate AC voltages in the same manner as the AC voltage 123). Figure 1 The three-phase AC voltage is generated in the same way as shown in FIG. Figure 2 Only one inverter branch is shown.

[0092] As previously referenced Figure 1 As explained, the DC link capacitor 150 is coupled to the DC input of the inverter system 200. The discharge controller 210 is configured to control the transistors 121 and 122 to cause the energy from the DC link capacitor 150 to be discharged when the DC power source (in this example, the battery 110) is disconnected from the DC input of the inverter system 200 (e.g., by opening the switch 130). The discharge controller 210 enables the first transistor 121 and the second transistor 122 to be turned on, thereby causing a controlled breakdown of the inverter system 200 (e.g., by short-circuiting the inverter branch including the first transistor 121 and the second transistor 122, so that the charge from the capacitor 150 can be discharged through the first transistor 121 and the second transistor 122). The discharge controller 210 controls the first transistor 121 and the second transistor 122 so that at least one of them is turned on and operates in their linear operation region, which is a region where the transistors exhibit resistance to a channel current (e.g., a drain current or a collector current) and behave like a linear resistor. In this region, the channel current is proportional or substantially proportional to the applied control signal (e.g., gate voltage or base current). This region is sometimes also referred to as the ohmic operating region. In one example, the first transistor 121 can be fully turned on (e.g., to operate in the saturation region), and the second transistor 122 can be turned on to operate in the linear region. In this case, the second transistor 122 can dissipate all or substantially all of the energy discharged by the capacitor 150. In another example, the second transistor 122 can be fully turned on (e.g., to operate in the saturation region), and the first transistor 121 can be turned on to operate in the linear region. In this case, the first transistor 121 can dissipate all or substantially all of the energy discharged by the capacitor 150. In another example, both the first transistor 121 and the second transistor 122 can be turned on to operate in the linear region, in which case they can each consume a portion of the energy discharged by the capacitor 150.

[0093] The discharge controller 210 may be aware that the DC power source has been disconnected from the DC input of the inverter system 200 in any suitable manner. For example, it may be configured to receive a discharge request from another unit or controller, such as a unit or controller that is monitoring or controlling the state of the switch 130, or a unit or controller that is controlling or monitoring any other component or measurement that indicates whether the DC power source is connected to the inverter system 200. For simplicity, in Figure 2 Such a discharge request signal is not shown.

[0094] Thus, it can be seen that by implementing the discharge controller 210, a controlled discharge of the DC link capacitor 150 can be performed when desired without requiring a controller such as Figure 1 The discharge system 160 is shown with an additional discharge resistor and transistor.

[0095] Figure 3 Some example details of the discharge controller 210 are shown. In this example, the discharge controller 210 includes a first gate driver 330 for controlling the first transistor 121 and a second gate driver 340 for controlling the second transistor 122.

[0096] In this example, the first gate driver 330 is adapted to be coupled to a traction inverter microcontroller unit MCU 310, which may perform some functions related to controlling the discharge of the DC link capacitor 150 via the isolated gate driver 330. In this example, as explained in more detail later, the traction inverter MCU 310 may provide the first gate driver 330 with an indication of the first desired voltage trajectory 302. 1 , and when the capacitor needs to be discharged (e.g., when the vehicle ignition is turned off), a discharge request signal 305 is issued to the first and second gate drivers 330 and 340. However, in alternative solutions, the data indicating the first desired voltage trajectory may be provided to the first gate driver 330 in any other suitable manner, and / or the capacitor discharge may be initiated in any other suitable manner (e.g., by a discharge request signal issued from any suitable device / unit on the primary and / or second side of the isolation barrier).

[0097] In this example, the first gate driver 330 is separated by an isolation barrier, isolating its primary side (on the left) from its secondary side (on the right). This is because the traction inverter MCU 310 is a relatively low voltage digital unit in this example, and the majority of the inverter system 200 is relatively high voltage, so that domain isolation is required for safety reasons. However, it should be understood that the isolation barrier is optional, depending on the relative voltage levels of each domain. The first gate driver 330 includes a controller 333 1 and storing the received data 302 1 Voltage trace memory 335 1 , such as a memory cell. In an alternative embodiment, the voltage trace memory 335 1 The controller 333 may not be part of the first gate driver 330, but may be located elsewhere, such as a single memory accessible to both the first gate driver and the second gate driver 330 and 340. In one example, it may form a controller 333. 1 (and controller 333 2) and a portion of a general memory or memory unit accessible to one or more other unrelated units / modules. Controller 333 1 Receive a first voltage measurement 361 indicating a voltage across a channel terminal of the first transistor 121 (eg, a drain-source voltage or a collector-emitter voltage of the first transistor 121), and compare the first voltage measurement 361 with the first voltage trace memory 335. 1 Based on the comparison, it outputs a gate drive signal to the first transistor 121 to control the first transistor 121. In particular, the controller 333 1 The gate drive signal may be adjusted, for example increased or decreased as needed to reduce any difference between the reference voltage and the voltage across the channel terminal of the first transistor 121 (ideally reducing the difference to zero). In this manner, the discharge controller 210 effectively includes a first servo loop for controlling the voltage across the first transistor 121. How the first voltage measurement 361 is made and the controller 333 is explained later. 1 In a symmetrical manner, the discharge controller 220 also includes a second gate driver 340 for controlling the second power transistor 122. The second gate driver 340 is similar to the first gate driver 340 in that it includes a voltage trace memory 335 configured to perform the same function. 2 and controller 333 2 However, it is not receiving an indication of the first desired voltage trajectory 302 1 Instead, data indicating a second desired voltage trajectory 302 is received and stored. 2 As explained later, the first desired voltage trajectory and the second desired voltage trajectory may be the same or different. In addition, the controller 333 2 The memory 335 is configured to receive a second voltage measurement 362 indicating a voltage across a channel terminal of the second transistor 122 (e.g., a drain-source voltage or a collector-emitter voltage of the first transistor 122) and compare the second voltage measurement 362 with the second voltage trace memory 335. 2 Based on the comparison, it outputs a gate drive signal to the second transistor 122 to control the second transistor 122. In particular, the controller 333 2 The gate drive signal can be adjusted, for example increased or decreased as needed to reduce any difference between the reference voltage and the voltage across the channel terminal of the first transistor 122 (ideally reducing the difference to zero). In this way, the discharge controller 210 effectively includes a second servo loop for controlling the voltage across the first transistor 122. How the second voltage measurement 362 is made and the controller 333 is explained later 2 Details on how to do it.

[0098] In some examples, the first gate driver 330 and the second gate driver 340 can be combined into a single isolated gate driver unit. This modular structure can then manage the operation of both power transistors 121 and 122.

[0099] The first and second desired reference track voltages may be set based on a target discharge profile of the DC link capacitor 150. Optionally, the first and / or second desired reference track voltages may be based on temperature measurements associated with the power transistors.

[0100] Controller 333 1 and 333 2 This can be implemented in various configurations, either in the analog domain using analog circuits, or in the digital domain using ADCs (Analog to Digital Converters) and DACs (Digital to Analog Converters). Further details will be explained later.

[0101] The power transistors 121 and 122 (and any other power transistors in the inventor 220) can be of various types, such as silicon MOSFETs, SiC MOSFETs, GaN MOSFETs, JFETs, IGBTs, BJTs, or any other type of transistor device can be used. Based on the doping characteristics, they can be p-type or n-type. Although transistors are generally referred to as FETs in this article, it should be understood that they can also be BJTs, so the terms gate, source, and drain used in this article also include base, emitter, and collector. The exact properties of these transistors, in particular their drain-to-source (or collector-to-emitter for BJTs and IGBTs) voltage (Vds or Vce), can be controlled by their gate drivers to achieve a controlled discharge process.

[0102] As explained in more detail later, the voltage trace memory 335 1 and 335 2 can be sent to its corresponding controller 333 1 and 333 2 A reference voltage based on the first and second desired voltage trajectories is provided, which reference voltage may be time-varying, for example, from a voltage trace stored in the voltage trace memory 335. 1 and 335 2 Data in 302 1 and 302 2 The first and second desired voltage trajectories can be designed based on various factors, such as safety standards, system efficiency or component life. The first and second desired voltage trajectories can be stored or configured on the primary side or the secondary side of the gate driver, thereby ensuring system flexibility. However, it is preferred that at least the reference trajectory voltage (such as Figure 3to improve functional safety in the event of a power loss on the primary side.

[0103] Figures 4 to 24 Shows when the operation Figure 2 and Figure 3 Example waveforms for an inverter system.

[0104] In each of these examples, the DC voltage provided to the inverter system 200 (ie, the voltage provided by the battery 110) is Vbus=850V, and the capacitance of the DC link capacitor 150 is C=1000uF. However, it should be understood that this is merely a non-limiting example and other values ​​may be used.

[0105] Figure 4-10 Example operation during active discharge of the DC link capacitor 150 is shown, wherein the first and second desired voltage trajectories are identical to one another, and wherein it is desired to substantially linearly reduce the DC link capacitor voltage from 850 V to 0 V over a two second period.

[0106] Figure 4 The DC link capacitor voltage during active discharge is shown. In this example, there is balanced power dissipation through both the first and second transistors 121 and 122, and the discharge is substantially linear from 850V to 0V in two seconds. Therefore, in this example, from the moment the discharge request signal 305 is issued to the discharge controller 210, the capacitor 150 has been discharged to 0V after two seconds.

[0107] Figure 5 Measured voltages of both power transistors 121 and 122 (i.e., the drain-source voltage of each of transistors 121 and 122) are shown during active discharge of the DC link capacitor 150. There is balanced power dissipation through both power transistors 121 and 122, and the voltage change of both is substantially linear from 425V (i.e., 50% of the DC link capacitor voltage) to 0V in two seconds. Since the voltage change across each transistor 121 and 122 is the same, their discharge profiles are Figure 5 overlap, so only one is visible. It should be understood that Figure 5 The profile shown in should be similar to the first and second desired voltage trajectories because the controller 333 1 and 333 2 is configured to control transistors 121 and 122 during the two second discharge period so that measured voltages 361 and 362 substantially match the voltage trace memory 335. 1 and 335 2 Received reference.

[0108] Figure 6shows the controller 333 during the two second discharge period 1 and 333 2 The gate drive voltage output to the power transistors 121 and 122 to control the active discharge of the DC link capacitor 150. Since there is balanced power dissipation through both power transistors 121 and 122, and the circuit in this simulation is ideal / perfect, the gate voltages of transistors 121 and 122 are the same, so Figure 6 Overlap. Controller 333 1 Based on the first measured voltage 361 and the voltage trace memory 335 1 The gate voltage of the first transistor 121 is periodically / intermittently changed during the entire discharge period by comparing the latest reference voltage of the first transistor 121 with the target V at that time of the first transistor 121 during the discharge period based on the first expected voltage trajectory. DS Voltage. Controller 333 2 The voltage trace memory 335 is operated in the same manner based on the second voltage measurement 362 and the 2 The received reference voltage is used to control the gate voltage of the second transistor 122 .

[0109] Figure 7 The active discharge of the DC link capacitor 150 by the controller 333 is shown. 1 and 333 2 First and second desired normalized voltage traces for controlling the gate voltage of the first transistor 121 and the second transistor 122. In this example, the two desired traces are identical and therefore overlap. It can be seen that the y-axis is the normalized voltage trace and therefore has values ​​between 0 and 1. Note that Figure 5 and Figure 7 This indicates that the controller 333 1 and 333 2 The transistors 121 and 122 are well controlled so that the measured voltage and the reference track voltage correspond substantially. Any small difference between the two is mostly caused by small time lags / delays due to signal delays and processing speeds.

[0110] Figure 8 The controlled breakdown current of the power transistors 121 and 122 during active discharge of the DC link capacitor 150 is shown.

[0111] Fig. 9 The power of each of transistors 122 and 123 during active discharge of DC link capacitor 150 is shown. Figure 4, there is a balanced power dissipation through power transistors 121 and 122, so that they overlap in the figure. It can be seen that a peak in power is reached early in the discharge process. Techniques can be used to reduce the size of this peak and distribute the power more evenly during the discharge process, as described later.

[0112] Fig.10 1 shows the accumulated energy loss of each of the first and second transistors 121 and 122 during the active discharge of the DC link capacitor 150. Figure 3 , there is balanced power dissipation through transistors 121 and 122, so that they overlap in the figure.

[0113] Figure 11-17 1 shows different example operations during active discharge of the DC link capacitor 150, where the first and second desired voltage trajectories are identical to one another, and where it is desired to non-linearly reduce the DC link capacitor voltage from 850 V to 0 V over a two second period. Figure 4-10 Very similar, except that the first and second desired voltage trajectories are not linear (e.g. Fig.14 shown).

[0114] Fig.11 The DC link capacitor voltage during active discharge is shown. In this example, there is balanced power dissipation through both the first and second transistors 121 and 122, and the discharge from 850V to 0V in the two second discharge cycles is non-linear. Therefore, in this example, from the moment the discharge request signal 305 is issued to the discharge controller 210, the capacitor 150 has been discharged to 0V after two seconds.

[0115] Fig.12 The measured voltage of both power transistors 121 and 122 (i.e., the drain-source voltage of each of transistors 121 and 122) during active discharge of the DC link capacitor 150 is shown. There is balanced power dissipation through both power transistors 121 and 122, and the voltage change of both is non-linear from 425V (i.e., 50% of the DC link capacitor voltage) to 0V in two seconds. Since the voltage change across each transistor 121 and 122 is the same, their discharge profiles are Fig.12 overlap, so only one is visible. It should be understood that Fig.12 The profile shown in should be similar to the first and second desired voltage trajectories because the controller 333 1 and 333 2 is configured to control transistors 121 and 122 during the two second discharge period so that measured voltages 361 and 362 substantially match the voltage trace memory 335. 1 and 335 2 Received reference.

[0116] Fig.13 shows the controller 333 during the two second discharge period 1 and 333 2 The gate drive voltage output to the power transistors 121 and 122 to control the active discharge of the DC link capacitor 150. Since there is balanced power dissipation through both power transistors 121 and 122, and the circuit in this simulation is ideal / perfect, the gate voltages of transistors 121 and 122 are the same, so Fig.13 Overlap. Controller 333 1 Based on the first measured voltage 361 and the voltage trace memory 335 1 The gate voltage of the first transistor 121 is periodically / intermittently changed during the entire discharge period by comparing the latest reference voltage of the first transistor 121 with the target V at that time of the first transistor 121 during the discharge period based on the first expected voltage trajectory. DS Voltage. Controller 333 2 The voltage trace memory 335 is operated in the same manner based on the second voltage measurement 362 and the 2 The received reference voltage is used to control the gate voltage of the second transistor 122 .

[0117] Fig.14 The active discharge of the DC link capacitor 150 by the controller 333 is shown. 1 and 333 2 The first and second desired normalized voltage trajectories used to control the gate voltages of the first transistor 121 and the second transistor 122. In this example, the two desired trajectories are identical and therefore overlap. Note that Figure 5 and Figure 7 This indicates that the controller 333 1 and 333 2 The transistors 121 and 122 are well controlled so that the measured voltage and the reference track voltage correspond substantially. Any small difference between the two is mostly caused by small time lags / delays due to signal delays and processing speeds.

[0118] Fig.15 The controlled breakdown current of the power transistors 121 and 122 during active discharge of the DC link capacitor 150 is shown.

[0119] Fig.16 The power of each of transistors 122 and 123 during active discharge of DC link capacitor 150 is shown. There is balanced power dissipation through power transistors 121 and 122, so that they overlap in the figure. It can be seen that Figure 8In comparison, the peak power is reached later during the discharge process and the peak power is lower. Therefore, it can be easily seen that by adopting different desired voltage trajectories for transistors 121, 122, the peak power dissipation can be reduced and the power can be distributed more evenly during the discharge process. This can help reduce the wear on transistors 121, 122, thereby extending their useful life.

[0120] Fig.17 The accumulated energy loss of each of the first and second transistors 121 and 122 is shown during active discharge of the DC link capacitor 150. There is a balanced power dissipation through the transistors 121 and 122 such that they overlap in the figure.

[0121] Figure 18-24 Another example operation during active discharge of the DC link capacitor 150 is shown. In this example, the first and second desired voltage trajectories are different from each other, each having a different arbitrary example trajectory. In addition to the first and second desired voltage trajectories being different, these figures are similar to Figure 4-10 Very similar to 11-17.

[0122] Fig.18 The DC link capacitor voltage during active discharge is shown. In this example, there is unbalanced power dissipation in both the first and second transistors 121 and 122, and the discharge from 850V to 0V in the two second discharge cycles is non-linear. Therefore, in this example, from the moment the discharge request signal 305 is issued to the discharge controller 210, the capacitor 150 has been discharged to 0V after two seconds.

[0123] Fig.19 Measured voltages of both power transistors 121 and 122 (i.e., the drain-source voltage of each of transistors 121 and 122) are shown during active discharge of the DC link capacitor 150. It can be seen that during the two second discharge cycles, the voltage profiles of the two transistors 121 and 122 are different. The voltage profile of the first transistor 121 is non-linear and similar to Fig.12 It should be understood that Fig.12 The profile shown in should be similar to the first and second desired voltage trajectories because the controller 333 1 and 333 2 is configured to control transistors 121 and 122 during the two second discharge period so that the measured voltages 361 and 362 are substantially consistent with the voltage trace memory 335. 1 and 335 2 The received reference matches.

[0124] Fig. 20 shows the controller 333 during the two second discharge period1 and 333 2 The gate drive voltage output to the power transistors 121 and 122 to control the active discharge of the DC link capacitor 150. It can be seen that the gate voltage of each transistor 121 and 122 varies over time due to the different desired voltage trajectories. Controller 333 1 Based on the first measured voltage 361 and the voltage trace memory 335 1 The gate voltage of the first transistor 121 is periodically / intermittently changed during the entire discharge period by comparing the latest reference voltage of the first transistor 121 with the target V at that time of the first transistor 121 during the discharge period based on the first expected voltage trajectory. DS Voltage. Controller 333 2 The voltage trace memory 335 is operated in the same manner based on the second voltage measurement 362 and the 2 The received reference voltage is used to control the gate voltage of the second transistor 122 .

[0125] Fig.21 The active discharge of the DC link capacitor 150 by the controller 333 is shown. 1 and 333 2 The first and second desired voltage trajectories are used to control the gate voltages of the first transistor 121 and the second transistor 122. In this example, the two desired trajectories are different. The first voltage trajectory is nonlinear and similar to Fig.14 The second voltage trace is substantially linear and similar to Fig. 9 Note that Fig.19 and 21 This indicates that the controller 333 1 and 333 2 The transistors 121 and 122 are well controlled so that the measured voltage and the reference track voltage correspond substantially. Any small difference between the two is mostly caused by small time lags / delays due to signal delays and processing speeds.

[0126] Fig. 22 The controlled breakdown current of the power transistors 121 and 122 during active discharge of the DC link capacitor 150 is shown.

[0127] Fig.23 The power of each of transistors 121 and 122 during active discharge of DC link capacitor 150 is shown. There is an unbalanced power dissipation through both power transistors 121 and 122, so Fig.23The profiles of the two are different. Therefore, it can be easily seen that by adopting different desired voltage trajectories for transistors 121, 122, the peak power dissipation of each transistor and the power expansion of each transistor can be controlled to be different. This enhances the flexibility of the system, for example, enabling more power / high peak power to be dissipated in a transistor with a more robust design or with better cooling, thereby extending the useful life of the transistor.

[0128] Fig.24 The cumulative energy loss of each of the first and second transistors 121 and 122 is shown during active discharge of the DC link capacitor 150. There is an unbalanced power dissipation through the transistors 121 and 122, so the energy they each dissipate is different.

[0129] It should be understood that any desired trajectory can be used for the first and second desired voltage trajectories, and they can be the same or different from each other. In some examples, the trajectories can be arranged so that the total energy dissipated in each transistor is substantially the same or balanced, but the power dissipation is different or unbalanced, so that the peak power level and / or timing of the transistors are different.

[0130] Fig.25 FIG. 3 shows a detailed view of an example of a first gate driver 330 according to another aspect of the present invention. Fig.25 Only a single transistor 121 of the switch circuit 220 is shown. Nevertheless, any one or more of the remaining transistors of the switch circuit 220, such as the second transistor 122, can be controlled by another gate driver (e.g., a second gate driver 340), which can be configured in the same manner as the first gate driver 330. The first gate driver 330 in this example includes an analog-to-digital converter (ADC) 2510 for measuring the voltage across the transistor 121 (e.g., the drain-source voltage or the collector-emitter voltage of the transistor 121). Fig.26 Describe further details related to this measurement.

[0131] In this example, the desired voltage trajectory may be stored in the voltage trajectory memory 335 1 The lookup table may include a plurality of values, each value corresponding to a desired voltage at a particular time point during the discharge process (e.g., a voltage value every 0.01 second, 0.05 second, or 0.1 second in a desired 2 second, 3 second, 4 second, or 5 second discharge cycle). The data to populate the lookup table may be provided as data 302 1Received from the traction inverter 310 described previously, or received by any other suitable means. In this example, the first gate driver 330 includes a time reference 2540, which can be a clock that generates a periodic clock signal received by the digital discharge controller 2550, although in alternatives, the first gate driver 330 may not include the time reference 2540, but instead may receive a clock signal from elsewhere (e.g., from a common clock signal used for other circuits / systems). Using the signal from the time reference 2540, the digital discharge controller 2550 can determine at any time how far along it is in the discharge cycle, and then store it in the voltage trajectory memory 335. 1 Find out what voltage to expect.

[0132] The output from the ADC 2510 is a digital measurement of the voltage across the channel terminal of the transistor 121 and is input into the digital discharge controller 2550. After receiving the discharge request signal 305, the digital discharge controller 2550 can initiate capacitor discharge by outputting a digital value to a digital-to-analog converter (DAC) 2560 to set the initial gate-source voltage at the transistor 121 (e.g., the initial digital value can be maintained by the digital discharge controller 2550, or can be stored elsewhere and looked up by the digital discharge controller 2550 when the release request signal 305 is received). Optionally, the first gate driver 330 can also include a switch for coupling the output of the DAC 2560 in series to the gate of the transistor 121, and the digital discharge controller 2550 can be configured to remain in an open state during normal inverter system 200 operation and then closed when the discharge request signal 305 is received so that the first gate driver 330 can take over control of the transistor 121 for capacitor discharge. After the capacitor discharge is initiated, the digital discharge controller 2550 may periodically or intermittently compare the digital measurement received from the ADC 2510 with the voltage trace memory 335. 1 Based on the comparison, the digital discharge controller 2550 can set the digital value output to the converter 2560, which simulates the output driving the gate of the transistor 121. For example, if the comparison shows that the transistor voltage is currently higher than the desired voltage trajectory, the digital discharge controller 2550 can change the digital output value to drive the transistor 121 with a larger gate-source voltage to turn the transistor on more (or vice versa). In this example, the gate of the transistor 121 is turned on without using a gate driver stage (for simplicity, in Fig.252500), the gate driver stage is used for PWM control during normal inverter system 200 operation. During capacitor discharge, the gate driver stage can be stopped for PWM control, for example, by receiving a discharge request signal 305 by the PWM controller controlling the gate driver stage, or receiving a signal indicating that capacitor discharge is occurring from the digital discharge controller 2550, and then stopping controlling the gate driver stage.

[0133] Fig.26 The use of a voltage divider including resistors R1 and R2 is shown for measuring the voltage across transistor 121. In this example, the signal converted by ADC 2510 is less than the voltage across transistor 121, but proportional to the voltage across transistor 121. This is particularly useful in situations where the voltage across transistor 121 is relatively high (which is typically the case when the DC voltage source is a high voltage battery (e.g. Figure 1 110) because it enables the use of a relatively low voltage ADC 2510. Also in this example, ADC 2510 is a differential input ADC, although other ADC configurations may be used. ADC 2510 may be any type of ADC, such as sigma-delta, flash, SAR, etc. In this example, one end of the voltage divider and one input of ADC 2510 are maintained at a local ground voltage, although they may be maintained at any other suitable reference voltage. It should be understood that this is merely one example way of measuring the voltage across a transistor, and other configurations may be employed, such as not requiring a voltage divider and simply directly digitally converting the voltage across the drain and source terminals of transistor 121.

[0134] Fig. 27 A detailed view of the first gate driver 330 according to another aspect of the present invention is shown. Fig.25 , 2627 denotes the same components and will not be described further. In this example, the digital output of the digital discharge controller 2550 is received by the PWM controller 2760, which is a module / unit configured to control the inverter system 200 during normal DC to AC operation. In this example, the digital discharge controller 2550 can accurately set the output digital value as previously described, and upon receiving the value from the digital discharge controller 2550, the PWM controller 2760 can be configured to set the gate drive voltage based on the received digital value. The PWM controller 2760 can output an analog value (e.g., an analog conversion of the received digital value, or a value derived from the received numerical value in some other way) to the gate driver stage 2770, which then drives the transistor 121. The gate driver stage 2770 can, for example, include one or more transistors that are configured to control a higher voltage and / or stronger current drive signal at the transistor gate based on the analog value received from the PWM controller 2760. In this example, during the capacitor discharge process, the PWM controller 2760 can set the desired gate-supply voltage by applying a PWM signal with an average value equal to the desired gate-source voltage. Typically, the output of the gate driver stage 2770 and the gate of the transistor 121 will be connected by a series resistor (for simplicity, Fig. 27 121 ), the series resistor can form a low-pass RC filter with the intrinsic capacitance of the transistor 121, thereby suppressing the high-frequency components of the PWM signal from the PWM controller 2760. In a specific example, a segmented gate driver stage 2770 can be used, where some but not all (e.g., one or several) segments can be used during the capacitor discharge. This is equivalent to using a weak gate driver stage with a relatively high internal resistance, thereby increasing the total resistance of the low-pass RC filter. Therefore, the pole of the low-pass RC filter should be moved to a lower frequency to become more useful for this operating mode. During normal PWM operation, more (e.g., all) segments of the gate driver stage 2770 can be used, which should maximize the drive strength during this operating mode.

[0135] Fig.28 A detailed view of an example simulation implementation of the first gate driver 330 is shown according to another aspect of the present disclosure. Fig.25 , 26 The same reference numerals in 27 and 28 denote the same components and will not be described further. The first gate driver 330 in this example includes an analog controller 333 1, the analog controller includes an operational amplifier 2850 and resistors R and Rf, which are arranged together to form an amplifier. The amplifier outputs a signal that depends on the difference between the first voltage measurement 361 (e.g., the measurement of the drain-source voltage of transistor 121) and the analog reference voltage or current output by the voltage trajectory circuit / module 2810. The output of the amplifier drives the gate of transistor 121, so that during the discharge of the capacitor, any change in the difference between the first voltage measurement 361 and the reference signal output by the voltage trajectory module / circuit 2810 should result in a change in the signal output by the amplifier, thereby completing the servo loop to control transistor 121 and ensure that the transistor voltage profile during discharge tracks the desired voltage trajectory. The voltage trajectory circuit / module 2801 can be configured in any suitable manner so that it outputs an analog reference signal that changes in a suitable manner during the discharge of the capacitor. For example, it may include one or more capacitors with appropriate time constants that are controlled to discharge in such a way upon receiving the discharge request signal 305 that, over the entire discharge cycle, the difference between the generated analog signal and the first measured voltage 361 results in a gate drive signal that controls the transistor 121 to achieve a voltage across the transistor 121 that tracks the desired voltage trajectory. Although in this example, the analog controller 333 1 A negative feedback operational amplifier is included, but it should be understood that other suitable types of amplifier circuits may be used, or any other type of circuit that sets the gate voltage based on the first measured voltage 361 and the analog reference voltage signal. In addition, optionally, the output of the amplifier and the gate of the transistor 121 may be coupled via a series switch that may be controlled by the discharge request signal 305 or any other suitable signal. In this case, the switch may remain open during PWM operation of the normal inverter system 200 and only closed when the capacitor needs to be discharged.

[0136] Although in Fig.28 310, so that the desired trajectory can be adjusted / changed over time (e.g., in the field). In this case, in addition to generating an output to the analog controller 333 1 In addition to analog circuitry for providing a reference signal, voltage trace 2810 may optionally include digital circuitry to receive digital control signals and make necessary adjustments to the analog circuitry (e.g., switching capacitors on and / or off to change a time constant of the circuit).

[0137] Fig.29 Shown includes the above Figure 2 The DC link discharge system 200 is for a vehicle 2900, such as an electric vehicle.

[0138] It will be easily understood by those skilled in the art that various changes or modifications may be made to the above-mentioned aspects of the present disclosure without departing from the scope of the present disclosure.

[0139] The first gate driver 330 and the second gate driver 340 may be configured identically, for example, Figure 25 to Figure 28 , or configured differently. For example, the first gate driver 330 can be configured in any of the above-described ways, and the second gate driver 340 is configured to fully turn on the second transistor 122 only during the capacitor discharge, so that most / all power is dissipated in the first transistor 121. Similarly, the second gate driver 340 can be configured in any of the above-described ways, and the first gate driver 330 is configured to fully turn on the first transistor 121 only during the capacitor discharge, so that most / all power is dissipated in the second transistor 122.

[0140] In the above example, the traction inverter MCU 310 (for example) can configure both the isolated gate drivers 330 and 340 to ensure the same or varying reference voltage tracks, which allows equal power dissipation between the first transistor 121 and the second transistor 122, or different power dissipation between the first transistor and the second transistor 121 and 122. For example, different power dissipation levels can be set based on the measured temperature of the transistors 121 and 122 to minimize thermal stress. In this example, the MCU 310 (for example) can periodically / intermittently receive measurements indicating the temperature of the first transistor 121 and / or the second transistor 122, and use the data signal 302 to 1 and 302 2 to update the desired voltage trajectory (eg, dissipating more power in a lower temperature transistor). Additionally or alternatively, the controller 333 1 and 333 2 The gates of the transistors may be configured to modify their control of the transistors based on received measurements indicative of the temperature of the transistors. For example, they may each receive measurements indicative of the temperature of two transistors and modify their gate control accordingly.

[0141] In the above example, the transistors of a single inverter branch of the inverter system 200 are controlled to perform capacitor discharge. In an alternative, multiple inverter branches (e.g., two or more) in the inverter system 200 may be used. For example, each transistor in the inverter system 200 may have a corresponding gate driver configured as described above, and the system may be configured to alternate between different branches for each capacitor discharge, so that during the life of the system, each transistor in the inverter system 200 is used for capacitor discharge in approximately the same amount, thereby achieving uniform wear. Alternatively, during a single capacitor discharge, the system may be configured to jump between two or more inverter branches of the inverter system 200, so that different transistors are used at different times during the capacitor discharge process. In this case, the first gate driver 330 can be switchably coupled to two or more "top" transistors in the inverter system 200, and the second gate driver 340 can be switchably coupled to two or more "bottom" transistors in the inverter system 200, and the switch is controlled (by the gate driver or any other control entity) so that the transistor coupled by the gate driver changes during the capacitor discharge period. Alternatively, each transistor of the inverter system 200 can have a respective gate driver, which is configured to coordinate with each other, and the gate driver controls the capacitor discharge at any given time. In another alternative, the transistors in two or more inverter branches of the inverter system 200 can be controlled simultaneously by the corresponding gate drivers to consume capacitor energy in parallel. Another benefit of having the ability to discharge the capacitor through two or more inverter branches is discharge redundancy. If the discharge should be limited or prevented by one of the inverter branches (for example, due to a component failure or failure), the discharge through one or more other inverter branches may still affect the discharge. This can further improve the functional safety of the system.

[0142] In addition, if a safety MCU is integrated (e.g. on the high-voltage side of the system), it can also trigger active discharge. In this example, the capacitor discharge can be initiated by one or more different units / devices, such as the low-voltage traction inverter MCU310 and / or the high-voltage safety MCU.

[0143] During the capacitor discharge process, traditional overcurrent protection methods (such as DESAT) may be disabled.

[0144] The term "coupled" includes both a direct electrical connection between components and an indirect electrical connection between components (eg, an electrical connection between two components through one or more intermediate components).

[0145] Fig.30A flow chart illustrating a method for discharging energy from a DC link capacitor in an inverter system according to another aspect of the present disclosure is shown. The inverter system includes a plurality of transistors that are controllable to convert a DC voltage to an AC voltage. The method includes discharging the DC link capacitor by: turning on at least a first transistor and a second transistor of the plurality of transistors to cause a controlled breakdown at step 3010, thereby causing energy discharge from the DC link capacitor, wherein at least one of the first transistor and the second transistor is controlled to operate in a linear operating region; measuring a first voltage across the first transistor at step 3020, and setting a first control signal for the first transistor based on the measured first voltage and a first reference track voltage at step 3030. The above method may be performed by the DC link discharge system 200.

[0146] Fig.31 Shows something like Figure 3 An alternative configuration of the discharge controller 210. In this version, Figure 3 The first and second transistors 121 and 122 in the embodiment are respectively replaced by split-emitter IGBTs (Insulated Gate Bipolar Transistors) 3121 and 3122. These split-emitter IGBTs are controlled by a first gate driver 330 and a second gate driver 340, similar to the example described in detail above.

[0147] Fig.31 The main change in the discharge controller 210 is the use of current measurement to control the IGBTs 3121 and 3122 . Figure 3 The first voltage measurement 361 of is replaced by a first current measurement 3361, which is a measurement of the current from one of the two emitters of the IGBT 3121. In this example, the first current measurement 3361 is made using a shunt resistor R3 to convert the current into a voltage, which can then be used as previously described. In this example, the second current measurement 3362 is made using a shunt resistor R4 to convert the current into a voltage, which can then be used as previously described. These current measurements provide feedback to the corresponding gate drivers, thereby affecting the control of the IGBT during the discharge of the capacitor.

[0148] also, Figure 3 Voltage trace memory 335 1 and 335 2 By the first current trace memory 3335 1 and the second current trace memory 3335 2 These memories now primarily hold data related to the desired current trajectory.

[0149] In general, Fig.31 The example shown in Figure 3 The function of the discharge controller shown in FIG. 1 has the advantage of implementing an adaptation of the current-based servo loop control during the capacitor discharge period. Fig.31 represents one example way in which transistor current measurements may be made to implement current-based servo loop control, but any other suitable technique may alternatively be used.

[0150] The above embodiments are to be understood as illustrative examples. Further embodiments are contemplated. It should be understood that any feature described with respect to any one embodiment may be used alone or in combination with other features described, or in combination with one or more features of any other embodiment or any combination of any other embodiments. In addition, equivalents and modifications not described above may also be employed without departing from the scope of the invention, the scope of the invention being defined in the appended claims.

[0151] Aspects of the Disclosure

[0152] Non-limiting aspects of the disclosure are listed in the following numbered clauses.

[0153] 1. An inverter system for connecting to a DC power source, the inverter system comprising:

[0154] a plurality of transistors controllable to convert a DC voltage into an AC voltage;

[0155] DC link capacitors; and

[0156] a discharge controller configured to cause a discharge of energy from the DC link capacitor when the DC power source is disconnected from the inverter system,

[0157] wherein the discharge controller is configured to cause a discharge of energy from the DC link capacitor by turning on at least a first transistor and a second transistor of the plurality of transistors to cause a controlled breakdown, and

[0158] At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operation region.

[0159] 2. The inverter system of clause 1, wherein the discharge controller further comprises a first servo loop for controlling the first transistor.

[0160] 3. The inverter system of clause 2, wherein the first servo loop further comprises:

[0161] a first voltage measurement circuit configured to measure a first voltage across the first transistor, and

[0162] Wherein the first servo loop is configured to set a first control signal for the first transistor based on the measured first voltage and a first reference track voltage so that a first voltage across the first transistor follows the reference track voltage.

[0163] 4. The inverter system of clause 3, wherein the first reference track voltage is set based on a target discharge profile of the DC link capacitor.

[0164] 5. The inverter system of clause 4, wherein the first reference track voltage is further based on a first temperature measurement associated with the first transistor.

[0165] 6. The inverter system of any one of clauses 2 to 5, further comprising:

[0166] A second servo loop is used to control the second transistor.

[0167] 7. The inverter system of clause 6, wherein the second servo loop further comprises:

[0168] a second voltage measurement circuit configured to measure a second voltage across the second transistor, and

[0169] Wherein the second servo loop is configured to set a second control signal for the second transistor based on the measured second voltage and a second reference track voltage so that the second voltage across the second transistor follows the reference track voltage.

[0170] 8. The inverter system of clause 7, wherein the second reference track voltage is set based on the target discharge profile of the DC link capacitor.

[0171] 9. The inverter system of clause 8, wherein the second reference track voltage is further based on a second temperature measurement associated with the second transistor.

[0172] 10. The inverter system of clause 2, wherein the first servo loop further comprises:

[0173] a first current measurement circuit configured to measure a first breakdown current through the first transistor, and

[0174] Wherein the first servo loop is configured to set a first control signal for the first transistor based on the measured first breakdown current and a first reference track current so that the first breakdown current through the first transistor follows the first reference track current.

[0175] 11. The inverter system of clause 10, further comprising:

[0176] a second servo loop for controlling the second transistor, and

[0177] The second servo loop comprises:

[0178] a second current measurement circuit configured to measure a second breakdown current through the second transistor, and

[0179] Wherein the second servo loop is configured to set a second control signal for the second transistor based on the measured second breakdown current and the second reference track current so that the second breakdown current through the second transistor follows the second reference track current.

[0180] 12. The inverter system of any one of clauses 1 to 5 and 10, wherein the discharge controller is configured to set a second control signal for the second transistor to fully turn on the second transistor.

[0181] 13. The inverter system of any preceding clause, wherein the discharge controller is further configured to cause a discharge of energy from the DC link capacitor by turning on at least a third transistor and a fourth transistor of the plurality of switches, thereby causing a controlled breakdown of a first inverter branch formed by the first transistor and the second transistor and a second inverter branch formed by the third transistor and the fourth transistor,

[0182] At least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operation region.

[0183] 14. The inverter system of any preceding clause, wherein the discharge controller is configured to discharge energy from the DC link capacitor to a predetermined capacitor voltage within a predetermined time period.

[0184] 15. The inverter system of any preceding clause, wherein each of the first transistor and the second transistor is any one of a silicon MOSFET, a SiC MOSFET, a GaN MOSFET, or an IGBT.

[0185] 16. An electric vehicle comprising an inverter system, wherein the inverter system comprises:

[0186] a plurality of transistors controllable to convert a DC voltage into an AC voltage;

[0187] DC link capacitors; and

[0188] a discharge controller configured to cause a discharge of energy from the DC link capacitor when the DC power source is disconnected from the inverter system,

[0189] wherein the discharge controller is configured to cause a discharge of energy from the DC link capacitor by turning on at least a first transistor and a second transistor of the plurality of switches to cause a controlled breakdown, and

[0190] At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operation region.

[0191] 17. A method for discharging energy from a DC link capacitor in an inverter system, the inverter system comprising a plurality of transistors controllable to convert a DC voltage to an AC voltage, the method comprising discharging the DC link capacitor by:

[0192] At least first and second transistors of the plurality of switches are turned on to cause controlled breakdown, thereby causing energy discharge from the DC link capacitor, at least one of the first and second transistors being controlled to operate in a linear operating region.

[0193] 18. The method of clause 17, further comprising:

[0194] measuring a first voltage across the first transistor, and

[0195] A first control signal for the first transistor is set based on the measured first voltage and the first reference track voltage such that a first voltage across the first transistor follows the reference track voltage.

[0196] 19. The method of clause 18, wherein the first reference track voltage is set based on a target discharge profile of the DC link capacitor.

[0197] 20. The method of clause 19, wherein the first reference track voltage is further based on a first temperature measurement associated with the first transistor.

[0198] 21. The method of any one of clauses 17 to 20, further comprising:

[0199] measuring a second voltage across the second transistor, and

[0200] A second control signal for the second transistor is set based on the measured second voltage and a second reference track voltage such that the second voltage across the second transistor follows the reference track voltage.

[0201] 22. The method of clause 21, wherein the second reference track voltage is set based on the target discharge profile of the DC link capacitor.

[0202] 23. The method of clause 22, wherein the second reference track voltage is further based on a second temperature measurement associated with the second transistor.

[0203] 24. The method of clause 17, further comprising:

[0204] measuring a first breakdown current through the first transistor, and

[0205] A first control signal for the first transistor is set based on the measured first breakdown current and a first reference track current so that the first breakdown current of the first transistor follows the first reference track current.

[0206] 25. The method of clause 24, further comprising:

[0207] measuring a second breakdown current through the second transistor, and

[0208] A second control signal for the second transistor is set based on the measured second breakdown current and the second reference track current so that the second breakdown current of the second transistor follows the second reference track current.

[0209] 26. The method of any of clauses 17 to 20 and 24, wherein the method further comprises setting a second control signal for the second transistor to fully turn on the second transistor.

[0210] 27. The method of any one of clauses 17 to 26, wherein the method comprises:

[0211] releasing energy from the DC link capacitor by turning on at least a third transistor and a fourth transistor of the plurality of switches to cause a controlled breakdown of a first inverter leg formed by the first transistor and the second transistor and a second inverter leg formed by the third transistor and the fourth transistor,

[0212] At least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operation region.

[0213] 28. A discharge controller for controlling the discharge of energy from a DC link capacitor in an inverter system, the inverter system comprising a plurality of transistors controllable to convert a DC voltage to an AC voltage, the discharge controller being configured to:

[0214] At least first and second transistors of the plurality of switches are turned on to cause controlled breakdown, thereby causing energy discharge from the DC link capacitor, at least one of the first and second transistors being controlled to operate in a linear operating region.

[0215] 29. The discharge controller of clause 28, further configured to:

[0216] measuring a first voltage across the first transistor, and

[0217] A first control signal for a first transistor is set based on the measured first voltage and a first reference track voltage such that a first voltage across the first transistor follows the reference track voltage.

[0218] 30. The discharge controller of clause 29, wherein the first reference trajectory voltage is set based on a target discharge profile of the DC link capacitor.

[0219] 31. The discharge controller of clause 30, wherein the first reference track voltage is further based on a first temperature measurement associated with the first transistor.

[0220] 32. The discharge controller of any one of clauses 28 to 31, further configured to: measure a second voltage across the second transistor, and

[0221] A second control signal for the second transistor is set based on the measured second voltage and a second reference track voltage such that the second voltage across the second transistor follows the reference track voltage.

[0222] 33. The discharge controller of clause 32, wherein the second reference trajectory voltage is set based on the target discharge profile of the DC link capacitor.

[0223] 34. The discharge controller of clause 33, wherein the second reference track voltage is further based on a second temperature measurement associated with the second transistor.

[0224] 35. The emission controller of clause 28, further configured to:

[0225] measuring a first breakdown current through the first transistor, and

[0226] A first control signal for the first transistor is set based on the measured first breakdown current and a first reference trajectory current such that the first breakdown current of the first transistor follows the first reference trajectory current.

[0227] 36. The emission controller of clause 35, further configured to:

[0228] measuring a second breakdown current through the second transistor, and

[0229] A second control signal for the second transistor is set based on the measured second breakdown current and the second reference trajectory current so that the second breakdown current of the second transistor follows the second reference trajectory current.

[0230] 37. The discharge controller of any one of clauses 28 to 31 and 35, further configured to:

[0231] A second control signal is set for the second transistor to fully turn on the second transistor.

[0232] 38. The discharge controller of any one of clauses 28 to 37, further configured to:

[0233] by turning on at least a third transistor and a fourth transistor of the plurality of switches to cause a controlled breakdown of a first inverter branch formed by the first transistor and the second transistor and a second inverter branch formed by the third transistor and the fourth transistor,

[0234] At least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operation region.

Claims

1. An inverter system for connecting to a DC power source, the inverter system comprising: a plurality of transistors controllable to convert a DC voltage into an AC voltage; DC link capacitor; and a discharge controller configured to cause a discharge of energy from the DC link capacitor when the DC power source is disconnected from the inverter system, wherein the discharge controller is configured to cause a discharge of energy from the DC link capacitor by turning on at least a first transistor and a second transistor of the plurality of transistors to cause a controlled breakdown, and At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operation region.

2. The inverter system according to claim 1, wherein: The discharge controller also includes a first servo loop for controlling the first transistor.

3. The inverter system according to claim 2, wherein: The first servo loop further comprises: a first voltage measurement circuit configured to measure a first voltage across the first transistor, and Wherein the first servo loop is configured to set a first control signal for the first transistor based on the measured first voltage and a first reference track voltage so that a first voltage across the first transistor follows the reference track voltage.

4. The inverter system according to claim 3, wherein: The first reference track voltage is set based on a target discharge profile of the DC link capacitor.

5. The inverter system according to claim 4, wherein: The first reference track voltage is also based on a first temperature measurement associated with the first transistor.

6. The inverter system according to claim 2, further comprising: A second servo loop is used to control the second transistor.

7. The inverter system according to claim 6, wherein: The second servo loop further includes: a second voltage measurement circuit configured to measure a second voltage across the second transistor, and Wherein the second servo loop is configured to set a second control signal for the second transistor based on the measured second voltage and a second reference track voltage so that the second voltage across the second transistor follows the reference track voltage.

8. The inverter system according to claim 7, wherein: The second reference track voltage is set based on the target discharge profile of the DC link capacitor.

9. The inverter system according to claim 8, wherein: The second reference track voltage is also based on a second temperature measurement associated with the second transistor.

10. The inverter system according to claim 2, wherein: The first servo loop further comprises: a first current measurement circuit configured to measure a first breakdown current through the first transistor, and Wherein the first servo loop is configured to set a first control signal for the first transistor based on the measured first breakdown current and a first reference track current so that the first breakdown current through the first transistor follows the first reference track current.

11. The inverter system according to claim 10, further comprising: a second servo loop for controlling the second transistor, and The second servo loop comprises: a second current measurement circuit configured to measure a second breakdown current through the second transistor, and Wherein the second servo loop is configured to set a second control signal for the second transistor based on the measured second breakdown current and the second reference track current so that the second breakdown current through the second transistor follows the second reference track current.

12. The inverter system according to any one of claims 1 to 5 and 10, wherein: The discharge controller is configured to set a second control signal for the second transistor to fully turn on the second transistor.

13. The inverter system according to claim 1, wherein: The discharge controller is further configured to cause a discharge of energy from the DC link capacitor by turning on at least a third transistor and a fourth transistor of the plurality of switches, thereby causing a controlled breakdown of a first inverter branch formed by the first transistor and the second transistor and a second inverter branch formed by the third transistor and the fourth transistor, At least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operation region.

14. The inverter system according to claim 1, wherein: The discharge controller is configured to discharge energy from the DC link capacitor to a predetermined capacitor voltage within a predetermined time period.

15. An electric vehicle comprising an inverter system, wherein the inverter system comprises: a plurality of transistors controllable to convert a DC voltage into an AC voltage; DC link capacitor; and a discharge controller configured to cause a discharge of energy from the DC link capacitor when the DC power source is disconnected from the inverter system, wherein the discharge controller is configured to cause a discharge of energy from the DC link capacitor by turning on at least a first transistor and a second transistor of the plurality of switches to cause a controlled breakdown, and At least one of the first transistor and the second transistor is controlled by the discharge controller to operate in a linear operation region.

16. A discharge controller for controlling the discharge of energy from a DC link capacitor in an inverter system, the inverter system comprising a plurality of transistors controllable to convert a DC voltage to an AC voltage, the discharge controller being configured to: At least first and second transistors of the plurality of switches are turned on to cause controlled breakdown, thereby causing energy discharge from the DC link capacitor, at least one of the first and second transistors being controlled to operate in a linear operating region.

17. The discharge controller according to claim 16, further configured to: measuring a first voltage across the first transistor, and A first control signal for a first transistor is set based on the measured first voltage and a first reference track voltage such that a first voltage across the first transistor follows the reference track voltage.

18. The discharge controller according to claim 17, wherein: The first reference track voltage is set based on a target discharge profile of the DC link capacitor.

19. The discharge controller according to claim 16, further configured to: measuring a second voltage across the second transistor, and A second control signal for the second transistor is set based on the measured second voltage and a second reference track voltage such that the second voltage across the second transistor follows the reference track voltage.

20. The discharge controller according to claim 16, further configured to: by turning on at least a third transistor and a fourth transistor of the plurality of switches to cause a controlled breakdown of a first inverter branch formed by the first transistor and the second transistor and a second inverter branch formed by the third transistor and the fourth transistor, At least one of the third transistor and the fourth transistor is controlled by the discharge controller to operate in a linear operation region.