Method for manufacturing a circuit board structure

Abstract

A manufacturing method of a circuit board structure includes the steps of providing a first insulating layer, disposing a first conductive pattern on the first insulating layer, the first conductive pattern being provided with a plurality of openings, and part of the first insulating layer being exposed at the bottom of the openings. A second conductive pattern is disposed in each of the openings, and the second conductive pattern is electrically connected to the first conductive pattern. A first metal layer is disposed on the first conductive pattern and the second conductive pattern, and the second conductive pattern and part of the first metal layer corresponding to the second conductive pattern are removed, so that the first conductive pattern and the remaining part of the first metal layer form an inner side circuit layer. The manufacturing method provided by the application has the advantages of simple process and easy control.

Description

Technical Field

[0001] This invention belongs to the field of circuit board manufacturing, and in particular relates to a method for manufacturing a circuit board structure. Background Technology

[0002] The main manufacturing methods for flexible printed circuit boards (PCBs) are subtractive and semi-additive processes. Subtractive processing involves selectively removing portions of the copper foil from the surface of a copper-clad laminate to obtain conductive patterns; this is the primary method in PCB manufacturing today. However, subtractive processing is difficult when creating interlayer vias and is not suitable for producing PCBs with high-thickness copper or thick copper surfaces. Semi-additive processing involves creating a resist pattern on a copper-clad substrate, then thickening the substrate's metal circuitry using electroplating. After removing the resist, excess chemical copper is removed by flash etching, leaving the conductive pattern. However, semi-additive processing is not suitable for producing PCBs with high residual copper content on both sides, and the process is relatively longer and more expensive. Summary of the Invention

[0003] To address the shortcomings of the existing technology, this application provides a method for manufacturing a circuit board structure.

[0004] A method for manufacturing a circuit board structure includes the steps of: providing a first insulating layer; forming a first conductive pattern on the first insulating layer, the first conductive pattern having multiple openings through it, with portions of the first insulating layer exposed at the bottom of the openings; forming a second conductive pattern on each of the openings, the second conductive pattern being electrically connected to the first conductive pattern; forming a first metal layer on the first conductive pattern and the second conductive pattern; and removing the second conductive pattern and a portion of the first metal layer corresponding to the second conductive pattern, such that the first conductive pattern and the remaining portion of the first metal layer form an inner circuit layer.

[0005] In some possible embodiments, the first insulating layer has a plurality of first openings through it, and the first conductive pattern includes an upper conductive pattern and a lower conductive pattern. A portion of the upper conductive pattern and a portion of the lower conductive pattern are filled into the first openings to form a hollow conductor. The manufacturing method further includes the steps of: depositing a first conductive ink layer on one side of the first insulating layer, and filling a portion of the first conductive ink layer from one end of the first opening to form a first semi-hollow pillar; depositing a second conductive ink layer on the other side of the first insulating layer, and filling a portion of the second conductive ink layer from the other end of the first opening to form a second semi-hollow pillar; connecting the second semi-hollow pillars to form a hollow hole; curing the first conductive ink layer to form the upper conductive pattern; curing the second conductive ink layer to form the lower conductive pattern; and curing the hollow hole to form the inner hollow conductor.

[0006] In some possible embodiments, the first conductive ink layer is printed on one side of the first insulating layer, the second conductive ink layer is printed on the other side of the first insulating layer, and the second conductive pattern is formed on the portion of the first insulating layer exposed in the opening by sputtering.

[0007] In some possible embodiments, the first metal layer is formed on the first conductive pattern and the second conductive pattern by electroplating. The step of "setting the first metal layer on the first conductive pattern and the second conductive pattern" further includes: electroplating in the inner hollow conductor to form a conductive pillar, the conductive pillar being electrically connected to the inner circuit layer.

[0008] In some possible embodiments, the steps further include: providing a second insulating layer on the inner circuit layer, providing a third conductive pattern on the second insulating layer, and providing a second metal layer on the third conductive pattern.

[0009] In some possible embodiments, the second insulating layer is provided with a second opening through it, a portion of the inner circuit layer is exposed at the bottom of the second opening, and a portion of the third conductive pattern is filled into the second opening to form an outer conductor. The step of "providing a third conductive pattern in the second insulating layer" includes: providing a third conductive ink layer in the second insulating layer, filling a portion of the third conductive ink into the second opening, and curing the third conductive ink layer to form the third conductive pattern, and curing the portion of the third conductive ink filled into the second opening to form the outer conductor, the outer conductor being electrically connected to the inner circuit layer and the second metal layer.

[0010] In some possible embodiments, the second insulating layer has a third opening extending through it, with a portion of the inner circuit layer exposed at the bottom of the third opening. Before the step "depositing the second metal layer on the third conductive pattern," the method further includes: depositing a dry film on the third opening. After the step "depositing the second metal layer on the third conductive pattern," the method further includes: removing the dry film.

[0011] In some possible embodiments, the step of removing an edge portion of the second metal layer is also included.

[0012] In some possible embodiments, the second metal layer is formed on the third conductive pattern by electroplating.

[0013] In some possible embodiments, both the second insulating layer and the first insulating layer are made of polyimide or liquid crystal copolymer.

[0014] The circuit board manufacturing method provided in this application involves setting a first conductive pattern on a first insulating layer, and then electroplating a first metal layer on the first conductive pattern. The first metal layer and the first conductive pattern together form an inner circuit layer, thus achieving the formation of a circuit layer on the first insulating layer. Compared with subtractive or semi-additive methods, this process is simpler and easier to control, thereby improving production efficiency and reducing production costs. Simultaneously, it avoids chemical etching, reducing liquid materials and offering environmental advantages. Attached Figure Description

[0015] Figure 1 This is a schematic cross-sectional view of the first insulating layer provided in an embodiment of this application.

[0016] Figure 2 for Figure 1 The diagram shows a cross-sectional view of the first insulating layer after the first opening is provided.

[0017] Figure 3 for Figure 2 The diagram shows a cross-section of the first insulating layer after the first conductive ink layer is applied to one side.

[0018] Figure 4 for Figure 3 A cross-sectional schematic diagram showing a second conductive ink layer on the other side of the first insulating layer.

[0019] Figure 5 For curing Figure 4 The diagram shows a cross-sectional view of the first conductive ink layer and the second conductive ink layer.

[0020] Figure 6 for Figure 5 The diagram shows a cross-section of the first conductive pattern after the second conductive pattern has been added.

[0021] Figure 7 for Figure 6 The diagram shows a cross-sectional view of the first and second conductive patterns after the first metal layer has been applied.

[0022] Figure 8 For etching Figure 7 The diagram shows a cross-sectional view of the intermediate obtained after the second conductive pattern and its corresponding partial metal layer.

[0023] Figure 9 for Figure 8 The diagram shows a cross-section of the intermediate body after a second insulating layer is applied to both sides.

[0024] Figure 10 for Figure 9 The diagram shows a cross-sectional view of the second upper insulating layer after the third conductive ink layer has been applied.

[0025] Figure 11 for Figure 10 The diagram shows a cross-sectional view of the second lower insulating layer after the fourth conductive ink layer is applied.

[0026] Figure 12 For curing Figure 11 The diagram shows a cross-sectional view after the third and fourth conductive ink layers.

[0027] Figure 13 for Figure 12 The diagram shows the cross-sectional views of the third and fourth conductive patterns after the dry film has been applied.

[0028] Figure 14 for Figure 13 The diagram shows cross-sectional views of the third and fourth conductive patterns after the second metal layer has been applied.

[0029] Figure 15 This is a cross-sectional schematic diagram of a circuit board structure provided in an embodiment of this application.

[0030] Explanation of main component symbols

[0031] Circuit board structure 100

[0032] First insulating layer 10

[0033] First opening 11

[0034] First conductive ink layer 12

[0035] First half hollow column 121

[0036] Second conductive ink layer 13

[0037] Second half hollow column 131

[0038] Hollow column 14

[0039] First conductive pattern 20

[0040] Opening 201

[0041] Upper opening 201a

[0042] Lower opening 201b

[0043] First upper side pattern 21

[0044] First lower side pattern 22

[0045] Inner hollow conductor 23

[0046] Electroplated surface 24

[0047] First baffle 25

[0048] First through hole 251

[0049] Second baffle 26

[0050] Second through hole 261

[0051] Second conductive pattern 202

[0052] Second upper side pattern 231

[0053] Second lower side pattern 232

[0054] First metal layer 30

[0055] Inner conductor 301

[0056] Intermediate 302

[0057] First upper metal layer 31

[0058] First lower metal layer 32

[0059] Inner circuit layer 33

[0060] First inner circuit layer 331

[0061] Second inner circuit layer 332

[0062] Second insulating layer 40

[0063] Second opening 41

[0064] Second upper insulating layer 42

[0065] Second lower insulating layer 43

[0066] Third opening 44

[0067] Third upper side opening 441

[0068] Third lower side opening 442

[0069] Third conductive pattern 51

[0070] 52 outer conductor

[0071] Third conductive ink layer 53

[0072] Fourth conductive ink layer 54

[0073] Dry film 55

[0074] Second metal layer 60

[0075] Second upper metal layer 61

[0076] Second lower metal layer 62

[0077] Thickness direction A

[0078] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation

[0079] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0080] Please see Figures 1 to 15 One embodiment of this application provides a method for manufacturing a circuit board structure 100, including the following steps:

[0081] S1: Please see Figure 1 A first insulating layer 10 is provided, the first insulating layer 10 being made of at least one of polyimide (PI), liquid crystal polymer (LCP), epoxy resin (EP), polytetrafluoroethylene (PTFE), polyetheretherketone (PEEK), polyphenylene oxyethylene (PPO), polyimide (PI), polyester resin (PET), and polyethylene naphthalate dicarboxylate (PEN). The first insulating layer 10 has a thickness direction A.

[0082] S2: Please see Figure 2 A plurality of first openings 11 are provided at intervals in the first insulating layer 10, and the first openings 11 penetrate the first insulating layer 10 along the thickness direction A. Specifically, the plurality of first openings 11 are formed by laser ablation or mechanical drilling.

[0083] S3: Please see Figures 3 to 5 A first conductive pattern 20 is provided on the first insulating layer 10. The first conductive pattern 20 has multiple openings 201 through it, and part of the first insulating layer 10 is exposed at the bottom of the openings 201.

[0084] In this embodiment, the first conductive pattern 20 includes a first upper pattern 21 and a first lower pattern 22. The plurality of openings 201 include a plurality of upper openings 201a and a plurality of lower openings 201b. A portion of the first upper pattern 21 and a portion of the first lower pattern 22 are filled into the first opening 11 to form an inner hollow conductor 23. Step S3 specifically includes:

[0085] S31: Please see Figure 3 A first conductive ink layer 12 is disposed on one side of the first insulating layer 10, and a second conductive ink layer 13 is pre-cured by light. The pre-cured portion of the first conductive ink layer 12 is filled from one end of the first opening 11 to form a first semi-hollow column 121.

[0086] In this embodiment, the first conductive ink layer 12 includes conductive particles, a solvent, a curing agent, and a dispersant. The conductive particles are the main component responsible for the conductivity of the first conductive ink layer 12. The conductive particles include nano-silver, copper ions, and gold, and their mass accounts for 1%-4% of the total mass. The solvent includes glycols or ketones, and its mass accounts for 73% to 95% of the total mass. The curing agent includes one of acrylate curing agents, imine curing agents, and epichloride curing agents. The dispersant includes one of sodium dodecyl sulfonate and polyoxyethylene stearate. The mass of the curing agent and the dispersant accounts for 1%-4% of the total mass.

[0087] S32: Please refer to Figure 4 A second conductive ink layer 13 is disposed on the other side of the first insulating layer 10, and a portion of the second conductive ink layer 13 is filled from the other end of the first opening 11 to form a second semi-hollow pillar 131. The second semi-hollow pillar 131 connects to the first semi-hollow pillar 121 to form a hollow pillar 14. The material of the second conductive ink layer 13 is the same as that of the first conductive ink layer 12. It is understood that in other embodiments of this application, the first insulating layer 10 may only have conductive ink disposed on one side.

[0088] S33: Please see Figure 5 The first conductive ink layer 12 is baked to fully cure and form the first upper pattern 21; the second conductive ink layer 13 is baked to cure and form the first lower pattern 22; the hollow pillar 14 is baked to cure and form the inner hollow conductor 23. The first upper pattern 21 has a plurality of upper openings 201a through it, and the first lower pattern 22 has a plurality of lower openings 201b through it.

[0089] S4: Please see Figure 6A second conductive pattern 202 is formed by sputtering within a plurality of openings 201 of the first conductive pattern 20. The second conductive pattern 202 connects to the first conductive pattern 20 separated by the openings 201. Thus, the first conductive pattern 20 and the second conductive pattern 202 are electrically connected to form a continuous electroplated surface 24, which can be subsequently electroplated. It is understood that in other embodiments of this application, if the openings 201 do not separate the first conductive pattern 20 into isolated areas (e.g., isolated bonding pad areas), then it is not necessary to provide a second conductive pattern 202 to connect the first conductive pattern 20.

[0090] In this embodiment, the second conductive pattern 202 includes a second upper pattern 231 and a second lower pattern 232. The second upper pattern 231 is disposed at the bottom of the upper opening 201a, and the second lower pattern 232 is disposed at the bottom of the lower opening 201b. Step S4 specifically includes:

[0091] S41: Please see Figure 6 A first shielding plate 25 is provided on the first upper side pattern 21, and a first through hole 251 is provided through the first shielding plate 25, which corresponds to the upper opening 201a; and a second shielding plate 26 is provided on the first lower side pattern 22, and a second through hole 261 is provided through the second shielding plate 26, which corresponds to the lower opening 201b.

[0092] S42: Please see Figure 6 Sputtering is performed above the first shielding plate 25, and some sputtered particles are deposited at the bottom of the upper opening 201a through the first through hole 251, thereby forming the second upper pattern 231; and sputtering is performed above the second shielding plate 26, and some sputtered particles are deposited at the bottom of the lower opening 201b through the second through hole 261, thereby forming the second lower pattern 232.

[0093] S5: Please see Figure 7 Electroplating is performed on the electroplating surface 24 to form a first metal layer 30, which covers the first conductive pattern 20 and the second conductive pattern 202. A portion of the first metal layer 30 fills the cavity of the inner hollow conductor 23, and the inner hollow conductor 23 and the portion of metal filling it constitute an inner conductor 301. The material of the first metal layer 30 includes at least one of copper, iron, aluminum, silver, and gold.

[0094] In this embodiment, the first metal layer 30 includes a first upper metal layer 31 and a first lower metal layer 32. The first upper metal layer 31 covers the first upper pattern 21 and the second upper pattern 231. The first lower metal layer 32 covers the first lower pattern 22 and the second lower pattern 232.

[0095] In this embodiment, step S5 further includes: cutting the edge portions of the first metal layer 30 and the first conductive pattern 20 to form a chamfer, thereby removing the burrs formed during the electroplating process, which helps to improve the conductivity of the first metal layer 30 and reduce the risk of short circuits in subsequent manufacturing processes.

[0096] S6: Please see Figure 7 and Figure 8 The second conductive pattern 202 and the corresponding portion of the first metal layer 30 are removed by etching, so that the first conductive pattern 20 and the corresponding portion of the first metal layer 30 together form an inner circuit layer 33, obtaining an intermediate body 302. That is, the first conductive pattern 20 and the remaining portion of the first metal layer 30 constitute the inner circuit layer 33. Specifically, the second conductive pattern 202 and the corresponding portion of the first metal layer 30 are removed by rapid etching with a chemical solution.

[0097] In this embodiment, the inner wiring layer 33 includes a first inner wiring layer 331 and a second inner wiring layer 332. The first inner wiring layer 331 and the second inner wiring layer 332 are respectively formed on opposite sides of the first insulating layer 10. The inner conductor 301 penetrates the first insulating layer 10 and electrically connects the first inner wiring layer 331 and the second inner wiring layer 332.

[0098] S7: Please see Figure 9 A second insulating layer 40 is provided in the intermediate body 302. The second insulating layer 40 has a second opening 41 and a third opening 44 through it. Part of the inner circuit layer 33 is exposed at the bottom of the second opening 41 and the bottom of the third opening 44. The material of the second insulating layer 40 is the same as that of the first insulating layer 10.

[0099] In this embodiment, the second insulating layer 40 includes a second upper insulating layer 42 and a second lower insulating layer 43. The second upper insulating layer 42 is disposed on the first inner circuit layer 331, and the second lower insulating layer 43 is disposed on the second inner circuit layer 332. The third opening 44 includes a third upper opening 441 and a third lower opening 442. Both the second opening 41 and the third upper opening 441 penetrate the second upper insulating layer 42, and both the third lower opening 442 penetrate the second lower insulating layer 43.

[0100] S8: Please see Figures 10 to 13 A third conductive pattern 51 is provided on the second insulating layer 40, and a portion of the third conductive pattern 51 fills the second opening 41 to form an outer conductor 52. The outer conductor 52 is electrically connected to the first inner circuit layer 331. The third conductive pattern 51 is provided with a window 510, and the third opening 44 is provided corresponding to the window 510, so that a portion of the inner circuit layer 33 can be exposed at the bottom of the window 510.

[0101] In this embodiment, the third conductive pattern 51 includes a third upper pattern 511 and a third lower pattern 512. Step S8 specifically includes:

[0102] S81: Please see Figure 10 A third conductive ink layer 53 is formed on the second upper insulating layer 42 by printing, and part of the third conductive ink layer 53 is filled into the second opening 41. The material of the third conductive ink layer 53 is the same as that of the first conductive ink layer 12 and the second conductive ink layer 13.

[0103] S82: Please see Figure 11 A fourth conductive ink layer 54 is formed on the second lower insulating layer 43 by printing. The material of the fourth conductive ink layer 54 is the same as that of the first conductive ink layer 12 and the second conductive ink layer 13.

[0104] S83: Please see Figure 12 The third conductive ink layer 53 is cured to form the third upper side pattern 511, and the fourth conductive ink layer 54 is cured to form the third lower side pattern 512, and a portion of the conductive ink filling the second opening 41 is cured to form the outer conductive body 52.

[0105] S9: Please see Figures 13 to 15A second metal layer 60 is formed by electroplating the third conductive pattern 51. The second metal layer 60 is connected to the inner circuit layer 33 through the third conductive pattern 51 and the outer conductor 52. Specifically, if the inner circuit layer 33 is grounded, the third conductive pattern 51 and the second metal layer 60 can be used as electromagnetic shielding.

[0106] In this embodiment, see Figure 13 Before step S9, the process further includes filling the window 510 and the corresponding third opening 44 with a dry film 55. The dry film 55 can shield the electroplating deposition, preventing metal deposition on the inner circuit layer 33 during the electroplating process. See also... Figure 15 Step S9 is followed by: removing the dry film 55.

[0107] In this embodiment, see Figure 14 The second metal layer 60 includes a second upper metal layer 61 and a second lower metal layer 62. The second upper metal layer 61 is formed on the third upper pattern 511 by electroplating, and the second lower metal layer 62 is formed on the third lower pattern 512 by electroplating.

[0108] S10: Please refer to Figure 15 The edges of the second upper metal layer 61 and the second lower metal layer 62 are removed to make the edges of the second metal layer 60 more regular, thus obtaining the circuit board structure 100. Specifically, the edges of the second upper metal layer 61 and the second lower metal layer 62 are removed by punching with a machine tool.

[0109] Compared with the prior art, the manufacturing method of the circuit board structure 100 provided in this application has the following advantages:

[0110] (i) By setting a first conductive pattern 20 on the first insulating layer 10, and then electroplating a first metal layer 30 on the first conductive pattern 20, the first metal layer 30 and the first conductive pattern 20 form the inner circuit layer 33, thus realizing the formation of a circuit layer on the first insulating layer 10. Compared with the subtractive or semi-additive method, the process is simpler and easier to control, thereby improving the production efficiency and reducing the production cost. At the same time, it also avoids chemical etching, which helps to reduce liquids and has environmental advantages.

[0111] (ii) By printing conductive ink (first conductive ink layer 12, third conductive ink layer 53) on the insulating layers (first insulating layer 10, second insulating layer 40), it is beneficial to control the thickness of the conductive patterns (first conductive pattern 20, third conductive pattern 51). Moreover, some of the conductive ink can be filled into the openings (opening 201, second opening 41) of the insulating layer to form interlayer conductors (inner conductor 301, outer conductor 52), thereby saving the extra process of making interlayer conductors and further improving the production efficiency of the circuit board structure 100.

[0112] The above description is merely an optimized implementation of this application, and its application should not be limited to this specific implementation. Other modifications and alterations made by those skilled in the art based on the technical concept of this application should fall within the protection scope of this application.

Claims

1. A method for manufacturing a circuit board structure, characterized in that, Including the following steps: Provide the first insulating layer; A first conductive pattern is provided on the first insulating layer, and the first conductive pattern has multiple openings through it, with a portion of the first insulating layer exposed at the bottom of the openings; A second conductive pattern is provided in each of the openings, and the second conductive pattern is electrically connected to the first conductive pattern; A first metal layer is provided on the first conductive pattern and the second conductive pattern; as well as Remove the second conductive pattern and the portion of the first metal layer corresponding to the second conductive pattern, so that the first conductive pattern and the remaining portion of the first metal layer form an inner circuit layer.

2. The manufacturing method as described in claim 1, characterized in that, The first insulating layer has multiple first openings through it. The first conductive pattern includes an upper conductive pattern and a lower conductive pattern. A portion of the upper conductive pattern and a portion of the lower conductive pattern are filled into the first openings to form an inner hollow conductor. The manufacturing method further includes the step of: A first conductive ink layer is provided on one side of the first insulating layer, and a portion of the first conductive ink layer is filled from one end of the first opening to form a first semi-hollow column. A second conductive ink layer is provided on the other side of the first insulating layer, and a portion of the second conductive ink layer is filled from the other end of the first opening to form a second semi-hollow column. The first semi-hollow column is connected to the second semi-hollow column to form a hollow hole. The first conductive ink layer is cured to form the upper conductive pattern, the second conductive ink layer is cured to form the lower conductive pattern, and the hollow hole is cured to form the inner hollow conductor.

3. The manufacturing method as described in claim 2, characterized in that, The first conductive ink layer is printed on one side of the first insulating layer, the second conductive ink layer is printed on the other side of the first insulating layer, and the second conductive pattern is formed on the portion of the first insulating layer exposed by sputtering.

4. The manufacturing method as described in claim 2, characterized in that, The first metal layer is formed on the first conductive pattern and the second conductive pattern by electroplating. The step of "setting the first metal layer on the first conductive pattern and the second conductive pattern" further includes: electroplating inside the inner hollow conductor to form an inner conductor, the inner conductor being electrically connected to the inner circuit layer.

5. The manufacturing method as described in claim 1, characterized in that, It also includes the following steps: A second insulating layer is provided on the inner circuit layer. A third conductive pattern is provided in the second insulating layer, and A second metal layer is disposed on the third conductive pattern.

6. The manufacturing method as described in claim 5, characterized in that, The second insulating layer has a second opening extending through it, with a portion of the inner circuit layer exposed at the bottom of the second opening, and a portion of the third conductive pattern filling the second opening to form an outer conductor. The step of "setting the third conductive pattern in the second insulating layer" includes: A third conductive ink layer is disposed on the second insulating layer, and a portion of the third conductive ink fills the second opening; and The third conductive ink layer is cured to form the third conductive pattern, and a portion of the third conductive ink filling the second opening is cured to form the outer conductor, which electrically connects the inner circuit layer and the second metal layer.

7. The manufacturing method as described in claim 5, characterized in that, The second insulating layer is provided with a third opening, and part of the inner circuit layer is exposed at the bottom of the third opening. Before the step of "providing a second metal layer on the third conductive pattern", the method further includes: providing a dry film on the third opening. The step of "setting a second metal layer on the third conductive pattern" further includes: removing the dry film.

8. The manufacturing method as described in claim 5, characterized in that, It also includes the step of removing the edge portion of the second metal layer.

9. The manufacturing method as described in claim 5, characterized in that, The second metal layer is formed on the third conductive pattern by electroplating.

10. The manufacturing method as described in claim 5, characterized in that, Both the second insulating layer and the first insulating layer are made of polyimide or liquid crystal copolymer.

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