Trench gate silicon carbide transistor structure and preparation method thereof

Abstract

The present invention provides a trench gate silicon carbide transistor structure and a preparation method thereof. The present invention forms a thinner sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure, which can prevent the reaction between the sputtered metal and the polysilicon when forming the ohmic contact structure, thereby meeting the condition that the photolithography and etching processes of the source contact hole and the gate contact hole can use the same mask; at the same time, the sacrificial oxide layer is relatively thin, which is also convenient for removing the sacrificial oxide layer when removing the unreacted first metal layer with less impact on other film layers. By using the same mask for photolithography and etching to simultaneously form the source contact hole and the gate contact hole, the number of mask layers is reduced. On the one hand, it can save the photolithography and etching process time, which is conducive to reducing process manufacturing costs. On the other hand, it is conducive to reducing parameter anomalies caused by external defects, improving process stability, thereby improving production efficiency and increasing production capacity.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a trench gate silicon carbide transistor structure and a preparation method thereof. Background Art

[0002] Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) can be broadly categorized into the following types: planar; trench, primarily used in low-voltage applications; shielded-gate trench (SGT), primarily used in medium- and low-voltage applications; and superjunction (SJ), primarily used in high-voltage applications. With the continuous advancement of semiconductor integrated circuit manufacturing technology, the performance of semiconductor devices continues to improve. Silicon carbide (SiC) transistors, as a new type of power device, offer advantages over traditional silicon (Si)-based power devices, such as high breakdown voltage, low on-resistance, high-temperature resistance, and low losses.

[0003] Trench-gate silicon carbide transistors typically include a trench gate (made of polysilicon (poly) formed within the trench) and a drive gate (made of polysilicon formed on the field oxide). The trench gate serves as the gate, with both sides connected via a contact-to-source structure (CTS) to control transistor conduction. The top of the drive gate is connected via a gate contact structure (CTG), providing a path for connecting the gate to the external circuit, ensuring that the gate voltage is correctly applied to the transistor structure, thereby controlling the flow of channel current.

[0004] Currently, when the industry makes metal silicide for trench gate silicon carbide transistors, it is generally necessary to first open a hole in the silicon carbide substrate and then perform the metal silicide process. In the source contact hole, metal nickel (Ni) is usually used to form an ohmic contact after annealing. If excessive metal nickel is used, it will cause the metal nickel to fill the gate contact hole and react violently with the polysilicon at the bottom of the gate contact hole. Therefore, the source contact hole and the gate contact hole usually need to be separated by two different masks for lithography and etching. In the silicon carbide transistor device process, the more complex the process, the more mask layers are required, the more external defects will be introduced into the production line, and the manufacturing time, manpower and raw material costs will be higher. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a trench gate silicon carbide transistor structure and a preparation method thereof, so that the lithography and etching processes of the source contact holes and the gate contact holes can use the same mask, which can reduce the number of mask layers, save process time, avoid parameter anomalies caused by external defects, improve process stability, and help reduce process manufacturing costs.

[0006] In order to solve the above problems, the present invention provides a method for preparing a trench gate silicon carbide transistor structure, the method comprising the following steps: forming a substrate, the substrate comprising a silicon carbide substrate, a trench gate structure extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a driving gate structure formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure; growing a sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the driving gate structure; performing a first metal sputtering process to form a first metal layer, and the first metal layer reacts with the silicon carbide substrate on both sides of the trench gate structure to form a metal compound as an ohmic contact structure, and the first metal layer does not react with all the polysilicon layers due to the resistance of the sacrificial oxide layer; removing the A sacrificial oxide layer and the unreacted first metal layer; forming a dielectric protection layer covering all surfaces of the polysilicon layer and the surface of the ohmic contact structure; performing a common etching process, using the same mask to etch the dielectric protection layer, and simultaneously forming a first contact hole and a second contact hole, the first contact hole being located on both sides of the trench gate structure and exposing the ohmic contact structure, and the second contact hole being located on the top of the drive gate structure and exposing the polysilicon layer of the drive gate structure; and performing a second metal sputtering process to form a second metal layer, wherein the second metal layer that fills the first contact hole and contacts the ohmic contact structure serves as the first contact structure, and the second metal layer that fills the second contact hole and contacts the polysilicon layer of the drive gate structure serves as the second contact structure.

[0007] In order to solve the above problems, the present invention further provides a trench gate silicon carbide transistor structure, which is prepared by the preparation method of the present invention.

[0008] The above technical solution, by growing a relatively thin sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the polysilicon layer of the drive gate structure, can prevent the reaction between the sputtered metal and the polysilicon when forming the ohmic contact structure, thereby satisfying the condition that the lithography and etching processes of the source contact hole and the gate contact hole can use the same photomask. At the same time, the thin film of the sacrificial oxide layer also facilitates the removal of the sacrificial oxide layer when removing the unreacted first metal layer, with minimal impact on other film layers. By using the same photomask for photolithography and etching to simultaneously form the source contact hole and the gate contact hole, the number of mask layers is reduced. On the one hand, it can save photolithography and etching process time, which is conducive to reducing process manufacturing costs. On the other hand, it can also help reduce parameter anomalies caused by external defects, improve process stability, thereby improving production efficiency and increasing production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0010] Figure 1 Schematic diagram of the steps of a method for preparing a trench gate silicon carbide transistor structure according to an embodiment of the present invention;

[0011] Figure 2 A schematic diagram of the local topography of forming a substrate according to an embodiment of the present invention;

[0012] Figure 3 A schematic diagram of the local morphology of forming a sacrificial oxide layer according to an embodiment of the present invention;

[0013] Figure 4 A schematic diagram of the local topography of forming a first metal layer according to an embodiment of the present invention;

[0014] Figure 5 A schematic diagram of the local morphology after the sacrificial oxide layer is removed according to an embodiment of the present invention;

[0015] Figure 6 A schematic diagram of the local morphology of forming a dielectric protection layer according to an embodiment of the present invention;

[0016] Figure 7 A schematic diagram of the local topography after performing a common etching process according to an embodiment of the present invention;

[0017] Figure 8 FIG. 1 is a schematic diagram of the local topography of forming a second metal layer according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0019] Please also refer to Figures 1 to 8 ,in, Figure 1 Schematic diagram of the steps of a method for preparing a trench gate silicon carbide transistor structure according to an embodiment of the present invention; Figure 2 A schematic diagram of the local topography of forming a substrate according to an embodiment of the present invention; Figure 3 A schematic diagram of the local morphology of forming a sacrificial oxide layer according to an embodiment of the present invention; Figure 4 A schematic diagram of the local topography of forming a first metal layer according to an embodiment of the present invention;

[0020] Figure 5 A schematic diagram of the local morphology after the sacrificial oxide layer is removed according to an embodiment of the present invention; Figure 6 A schematic diagram of the local morphology of forming a dielectric protection layer according to an embodiment of the present invention; Figure 7 A schematic diagram of the local topography after performing a common etching process according to an embodiment of the present invention; Figure 8 FIG. 1 is a schematic diagram of the local topography of forming a second metal layer according to an embodiment of the present invention.

[0021] like Figure 1As shown, the preparation method of the silicon carbide transistor structure described in this embodiment includes the following steps: S1, forming a substrate, the substrate including a silicon carbide substrate, a trench gate structure extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a driving gate structure formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure; S2, growing a sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the driving gate structure; S3, performing a first metal sputtering process to form a first metal layer, on both sides of the trench gate structure, the first metal layer reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure, because the sacrificial oxide layer resists, the first metal layer does not react with all the polysilicon layers; S4, removing the sacrificial oxide layer to and the first metal layer that did not react; S5, forming a dielectric protection layer covering all the surfaces of the polysilicon layer and the surface of the ohmic contact structure; S6, performing a common etching process, using the same mask to etch the dielectric protection layer, and simultaneously forming a first contact hole and a second contact hole, the first contact hole being located on both sides of the trench gate structure and exposing the ohmic contact structure, and the second contact hole being located on the top of the drive gate structure and exposing the polysilicon layer of the drive gate structure; and S7, performing a second metal sputtering process to form a second metal layer, wherein the second metal layer that fills the first contact hole and contacts with the ohmic contact structure serves as the first contact structure, and the second metal layer that fills the second contact hole and contacts with the polysilicon layer of the drive gate structure serves as the second contact structure.

[0022] See also Figure 2 In step S1, a substrate is formed, wherein the substrate includes a silicon carbide substrate, a trench gate structure 21 extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a driving gate structure 22 formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure 21.

[0023] In this embodiment, the silicon carbide (SiC) substrate includes a supporting substrate 201 and a silicon carbide epitaxial layer 202 formed on the supporting substrate 201. The supporting substrate 201 can be any one of a silicon (Si) substrate and a silicon carbide (SiC) substrate. The supporting substrate 201 can also be a stacked structure, such as a silicon / germanium / silicon stack. The silicon carbide epitaxial layer 202 is a layer of silicon carbide thin film epitaxially grown (EPI) on the supporting substrate 201. The silicon carbide epitaxial layer 202 can be grown by chemical vapor deposition (CVD). CVD technology mainly uses one or more gaseous compounds or single substances containing thin film elements to chemically react on the substrate surface to form a thin film. The silicon carbide epitaxial layer 202 can subsequently react with the first metal used in the first metal sputtering process to form a metal compound as an ohmic contact structure.

[0024] In this embodiment, the trench gate structure 21 is formed in the silicon carbide epitaxial layer 202, and the top surface of the trench gate structure 21 is flush with the top surface of the silicon carbide epitaxial layer 202. The subsequently formed ohmic contact structure 41 (shown in FIG. Figure 4 The top surface of the silicon carbide epitaxial layer 202 is flush with the top surface of the silicon carbide epitaxial layer 202.

[0025] In this embodiment, the trench gate structure 21 includes a gate oxide layer 211 covering the inner wall of the trench extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a polysilicon layer 212 covering the gate oxide layer 211 and filling the trench. The drive gate structure 22 includes a field oxide layer 221 formed on the surface of the silicon carbide substrate and a polysilicon layer 222 covering the field oxide layer 221. The film thickness of the field oxide layer 221 is greater than the film thickness of the gate oxide layer 211. Specifically, the film thickness of the field oxide layer 221 is greater than or equal to 10,000 angstroms. The formation process of the trench gate structure 21 and the drive gate structure 22 can refer to the existing related processes and will not be repeated here. The purpose of the two gate structures is as follows: the trench gate structure is used as the gate, and the two sides are led out through the source contact structure (CTS) to control the conduction of the transistor; the top of the drive gate structure is led out through the gate contact structure (CTG) to provide a path for connecting the gate to the external circuit, ensuring that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of channel current.

[0026] In this embodiment, the field oxide layer 221 and the gate oxide layer 211 are made of silicon dioxide (SiO 2 ). The formation process of the field oxide layer 221 and the gate oxide layer 211 can refer to the existing related processes and will not be repeated here.

[0027] See also Figure 3 In step S2, a sacrificial oxide layer 30 is grown on the surface of the polysilicon layer 212 of the trench gate structure 21 and the surface of the polysilicon layer 222 of the drive gate structure 22. Forming the sacrificial oxide layer 30 on the surfaces of the polysilicon layers 212 and 222 prevents the metal from reacting with the polysilicon in the subsequent metal sputtering process for forming the ohmic contact structure. Since the sacrificial oxide layer is substantially not formed on the surface of the silicon carbide substrate, it does not affect the reaction between the metal and silicon carbide in the metal sputtering process for forming the ohmic contact.

[0028] In this embodiment, the step of growing a sacrificial oxide layer 30 on the surface of the polysilicon layer 212 of the trench gate structure 21 and the surface of the polysilicon layer 222 of the drive gate structure 22 specifically includes: placing the substrate in a furnace tube at a preset process temperature to perform an oxidation reaction, wherein the preset process temperature is higher than or equal to the oxidation temperature of polysilicon and lower than the oxidation temperature of silicon carbide, so that an oxide layer is only grown and oxidized on the surfaces of all the polysilicon layers 212 and 222 to form the sacrificial oxide layer 30, and no oxide layer is basically formed on the surface of the silicon carbide substrate. Specifically, the preset process temperature is 600°C to 1200°C, for example, 600°C, 650°C, 700°C, 800°C, 900°C, 1000°C, 1100°C, 1150°C, 1200°C, etc. Specifically, the material of the sacrificial oxide layer 30 is silicon dioxide (SiO2).

[0029] To facilitate subsequent removal of the sacrificial oxide layer 30, the thickness of the sacrificial oxide layer 30 is less than or equal to a preset thickness threshold. For example, the thickness of the sacrificial oxide layer 30 is 100 angstroms. By growing a 100-angstrom oxide layer on the surfaces of all of the polysilicon layers 212 and 222, the metal and polysilicon in the subsequent metal sputtering process for forming the ohmic contact structure are prevented from reacting, and the 100-angstrom oxide layer is easily removed after the ohmic contact is formed. Since substantially no oxide layer forms on the surface of the silicon carbide substrate, this does not affect the metal and silicon carbide reaction during the metal sputtering process for forming the ohmic contact.

[0030] See also Figure 4 And step S3, performing a first metal sputtering process to form a first metal layer 40, on both sides of the trench gate structure 21, the first metal layer 40 reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure 41, because the sacrificial oxide layer 30 resists, the first metal layer 40 does not react with all the polysilicon layers 212 and 222.

[0031] Specifically, the first metal layer 40 covers the surface of the silicon carbide substrate on both sides of the trench gate structure 21, as well as the surface of the sacrificial oxide layer 30 on the top of the trench gate structure 21 and the top of the drive gate structure 22. On both sides of the trench gate structure 21, the first metal layer 40 reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure 41. On the top of the trench gate structure 21 and the top of the drive gate structure 22, due to the protection of the sacrificial oxide layer 30, the first metal layer 40 does not react with any of the polysilicon layers 212 and 222. The presence of the sacrificial oxide layer 30 prevents the sputtered metal from reacting with the polysilicon when forming the ohmic contact structure. That is, the sputtered metal will not affect the polysilicon layer 212 of the trench gate structure 21 and the polysilicon layer 222 of the drive gate structure 22, thereby meeting the condition that the lithography and etching processes for the source contact hole and the gate contact hole can use the same mask.

[0032] In this embodiment, the step of performing a first metal sputtering process to form a first metal layer 40 specifically includes: performing a metal nickel (Ni) sputtering process, whereby the metal nickel reacts with the silicon carbide substrate to form a nickel silicon compound (NiSi) as the ohmic contact structure 41; because the sacrificial oxide layer 30 resists and the metal nickel does not react with all the polysilicon layers 212 and 222, the sputtered metal will not affect all the polysilicon layers 212 and 222.

[0033] See also Figure 5 And step S4, removing the sacrificial oxide layer 30 and the unreacted first metal layer 40.

[0034] Because the sacrificial oxide layer 30 is relatively thin, removing the thin sacrificial oxide layer 30 has little impact on the film layers in other areas. For example, the sacrificial oxide layer 30 is only 100 angstroms thick, so removing the 100 angstroms silicon dioxide layer on the polysilicon surface has little impact on the film layers in other areas.

[0035] See also Figure 6 In step S5 , a dielectric protection layer 60 is formed to cover all surfaces of the polysilicon layers 212 , 222 and the surface of the ohmic contact structure 41 .

[0036] In some embodiments, the dielectric protection layer 60 is made of borophospho-silicate glass (BPSG). BPSG is silicon dioxide doped with boron and phosphorus. The BPSG film is used to isolate and insulate metal layers, preventing electrical shorts between them and ensuring proper circuit operation. The BPSG film has excellent fluidity and pore-filling capabilities, can flow at high temperatures, and can improve the planarization of the silicon carbide substrate surface. The BPSG film also has excellent sodium ion absorption and blocking capabilities, which helps improve the stability and reliability of semiconductor devices.

[0037] See also Figure 7 And step S6, performing a common etching process, using the same mask to etch the dielectric protection layer 60, and simultaneously forming a first contact hole 601 and a second contact hole 602, the first contact hole 601 being located on both sides of the trench gate structure 21 and exposing the ohmic contact structure 41, and the second contact hole 602 being located on the top of the driving gate structure 22 and exposing the polysilicon layer 222 of the driving gate structure 22.

[0038] By using the same photomask for photolithography and etching to simultaneously form the first contact hole 601 (which can serve as a source contact hole) and the second contact hole 602 (which can serve as a gate contact hole), this embodiment reduces the number of photomask layers compared to the prior art, where the source contact hole and the gate contact hole require separate photolithography and etching processes using two different photomasks. Reducing the number of photomask layers not only saves time during the photolithography and etching processes, but also helps reduce process manufacturing costs. It also helps reduce parameter anomalies caused by external defects, improving process stability and thus increasing production efficiency and capacity.

[0039] In the embodiment, the first contact hole 601 is a source contact hole, and accordingly, the first contact structure 81 (shown in FIG. 1 ) formed subsequently Figure 8 The second contact hole 602 is a gate contact hole, and the second contact structure 82 (shown in FIG. Figure 8 (middle) is the gate contact structure (CTG).

[0040] See also Figure 8 And step S7, performing a second metal sputtering process to form a second metal layer 80, wherein the second metal layer 80 that fills the first contact hole 601 and contacts the ohmic contact structure 41 serves as the first contact structure 81, and the second metal layer 80 that fills the second contact hole 602 and contacts the polysilicon layer 222 of the driving gate structure 22 serves as the second contact structure 82.

[0041] In this embodiment, the step of performing a second metal sputtering process to form a second metal layer 80 specifically includes: performing an aluminum-copper alloy sputtering process to form an aluminum-copper metal layer that fills the first contact hole 601 and contacts the ohmic contact structure 41, fills the second contact hole 602 and contacts the polysilicon layer 222 of the driving gate structure 22, and covers the dielectric protection layer 60 and is continuously distributed as the second metal layer 80.

[0042] This embodiment forms a relatively thin sacrificial oxide layer by growing on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure. This prevents the sputtered metal from reacting with the polysilicon when forming the ohmic contact structure, thereby satisfying the condition that the photolithography and etching processes for the source contact hole and the gate contact hole can use the same mask. At the same time, the thin film of the sacrificial oxide layer also facilitates the removal of the sacrificial oxide layer when removing the unreacted first metal layer, with minimal impact on other film layers. By using the same mask for photolithography and etching to simultaneously form the source contact hole and the gate contact hole, the number of mask layers is reduced. On the one hand, this can save photolithography and etching process time, which is conducive to reducing process manufacturing costs. On the other hand, it can help reduce parameter anomalies caused by external defects, improve process stability, thereby improving production efficiency and increasing production capacity.

[0043] Based on the same inventive concept, an embodiment of the present invention further provides a silicon carbide transistor structure, which can be manufactured using the above-mentioned manufacturing method of the present invention.

[0044] See also Figure 8 , which is a schematic diagram of a silicon carbide transistor structure provided by an embodiment of the present invention. Figure 8 As shown, the silicon carbide transistor structure provided in this embodiment is fabricated using the above-described method of the present invention and specifically includes: a silicon carbide substrate; a trench gate structure 21 and a drive gate structure 22 spaced apart on the surface of the silicon carbide substrate; ohmic contact structures 41 within the silicon carbide substrate located on both sides of the trench gate structure 21; a dielectric protection layer 60 covering the surface of the silicon carbide substrate, the trench gate structure 21, and the drive gate structure 22; a first contact structure 81 extending perpendicularly through the dielectric protection layer 60 and in contact with the ohmic contact structure 41; and a second contact structure 82 extending perpendicularly through the dielectric protection layer 60 and in contact with the polysilicon layer 222 of the drive gate structure 22. The first contact structure 81 and the second contact structure 82 are formed using a common etching process using the same photomask.

[0045] In this embodiment, the silicon carbide (SiC) substrate includes a support substrate 201 and a silicon carbide epitaxial layer 202 formed on the support substrate 201 .

[0046] In this embodiment, the trench gate structure 21 includes a gate oxide layer 211 covering the inner wall of the trench extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a polysilicon layer 212 covering the gate oxide layer 211 and filling the trench. The drive gate structure 22 includes a field oxide layer 221 formed on the surface of the silicon carbide substrate and a polysilicon layer 222 covering the field oxide layer 221. The film thickness of the field oxide layer 221 is greater than the film thickness of the gate oxide layer 211. Specifically, the film thickness of the field oxide layer 221 is greater than or equal to 10,000 angstroms. The formation process of the trench gate structure 21 and the drive gate structure 22 can refer to the existing related processes and will not be repeated here. The two gate structures are used as follows: a trench gate structure serves as the gate, with both sides connected via source contact structures (CTS) to control transistor conduction; and a drive gate structure connected via a gate contact structure (CTG) at the top to provide a path for connecting the gate to the external circuit, ensuring that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of channel current. The field oxide layer 221 has a greater thickness than the gate oxide layer 211. Specifically, the field oxide layer 221 has a thickness greater than or equal to 10,000 angstroms.

[0047] In this embodiment, the first contact structure 81 is a source contact structure (CTS); the second contact structure 82 is a gate contact structure (CTG). The trench gate structure 21 and the drive gate structure 22 are used as the gate, with both sides connected via the source contact structure (CTS) to control transistor conduction. The top of the drive gate structure 22 is connected via the gate contact structure (CTG) to provide a path for connecting the gate to the external circuit, ensuring that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of channel current.

[0048] In this embodiment, the field oxide layer 221 and the gate oxide layer 211 are both made of silicon dioxide (SiO 2 ).

[0049] In this embodiment, the first metal is nickel (Ni), and the ohmic contact structure 41 is a nickel silicon compound (NiSi) formed by the reaction of nickel and the silicon carbide substrate.

[0050] In this embodiment, the dielectric protection layer 60 is made of borophosphosilicate glass, and the first contact structure 81 and the second contact structure 82 are made of aluminum-copper alloy, which also covers the dielectric protection layer 60 and is a continuously distributed metal film layer.

[0051] In this embodiment, the trench gate silicon carbide transistor structure is an asymmetrical trench gate silicon carbide metal oxide semiconductor field effect transistor structure.

[0052] In the above description, descriptions of well-known components and technologies are omitted to avoid unnecessary confusion of the concepts of the present invention. In the above embodiments, each embodiment focuses on the differences from other embodiments, and the same / similar parts between the embodiments can be referred to in detail.

[0053] It should be noted that, in this article, relational terms such as "first" and "second" are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment comprising a series of elements includes not only those elements, but also includes other elements not clearly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of further restrictions, the element defined by the sentence "also includes a..." does not exclude the presence of other identical elements in the process, method, article or equipment comprising the elements. In addition, the embodiments of the present invention and the features in the embodiments may be combined with each other without conflict.

[0054] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. It should be noted that those skilled in the art may make various improvements and modifications without departing from the principles of the present invention, and such improvements and modifications shall also be considered within the scope of protection of the present invention.

Claims

1. A method for preparing a trench gate silicon carbide transistor structure, characterized in that: The method comprises the following steps: forming a substrate comprising a silicon carbide substrate, a trench gate structure extending from a surface of the silicon carbide substrate to an interior of the silicon carbide substrate, and a drive gate structure formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure; Growing a sacrificial oxide layer on a surface of the polysilicon layer of the trench gate structure and a surface of the polysilicon layer of the drive gate structure; Performing a first metal sputtering process to form a first metal layer, where the first metal layer reacts with the silicon carbide substrate on both sides of the trench gate structure to form a metal compound as an ohmic contact structure, and the first metal layer does not react with all the polysilicon layers due to the resistance of the sacrificial oxide layer; removing the sacrificial oxide layer and the unreacted first metal layer; forming a dielectric protection layer covering all surfaces of the polysilicon layer and the ohmic contact structure; Performing a common etching process to etch the dielectric protection layer using the same photomask to simultaneously form a first contact hole and a second contact hole, wherein the first contact hole is located on both sides of the trench gate structure and exposes the ohmic contact structure, and the second contact hole is located on top of the drive gate structure and exposes the polysilicon layer of the drive gate structure; as well as A second metal sputtering process is performed to form a second metal layer, wherein the second metal layer that fills the first contact hole and contacts the ohmic contact structure serves as a first contact structure, and the second metal layer that fills the second contact hole and contacts the polysilicon layer of the driving gate structure serves as a second contact structure.

2. The method according to claim 1, characterized in that The silicon carbide substrate includes a supporting substrate and a silicon carbide epitaxial layer formed on the supporting substrate, the trench gate structure and the ohmic contact structure are formed in the silicon carbide epitaxial layer, and the top surface of the trench gate structure and the top surface of the ohmic contact structure are flush with the top surface of the silicon carbide epitaxial layer.

3. The method according to claim 1, characterized in that The first contact structure is a source contact structure, and the second contact structure is a gate contact structure.

4. The method according to claim 1, wherein The material of the sacrificial oxide layer is silicon dioxide, and the material of the dielectric protection layer is borophosphosilicate glass.

5. The method according to claim 1, wherein The trench gate structure includes a gate oxide layer covering an inner wall of a trench extending from a surface of the silicon carbide substrate to an interior of the silicon carbide substrate, and a polysilicon layer covering the gate oxide layer and filling the trench; The driving gate structure includes a field oxide layer formed on the surface of the silicon carbide substrate and a polysilicon layer covering the field oxide layer; The field oxide layer has a thickness greater than that of the gate oxide layer, and both the field oxide layer and the gate oxide layer are made of silicon dioxide.

6. The method according to claim 1, characterized in that The step of growing a sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure specifically includes: The substrate is placed in a furnace tube at a preset process temperature to perform an oxidation reaction, wherein the preset process temperature is higher than or equal to the oxidation temperature of polysilicon and lower than the oxidation temperature of silicon carbide, so that only the surface of all the polysilicon layers is oxidized and grown to form an oxide layer as the sacrificial oxide layer.

7. The method according to claim 6, characterized in that The preset process temperature is 600°C to 1200°C.

8. The method according to claim 1 or 6, characterized in that The thickness of the sacrificial oxide layer is 100 angstroms.

9. The method according to claim 1, characterized in that The step of performing a first metal sputtering process to form a first metal layer specifically includes: A metal nickel sputtering process is performed, whereby the metal nickel reacts with the silicon carbide substrate to form a nickel-silicon compound as the ohmic contact structure. Due to the resistance of the sacrificial oxide layer, the metal nickel does not react with all the polysilicon layers.

10. The method according to claim 1, characterized in that The step of performing a second metal sputtering process to form a second metal layer specifically includes: An aluminum-copper alloy sputtering process is performed to form an aluminum-copper metal layer that fills the first contact hole and contacts the ohmic contact structure, fills the second contact hole and contacts the polysilicon layer of the driving gate structure, and covers the dielectric protection layer and is continuously distributed as the second metal layer.

11. A trench gate silicon carbide transistor structure, characterized in that: The trench gate silicon carbide transistor structure is manufactured by the method for manufacturing a trench gate silicon carbide transistor structure according to any one of claims 1 to 10. 12 . The trench-gate silicon carbide transistor structure according to claim 11 , wherein the trench-gate silicon carbide transistor structure is an asymmetric trench-gate silicon carbide metal oxide semiconductor field effect transistor structure.

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