Structure for improving direction recovery performance of power device and manufacturing method thereof

Abstract

The invention provides a structure for improving direction recovery performance of a power device, which comprises a substrate, a plurality of trench gate structures are formed on the substrate, a mesa structure is arranged between two adjacent trench gates, and an insulating layer and an interlayer dielectric layer are sequentially formed on the trench gate structures and the substrate; the insulating layer and the interlayer dielectric layer crossing the two mesa structures are opened to define the formation position of a contact hole; ion implantation is carried out on the contact hole, and the implantation dosage is smaller than 1E15; and a conductive material layer covering the contact hole. A metal barrier layer and tungsten filling do not need to be formed, and the conductive material layer such as a mixture of aluminum, silicon and copper is used for filling, so that the hole injection concentration is reduced, and the reverse recovery capability of the device can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a structure for improving the directional recovery performance of a power device and a manufacturing method thereof. Background Art

[0002] A method for forming a contact hole of a power device in the prior art includes:

[0003] Step 1: providing a substrate 101, forming a plurality of trench gate structures on the substrate 101, wherein the trench gate structures include: a groove located on the substrate; a gate dielectric layer 102 located on the groove; a gate polysilicon layer 103 filling the remaining groove, and sequentially forming an insulating layer 104 and an interlayer dielectric layer 105 on the trench gate structure and the substrate 101;

[0004] Step 2: using photolithography and etching methods to form contact holes on the insulating layer 104, the interlayer dielectric layer 105 and the gate polysilicon layer 103 thereunder, and performing ion implantation into the contact holes, with an implantation dose greater than 1E15;

[0005] Step 3: forming a metal barrier layer 106 (such as titanium and titanium nitride) on the contact hole, and forming a tungsten metal 107 filling the contact hole.

[0006] However, the directional recovery performance of the power device in this structure is poor.

[0007] In order to solve the above problems, it is necessary to propose a new structure for improving the directional recovery performance of power devices and a manufacturing method thereof. Summary of the invention

[0008] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a structure for improving the directional recovery performance of a power device and a manufacturing method thereof, so as to solve the problem of poor directional recovery performance of the power device in the prior art.

[0009] To achieve the above-mentioned and other related purposes, the present invention provides a structure for improving the directional recovery performance of a power device, comprising:

[0010] A substrate, on which a plurality of trench gate structures are formed, a mesa structure is provided between two adjacent trench gates, and an insulating layer and an interlayer dielectric layer are sequentially formed on the trench gate structures and the substrate;

[0011] The insulating layer and the interlayer dielectric layer spanning the two mesa structures are opened to define a formation position of a contact hole;

[0012] The contact holes are ion implanted with a dose less than 1E15;

[0013] A conductive material layer covers the contact hole.

[0014] Preferably, the trench gate structure comprises: a groove located on the substrate; a gate dielectric layer located on the groove; and a gate polysilicon layer filling the remaining groove.

[0015] Preferably, the insulating layer is a BPSG layer.

[0016] Preferably, the contact holes are ion implanted with boron ions.

[0017] Preferably, the conductive material layer is a mixture of aluminum, silicon and copper.

[0018] The present invention also provides a structure for improving the directional recovery performance of a power device, comprising:

[0019] Step 1, providing a substrate, forming a plurality of trench gate structures on the substrate, with a mesa structure between two adjacent trench gates, and sequentially forming an insulating layer and an interlayer dielectric layer on the trench gate structure and the substrate;

[0020] Step 2, forming a photoresist layer on the interlayer dielectric, and photolithographically opening the photoresist layer across the two mesa structures to define the formation position of the contact hole;

[0021] Step 3, etching the exposed interlayer dielectric layer and the insulating layer thereunder to form contact holes, and removing the photoresist layer;

[0022] Step 4: perform ion implantation into the contact hole, with an implantation dose less than 1E15, and then form a conductive material layer covering the contact hole.

[0023] Preferably, the trench gate structure in step 1 comprises: a groove located on the substrate; a gate dielectric layer located on the groove; and a gate polysilicon layer filling the remaining groove.

[0024] Preferably, the insulating layer in step one is a BPSG layer.

[0025] Preferably, in step 4, boron ions are implanted into the contact holes.

[0026] Preferably, the conductive material layer in step 4 is a mixture of aluminum, silicon and copper.

[0027] As described above, the structure for improving the directional recovery performance of a power device and the method for making the same according to the present invention have the following beneficial effects:

[0028] The present invention does not need to form a metal barrier layer and tungsten filling, and uses a conductive material layer such as a mixture of aluminum, silicon and copper for filling, thereby reducing the hole injection concentration and improving the reverse recovery capability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Shown is a schematic diagram of a power device contact hole in the prior art;

[0030] Figure 2 Shown is a schematic diagram of the process flow of the present invention;

[0031] Figure 3 It is a schematic diagram showing the photolithography and etching to form contact holes according to the present invention;

[0032] Figure 4 Shown is a schematic diagram of ion implantation of the present invention;

[0033] Figure 5 It is a schematic diagram of forming a conductive material layer according to the present invention;

[0034] Figure 6 Shown is a schematic diagram of a reverse recovery dynamic parameter comparison between the present invention and the prior art;

[0035] Figure 7 Shown is a schematic diagram of a comparison table of reverse recovery dynamic parameters of the present invention and the prior art. DETAILED DESCRIPTION

[0036] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0037] See also Figure 5 The present invention provides a structure for improving the directional recovery performance of a power device, comprising:

[0038] A substrate 201, on which a plurality of trench gate structures are formed, a mesa structure (the substrate 201 between the trench gates) is provided between two adjacent trench gates, and an insulating layer 204 and an interlayer dielectric layer 205 are sequentially formed on the trench gate structure and the substrate 201;

[0039] In some embodiments, substrate 201 may include a bulk semiconductor substrate or a silicon-on-insulator (SOI) substrate. The SOI substrate includes an insulator layer located below a thin semiconductor layer as an active layer of the SOI substrate. The semiconductor of the active layer and the bulk semiconductor typically include crystalline semiconductor material silicon, but may also include one or more other semiconductor materials, such as germanium, silicon-germanium alloys, compound semiconductors (e.g., GaAs, AlAs, InAs, GaN, AlN, etc.) or their alloys (e.g., GaxAl1-xAs, GaxAl1-xN, InxGa1-xAs, etc.), oxide semiconductors (e.g., ZnO, SnO2, TiO2, Ga2O3, etc.) or combinations thereof. The semiconductor material may be doped or undoped. Other substrates that may be used include multilayer substrates, gradient substrates, or mixed orientation substrates.

[0040] In some embodiments, the trench gate structure includes: a groove located on the substrate 201; a gate dielectric layer 202 located on the groove, the material of the gate dielectric layer 202 may be an oxide layer or other well-known dielectric materials; and a gate polysilicon layer 203 filling the remaining groove.

[0041] In some embodiments, the insulating layer 204 is a BPSG layer (boron and phosphorus doped silicate glass).

[0042] In some embodiments, the interlayer dielectric layer 205 includes a dielectric material such as silicon oxide, a low-k dielectric material, other suitable dielectric materials, or a combination thereof. In some examples, the low-k dielectric material includes fluorinated silicon glass (FSG), carbon-doped silicon oxide, xerogel, aerogel, amorphous fluorinated carbon, parylene, BCB (bisbenzocyclobutene), polyimide, and / or other suitable dielectric materials having a dielectric constant substantially less than that of thermal silicon oxide.

[0043] The insulating layer 204 and the interlayer dielectric layer 205 across the two mesa structures are opened to define the formation position of the contact hole. Compared with the prior art, the size of the contact hole is increased, and there is no need to form a metal barrier layer and tungsten filling;

[0044] The contact holes are ion-implanted with an implantation dose less than 1E15. Reducing the hole implantation concentration can improve the reverse recovery capability of the device.

[0045] In some embodiments, the contact holes are ion implanted with boron ions.

[0046] A conductive material layer 207 covering the contact hole is filled.

[0047] In some embodiments, the conductive material layer 207 is a mixture of aluminum, silicon, and copper.

[0048] See also Figure 6 and Figure 7The reverse recovery dynamic parameters of the aluminum, silicon and copper mixture filling process used in the present invention are superior to those of the prior art process.

[0049] See also Figure 2 The present invention also provides a structure for improving the directional recovery performance of a power device, comprising:

[0050] Step 1: providing a substrate 201, forming a plurality of trench gate structures on the substrate 201, with a mesa structure between two adjacent trench gates, and sequentially forming an insulating layer 204 and an interlayer dielectric layer 205 on the trench gate structures and the substrate 201;

[0051] In some embodiments, substrate 201 may include a bulk semiconductor substrate or a silicon-on-insulator (SOI) substrate. The SOI substrate includes an insulator layer located below a thin semiconductor layer as an active layer of the SOI substrate. The semiconductor of the active layer and the bulk semiconductor typically include crystalline semiconductor material silicon, but may also include one or more other semiconductor materials, such as germanium, silicon-germanium alloys, compound semiconductors (e.g., GaAs, AlAs, InAs, GaN, AlN, etc.) or their alloys (e.g., GaxAl1-xAs, GaxAl1-xN, InxGa1-xAs, etc.), oxide semiconductors (e.g., ZnO, SnO2, TiO2, Ga2O3, etc.) or combinations thereof. The semiconductor material may be doped or undoped. Other substrates that may be used include multilayer substrates, gradient substrates, or mixed orientation substrates.

[0052] In some embodiments, the trench gate structure in step 1 includes: a groove located on the substrate 201; a gate dielectric layer 202 located on the groove, the material of the gate dielectric layer 202 can be an oxide layer or other well-known dielectric materials; and a gate polysilicon layer 203 filling the remaining groove.

[0053] In some embodiments, the insulating layer 204 in step 1 is a BPSG layer (boron and phosphorus doped silicate glass).

[0054] In some embodiments, the interlayer dielectric layer 205 includes a dielectric material such as silicon oxide, a low-k dielectric material, other suitable dielectric materials, or a combination thereof. In some examples, the low-k dielectric material includes fluorinated silicon glass (FSG), carbon-doped silicon oxide, xerogel, aerogel, amorphous fluorinated carbon, parylene, BCB (bisbenzocyclobutene), polyimide, and / or other suitable dielectric materials having a dielectric constant substantially less than that of thermal silicon oxide.

[0055] Step 2: Form a photoresist layer 206 on the interlayer dielectric, and open the photoresist layer 206 across the two mesa structures by photolithography to define the formation position of the contact hole, forming a Figure 3The structure shown, compared with the prior art, has a larger contact hole size and does not require the formation of a metal barrier layer and tungsten filling;

[0056] Step 3: etching the exposed interlayer dielectric layer 205 and the insulating layer 204 thereunder to form contact holes, and removing the photoresist layer 206; the etching method is dry etching, and the photoresist layer 206 can be removed by an ashing process and a wet cleaning method;

[0057] Step 4: Please refer to Figure 4 , ion implantation is performed into the contact hole, and the implantation dose is less than 1E15. Reducing the hole implantation concentration can improve the reverse recovery capability of the device, and then a conductive material layer 207 covering the contact hole is formed to form a Figure 5 The structure shown.

[0058] In some embodiments, in step 4, boron ions are implanted into the contact holes.

[0059] In some embodiments, the conductive material layer 207 in step 4 is a mixture of aluminum, silicon and copper.

[0060] See also Figure 6 and Figure 7 The reverse recovery dynamic parameters of the aluminum, silicon and copper mixture filling process used in the present invention are superior to those of the prior art process.

[0061] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0062] In summary, the present invention does not need to form a metal barrier layer and tungsten filling, and uses a conductive material layer such as a mixture of aluminum, silicon and copper for filling, thereby reducing the hole injection concentration and improving the reverse recovery ability of the device. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0063] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A structure for improving the directional recovery performance of a power device, characterized in that: include: A substrate, on which a plurality of trench gate structures are formed, a mesa structure is provided between two adjacent trench gates, and an insulating layer and an interlayer dielectric layer are sequentially formed on the trench gate structures and the substrate; The insulating layer and the interlayer dielectric layer spanning the two mesa structures are opened to define a formation position of a contact hole; The contact holes are ion implanted with a dose less than 1E15; A conductive material layer covers the contact hole.

2. The structure for improving the directional recovery performance of a power device according to claim 1, characterized in that: The trench gate structure comprises: a groove located on the substrate; a gate dielectric layer located on the groove; and a gate polysilicon layer filling the remaining groove.

3. The structure for improving the directional recovery performance of a power device according to claim 1, characterized in that: The insulating layer is a BPSG layer.

4. The structure for improving the directional recovery performance of a power device according to claim 1, characterized in that: The contact holes are ion implanted with boron ions.

5. The structure for improving the directional recovery performance of a power device according to claim 1, characterized in that: The conductive material layer is a mixture of aluminum, silicon and copper.

6. The method for manufacturing a structure for improving directional recovery performance of a power device according to any one of claims 1 to 5, characterized in that: At least: Step 1, providing a substrate, forming a plurality of trench gate structures on the substrate, with a mesa structure between two adjacent trench gates, and sequentially forming an insulating layer and an interlayer dielectric layer on the trench gate structure and the substrate; Step 2, forming a photoresist layer on the interlayer dielectric, and photolithographically opening the photoresist layer across the two mesa structures to define the formation position of the contact hole; Step 3, etching the exposed interlayer dielectric layer and the insulating layer thereunder to form contact holes, and removing the photoresist layer; Step 4: perform ion implantation into the contact hole, with an implantation dose less than 1E15, and then form a conductive material layer covering the contact hole.

7. The method for manufacturing a structure for improving directional recovery performance of a power device according to claim 6, characterized in that: The trench gate structure in step 1 includes: a groove located on the substrate; a gate dielectric layer located on the groove; and a gate polysilicon layer filling the remaining groove.

8. The method for manufacturing a structure for improving directional recovery performance of a power device according to claim 6, characterized in that: The insulating layer in step 1 is a BPSG layer.

9. The method for manufacturing a structure for improving directional recovery performance of a power device according to claim 6, characterized in that: In step 4, boron ions are implanted into the contact holes.

10. The method for manufacturing a structure for improving directional recovery performance of a power device according to claim 6, characterized in that: The conductive material layer in step 4 is a mixture of aluminum, silicon and copper.

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