Common anode voltage reduction output circuit and control method thereof, and BMS protection board

Abstract

The invention relates to the technical field of battery energy storage, and discloses a common anode step-down output circuit and a control method thereof, and a BMS protection board, the circuit comprises a power supply input end, a power supply output end, a synchronous step-up control chip and a step-down unit; the anode of the power input end is connected with the anode of the power output end; the step-down unit comprises two switches, an inductor and an output capacitor, the two switches are connected in series between the positive electrode and the negative electrode of the power input end, one end of the inductor is connected with a series node of the two switches, the other end of the inductor is connected with the negative electrode of the power output end, and the output capacitor is arranged between the positive electrode and the negative electrode of the power output end; and the voltage reduction unit is used for switching on or switching off each switch according to the driving signal output by the synchronous boost control chip so as to reduce the voltage of the charging power supply connected to the power supply input end and then output the charging power supply to the power supply output end. According to the circuit, a common-anode synchronous step-down output function is realized, and the efficiency of the common-anode step-down circuit is also improved.

Description

Technical Field

[0001] The present application relates to the field of battery energy storage technology, and in particular to a common positive electrode buck output circuit and a control method thereof, and a BMS protection board. Background Art

[0002] Most of the current battery pack energy storage products use AFE (analog front end) to control the charge and discharge management of the negative electrode of the battery pack. At this time, the positive electrode of the battery pack is directly connected to the positive electrode of the external charging power supply (i.e., the common positive electrode). However, when charging the battery pack, most of the power control chips on the market use an asynchronous method to limit the charging current of the battery pack. Due to the large conduction voltage drop of the freewheeling diode in the asynchronous method and severe heat generation, this part of the module of the energy storage product generally has the problem of small charging current and low efficiency. Summary of the invention

[0003] In view of this, the present application proposes a common positive pole buck output circuit and its control method, a BMS protection board and an energy storage device, which realize the common positive pole synchronous buck output function and improve the efficiency of the buck circuit under the common positive pole condition.

[0004] In a first aspect, an embodiment of the present application provides a common positive buck output circuit, comprising: a power input terminal, a power output terminal, a synchronous boost control chip and a buck unit;

[0005] The positive electrode of the power input terminal is directly connected to the positive electrode of the power output terminal;

[0006] The step-down unit includes two switches, an inductor and an output capacitor, wherein the two switches are arranged in series between the positive electrode and the negative electrode of the power input terminal, one end of the inductor is connected to the series node of the two switches, the other end of the inductor is connected to the negative electrode of the power output terminal, and the output capacitor is arranged between the positive electrode and the negative electrode of the power output terminal;

[0007] The step-down unit is used to turn on or off the corresponding switch according to the driving signal output by the synchronous boost control chip, so as to step down the charging power connected to the power input end and output it to the power output end.

[0008] In some embodiments, the two switches include a first MOS tube and a second MOS tube, the first MOS tube is connected to the negative electrode of the power input terminal, and the second MOS tube is connected to the positive electrode of the power input terminal;

[0009] The synchronous boost control chip is used to output two complementary pulse width modulation signals, wherein the first pulse width modulation signal is used to drive the first MOS tube to be turned on or off, and the second pulse width modulation signal is used to drive the second MOS tube to be turned on or off.

[0010] In some embodiments, the step-down unit is used to turn on the first MOS tube and turn off the second MOS tube when the first pulse width modulation signal is in a high level state; and to turn off the first MOS tube and turn on the second MOS tube when the first pulse width modulation signal is in a low level state.

[0011] In some embodiments, the common positive buck output circuit further includes: an output sampling unit and an isolation feedback unit;

[0012] The output sampling unit is connected to the negative electrode or the positive electrode of the power supply output terminal, and is used to feed back the collected output terminal electrical signal to the synchronous boost control chip through the isolation feedback unit, so that the synchronous boost control chip adjusts the drive signal.

[0013] In some embodiments, the output sampling unit includes a current sampling resistor connected to the negative electrode of the power supply output terminal, and the output terminal electrical signal includes an output current; the isolation feedback unit includes a current loop;

[0014] The current loop is used to differentially amplify the output current collected by the current sampling resistor to obtain an amplified signal, and when the amplified signal is greater than the target current value, a first feedback signal is generated and fed back to the synchronous boost control chip through an isolation device; the first feedback signal is used to instruct the synchronous boost control chip to adjust the drive signal to reduce the output current of the power supply output end;

[0015] The current loop is also used to generate a second feedback signal when the amplified signal is less than the target current value, and the second feedback signal is used to instruct the synchronous boost control chip to adjust the drive signal to increase the output current of the power output end.

[0016] In some embodiments, the current loop includes a differential amplifier unit, a comparator, and an isolation optocoupler connected in sequence, and the differential amplifier unit is also connected to the current sampling resistor;

[0017] The differential amplifier unit is used to differentially amplify the collected output current to obtain the amplified signal; the comparator is used to compare the amplified signal with the target current value to generate the first feedback signal or the second feedback signal; the isolation optocoupler is used to isolate the first feedback signal or the second feedback signal and feed it back to the synchronous boost control chip.

[0018] In some embodiments, the output sampling unit includes a voltage sampling resistor connected to the positive electrode of the power supply output terminal, and the output terminal electrical signal includes an output voltage; the isolation feedback unit includes a voltage loop;

[0019] The voltage loop is used to divide the output voltage collected by the voltage sampling resistor to obtain a first divided voltage; and when the first divided voltage is greater than a target voltage value, a third feedback signal is generated and fed back to the synchronous boost control chip through an isolation device; the third feedback signal is used to instruct the synchronous boost control chip to adjust the drive signal to reduce the output voltage of the power supply output end.

[0020] In some embodiments, the voltage loop includes a voltage dividing unit, a voltage stabilizing unit, and an isolation optocoupler connected in sequence;

[0021] The voltage divider unit is used to divide the output voltage to obtain a first divided voltage; the voltage stabilizing unit is used to trigger conduction when the first divided voltage is greater than a target voltage value to generate a third feedback signal; the isolation optocoupler is used to isolate and feed back the third feedback signal to the synchronous boost control chip.

[0022] In a second aspect, an embodiment of the present application further provides a BMS protection board, comprising the common positive electrode buck output circuit.

[0023] In some embodiments, the BMS protection board includes a battery connection terminal, and a charging switch tube and a discharging switch tube connected in series to the negative electrode of the battery connection terminal;

[0024] The positive pole of the power output terminal of the common positive buck output circuit is connected to the positive pole of the battery connection terminal, the negative pole of the power output terminal of the common positive buck output circuit is connected to the first signal terminal of the discharge switch tube, and the negative pole of the power input terminal of the common positive buck output circuit is connected to the second signal terminal of the discharge switch tube through a switch tube.

[0025] In a third aspect, an embodiment of the present application provides an energy storage device, including the common positive electrode buck output circuit or the BMS protection board.

[0026] In a fourth aspect, an embodiment of the present application provides a control method for a common positive buck output circuit, which is used to control the common positive buck output circuit; the synchronous boost control chip executes the control method, including:

[0027] After charging starts, the corresponding driving signal is controlled to turn on or off the corresponding switch in the step-down unit, so as to step down the power connected to the power input end and output it to the power output end.

[0028] In some embodiments, the common positive buck output circuit includes an output sampling unit and an isolation feedback unit, wherein the output sampling unit is connected to the negative electrode or the positive electrode of the power output terminal; the driving signal is a pulse width modulation signal, and the method further includes:

[0029] When the output terminal electrical signal collected by the output sampling unit is received through the isolation feedback unit, the duty cycle of the pulse width modulation signal is adjusted according to the output terminal electrical signal.

[0030] The embodiments of the present application have the following beneficial effects:

[0031] The common positive buck output circuit provided in the embodiment of the present application realizes the common positive buck output by adopting a synchronous boost control chip and a buck unit, wherein the buck unit includes two switches, an inductor and an output capacitor, the two switches are arranged in series between the positive and negative poles of the power input terminal, one end of the inductor is connected to the series node of the two switches, the other end of the inductor is connected to the negative pole of the power output terminal, and the output capacitor is arranged between the positive and negative poles of the power output terminal; the buck unit is used to turn on or off each switch according to the driving signal output by the synchronous boost control chip, so as to step down the charging power connected to the power input terminal and output it to the power output terminal. The common positive buck output circuit realizes the synchronous buck output function of the common positive pole, solves the synchronous rectification output problem of the buck circuit in the common positive pole scenario, and the problem of excessive loss of the freewheeling circuit of the traditional solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solution of the present invention, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope of protection of the present invention. For those of ordinary skill in the art, other related drawings can also be obtained based on these drawings without creative work.

[0033] Figure 1 A first circuit schematic diagram of a common positive electrode buck output circuit according to an embodiment of the present application is shown;

[0034] Figure 2 A second circuit schematic diagram of the common positive electrode buck output circuit of an embodiment of the present application is shown;

[0035] Figure 3 A schematic diagram of the structure of the current loop regulation of an embodiment of the present application is shown;

[0036] Figure 4 A circuit diagram of current loop regulation according to an embodiment of the present application is shown;

[0037] Figure 5 A schematic diagram of the structure of the current-voltage loop regulation of an embodiment of the present application is shown;

[0038] Figure 6 A circuit diagram of current-voltage loop regulation according to an embodiment of the present application is shown;

[0039] Figure 7 A flow chart showing a control method of a common positive buck output circuit according to an embodiment of the present application;

[0040] Figure 8 A structural schematic diagram of a BMS protection board according to an embodiment of the present application is shown.

[0041] Description of main component symbols:

[0042] 10-positive buck output circuit; 20-BMS protection board; 101-buck unit; 102-output sampling unit; 1021-current sampling resistor; 1022-voltage sampling resistor; 103-isolation feedback unit; 1031-current loop; 1032-voltage loop; U1-synchronous boost control chip; Q1-first MOS tube; Q2-second MOS tube; L-inductor; C1-output capacitor. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0044] The components of the embodiments of the present invention generally described and shown in the drawings herein may be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0045] Hereinafter, the terms "including", "having" and their cognates, which may be used in various embodiments of the present invention, are intended only to indicate specific features, numbers, steps, operations, elements, components or combinations of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing items or adding the possibility of one or more features, numbers, steps, operations, elements, components or combinations of the foregoing items.

[0046] Furthermore, the terms “first”, “second”, “third”, etc. are merely used for distinguishing descriptions and are not to be understood as indicating or implying relative importance.

[0047] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present invention belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present invention.

[0048] Considering that the existing battery pack charging scheme is a common positive pole output, the non-synchronous control method is mainly used to limit the current of the battery pack during the charging process. In order to reduce the conduction loss of the freewheeling diode, the charging current is usually limited, which leads to the problem of low charging efficiency. Based on this, the embodiment of the present application proposes a common positive pole buck output circuit 10, which uses a synchronous boost control chip U1 to build a buck circuit architecture with a common positive pole output, solves the problem of synchronous rectification output of the buck circuit in the common positive pole scenario, and also solves the problem of excessive loss of the traditional freewheeling circuit, thereby improving the efficiency of the buck circuit.

[0049] It is understandable that the common positive buck output circuit 10 of the embodiment of the present application can be applied to all energy storage structures composed of various forms such as battery packs and battery modules based on controlling the negative electrode. The common positive buck output circuit 10 is described below in conjunction with some specific embodiments.

[0050] Figure 1 Shown is a circuit schematic diagram of a common positive buck output circuit 10 of an embodiment of the present application. Exemplarily, the positive buck output circuit 10 includes a synchronous boost control chip U1, a buck unit 101, a power input terminal and a power output terminal; wherein the power input terminal is used to connect to an external charging power supply, and the power output terminal is used to connect to an energy storage battery. It can be understood that the power input terminal includes a positive power input terminal and a negative power input terminal, and the power output terminal includes a positive power output terminal and a negative power output terminal. In this embodiment, the positive power input terminal is directly connected to the positive power output terminal, that is, a common positive connection is formed. Since it is a common positive connection, the positive power input terminal and the positive power output terminal are represented by the same symbol, such as Figure 1 The negative pole of the power input terminal is marked as LP-, and the negative pole of the power output terminal is marked as B-.

[0051] It is understood that the above-mentioned charging power supply is mainly used to output a DC power supply, and the current and voltage of the DC power supply are usually higher than the specifications of the energy storage battery, so as to charge the energy storage battery. Optionally, the energy storage battery can be a battery pack, a battery module, etc., and its existence form is not limited here.

[0052] In this embodiment, the buck unit 101 includes two switches, an inductor L and an output capacitor C1. The two switches are arranged in series between the positive electrode B+ of the power input terminal and the negative electrode LP- of the power input terminal. One end of the inductor L is connected to the series node of the two switches, and the other end of the inductor L is connected to the negative electrode B- of the power output terminal. The output capacitor C1 is arranged between the positive electrode B+ of the power output terminal and the negative electrode B- of the power output terminal; the two switches are also connected to the synchronous boost control chip U1. The buck unit 101 is used to turn on or off each switch according to the driving signal output by the synchronous boost control chip U1, so as to step down the charging power connected to the power input terminal and output it to the power output terminal. It can be understood that the present application realizes the buck output of the common positive electrode through the synchronous boost control chip U1 and the buck unit 101, thereby charging the energy storage battery.

[0053] In one embodiment, Figure 1 As shown, the above two switches include a first MOS tube Q1 and a second MOS tube Q2, the first MOS tube Q1 is connected to the negative electrode LP- of the power input terminal, and the second MOS tube Q2 is connected to the positive electrode B+ of the power input terminal. It can be understood that the signal terminals of the first MOS tube Q1 and the second MOS tube Q2 are connected in series and arranged at both ends of the power input terminal, and the control terminals of the first MOS tube Q1 and the second MOS tube Q2 are respectively connected to the two signal output terminals of the synchronous boost control chip U1, so that the synchronous boost control chip U1 outputs the corresponding driving signal to synchronously control the first MOS tube Q1 and the second MOS tube Q2.

[0054] When two MOS transistors are used, in one embodiment, the synchronous boost control chip U1 is used to output two complementary pulse width modulation signals (i.e., PWM signals), wherein the first PWM signal is used to drive the first MOS transistor Q1 to turn on or off, and the second PWM signal is used to drive the second MOS transistor Q2 to turn on or off. It can be understood that the complementary means that the level state changes of the two PWM signals are completely opposite, that is, when the first PWM signal is in a high level state, the second PWM signal is in a low level state; conversely, when the first PWM signal is in a low level state, the second PWM signal is in a high level state.

[0055] For example, when the first PWM signal output by the synchronous boost control chip U1 is in a high level state, the first MOS tube Q1 in the buck unit 101 will be driven to turn on, and the inductor L will start to store energy. It can be understood that the current will flow from the positive electrode B+ of the power input terminal through the load (here is the energy storage battery) and the output capacitor C1, and then pass through the inductor L and then return to the negative electrode LP- of the power input terminal through the first MOS tube Q1. Correspondingly, the second PWM signal is in a low level state, so the second MOS tube Q2 is in a turned-off state at this time. When the first PWM signal is in a low level state, the first MOS tube Q1 in the buck unit 101 will be driven to turn off; correspondingly, the second pulse width modulation signal is in a high level state, so the second MOS tube Q2 will be turned on at this time to form a freewheeling loop. Correspondingly, the current changes from flowing through the first MOS tube Q1 to flowing through the second MOS tube Q2, and the output capacitor C1 and the energy storage battery will be charged at this time. Repeat the above process.

[0056] It can be understood that the model of the synchronous boost control chip U1 is not limited here, as long as it can simultaneously drive the MOS tube for bucking and the MOS tube for synchronous rectification. The buck circuit designed based on the synchronous boost control chip U1 can realize the synchronous buck output function of the common positive electrode, thereby improving the efficiency of the common positive buck circuit.

[0057] Optionally, for the above two switches, in some special cases, diodes can also be used to replace the above Figure 1 The second MOS tube Q2 in the circuit adopts an asynchronous mode to realize the step-down output. It can be understood that the synchronous step-down design using a MOS tube is more efficient than the asynchronous step-down design using a diode, because the conduction voltage drop of the MOS tube is much smaller than the conduction voltage drop of the diode.

[0058] Exemplarily, when an asynchronous mode is adopted, the two switches include a first MOS tube Q1 and a diode, wherein the first MOS tube Q1 is connected to the negative electrode LP- of the power input terminal, and the diode is connected to the positive electrode B+ of the power input terminal. The synchronous boost control chip U1 is used to output a pulse width modulation signal to drive the first MOS tube Q1 to turn on or off. Optionally, since only the first MOS tube Q1 needs to be controlled, an asynchronous boost control chip U1 such as a microcontroller (MCU) with a switch tube driving function can also be used to implement it.

[0059] As an optional implementation, some feedback closed-loop regulation loops can also be set in the common positive buck output circuit 10, so that the common positive buck output circuit 10 can automatically adjust the output so that the output is stable at the set value. For example, when the power supply output end may have uncertain or abnormal output conditions such as short circuit, overvoltage, overcurrent or overload, this can increase the output stability and reliability of the common positive buck output circuit 10.

[0060] Exemplarily, the common positive buck output circuit 10 further includes an output sampling unit 102 and an isolation feedback unit 103, wherein the output sampling unit 102 is connected to the negative electrode B- of the power output terminal or the positive electrode B+ of the power output terminal. Figure 2 As shown, the output sampling unit 102 is connected to the negative electrode B- of the power output terminal, and is used to feed back the collected output terminal electrical signal to the synchronous boost control chip U1 through the isolated feedback unit 103, so that the synchronous boost control chip U1 adjusts the drive signal. It can be understood that since the negative electrode LP- of the power input terminal and the negative electrode B- of the power output terminal of this embodiment are not grounded, the isolated feedback regulation mode is adopted here.

[0061] The above-mentioned output terminal electrical signal may include one or a combination of output current, output voltage, etc. In other words, the common positive buck output circuit 10 can collect the corresponding electrical signal of the power output terminal and feed it back to the synchronous boost control chip U1 through isolated feedback, so that the synchronous boost control chip U1 can dynamically adjust the drive signal.

[0062] In a first embodiment, if the output terminal electrical signal includes an output current, for example, in one embodiment, Figure 3 As shown, the output sampling unit 102 includes a current sampling resistor 1021 connected to the negative electrode B- of the power output terminal, and the isolation feedback unit 103 includes a current loop 1031, and the current loop 1031 is connected to the current sampling resistor 1021. Among them, the current loop 1031 is used to differentially amplify the output current collected by the current sampling resistor 1021 to obtain an amplified signal, and when the amplified signal is greater than the target current value, a first feedback signal is generated and fed back to the synchronous boost control chip U1 through the isolation device. Among them, the first feedback signal is used to instruct the synchronous boost control chip U1 to adjust the drive signal to reduce the output current of the power output terminal, that is, to form a closed-loop current regulation. For example, the duty cycle of the PWM signal can be reduced to narrow the waveform of the drive signal, thereby reducing the output current.

[0063] In addition, the current loop 1031 can also be used to generate a second feedback signal when the amplified signal is less than the target current value, that is, the output current becomes smaller, and the second feedback signal is used to instruct the synchronous boost control chip U1 to adjust the drive signal to increase the output current of the power output terminal. For example, the duty cycle of the PWM signal can be increased to widen the waveform of the drive signal, thereby increasing the output current.

[0064] It is understood that the above-mentioned target current value can be set according to actual needs, for example, it can be adaptively set according to the charging current required by the energy storage battery, and is not limited here. The "first" and "second" in the above-mentioned first feedback signal and second feedback signal are mainly used to distinguish the feedback signals of different states generated by the current loop 1031 when the amplified signal and the target current value are different in size.

[0065] In one implementation, the current loop 1031 includes a differential amplifier unit, a comparator, and an isolation optical coupler connected in sequence, and the differential amplifier unit is also connected to the current sampling resistor 1021. For example, Figure 4 As shown, the differential amplifier unit includes a first op amp U3A, resistors R8-R11, capacitors C5-C6, C8, etc.; the comparator includes a second op amp U3B, capacitors C3-C4, resistors R5-R7, and a diode D1, etc.; the transmitting end of the isolation optocoupler U2 is connected to the diode D1 through the resistor R5, and is also connected to the power supply voltage 12V through the resistor R2, and the receiving end of the isolation optocoupler U2 is fed back to the feedback end FB of the synchronous boost control chip U1 through the resistors R1, R3-R4 and capacitor C2. It can be understood that the above circuit is only a feasible example, not the only limitation, and can be adaptively adjusted in actual use.

[0066] Exemplarily, the differential amplifier unit is used to differentially amplify the collected output current to obtain an amplified signal; the comparator is used to compare the amplified signal with the target current value to generate a first feedback signal or a second feedback signal; the isolation optocoupler is used to isolate the first feedback signal or the second feedback signal and feed it back to the synchronous boost control chip U1.

[0067] For example, when the output current signal is differentially amplified by the differential amplification unit composed of the first op amp U3A and the like and then output to the second op amp U3B, when the output current is higher than the target current value, the second op amp U3B will output a low-level feedback signal, at which time the transmitter of the isolation optocoupler U2 forms a conduction loop, and then the feedback end FB of the synchronous boost control chip U1 is pulled up through the receiving end, thereby controlling the waveform of the drive signal to become narrower, so that the output current is reduced. Conversely, when the output current is lower than the target current value, the second op amp U3B will output a high-level feedback signal, at which time the transmitter of the isolation optocoupler U2 cannot form a conduction loop, and then the feedback end FB of the synchronous boost control chip U1 is pulled down, thereby controlling the waveform of the drive signal to become wider, so that the output current increases. This cycle allows the output to stably operate at the target current value.

[0068] In the second implementation, if the output terminal electrical signal also includes an output voltage, for example, in one embodiment, the output sampling unit 102 includes a voltage sampling resistor 1022 connected to the positive electrode B+ of the power supply output terminal, and the output terminal electrical signal includes the output voltage; the isolation feedback unit 103 includes a voltage loop 1032; Figure 5 As shown, the voltage sampling resistor 1022 is connected to the voltage loop 1032. Among them, the voltage loop 1032 is used to divide the output voltage collected by the voltage sampling resistor 1022 to obtain a first divided voltage, and when the first divided voltage is greater than the target voltage value, a third feedback signal is generated and fed back to the synchronous boost control chip U1 through the isolation device; the third feedback signal is used to instruct the synchronous boost control chip U1 to adjust the drive signal to reduce the output voltage at the output end of the power supply, that is, to form a closed-loop voltage regulation. For example, the duty cycle of the PWM signal can be reduced to narrow the waveform of the drive signal, thereby reducing the output voltage. Conversely, the duty cycle of the PWM signal can also be increased to widen the waveform of the drive signal, thereby increasing the output voltage, etc.

[0069] It can be understood that the above-mentioned target voltage value can be set according to actual needs. For example, it can be adaptively set according to the charging voltage required by the energy storage battery, and is not limited here.

[0070] In one implementation, the voltage loop 1032 includes a voltage divider unit, a voltage stabilizing unit, and an isolation optical coupler connected in sequence, and the voltage sampling resistor 1022 is connected to the voltage divider unit. Figure 6 As shown, the voltage sampling resistor 1022 is R16, and the voltage dividing unit includes resistors R14-R15. It can be understood that resistors R14-R15 divide the voltage with resistor R16; the voltage stabilizing unit includes peripheral devices such as thyristor U4, capacitors C7-C8, and resistors R12-R13; the transmitting end of the isolation optocoupler U2 is connected to the thyristor U4 through resistor R12, and the receiving end of the isolation optocoupler U2 is fed back to the feedback end FB of the synchronous boost control chip U1 through resistors R3-R4 and capacitor C2. It can be understood that the above circuit is only a feasible example and is not the only limitation. It can be adaptively adjusted in actual application.

[0071] Exemplarily, the voltage divider unit is used to divide the output voltage to obtain a first divided voltage; the voltage stabilizing unit is used to trigger conduction when the first divided voltage is greater than the target voltage value to generate a third feedback signal; the isolation optocoupler is used to isolate the third feedback signal and feed it back to the synchronous boost control chip U1. For example, when the voltage divided signal obtained by the voltage divider unit is connected to the control end of the thyristor U4; it can be understood that the first divided voltage is in a corresponding proportional relationship with the output voltage. Therefore, when the output voltage is greater than the target voltage value, the thyristor U4 is turned on, the transmitting end of the isolation optocoupler U2 is turned on, and then the feedback end FB of the synchronous boost control chip U1 is pulled up through the receiving end of the isolation optocoupler U2, thereby controlling the waveform of the drive signal to become narrower, so that the output voltage is reduced.

[0072] It can be understood that the current loop 1031 and the voltage loop 1032 in the above embodiment both use an isolated optical coupler, and therefore can be shared. Specifically, the output end of the comparator in the current loop 1031 and the voltage stabilizing unit in the voltage loop 1032 are connected in parallel at the transmitting end of the isolated optical coupler, such as Figure 6 It can be understood that the above circuit is only a feasible example and is not intended to be the only limitation, and can be adaptively adjusted in actual application.

[0073] In a third implementation, the voltage loop 1032 may exist alone. In other words, the isolated feedback unit 103 may only include the voltage loop 1032 .

[0074] It can be understood that the common positive buck output circuit 10 of this embodiment not only utilizes the synchronous boost control chip U1 and the buck unit 101 to achieve buck, but also further arranges a corresponding sampling unit and feeds back the output electrical signal to the synchronous boost control chip U1 through the corresponding isolation feedback unit 103, so that it can adjust the output drive signal, thereby affecting the output, forming a closed-loop regulation, which can increase the output stability of the circuit, etc., and can also cope with more scenarios, etc.

[0075] Based on the common positive electrode buck output circuit 10 of the above structure, Figure 7 As shown, the embodiment of the present application also proposes a control method of the common positive buck output circuit 10, so that the common positive buck output circuit 10 can achieve the buck output function. The method is executed by the synchronous boost control chip U1. Exemplarily, the control method includes:

[0076] S100, after charging starts, the corresponding driving signal is controlled to turn on or off the corresponding switch in the step-down unit 101, so as to step down the power connected to the power input terminal and output it to the power output terminal.

[0077] It can be understood that when both switches are MOS tubes, the synchronous boost control chip U1 will output two complementary drive signals, such as pulse width modulation signals, to drive the two switches to be turned on or off respectively, thereby performing a step-down output through the step-down unit 101 .

[0078] As an optional solution, if the common positive buck output circuit 10 further includes the output sampling unit 102 and the isolation feedback unit 103 in the above embodiment, and the pulse width modulation signal is used as the driving signal, the control method further includes:

[0079] S200 , after receiving the output terminal electrical signal collected by the output sampling unit 102 through the isolation feedback unit 103 , the duty cycle of the pulse width modulation signal is adjusted according to the output terminal electrical signal to adjust the output electrical signal of the common positive buck output circuit 10 .

[0080] It is understood that the output electrical signal here can be an output current or an output voltage, etc., which is not limited here. Regarding how to adjust the duty cycle of the pulse width modulation signal according to the output terminal electrical signal, please refer to the description in the above embodiment, and will not be repeated here.

[0081] The embodiment of the present application also proposes a BMS (power management system) protection board. Exemplarily, the BMS protection board 20 includes the common positive buck output circuit 10 of the above embodiment. For example, in one embodiment, the BMS protection board 20 includes a battery connection terminal, and a charging switch tube and a discharging switch tube connected in series at the negative electrode of the battery connection terminal, and the common positive buck output circuit 10 is connected in parallel at both ends of the discharging switch tube.

[0082] For example, Figure 8 As shown, the positive electrode B+ of the power output terminal of the common positive buck output circuit 10 is connected to the positive electrode of the battery connection terminal, the negative electrode B- of the power output terminal of the common positive buck output circuit 10 is connected to the first signal terminal of the discharge switch tube, and the negative electrode LP- of the power input terminal of the common positive buck output circuit 10 can be connected to the second signal terminal of the discharge switch tube through a switch tube (such as a MOS tube, etc.). Furthermore, the negative electrode LP- of the power input terminal can also be connected to the positive electrode B+ of the power output terminal through a capacitor.

[0083] It can be understood that the BMS protection board 20 usually adopts a working mode of controlling the negative electrode to be disconnected or turned on, and the common positive electrode buck output circuit 10 proposed in this embodiment is designed based on the common positive electrode, so it can minimize the impact on the design of the original BMS protection board 20, that is, it is extremely convenient to be set in the BMS protection board 20.

[0084] The present application also provides an energy storage device, which exemplarily includes the common positive buck output circuit 10 or the BMS protection board 20 described in the above embodiment. It can be understood that the options in the above embodiment are also applicable to this embodiment, so they will not be described again here.

[0085] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow diagram, and the combination of boxes in the structure diagram and / or the flow diagram, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0086] In addition, the functional modules or units in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0087] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application.

[0088] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A common positive electrode buck output circuit, characterized in that: include: Power input terminal, power output terminal, synchronous boost control chip and buck unit; The positive electrode of the power input terminal is directly connected to the positive electrode of the power output terminal; The step-down unit includes two switches, an inductor and an output capacitor, wherein the two switches are arranged in series between the positive electrode and the negative electrode of the power input terminal, one end of the inductor is connected to the series node of the two switches, the other end of the inductor is connected to the negative electrode of the power output terminal, and the output capacitor is arranged between the positive electrode and the negative electrode of the power output terminal; The step-down unit is used to turn on or off the corresponding switch according to the driving signal output by the synchronous boost control chip, so as to step down the charging power connected to the power input end and output it to the power output end.

2. The common positive electrode buck output circuit according to claim 1, characterized in that: The two switches include a first MOS tube and a second MOS tube, the first MOS tube is connected to the negative electrode of the power input terminal, and the second MOS tube is connected to the positive electrode of the power input terminal; The synchronous boost control chip is used to output two complementary pulse width modulation signals, wherein the first pulse width modulation signal is used to drive the first MOS tube to be turned on or off, and the second pulse width modulation signal is used to drive the second MOS tube to be turned on or off.

3. The common positive electrode buck output circuit according to claim 2, characterized in that: The step-down unit is used to turn on the first MOS tube and turn off the second MOS tube when the first pulse width modulation signal is in a high level state; and to turn off the first MOS tube and turn on the second MOS tube when the first pulse width modulation signal is in a low level state.

4. The common positive electrode buck output circuit according to claim 1, characterized in that: Also includes: Output sampling unit and isolated feedback unit; The output sampling unit is connected to the negative electrode or the positive electrode of the power supply output terminal, and is used to feed back the collected output terminal electrical signal to the synchronous boost control chip through the isolation feedback unit, so that the synchronous boost control chip adjusts the drive signal.

5. The common positive electrode buck output circuit according to claim 4, characterized in that: The output sampling unit includes a current sampling resistor connected to the negative electrode of the power supply output terminal, and the output terminal electrical signal includes an output current; the isolation feedback unit includes a current loop; The current loop is used to differentially amplify the output current collected by the current sampling resistor to obtain an amplified signal, and when the amplified signal is greater than the target current value, generate a first feedback signal and feed it back to the synchronous boost control chip through an isolation device; The first feedback signal is used to instruct the synchronous boost control chip to adjust the drive signal to reduce the output current of the power output end; The current loop is also used to generate a second feedback signal when the amplified signal is less than the target current value, and the second feedback signal is used to instruct the synchronous boost control chip to adjust the drive signal to increase the output current of the power output end.

6. The common positive electrode buck output circuit according to claim 5, characterized in that: The current loop includes a differential amplifier unit, a comparator and an isolation optical coupler connected in sequence, and the differential amplifier unit is also connected to the current sampling resistor; The differential amplifier unit is used to differentially amplify the collected output current to obtain the amplified signal; the comparator is used to compare the amplified signal with the target current value to generate the first feedback signal or the second feedback signal; the isolation optocoupler is used to isolate the first feedback signal or the second feedback signal and feed it back to the synchronous boost control chip.

7. The common positive electrode buck output circuit according to claim 4 or 5, characterized in that: The output sampling unit includes a voltage sampling resistor connected to the positive electrode of the power supply output terminal, and the output terminal electrical signal includes an output voltage; the isolation feedback unit includes a voltage loop; The voltage loop is used to divide the output voltage collected by the voltage sampling resistor to obtain a first divided voltage; and when the first divided voltage is greater than a target voltage value, a third feedback signal is generated and fed back to the synchronous boost control chip through an isolation device; The third feedback signal is used to instruct the synchronous boost control chip to adjust the drive signal to reduce the output voltage of the power output terminal.

8. The common positive electrode buck output circuit according to claim 7, characterized in that: The voltage loop includes a voltage dividing unit, a voltage stabilizing unit and an isolation optical coupler connected in sequence; The voltage divider unit is used to divide the output voltage to obtain the first divided voltage; the voltage stabilizing unit is used to trigger conduction when the first divided voltage is greater than the target voltage value to generate a third feedback signal; the isolation optocoupler is used to isolate and feed back the third feedback signal to the synchronous boost control chip.

9. A BMS protection board, characterized in that: The invention comprises the common positive electrode buck output circuit as claimed in any one of claims 1 to 8.

10. The BMS protection board according to claim 9, characterized in that: The BMS protection board includes a battery connection terminal, and a charging switch tube and a discharging switch tube connected in series to the negative electrode of the battery connection terminal; The positive pole of the power output terminal of the common positive buck output circuit is connected to the positive pole of the battery connection terminal, the negative pole of the power output terminal of the common positive buck output circuit is connected to the first signal terminal of the discharge switch tube, and the negative pole of the power input terminal of the common positive buck output circuit is connected to the second signal terminal of the discharge switch tube through a switch tube.

11. An energy storage device, characterized in that: It comprises the common positive buck output circuit as described in any one of claims 1 to 8 or the BMS protection board as described in any one of claims 9 to 10.

12. A control method for a common positive electrode buck output circuit, characterized in that: Used to control the common positive buck output circuit according to any one of claims 1 to 8; the synchronous boost control chip executes the control method, including: After charging starts, the corresponding driving signal is controlled to turn on or off the corresponding switch in the step-down unit, so as to step down the power connected to the power input end and output it to the power output end.

13. The control method of the common positive electrode buck output circuit according to claim 12, characterized in that: The common positive buck output circuit includes an output sampling unit and an isolation feedback unit, wherein the output sampling unit is connected to the negative electrode or the positive electrode of the power output terminal; the driving signal is a pulse width modulation signal, and the method further includes: When the output terminal electrical signal collected by the output sampling unit is received through the isolation feedback unit, the duty cycle of the pulse width modulation signal is adjusted according to the output terminal electrical signal.

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