Pulse Width Modulation Signal Generator and Voltage Conversion Circuit

Abstract

The present invention discloses a pulse width modulation signal generator and a voltage conversion circuit. The pulse width modulation signal generator includes a driving unit and at least one substrate selection circuit; the driving unit is connected to the gates of at least a pair of switching transistors for providing a pulse width modulation signal to the switching transistors, the first end of the substrate selection circuit is connected to the substrates of the switching transistors, the second end of the substrate selection circuit is connected to a power input terminal or a ground terminal, and the third end of the substrate selection circuit is connected to a first node. The substrate selection circuit is used for adjusting the potential difference between the substrate and the source of the switching transistor when the potential of the first node exceeds a preset potential range, so that the threshold voltage of the switching transistor can be adjusted according to the body effect of the switching transistor, and further the on-resistance and the switching speed of the switching transistor can be adjusted, thereby improving the adjustment accuracy of the duty cycle of the potential waveform of the first node and meeting the application requirements of circuits such as power management.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of power electronics, and in particular to a pulse width modulation signal generator and a voltage conversion circuit. Background Art

[0002] Pulse Width Modulation (PWM) controls the average value of the output signal by changing the width (i.e., duty cycle) of the pulse signal. It can be applied to fields such as motor control, dimming, and power management. The traditional digital PWM generator generates the required pulse width signal through digital circuits (such as counters, comparators, clock sources, etc.). At this time, the resolution of the traditional PWM generator is limited by the number of bits of the digital circuit, and the frequency is limited by the counting speed and clock frequency of the digital circuit, which makes the traditional PWM generator have limited resolution, poor frequency stability, high hardware consumption, and output frequency limitation. When the PWM signal is applied to a switching power supply, the output voltage of the switching power supply is proportional to the duty cycle of the PWM signal. When the resolution of the PWM signal is limited, the accuracy of the PWM signal in controlling the output voltage is limited, which makes the accuracy of the output voltage provided by the switching power supply limited and cannot meet the application requirements of the switching power supply. Summary of the invention

[0003] The present invention provides a pulse width modulation signal generator and a voltage conversion circuit to improve the adjustment accuracy of the duty cycle of a PWM signal and improve the accuracy of the output voltage of the voltage conversion circuit.

[0004] In a first aspect, an embodiment of the present invention provides a pulse width modulation signal generator for controlling at least one pair of switch tubes to be turned on in time-sharing mode; each pair of switch tubes is connected in series between a power input terminal and a ground terminal, and a node where each pair of switch tubes are connected to each other is a first node; the pulse width modulation signal generator includes a driving unit and at least one substrate selection circuit;

[0005] The driving unit is connected to the gates of at least one pair of the switching tubes, and is used to provide a pulse width modulation signal for the switching tubes. The first end of the substrate selection circuit is connected to the substrate of the switching tube, the second end of the substrate selection circuit is connected to the power input end or the ground end, and the third end of the substrate selection circuit is connected to the first node. The substrate selection circuit is used to adjust the potential difference between the substrate and the source of the switching tube when the potential of the first node exceeds a preset potential range.

[0006] Optionally, at least one substrate selection circuit includes a first substrate selection circuit and a second substrate selection circuit; each pair of switch tubes includes a first switch tube and a second switch tube;

[0007] The drain of the first switching transistor is connected to the power input terminal, the source of the first switching transistor is connected to the drain of the second switching transistor and serves as the first node, and the source of the second switching transistor is connected to the ground terminal;

[0008] The first end of the first substrate selection circuit is connected to the substrate of the first switching transistor, the second end of the first substrate selection circuit is connected to the power input terminal, the third end of the first substrate selection circuit is connected to the first node, and the first substrate selection circuit is configured to increase the potential difference between the substrate and the source of the first switching transistor when the potential of the first node is greater than the power supply voltage provided by the power input terminal;

[0009] The first end of the second substrate selection circuit is connected to the substrate of the second switching transistor, the second end of the second substrate selection circuit is connected to the ground terminal, the third end of the second substrate selection circuit is connected to the first node, and the second substrate selection circuit is configured to increase the potential difference between the substrate and the source of the second switching transistor when the potential of the first node is less than the zero voltage provided by the ground terminal.

[0010] Optionally, the first substrate selection circuit includes an overvoltage detection circuit, a first switching unit, a first voltage dividing unit, and a first resistance adjusting unit;

[0011] The input terminal of the overvoltage detection circuit is connected to the first node, the output terminal of the overvoltage detection circuit is connected to the control terminal of the first switching unit, the first end of the first voltage dividing unit is connected to the substrate of the first switching transistor, the second end of the first voltage dividing unit is connected to the first node through the first switching unit, the voltage dividing terminal of the first voltage dividing unit is connected to the first end of the first resistance adjusting unit, and the second end of the first resistance adjusting unit is connected to the power input terminal and the first node respectively through the first switching unit; the overvoltage detection circuit is configured to detect the potential of the first node and control the state of the first switching unit to conduct the second end of the first voltage dividing unit and the first node, and the second end of the first resistance adjusting unit and the power input terminal when the potential of the first node is greater than the power supply voltage; control the state of the first switching unit to conduct the second end of the first resistance adjusting unit and the first node when the potential of the first node is less than the power supply voltage; the first resistance adjusting unit is configured to provide resistors with different resistance values according to the gear signal.

[0012] Optionally, the first switching unit includes a first controllable switch, a second controllable switch, and a third controllable switch;

[0013] The first end of the first controllable switch and the first end of the third controllable switch are connected to the first node. The second end of the first controllable switch is connected to the second end of the first voltage dividing unit. The first end of the second controllable switch is connected to the power input terminal. The second end of the second controllable switch and the second end of the third controllable switch are connected to the second end of the first resistance adjusting unit. The control ends of the first controllable switch, the second controllable switch, and the third controllable switch are connected to the output end of the overvoltage detection circuit.

[0014] Optionally, the first resistance adjusting unit includes at least one group of first resistance selectors. The first resistance selector includes a first-gear resistance and a first gating switch. The first end of the first-gear resistance is connected to the first end of the first gating switch. The second end of the first-gear resistance is connected to the second end of the first gating switch. The control end of the first gating switch is used to input the gear signal. At least one group of the first resistance selectors is connected in series between the voltage dividing end of the first voltage dividing unit and the second end of the second controllable switch.

[0015] Optionally, the first voltage dividing unit includes a first voltage dividing resistor and a second voltage dividing resistor.

[0016] The first end of the first voltage dividing resistor is connected to the substrate of the first switching transistor. The second end of the first voltage dividing resistor is connected to the first end of the second voltage dividing resistor and serves as the voltage dividing end of the first voltage dividing unit. The second end of the second voltage dividing resistor is connected to the second end of the first controllable switch.

[0017] Optionally, the second substrate selection circuit includes a zero-crossing detection circuit, a second switching unit, a second voltage dividing unit, and a second resistance adjusting unit.

[0018] The input end of the zero-crossing detection circuit is connected to the first node. The output end of the zero-crossing detection circuit is connected to the control end of the second switching unit. The first end of the second voltage dividing unit is connected to the substrate of the second switching transistor. The second end of the second voltage dividing unit is connected to the first node through the second switching unit. The voltage dividing end of the second voltage dividing unit is connected to the first end of the second resistance adjusting unit. The second end of the second resistance adjusting unit is connected to the ground terminal. The zero-crossing detection circuit is used to detect the potential of the first node and control the second switching unit to conduct the second end of the second voltage dividing unit and the first node when the potential of the first node is less than the zero voltage. The second resistance adjusting unit is used to provide resistors with different resistance values according to the gear signal.

[0019] Optionally, the second resistance adjustment unit includes at least one group of second resistance selectors; the second resistance selector includes a second gear resistor and a second selection switch; the first end of the second gear resistor is connected to the first end of the second selection switch, the second end of the second gear resistor is connected to the second end of the second selection switch, and the control end of the second selection switch is used to input the gear signal; at least one group of the second resistance selectors is connected in series between the voltage dividing end of the second voltage dividing unit and the ground end.

[0020] Optionally, the second voltage-dividing unit includes a third voltage-dividing resistor and a fourth voltage-dividing resistor;

[0021] The first end of the third voltage-dividing resistor is connected to the substrate of the second switch tube, the second end of the third voltage-dividing resistor is connected to the first end of the fourth voltage-dividing resistor and serves as the voltage-dividing end of the second voltage-dividing unit, and the second end of the fourth voltage-dividing resistor is connected to the first node through the second switch unit.

[0022] In a second aspect, an embodiment of the present invention further provides a voltage conversion circuit, comprising a pair of switching tubes and the pulse width modulation signal generator described in the first aspect; the pulse width modulation signal generator is connected to the pair of switching tubes for controlling the time-sharing conduction of the pair of switching tubes.

[0023] The technical solution of the embodiment of the present invention is to adjust the potential difference between the substrate and the source of the switch tube when the potential of the first node exceeds the preset potential range through the substrate selection circuit, so that the threshold voltage of the switch tube can be adjusted according to the body effect of the switch tube. The threshold voltage is positively correlated with the on-resistance of the switch tube. When the threshold voltage changes, the on-resistance and the switching speed of the switch tube can be adjusted, so that the potential of the first node can be adjusted in the transition stage of charging and discharging, so that on the basis of the duty cycle of the potential waveform of the first node controlled by the PWM signal, the duty cycle of the potential waveform of the first node can be further adjusted, thereby improving the adjustment accuracy of the duty cycle of the potential waveform of the first node. When the pulse width modulation signal is applied to circuits such as power management, the adjustment accuracy of the average value of the output signal of the circuits such as power management can be improved, and the application requirements of circuits such as power management can be met. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of a voltage conversion circuit provided for related technology;

[0025] Figure 2 A timing diagram of a clock signal and a PWM signal provided for related technology;

[0026] Figure 3 A schematic diagram of the structure of a pulse width modulation signal generator provided by an embodiment of the present invention;

[0027] Figure 4 A schematic diagram of the structure of another pulse width modulation signal generator provided by an embodiment of the present invention;

[0028] Figure 5 A schematic diagram of a duty cycle of a potential waveform of a first node provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0030] Figure 1 A schematic diagram of a voltage conversion circuit provided in the related art. Figure 1 As shown, the voltage conversion circuit includes a digital circuit 10, a driving circuit 20, a first power tube MN1 and a second power tube MN2. The digital circuit 10 can provide a digital PWM signal to the driving circuit 20, and then the driving circuit 20 forms a first driving signal HS_GD and a second driving signal LS_GD according to the digital PWM signal. The first driving signal HS_GD and the second driving signal LS_GD can drive the first power tube MN1 and the second power tube MN2 to be turned on in time-sharing manner, so that the intermediate node SW of the first power tube MN1 and the second power tube MN2 generates a square wave. Among them, the digital circuit 10 can be a micro control unit (Micro Control Unit, MCU). In the above process, the digital circuit 10 can generate a clock signal of a fixed frequency, and the clock signal drives the counter to count. When the counter exceeds the comparator value, a high level is transmitted, and when the counter is lower than the comparator value, a low level is transmitted. When adjusting the duty cycle of the square wave of the intermediate node SW, the counter value can be adjusted to change the output power of the voltage conversion circuit. Exemplarily, Figure 2 A timing diagram of a clock signal and a PWM signal provided for related technologies. Figure 2 As shown, the value of the counter can be 11. When the counter counts the clock signal CLK to 11, the PWM signal jumps from a low level to a high level. From the above process, it can be seen that the minimum duty cycle adjustment ratio of the PWM signal is limited by the resolution of the clock signal. With the development of science and technology, the resolution of the current clock signal cannot meet the needs of circuits such as power management.

[0031] In view of the above technical problems, an embodiment of the present invention provides a pulse width modulation signal generator. Figure 3 A schematic diagram of the structure of a pulse width modulation signal generator provided by an embodiment of the present invention.Figure 3 As shown, the pulse width modulation signal generator is used to control the turn-on of at least a pair of switching tubes in a time-sharing manner; each pair of switching tubes is connected in series between the power input terminal VIN and the ground terminal GND, and the node where each pair of switching tubes is connected to each other is the first node N1. The pulse width modulation signal generator includes a driving unit 110 and at least one substrate selection circuit 120; the driving unit 110 is connected to the gates of at least a pair of switching tubes and is used to provide a pulse width modulation signal for the switching tubes. The first end P1 of the substrate selection circuit 120 is connected to the substrate B of the switching tubes, the second end P2 of the substrate selection circuit 120 is connected to the power input terminal VIN or the ground terminal GND, and the third end P3 of the substrate selection circuit 120 is connected to the first node N1. The substrate selection circuit 120 is used to adjust the potential difference between the substrate B and the source of the switching tubes when the potential of the first node N1 exceeds the preset potential range.

[0032] Specifically, Figure 3 FIG. shows an example in which the pulse width modulation signal generator is used to control a pair of switching tubes. The driving unit 110 is connected to the gates of the switching tubes and is used to provide a PWM signal for the switching tubes, so that the potential of the first node N1 is a square wave. By adjusting the duty cycle of the square wave, the average value of the output signal of the switching tubes can be adjusted. Exemplarily, a pair of switching tubes includes a first switching tube MN3 and a second switching tube MN4, and the first switching tube MN3 and the second switching tube MN4 are of the same type, for example, both are N-type transistors. The driving unit 110 may include a digital circuit and a driving circuit. The digital circuit generates a digital PWM signal and outputs it to the driving circuit. The driving circuit outputs a first PWM signal and a second PWM signal with opposite waveforms according to the digital PWM signal. The first PWM signal is output to the first switching tube MN3, and the second PWM signal is output to the second switching tube MN4. The first node N1 is connected to the load and is used to supply power to the load. For example, the load may include a charging inductor L1. When the first PWM signal is at a high level and the second PWM signal is at a low level, the first switching tube MN3 is turned on and the second switching tube MN4 is turned off. The power voltage provided by the power input terminal VIN charges the load through the first switching tube MN3. At this time, the potential of the first node N1 is at a high level. When the first PWM signal is at a low level and the second PWM signal is at a high level, the first switching tube MN3 is turned off and the second switching tube MN4 is turned on. The load discharges through the second switching tube MN4. At this time, the potential of the first node N1 is at a low level. Thus, by adjusting the duty cycles of the first PWM signal and the second PWM signal, the on-time of the first switching tube MN3 and the second switching tube MN4 can be adjusted, and further the duty cycle of the potential waveform of the first node N1 can be adjusted to adjust the average value of the output signal.

[0033] The preset potential range is set according to the potential of the first node N1 when at least one pair of switching transistors operates in the charging stage or the discharging stage. When the first switching transistor MN3 is turned on and the second switching transistor MN4 is turned off, the potential of the first node N1 can be approximately equal to the power supply voltage Vin provided by the power supply input terminal VIN. When the first switching transistor MN3 is turned off and the second switching transistor MN4 is turned on, the potential of the first node N1 can be approximately equal to the zero potential provided by the ground terminal GND. At this time, the preset potential range can be 0 - Vin. When at least one pair of switching transistors operates in the transition stage of charge and discharge, due to the device characteristics of the switching transistors and the load, the potential of the first node N1 exceeds the preset potential range. At this time, the substrate selection circuit 120 can adjust the potential difference between the substrate B and the source of the switching transistor, so as to adjust the threshold voltage of the switching transistor according to the body effect of the switching transistor. The threshold voltage is positively correlated with the on-resistance of the switching transistor. When the threshold voltage changes, the on-resistance and switching speed of the switching transistor can be adjusted, so as to adjust the potential of the first node N1 in the transition stage of charge and discharge, that is, on the basis of the PWM signal controlling the duty cycle of the potential waveform of the first node N1, the duty cycle of the potential waveform of the first node N1 can be further adjusted, improving the adjustment accuracy of the duty cycle of the potential waveform of the first node N1. When the pulse width modulation signal is applied to circuits such as power management, the adjustment accuracy of the average value of the output signal of circuits such as power management can be improved, meeting the application requirements of circuits such as power management.

[0034] The technical solution of this embodiment adjusts the potential difference between the substrate and the source of the switching transistor through the substrate selection circuit when the potential of the first node exceeds the preset potential range, so as to adjust the threshold voltage of the switching transistor according to the body effect of the switching transistor. The threshold voltage is positively correlated with the on-resistance of the switching transistor. When the threshold voltage changes, the on-resistance and switching speed of the switching transistor can be adjusted, so as to adjust the potential of the first node in the transition stage of charge and discharge, and thus on the basis of the PWM signal controlling the duty cycle of the potential waveform of the first node, the duty cycle of the potential waveform of the first node can be further adjusted, improving the adjustment accuracy of the duty cycle of the potential waveform of the first node. When the pulse width modulation signal is applied to circuits such as power management, the adjustment accuracy of the average value of the output signal of circuits such as power management can be improved, meeting the application requirements of circuits such as power management.

[0035] Continue to refer to Figure 3, at least one substrate selection circuit 120 includes a first substrate selection circuit 121 and a second substrate selection circuit 122; each pair of switching transistors includes a first switching transistor MN3 and a second switching transistor MN4; the drain of the first switching transistor MN3 is connected to the power input terminal VIN, the source of the first switching transistor MN3 is connected to the drain of the second switching transistor MN4 and serves as a first node N1, and the source of the second switching transistor MN4 is connected to the ground terminal GND; the first end P1 of the first substrate selection circuit 121 is connected to the substrate B of the first switching transistor MN3, the second end P2 of the first substrate selection circuit 121 is connected to the power input terminal VIN, the third end P3 of the first substrate selection circuit 121 is connected to the first node N1, and the first substrate selection circuit 121 is configured to increase the potential difference between the substrate B and the source of the first switching transistor MN3 when the potential of the first node N1 is greater than the power supply voltage provided by the power input terminal VIN; the first end P1 of the second substrate selection circuit 122 is connected to the substrate B of the second switching transistor MN4, the second end P2 of the second substrate selection circuit 122 is connected to the ground terminal GND, the third end P3 of the second substrate selection circuit 122 is connected to the first node N1, and the second substrate selection circuit 122 is configured to increase the potential difference between the substrate B and the source of the second switching transistor MN4 when the potential of the first node N1 is less than the zero voltage provided by the ground terminal GND.

[0036] Specifically, when the first switching transistor MN3 is turned on and the second switching transistor MN4 is turned off, the power supply voltage provided by the power input terminal VIN charges the charging inductor L1 in the load through the first switching transistor MN3. At this time, the potential of the first node N1 is the difference between the power supply voltage and the on-voltage of the first switching transistor MN3. In the transition stage, the first switching transistor MN3 is turned off. Since the current in the charging inductor L1 in the load cannot change abruptly, and at the same time, the body diode of the second switching transistor MN4 has a freewheeling effect, the charging inductor L1, the first discharge capacitor C1, the third discharge capacitor C3, and the body diode of the second switching transistor MN4 form a discharge loop. The potential of the first node N1 drops to the on-voltage of the second switching transistor MN4, for example, 0.7V, and as the discharge time of the charging inductor L1 increases, the potential of the first node N1 continues to drop. When the potential of the first node N1 is less than or equal to 0V, the second substrate selection circuit 122 can increase the potential difference between the substrate B and the source of the second switching transistor MN4. Additionally, the threshold voltage V TH is:

[0037]

[0038] wherein, V TH0 is the threshold voltage when the voltage between the source and the substrate of the switching transistor is 0; k is the Boltzmann constant, q is the electron charge, N sub is the doping concentration of the substrate of the switching transistor, n iis the intrinsic carrier concentration of the silicon of the switch transistor substrate, T is the thermodynamic temperature of the switch transistor, γ is the body effect coefficient of the switch transistor, V SB is the voltage between the source and the substrate of the switch transistor, W / L is the channel width-to-length ratio of the switch transistor, C ox is the channel capacitance per unit area, μ n is the average drift velocity of the carriers in the switch transistor under a unit electric field.

[0039] As can be seen from the above formula, when the potential difference between the substrate B and the source of the second switch transistor MN4 increases, the threshold voltage of the second switch transistor MN4 increases, resulting in an increase in the on-resistance of the second switch transistor MN4. Through the voltage division effect of the second switch transistor MN4, the falling speed of the potential of the first node N1 can be reduced, and the duty cycle of the potential waveform of the first node N1 can be increased, thereby increasing the average value of the output signal. When the second switch transistor MN4 is turned on, the potential of the first node N1 is greater than 0V. The second substrate selection circuit 122 can reduce the potential difference between the substrate B and the source of the second switch transistor MN4, decreasing the threshold voltage of the second switch transistor MN4, resulting in a decrease in the on-resistance of the second switch transistor MN4, thereby increasing the falling speed of the potential of the first node N1 and reducing the duty cycle of the potential waveform of the first node N1, thus reducing the average value of the output signal.

[0040] When the first switching transistor MN3 is turned off and the second switching transistor MN4 is turned on, the charging inductor L1 discharges through the first discharge capacitor C1 and the third discharge capacitor C3. At this time, the potential of the first node N1 is the on-voltage of the second switching transistor MN4. In the transition stage, when the second switching transistor MN4 is turned off, since the current in the charging inductor L1 in the load cannot change suddenly, and the body diode of the first switching transistor MN3 has a freewheeling effect, a discharge loop is formed by the charging inductor L1, the first discharge capacitor C1, the second discharge capacitor C2, and the body diode of the first switching transistor MN3. The potential of the first node N1 rises to the sum of the power supply voltage and the on-voltage of the first switching transistor MN3. Among them, the on-voltage of the first switching transistor MN3 can be 0.7V. When the potential of the first node N1 is greater than or equal to the power supply voltage, the first substrate selection circuit 121 can increase the potential difference between the substrate B and the source of the first switching transistor MN3, so that the threshold voltage of the first switching transistor MN3 increases, that is, the on-resistance of the first switching transistor MN3 increases. Through the voltage division effect of the first switching transistor MN3, the falling speed of the potential of the first node N1 can be increased, and the duty cycle of the potential waveform of the first node N1 is reduced, so that the average value of the output signal can be reduced. When the first switching transistor MN3 is turned on, the potential of the first node N1 is less than the power supply voltage, and the first substrate selection circuit 121 can reduce the potential difference between the substrate B and the source of the first switching transistor MN3, reduce the threshold voltage of the first switching transistor MN3, and make the on-resistance of the first switching transistor MN3 decrease, so that the falling speed of the potential of the first node N1 can be reduced, and the duty cycle of the potential waveform of the first node N1 is increased, so that the average value of the output signal can be increased.

[0041] Figure 4 FIG. is a schematic structural diagram of another pulse width modulation signal generator provided by an embodiment of the present invention. As Figure 4As shown, the first substrate selection circuit 121 includes an overvoltage detection circuit 1211, a first switch unit 1212, a first voltage division unit 1213, and a first resistance adjustment unit 1214; the input end of the overvoltage detection circuit 1211 is connected to the first node N1, the output end of the overvoltage detection circuit 1211 is connected to the control end of the first switch unit 1212, the first end of the first voltage division unit 1213 is connected to the substrate B of the first switching transistor MN3, the second end of the first voltage division unit 1213 is connected to the first node N1 through the first switch unit 1212, the voltage division end of the first voltage division unit 1213 is connected to the first end of the first resistance adjustment unit 1214, and the second end of the first resistance adjustment unit 1214 is respectively connected to the power input terminal VIN and the first node N1 through the first switch unit 1212; the overvoltage detection circuit 1211 is configured to detect the potential of the first node N1, and when the potential of the first node N1 is greater than the power supply voltage, control the state of the first switch unit 1212 to conduct the second end of the first voltage division unit 1213 and the first node N1, as well as the second end of the first resistance adjustment unit 1214 and the power input terminal VIN; when the potential of the first node N1 is less than the power supply voltage, control the state of the first switch unit 1212 to conduct the second end of the first resistance adjustment unit 1214 and the first node N1; the first resistance adjustment unit 1214 is configured to provide resistors with different resistance values according to the gear signal.

[0042] Specifically, the gear signal is used to control the resistance value of the first resistor adjustment unit 1214 and can represent the duty cycle of the potential waveform of the first node N1. The overvoltage detection circuit 1211 can detect the potential of the first node N1. When the potential of the first node N1 is greater than the power supply voltage, the control signal output by the overvoltage detection circuit 1211 can control the first switch unit 1212 to conduct the second end of the first voltage division unit 1213 and the first node N1, and at the same time conduct the second end of the first resistor adjustment unit 1214 and the power supply input terminal VIN. The second end of the first resistor adjustment unit 1214 is cut off from the first node N1, so that the first resistor adjustment unit 1214 and the first voltage division unit 1213 perform voltage division. When the first resistor adjustment unit 1214 provides resistors with different resistance values according to the gear signal, the voltages across the first resistor adjustment unit 1214 are different, so that the voltages between the voltage division terminal of the first voltage division unit 1213 and the first node N1 are different, thereby the voltage between the substrate B of the first switching transistor MN3 and the first node N1 can be adjusted, that is, the voltage between the substrate B and the source of the first switching transistor MN3, and further the threshold voltage of the first switching transistor MN3 can be adjusted, and thus the duty cycle of the potential waveform of the first node N1 can be adjusted. When the potential of the first node N1 is less than the power supply voltage, the control signal output by the overvoltage detection circuit 1211 can control the first switch unit 1212 to turn off the second end of the first voltage division unit 1213 and the first node N1, and at the same time turn off the second end of the first resistor adjustment unit 1214 and the power supply input terminal VIN. The second end of the first resistor adjustment unit 1214 is connected to the first node N1, eliminating the bias voltage between the substrate B and the source of the first switching transistor MN3, so that the first switching transistor MN3 is turned on or off according to the first PWM signal.

[0043] Continue to refer to Figure 4 , the first switch unit 1212 includes a first controllable switch S1, a second controllable switch S2, and a third controllable switch S3; the first end of the first controllable switch S1 and the first end of the third controllable switch S3 are connected to the first node N1, the second end of the first controllable switch S1 is connected to the second end of the first voltage division unit 1213, the first end of the second controllable switch S2 is connected to the power supply input terminal VIN, the second end of the second controllable switch S2 and the second end of the third controllable switch S3 are connected to the second end of the first resistor adjustment unit 1214, and the control ends of the first controllable switch S1, the second controllable switch S2, and the third controllable switch S3 are connected to the output terminal of the overvoltage detection circuit 1211.

[0044] Specifically, when the potential of the first node N1 is greater than the power supply voltage, the control signal output by the overvoltage detection circuit 1211 can control the first controllable switch S1 and the second controllable switch S2 to conduct, and the third controllable switch S3 to cut off, so that there is a bias voltage between the substrate B and the source of the first switching transistor MN3. The first resistance adjustment unit 1214 provides resistors with different resistance values according to the gear signal, so as to adjust the bias voltage between the substrate B and the source of the first switching transistor MN3, and further adjust the threshold voltage of the first switching transistor MN3. When the potential of the first node N1 is less than the power supply voltage, the control signal output by the overvoltage detection circuit 1211 controls the first controllable switch S1 and the second controllable switch S2 to cut off, the third controllable switch S3 to conduct, and the second end of the first resistance adjustment unit 1214 is connected to the first node N1 to eliminate the bias voltage between the substrate B and the source of the first switching transistor MN3, so that the first switching transistor MN3 conducts or cuts off according to the first PWM signal.

[0045] Continue to refer to Figure 4 , the first resistance adjustment unit 1214 includes at least one group of first resistance selectors; the first resistance selector includes a first gear resistor R1 and a first selection switch K1; the first end of the first gear resistor R1 is connected to the first end of the first selection switch K1, the second end of the first gear resistor R1 is connected to the second end of the first selection switch K1, and the control end of the first selection switch K1 is used to input the gear signal; at least one group of first resistance selectors is connected in series between the voltage division end of the first voltage division unit 1213 and the second end of the second controllable switch S2.

[0046] Specifically, Figure 4 exemplarily shows that the first resistance adjustment unit 1214 includes three groups of first resistance selectors. When the first selection switch K1 conducts, the first gear resistor R1 connected in parallel with it is short-circuited, so that the resistance value of the first resistance adjustment unit 1214 decreases. Thus, the conduction or cut-off of each first selection switch K1 can be controlled respectively by the gear signal to adjust the resistance value of the first resistance adjustment unit 1214. Exemplarily, Figure 5 is a schematic diagram of the duty cycle of the potential waveform of a first node provided by an embodiment of the present invention. Among them, φ2 is the duty cycle of the potential waveform of the first node N1 under the first gear signal, φ1 is the duty cycle of the potential waveform of the first node N1 under the second gear signal, φ0 is the duty cycle of the potential waveform of the first node N1 under the third gear signal, and φ3 is the duty cycle of the potential waveform of the first node N1 when the potential of the first node N1 is less than the power supply voltage. As Figure 5As shown, when the potential of the first node N1 is less than the power supply voltage, the control signal output by the overvoltage detection circuit 1211 controls the first controllable switch S1 and the second controllable switch S2 to turn off, and the third controllable switch S3 to turn on. The second end of the first resistor adjustment unit 1214 is connected to the first node N1. There is no bias voltage between the substrate B and the source of the first switching transistor MN3. The first switching transistor MN3 turns on or off according to the first PWM signal.

[0047] When the first gear signal controls a selection switch K1 to turn on, the resistance value of the first resistor adjustment unit 1214 is the resistance value of 2 first gear resistors R1, and the power supply input terminal VIN provides a bias voltage, so that there is a bias voltage between the substrate B and the source of the first switching transistor MN3. The threshold voltage of the first switching transistor MN3 is the largest, that is, the on-resistance of the first switching transistor MN3 is the largest. Through the voltage division effect of the first switching transistor MN3, the falling speed of the potential of the first node N1 can be increased, and the duty cycle of the potential waveform of the first node N1 is reduced, that is, the duty cycle of φ2 is less than the duty cycle of φ3.

[0048] When the second gear signal controls two first selection switches K1 to turn on, the resistance value of the first resistor adjustment unit 1214 is the resistance value of 1 first gear resistor R1, and the potential of the voltage division terminal of the first voltage division unit 1213 decreases relatively, so that the voltage between the substrate B and the source of the first switching transistor MN3 increases, thereby increasing the threshold voltage of the first switching transistor MN3, that is, increasing the on-resistance of the first switching transistor MN3. Through the voltage division effect of the first switching transistor MN3, the falling speed of the potential of the first node N1 can be increased, and the duty cycle of the potential waveform of the first node N1 is reduced, that is, the duty cycle of φ1 is less than the duty cycle of φ2.

[0049] When the third gear signal controls all three first selection switches K1 to turn on, the resistance value of the first resistor adjustment unit 1214 is the smallest, the potential of the voltage division terminal of the first voltage division unit 1213 approaches the power supply voltage, the voltage between the substrate B and the source of the first switching transistor MN3 is the largest, and the threshold voltage of the first switching transistor MN3 is the largest, that is, the on-resistance of the first switching transistor MN3 is the largest. Through the voltage division effect of the first switching transistor MN3, the falling speed of the potential of the first node N1 can be increased, and the duty cycle of the potential waveform of the first node N1 is the smallest, that is, the duty cycle of φ0 is less than the duty cycle of φ1.

[0050] Continue to refer to Figure 4 , the first voltage division unit 1213 includes a first voltage division resistor Rt1 and a second voltage division resistor Rt2; the first end of the first voltage division resistor Rt1 is connected to the substrate B of the first switching transistor MN3, and the second end of the first voltage division resistor Rt1 is connected to the first end of the second voltage division resistor Rt2 and serves as the voltage division terminal of the first voltage division unit 1213. The second end of the second voltage division resistor Rt2 is connected to the second end of the first controllable switch S1.

[0051] Specifically, the first voltage-dividing resistor Rt1 is connected between the substrate B of the first switching transistor MN3 and the first end of the first resistor adjusting unit 1214. The first voltage-dividing resistor Rt1 can limit the current input to the substrate B of the first switching transistor MN3, and at the same time can divide the voltage with the second voltage-dividing resistor Rt2, so that there is a bias voltage between the substrate B and the source of the first switching transistor MN3.

[0052] Continue to refer to Figure 4 , the second substrate selection circuit 122 includes a zero-crossing detection circuit 1221, a second switching unit 1222, a second voltage-dividing unit 1223, and a second resistor adjusting unit 1224; the input end of the zero-crossing detection circuit 1221 is connected to the first node N1, the output end of the zero-crossing detection circuit 1221 is connected to the control end of the second switching unit 1222, the first end of the second voltage-dividing unit 1223 is connected to the substrate B of the second switching transistor MN4, the second end of the second voltage-dividing unit 1223 is connected to the first node N1 through the second switching unit 1222, the voltage-dividing end of the second voltage-dividing unit 1223 is connected to the first end of the second resistor adjusting unit 1224, and the second end of the second resistor adjusting unit 1224 is connected to the ground terminal GND; the zero-crossing detection circuit 1221 is used to detect the potential of the first node N1, and when the potential of the first node N1 is less than the zero voltage, control the second switching unit 1222 to conduct the second end of the second voltage-dividing unit 1223 and the first node N1; the second resistor adjusting unit 1224 is used to provide resistors with different resistance values according to the gear signal.

[0053] Specifically, the zero-crossing detection circuit 1221 detects the potential of the first node N1. When the potential of the first node N1 is less than the zero potential, the control signal output by the zero-crossing detection circuit 1221 can control the second switching unit 1222 to conduct, and the second end of the second voltage-dividing unit 1223 is connected to the first node N1, so that the potential of the first node N1 pulls down the potential of the second end of the second voltage-dividing unit 1223, increasing the voltage between the first node N1 and the ground terminal GND. When the second resistor adjusting unit 1224 provides resistors with different resistance values according to the gear signal, the voltages across the second resistor adjusting unit 1224 are different, so that the voltages between the voltage-dividing end of the second voltage-dividing unit 1223 and the ground terminal GND are different, thereby adjusting the voltage between the substrate B of the first switching transistor MN3 and the ground terminal GND, that is, the voltage between the substrate B and the source of the second switching transistor MN4, and further adjusting the threshold voltage of the second switching transistor MN4, thereby adjusting the duty cycle of the potential waveform of the first node N1. When the potential of the first node N1 is greater than the zero potential, the control signal output by the zero-crossing detection circuit 1221 can control the second switching unit 1222 to cut off, eliminating the bias voltage between the substrate B and the source of the second switching transistor MN4, so that the second switching transistor MN4 conducts or cuts off according to the second PWM signal.

[0054] In some embodiments, the second switching unit 1222 may include a fourth controllable switch S4. A first end of the fourth controllable switch S4 is connected to the first node N1, a second end of the fourth controllable switch S4 is connected to a second end of the second voltage dividing unit 1223, and a control end of the fourth controllable switch S4 is connected to an output end of the zero-crossing detection circuit 1221.

[0055] Continuing to refer to Figure 4 , the second resistance adjusting unit 1224 includes at least one group of second resistance selectors; the second resistance selector includes a second gear resistance R2 and a second gating switch K2; a first end of the second gear resistance R2 is connected to a first end of the second gating switch K2, a second end of the second gear resistance R2 is connected to a second end of the second gating switch K2, and a control end of the second gating switch K2 is used for inputting a gear signal; at least one group of second resistance selectors are connected in series between a voltage dividing end of the second voltage dividing unit 1223 and the ground terminal GND.

[0056] Specifically, Figure 4 exemplarily shows that the second resistance adjusting unit 1224 includes three groups of second resistance selectors. When the second gating switch K2 is turned on, the second gear resistance R2 connected in parallel with it is short-circuited, so that the resistance value of the second resistance adjusting unit 1224 is reduced. Thus, the on or off of each second gating switch K2 can be controlled respectively by the gear signal to adjust the resistance value of the second resistance adjusting unit 1224.

[0057] Continuing to refer to Figure 4 , the second voltage dividing unit 1223 includes a third voltage dividing resistor Rt3 and a fourth voltage dividing resistor Rt4; a first end of the third voltage dividing resistor Rt3 is connected to a substrate B of the second switching transistor MN4, a second end of the third voltage dividing resistor Rt3 is connected to a first end of the fourth voltage dividing resistor Rt4 and serves as a voltage dividing end of the second voltage dividing unit 1223, and a second end of the fourth voltage dividing resistor Rt4 is connected to the first node N1 through the second switching unit 1222.

[0058] Specifically, the third voltage dividing resistor Rt3 is connected between the substrate B of the second switching transistor MN4 and a first end of the second resistance adjusting unit 1224. The third voltage dividing resistor Rt3 can limit the current input to the substrate B of the second switching transistor MN4, and at the same time can perform voltage division with the fourth voltage dividing resistor Rt4, so that there is a bias voltage between the substrate B and the source of the second switching transistor MN4.

[0059] An embodiment of the present invention further provides a voltage conversion circuit. The voltage conversion circuit includes a pair of switching tubes and a pulse width modulation signal generator provided in any embodiment of the present invention. The pulse width modulation signal generator is connected to the pair of switching tubes and is used to control the pair of switching tubes to conduct in a time-sharing manner. Since the voltage conversion circuit includes the pulse width modulation signal generator provided in any embodiment of the present invention, it has the same beneficial effects as the pulse width modulation signal generator provided in any embodiment of the present invention, which will not be elaborated here.

[0060] Note that the above is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described here, and various obvious changes, re-adjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments can be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A pulse width modulation signal generator, characterized in that, Used to control at least one pair of switch tubes to be turned on in time; each pair of switch tubes is connected in series between the power input terminal and the ground terminal, and the node where each pair of switch tubes are connected to each other is a first node; the pulse width modulation signal generator includes a driving unit and at least one substrate selection circuit; The driving unit is connected to the gates of at least one pair of the switching tubes to provide a pulse width modulation signal for the switching tubes. The first end of the substrate selection circuit is connected to the substrate of the switching tube, the second end of the substrate selection circuit is connected to the power input end or the ground end, and the third end of the substrate selection circuit is connected to the first node. The substrate selection circuit is used to adjust the potential difference between the substrate and the source of the switching tube when the potential of the first node exceeds a preset potential range to adjust the threshold voltage of the switching tube.

2. The pulse width modulation signal generator according to claim 1, wherein At least one substrate selection circuit includes a first substrate selection circuit and a second substrate selection circuit; each pair of switch tubes includes a first switch tube and a second switch tube; The drain of the first switch tube is connected to the power input terminal, the source of the first switch tube is connected to the drain of the second switch tube and serves as the first node, and the source of the second switch tube is connected to the ground terminal; A first end of the first substrate selection circuit is connected to the substrate of the first switch tube, a second end of the first substrate selection circuit is connected to the power input terminal, and a third end of the first substrate selection circuit is connected to the first node. The first substrate selection circuit is used to increase the potential difference between the substrate and the source of the first switch tube when the potential of the first node is greater than the power supply voltage provided by the power input terminal; A first end of the second substrate selection circuit is connected to the substrate of the second switch tube, a second end of the second substrate selection circuit is connected to the ground terminal, a third end of the second substrate selection circuit is connected to the first node, and the second substrate selection circuit is used to increase the potential difference between the substrate and the source of the second switch tube when the potential of the first node is less than the zero voltage provided by the ground terminal.

3. The pulse width modulation signal generator according to claim 2, characterized in that, The first substrate selection circuit includes an overvoltage detection circuit, a first switch unit, a first voltage dividing unit and a first resistance adjustment unit; The input end of the overvoltage detection circuit is connected to the first node, the output end of the overvoltage detection circuit is connected to the control end of the first switch unit, the first end of the first voltage divider unit is connected to the substrate of the first switch tube, the second end of the first voltage divider unit is connected to the first node through the first switch unit, the voltage divider end of the first voltage divider unit is connected to the first end of the first resistance adjustment unit, and the second end of the first resistance adjustment unit is connected to the power input end and the first node respectively through the first switch unit; The overvoltage detection circuit is used to detect the potential of the first node, and when the potential of the first node is greater than the power supply voltage, control the state of the first switch unit to conduct the second end of the first voltage division unit and the first node, and the second end of the first resistance adjustment unit and the power input terminal; when the potential of the first node is less than the power supply voltage, control the state of the first switch unit to conduct the second end of the first resistance adjustment unit and the first node; the first resistance adjustment unit is used to provide resistors with different resistance values according to the gear signal.

4. The pulse width modulation signal generator according to claim 3, wherein The first switch unit includes a first controllable switch, a second controllable switch, and a third controllable switch; The first end of the first controllable switch and the first end of the third controllable switch are connected to the first node, the second end of the first controllable switch is connected to the second end of the first voltage division unit, the first end of the second controllable switch is connected to the power input terminal, the second end of the second controllable switch and the second end of the third controllable switch are connected to the second end of the first resistance adjustment unit, and the control end of the first controllable switch, the control end of the second controllable switch, and the control end of the third controllable switch are connected to the output end of the overvoltage detection circuit.

5. The pulse width modulation signal generator according to claim 4, wherein The first resistance adjustment unit includes at least one group of first resistor selectors; the first resistor selector includes a first gear resistor and a first gating switch; the first end of the first gear resistor is connected to the first end of the first gating switch, the second end of the first gear resistor is connected to the second end of the first gating switch, and the control end of the first gating switch is used to input the gear signal; at least one group of the first resistor selectors is connected in series between the voltage division end of the first voltage division unit and the second end of the second controllable switch.

6. The pulse width modulation signal generator according to claim 4, characterized in that, The first voltage division unit includes a first voltage division resistor and a second voltage division resistor; The first end of the first voltage division resistor is connected to the substrate of the first switch transistor, the second end of the first voltage division resistor is connected to the first end of the second voltage division resistor and serves as the voltage division end of the first voltage division unit, and the second end of the second voltage division resistor is connected to the second end of the first controllable switch.

7. The pulse width modulation signal generator according to claim 2, wherein The second substrate selection circuit includes a zero-crossing detection circuit, a second switch unit, a second voltage division unit, and a second resistance adjustment unit; The input end of the zero-crossing detection circuit is connected to the first node, the output end of the zero-crossing detection circuit is connected to the control end of the second switch unit, the first end of the second voltage-dividing unit is connected to the substrate of the second switch tube, the second end of the second voltage-dividing unit is connected to the first node through the second switch unit, the voltage-dividing end of the second voltage-dividing unit is connected to the first end of the second resistance adjustment unit, and the second end of the second resistance adjustment unit is connected to the ground end; the zero-crossing detection circuit is used to detect the potential of the first node, and control the second switch unit to turn on the second end of the second voltage-dividing unit and the first node when the potential of the first node is less than the zero voltage; the second resistance adjustment unit is used to provide resistors with different resistance values ​​according to the gear signal.

8. The pulse width modulation signal generator according to claim 7, wherein, The second resistance adjustment unit includes at least one group of second resistance selectors; the second resistance selectors include second gear resistors and second selection switches; the first end of the second gear resistor is connected to the first end of the second selection switch, the second end of the second gear resistor is connected to the second end of the second selection switch, and the control end of the second selection switch is used to input the gear signal; at least one group of the second resistance selectors is connected in series between the voltage dividing end of the second voltage dividing unit and the ground end.

9. The pulse width modulation signal generator according to claim 7, characterized in that, The second voltage dividing unit includes a third voltage dividing resistor and a fourth voltage dividing resistor; The first end of the third voltage-dividing resistor is connected to the substrate of the second switch tube, the second end of the third voltage-dividing resistor is connected to the first end of the fourth voltage-dividing resistor and serves as the voltage-dividing end of the second voltage-dividing unit, and the second end of the fourth voltage-dividing resistor is connected to the first node through the second switch unit.

10. A voltage conversion circuit, characterized in that, It comprises a pair of switch tubes and a pulse width modulation signal generator as claimed in any one of claims 1 to 9; the pulse width modulation signal generator is connected to the pair of switch tubes and is used to control the pair of switch tubes to be turned on in time-sharing manner.

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