A low-cost terahertz high-order QAM signal direct modulation transmitter and method thereof
By using a frequency tripler and high-order QAM modulation in the RF domain in the terahertz transmitter, the frequency requirements of the power amplifier and the energy consumption of the digital-to-analog conversion chip are reduced, solving the high cost and high energy consumption problems of traditional terahertz transmitters and achieving low-cost and efficient terahertz communication.
Patent Information
- Application Number
- CN202411527315.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-09-19
- Estimated Expiration
- 2044-10-30
AI Technical Summary
The traditional terahertz transmitter architecture has high power amplifier costs and low efficiency in high frequency bands, and the digital-to-analog conversion chip consumes huge energy, making it difficult to meet the needs of high data rates.
A frequency tripler is used to migrate the QPSK modulated signal spectrum to the terahertz frequency band, and high-order QAM modulation is performed in the RF domain, reducing the frequency requirements of the power amplifier and alleviating the burden on the digital-to-analog conversion chip.
It reduces system manufacturing costs and energy consumption, improves the efficiency of the power amplifier, reduces the performance requirements of the digital-to-analog conversion chip, and solves the energy efficiency and heat dissipation problems in traditional architectures.
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Figure CN119324746B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of radio frequency integrated circuits and relates to a terahertz transmitter architecture, and in particular to a low-cost terahertz high-order QAM signal direct modulation transmitter and a method thereof. Background Art
[0002] With the large-scale deployment of the fifth generation of mobile communications (5G), the world has gradually started research and exploration of the next generation of mobile communications (6G). Thanks to the massive spectrum resources in the terahertz band, terahertz communication technology has become one of the key technologies of 6G. Terahertz communication technology can support data transmission rates of hundreds of Gbps; and the wavelength of the terahertz band is shorter, which makes it easier to integrate the RF front-end circuit and the antenna, and realize an ultra-small integrated system on chip (SoC). Therefore, terahertz communication technology has huge application potential in short-distance, high-speed wireless communication scenarios such as wireless interconnection in data centers, wireless local area networks / wireless personal area networks, and inter-chip / on-chip communications. At the same time, the operating frequency of the terahertz band has approached or even exceeded the characteristic frequency (f t In this frequency band, the gain and efficiency of transistors decrease sharply, and the energy efficiency of RF transmitters also deteriorates, which puts higher design requirements on the RF transmitter architecture.
[0003] Traditional transmitter architectures (such as zero-IF and superheterodyne architectures) often face the following challenges when applied to the terahertz frequency band:
[0004] 1) The power amplifier needs to operate directly in the terahertz frequency band, and the transistor cutoff frequency must be much higher than the operating frequency of the power amplifier. Therefore, it requires the use of expensive advanced process nodes or even compound process design.
[0005] 2) The low efficiency of terahertz frequency band power amplifiers directly affects the overall power consumption and heat dissipation of the system;
[0006] 3) Terahertz communication systems often operate at data rates of tens or even hundreds of Gbps. Such high data rates place extremely high demands on the sampling rate and resolution of digital-to-analog converters (DACs). Furthermore, high-speed, high-precision DACs consume significant energy. Currently, DACs supporting sampling rates exceeding 100 Gs / s have been reported, but their power consumption exceeds 2.5W. This high power consumption presents challenging challenges in energy efficiency and heat dissipation design.
[0007] In light of the aforementioned applications and technical background, the present invention provides a low-cost terahertz high-order QAM (quadrature amplitude modulation) direct modulation transmitter architecture. In the final transmitter stage, a frequency tripler is used to shift the spectrum of two QPSK-modulated signals to the terahertz band. These signals are then vector-synthesized to achieve 16-QAM modulation. The use of the frequency tripler eliminates the need for the power amplifier to operate in the terahertz band, thus lowering the transistor cutoff frequency requirement and, consequently, manufacturing costs. Furthermore, because the power amplifier operates at a lower frequency, it offers higher efficiency. Furthermore, the high-order QAM modulation is performed directly in the RF domain, significantly reducing the power consumption of the DAC. Summary of the Invention
[0008] The purpose of the present invention is to address the shortcomings of the existing technology and provide a low-cost terahertz high-order QAM direct modulation transmitter and method thereof. The architecture proposed by the present invention adopts a frequency tripler in the final stage, so the power amplifier only needs to operate in a lower frequency band and only needs to amplify the envelope-balanced QPSK signal, thereby greatly improving the efficiency of the power amplifier part; in addition, the transmitter architecture proposed by the present invention significantly reduces the performance requirements of the digital-to-analog conversion chip by directly performing high-order QAM modulation in the radio frequency domain, thereby reducing system energy consumption.
[0009] The technical solutions of the present invention are as follows:
[0010] In a first aspect, the present invention provides a low-cost terahertz high-order QAM direct modulation transmitter, comprising a first branch and a second branch arranged in parallel, and a linear power combiner;
[0011] The first branch includes a phase control circuit, a first quadrature modulator, a first power amplifier PA1 with adjustable gain, and a first frequency tripler connected in series in sequence;
[0012] The second branch includes a second quadrature modulator, a second power amplifier PA2, and a second frequency tripler connected in series.
[0013] in:
[0014] The phase control circuit is used to adjust the phase of the output signal of the first branch;
[0015] The first orthogonal modulator is used to modulate the data bit D 0_I 、D 0_Q , generating a QPSK signal, which serves as the input signal of the first power amplifier PA1;
[0016] The second orthogonal modulator is used to modulate the data bit D 1_I 、D 1_Q, generating another QPSK signal, which serves as the input signal of the second power amplifier PA2;
[0017] The input end of the first power amplifier PA1 is connected to the first orthogonal modulator, and the output end is connected to the first tripler; the input end of the second power amplifier PA2 is connected to the second orthogonal modulator, and the output end is connected to the second tripler;
[0018] The first and second frequency triplers are used to migrate the spectrum of the QPSK signal to the terahertz frequency band;
[0019] Preferably, the linear power combiner performs vector synthesis on the output signal of the first tripler and the output signal of the second tripler, and finally realizes a QAM high-order modulation signal.
[0020] Preferably, the output signal of the first tripler is recorded as Output 1, and the output signal of the second tripler is recorded as Output 2, both of which are QPSK signals with center frequencies in the terahertz band; the amplitudes and phases of Output 1 and Output 2 are recorded as A1, A2 and Φ1, Φ2, respectively, and the conditions A1 = A2 / 2 and Φ1 = Φ2 are satisfied between them;
[0021] Preferably, the first and second triplers are used to generate QPSK signals in the terahertz frequency band;
[0022] Preferably, the phase control circuit is used to adjust the phase of the output signal Output 1 so that it satisfies Φ1= Φ2; the first power amplifier PA1 is used to adjust the amplitude of the output signal Output 2 so that it satisfies A1= A2 / 2.
[0023] In a second aspect, the present invention further provides a terahertz high-order QAM direct modulation method, comprising the following steps:
[0024] The first branch consisting of the phase control circuit, the first orthogonal modulator, the first power amplifier PA1 with adjustable gain, and the first tripler connected in series generates a terahertz QPSK signal with a symbol spacing of 2d, which is recorded as QPSK. 1_T ;
[0025] The second branch consisting of the second orthogonal modulator, the second power amplifier PA2, and the second tripler connected in series generates a terahertz QPSK signal with a symbol spacing of 4d, which is recorded as QPSK. 2_T ;
[0026] QPSK 2_TThe signal is used to map the origin (0, 0) to four new origins located at (-2d, -2d), (-2d, +2d), (2d, -2d) and (2d, 2d), while QPSK 1_T It is responsible for generating four new random symbols around each new origin;
[0027] The linear power combiner is used to convert QPSK 1_T With QPSK 2_T Perform vector synthesis to construct a 16-QAM modulated signal.
[0028] Preferably, the first frequency tripler and the second frequency tripler in the first branch and the second branch are specifically implemented as follows:
[0029] Assume that the input signal at time t is V1(t), which is expressed as follows:
[0030] (1)
[0031] Where V I (t) and V Q (t) are the corresponding components of the real axis and imaginary axis of the input signal on the complex plane at time t, f c is the frequency of the input signal, Re represents the real part, and j represents V I (t) and V Q (t) There is a 90-degree phase difference (i.e., orthogonal);
[0032] The output signal is denoted as V2(t), which is expressed as follows:
[0033] (2)
[0034] (3)
[0035] Where n is the frequency doubling number;
[0036] For QPSK modulated signals, |V I (t)| = |V Q (t)|, so combining formula (2) and formula (3) we can get:
[0037] (4)
[0038] The following relationship can be obtained from formula (4): the QPSK signal constellation after odd-number frequency multiplication can be regarded as a multiple of 90° rotated counterclockwise around the origin, and the relative position of each symbol remains unchanged compared to before frequency multiplication; at the same time, the third harmonic is the highest-energy high-order harmonic in the differential circuit architecture.
[0039] The present invention has the following advantages and beneficial effects:
[0040] (1) Due to the presence of the frequency tripler, the power amplifier under the architecture of the present invention only needs to operate in a lower frequency band and does not need to operate directly in the terahertz frequency band. Therefore, the transmitter architecture proposed in the present invention has lower requirements for the process cutoff frequency and can be processed using low-cost silicon-based processes, thereby reducing the manufacturing cost of the system;
[0041] (2) The transmitter architecture proposed in this invention implements high-order QAM modulation in the RF front-end, thereby significantly reducing the performance requirements of the digital-to-analog conversion chip and reducing the overall energy consumption of the terahertz communication system;
[0042] (3) The input signal of the power amplifier under the architecture of the present invention is a QPSK signal with a balanced envelope, so the power amplifier can always operate in a saturated state to obtain the highest efficiency, thereby significantly reducing the power consumption of the RF front end; BRIEF DESCRIPTION OF THE DRAWINGS
[0043] Figure 1 It is a schematic diagram of the architecture of the present invention;
[0044] Figure 2 The modulation principle for realizing 16-QAM signal based on two-way QPSK signal;
[0045] Figure 3 (a) is the simulation result of the QPSK signal constellation diagram before passing through the tripler;
[0046] Figure 3 (b) is the simulation result of the QPSK signal constellation diagram after the tripler;
[0047] Figure 4 (a) is the simulation result of the output signal constellation diagram of the first branch of the architecture of the present invention;
[0048] Figure 4 (b) is the simulation result of the output signal constellation diagram of the second branch of the architecture of the present invention;
[0049] Figure 4 (c) is the simulation result of the output signal constellation diagram after linear power synthesis of the architecture of the present invention;
[0050] Figure 5 (a) is a schematic diagram of the traditional transmitter architecture;
[0051] Figure 5 (b) is a schematic diagram of a traditional transmitter architecture with a frequency tripler as the final stage;
[0052] Figure 6 (a) is Figure 5 Simulation results of the 16-QAM signal constellation diagram for the (a) architecture;
[0053] Figure 6 (b) is Figure 5 (b) Simulation results of the 16-QAM signal constellation diagram before and after the tripler.
[0054] Markings in the figure: 1. Phase control circuit; 2. First orthogonal modulator; 3. Second orthogonal modulator; 4. First power amplifier; 5. Second power amplifier; 6. First tripler; 7. Second tripler; 8. Linear power combiner. DETAILED DESCRIPTION
[0055] The present invention will be further described below with reference to the accompanying drawings.
[0056] like Figure 1 As shown, the present invention provides a terahertz direct modulation transmitter architecture, comprising: a phase control circuit 1, a first orthogonal modulator 2 located in a first branch, a second orthogonal modulator 3 located in a second branch, a first power amplifier 4 with variable gain located in the first branch, a second power amplifier 5 located in the second branch, a first frequency tripler 6 located in the first branch, a second frequency tripler 7 located in the second branch, and a linear power combiner 8. The phase control circuit 1 is used to adjust the phase of the QPSK signal output by the first branch.
[0057] The connections between the various components of the system are as follows: Phase control circuit 1 is connected to first quadrature modulator 2; the output signal of first quadrature modulator 2 serves as the input signal of first variable-gain power amplifier 4; the output signal of first variable-gain power amplifier 4 serves as the input signal of first tripler 6; phase control circuit 1, first quadrature modulator 2, first variable-gain power amplifier 4, and first tripler 6 together form the first branch, the output signal of the first branch being represented as Output 1. The output signal of second quadrature modulator 3 serves as the input signal of second power amplifier 5; the output signal of second power amplifier 5 serves as the input signal of second tripler 7; second quadrature modulator 3, second variable-gain power amplifier 5, and second tripler 7 together form the second branch, the output signal of the second branch being represented as Output 2. Output 1 and Output 2 are vector-added by linear power combiner 8 to obtain the transmitter's output signal, Output 3.
[0058] Figure 2This is the principle behind the transmitter architecture of the present invention for implementing 16-QAM modulation in the RF domain. The 16-QAM constellation can be considered as consisting of four QPSK sub-constellations (with a symbol spacing of 2d) in the four quadrants of the IQ complex plane. The origins of these sub-constellations form another QPSK constellation with a symbol spacing of 4d. Therefore, the present invention constructs two QPSK signals (Output 1 and Output 2) in the RF domain, with symbol spacings of 2d and 4d, respectively. These signals are then vector-combined to construct the 16-QAM constellation. Output 2 maps the origin (0, 0) to four new origins at (-2d, -2d), (-2d, +2d), (2d, -2d), and (2d, 2d), while Output 1 generates four new random symbols around each new origin.
[0059] Figure 3 Middle (a) to Figure 3 (b) is a comparison of the QPSK signal constellation diagrams before and after the frequency tripler. Since the present invention generates two-way QPSK signals in the terahertz frequency band through the frequency tripler, it is necessary to verify the changes in the constellation diagram before and after the frequency tripler. The simulation results show that the constellation diagrams of the QPSK signal before and after the frequency tripler are basically the same, the only difference is that the error vector magnitude (EVM) of the constellation diagram after the frequency tripler is slightly deteriorated. The input signal of the frequency multiplier at time t is V1(t) (as shown in formula (1)), where V I (t) and V Q (t) are the corresponding components of the real axis and imaginary axis of the input signal on the complex plane at time t, f c is the frequency of the input signal:
[0060] (1)
[0061] Where Re represents the real part, j represents V I (t) and V Q (t) There is a 90-degree phase difference (i.e., orthogonal);
[0062] The output signal of the frequency multiplier is V2(t), then the output signal can be expressed as (2), where n is the frequency multiplication number:
[0063] (2)
[0064] in:
[0065] (3)
[0066] For QPSK modulated signals, |V I (t)| = |V Q(t)|, so combining formula (2) and formula (3) we can get:
[0067] (4)
[0068] The following relationship can be obtained from formula (4): the QPSK signal constellation after odd-number frequency multiplication can be regarded as a multiple of 90° rotated counterclockwise around the origin, and the relative position of each symbol remains unchanged compared to before frequency multiplication; at the same time, the third harmonic is the highest-energy high-order harmonic under the differential circuit architecture, so the tripler is preferably used to generate QPSK signals in the terahertz frequency band.
[0069] Figure 4 Middle (a) to Figure 4 (c) shows Figure 1 The constellation diagram simulation results for each signal node in the signal processing system, namely Output 1, Output 2, and Output 3, are shown. The amplitude and phase of the signals at Output 1 and Output 2 are denoted by A1, A2, and Φ1, Φ2, respectively. The simulation results show that when the conditions A1 = A2 / 2 and Φ1 = Φ2 are satisfied, 16-QAM modulated signals can be directly implemented in the RF domain through vector synthesis.
[0070] Figure 5 Middle (a) to Figure 5 (b) is a schematic diagram of a traditional transmitter and a traditional transmitter architecture with a tripler as the final stage. In the traditional architecture, signal modulation occurs in the baseband part, that is, the digital signal processor (DSP) processes the physical layer data into two digital signals, I and Q, respectively. in,I and D in,QThese two digital signals are then passed through a DAC chip to generate two orthogonal signals. A quadrature modulator and linear power combiner are then used to generate the modulated signal, which is then amplified by a power amplifier and frequency tripler to achieve carrier spectrum shifting. This traditional transmitter architecture, when applied to the terahertz frequency band, suffers from the following drawbacks compared to the direct modulation terahertz transmitter architecture proposed in this invention: 1) Signal modulation occurs in the baseband. When performing high-order QAM modulation, the high data rate places extremely high demands on the sampling rate and resolution of the DAC chip. Furthermore, high-speed, high-precision DACs consume significant power. Currently, DACs supporting sampling rates exceeding 100 GS / s consume over 2.5W of power. This, combined with other digital circuitry, creates significant energy efficiency and heat dissipation challenges. 2) When adopting high-order QAM modulation, the power amplifier in this traditional architecture, limited by the high peak-to-average power ratio of the QAM signal, will operate in a power-backed state for the majority of the time. In this state, the efficiency of the PA is significantly reduced compared to when it is saturated, resulting in reduced energy efficiency in the RF front-end circuitry. However, the present invention fundamentally solves the above problems from the perspective of transmitter circuit architecture: 1) Due to the presence of the frequency tripler, the power amplifier under the architecture of the present invention only needs to operate in a lower frequency band and does not need to operate directly in the terahertz frequency band. Therefore, the transmitter architecture proposed in the present invention has low requirements for the process cutoff frequency and can be processed using low-cost silicon-based processes, thereby reducing the manufacturing cost of the system; 2) The transmitter architecture proposed in the present invention implements high-order QAM modulation in the RF front-end part, thereby significantly reducing the performance requirements for the digital-to-analog conversion chip and reducing the overall energy consumption of the terahertz communication system; 3) The input signal of the power amplifier under the architecture of the present invention is a balanced envelope QPSK signal, so the power amplifier can always operate in a saturated state to obtain the highest efficiency, thereby significantly reducing the power consumption of the RF front-end;
[0071] Figure 6 Middle (a) to Figure 6 (b) describes Figure 5 Middle (a) to Figure 5 The transmitter architecture in (b) shows the 16-QAM signal constellation diagram before and after the frequency tripler. Simulation results show that the 16-QAM signal suffers from severe signal distortion after frequency tripling. Therefore, when adopting a high-order QAM modulation scheme, the power amplifier in the traditional transmitter architecture must directly amplify the high-order QAM signal in the terahertz band and cannot use a frequency multiplication scheme, which increases the requirements for the transistor cutoff frequency and significantly increases the cost. However, the input signal of the frequency tripler of the present invention is a QPSK signal, which is then vector-synthesized to achieve a 16-QAM modulated signal; therefore, the 16-QAM signal under the architecture of the present invention will not suffer from distortion. Therefore, the transmitter architecture proposed in the present invention that uses a frequency tripler as the final stage circuit can reduce the requirements for the semiconductor process cutoff frequency, thereby reducing the manufacturing cost of the system.
[0072] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.
Claims
1. A low-cost terahertz high-order QAM direct modulation transmitter, characterized by It includes a first branch, a second branch, and a linear power combiner that are arranged in parallel; The first branch includes a phase control circuit, a first quadrature modulator, a first power amplifier with adjustable gain, and a first frequency tripler connected in series in sequence; The second branch includes a second quadrature modulator, a second power amplifier, and a second frequency tripler connected in series in sequence; in: The phase control circuit is used to adjust the phase of the output signal of the first branch; The first orthogonal modulator is used to modulate the data bit D 0_I 、D 0_Q , generating a QPSK signal, which serves as an input signal of the first power amplifier; The second orthogonal modulator is used to modulate the data bit D 1_I 、D 1_Q , generating another QPSK signal, which serves as the input signal of the second power amplifier; The first and second tripler frequency multipliers are used to migrate the spectrum of the QPSK signals received by each to the terahertz frequency band; The linear power combiner performs vector synthesis on the output signal of the first tripler and the output signal of the second tripler, and finally realizes a QAM high-order modulation signal; The output signal of the first tripler is denoted as Output 1, and the output signal of the second tripler is denoted as Output 2. Both Output 1 and Output 2 are QPSK signals with center frequencies in the terahertz band. The amplitudes and phases of Output 1 and Output 2 are denoted as A1, A2 and Φ1, Φ2, respectively, and the conditions A1 = A2 / 2 and Φ1 = Φ2 are satisfied between them.
2. A low-cost terahertz high-order QAM direct modulation transmitter according to claim 1, characterized in that: The phase control circuit is used to adjust the phase of the output signal Output 1 so that it satisfies Φ1 = Φ2; the first power amplifier is used to adjust the amplitude of the output signal Output 1 so that it satisfies A1 = A2 / 2.
3. A terahertz high-order QAM direct modulation method for a transmitter according to any one of claims 1 to 2, characterized in that: The following steps are involved: The first branch is used to generate a terahertz QPSK signal with a symbol spacing of 2d, which is recorded as QPSK 1_T ; The second branch is used to generate a terahertz QPSK signal with a symbol spacing of 4d, which is recorded as QPSK 2_T ; QPSK 2_T The signal is used to map the origin (0, 0) to four new origins, and QPSK 1_T It is responsible for generating four new random symbols around each new origin; the four new origins are located at (-2d, -2d), (-2d, +2d), (2d, -2d) and (2d, 2d); The linear power combiner is used to convert QPSK 1_T With QPSK 2_T Perform vector synthesis to construct a 16-QAM modulated signal.
4. The method according to claim 3, characterized in that: The specific implementation process of the first tripler and the second tripler in the first branch and the second branch is as follows: Assume that the input signal at time t is V1(t), which is expressed as follows: (1) Where V I (t) and V Q (t) are the corresponding components of the real axis and imaginary axis of the input signal on the complex plane at time t, f c is the frequency of the input signal, Re represents the real part, and j represents V I (t) and V Q (t) There is a 90-degree phase difference (i.e., orthogonal); The output signal is denoted as V2(t), which is expressed as follows: (2) (3) Where n is the frequency doubling number; For QPSK modulated signals, |V I (t)| = |V Q (t)|, so combining formula (2) and formula (3) we can get: (4) The following relationship can be obtained from formula (4): the QPSK signal constellation after odd-number frequency multiplication can be regarded as a multiple of 90° rotated counterclockwise around the origin, and the relative position of each symbol remains unchanged compared to before frequency multiplication; at the same time, the third harmonic is the highest-energy high-order harmonic in the differential circuit architecture.
Citation Information
Patent Citations
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