Layout optimization method and system

Abstract

This invention provides a layout optimization method and system, belonging to the semiconductor field. The layout optimization method includes providing an initial layout, which comprises several discretely arranged main patterns; selecting target patterns from the main patterns, the target patterns including a first target pattern and a second target pattern; obtaining rules for adding auxiliary patterns; adding auxiliary patterns around the first target pattern; extending two of the first auxiliary patterns along a direction towards the second target pattern and connecting them with the extended pattern of the second auxiliary pattern to form a target auxiliary pattern; and optimizing the initial layout based on the target auxiliary pattern. This invention, by using an optimized layout for photolithography, results in less change in the contour formed in the photoresist layer when process conditions change. In subsequent etching processes, it can maintain etching process stability, ensuring that the contour formed in the photoresist layer is as expected, thereby improving chip yield.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a layout optimization method and system. Background Technology

[0002] Sub-Resolution Assistant Feature (SRAF) is a widely used optical proximity correction method. With the development of semiconductor technology and the reduction of critical dimensions, SRAF has become an effective means to improve resolution and process window size. In metal layers, correcting the layout using SRAF technology can effectively improve the pattern resolution of photolithography processes, increase the process window, and improve product yield. The current general practice for adding auxiliary features is to obtain the SRAF addition rules and then add the auxiliary features according to those rules.

[0003] When process conditions change, it is desirable to keep the pattern contour changes on the photoresist at the feature structure under control to improve the stability of photolithography and subsequent etching processes. Therefore, the SRAF at this location is optimized to ensure that the pattern contour changes achieve the expected results.

[0004] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a layout optimization method and system to solve the problem of how to correct sub-resolution auxiliary graphics in order to improve the stability of etching process.

[0006] To address the aforementioned technical problems, this invention provides a layout optimization method, comprising:

[0007] An initial layout is provided, which includes several separately arranged main graphics;

[0008] Filter the target graphics in the main graphic, the target graphics include a first target graphic and a second target graphic, the extension line of the first target graphic toward the second target graphic intersects with the second target graphic;

[0009] Obtain the rules for adding auxiliary graphics, and based on the rules, add auxiliary graphics around the first target graphic. The auxiliary graphics include first auxiliary graphics located on both sides of the first target graphic and second auxiliary graphics located between the first target graphic and the second target graphic.

[0010] The two first auxiliary graphics are extended along the direction toward the second target graphic and connected with the graphics extended from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics and thereby optimize the initial layout to form an optimized layout, wherein the second auxiliary graphic extends along the direction parallel to the second target graphic.

[0011] Preferably, the first target graphic has a line end, and after the first target graphic is developed at the line end, it forms an arc-shaped outline, and the extension line of the line end is perpendicular to the second target graphic.

[0012] Preferably, the shape of the first target graphic includes a rectangle, the shape of the second target graphic includes a rectangle, and the short sides adjacent to the first target graphic and the second target graphic are line ends.

[0013] Preferably, both the first target graphic and the second target graphic are rectangles. The selection of target graphics from the main graphic includes the first target graphic and the second target graphic. The intersection of the extension line of the first target graphic towards the second target graphic and the second target graphic includes:

[0014] Filter the main image to obtain the first target image and the second target image. The extension line of the short side of the first target image intersects the long side of the second target image perpendicularly.

[0015] Preferably, the rules for adding auxiliary graphics include:

[0016] By using the design rules of the initial layout, obtain the rules for adding auxiliary graphics.

[0017] Preferably, both the first auxiliary graphic and the second auxiliary graphic are rectangles. The direction of the long side of the first auxiliary graphic is parallel to the first target graphic, and the direction of the long side of the second auxiliary graphic is parallel to the second target graphic. The two first auxiliary graphics are extended along a direction toward the second target graphic and connected to the extended shape of the second auxiliary graphic to form the target auxiliary graphic. The extension of the second auxiliary graphic along a direction parallel to the second target graphic includes:

[0018] Extend the first auxiliary graphic along its long side;

[0019] The second auxiliary graphic is extended along its long side to connect with the extension line of the first auxiliary graphic, thus forming the target auxiliary graphic.

[0020] Preferably, the line width of the target auxiliary graphic is equal to the line width of the first auxiliary graphic and the line width of the second auxiliary graphic.

[0021] Preferably, the distance between the target auxiliary graphic and the first target graphic and the second target graphic is equal to the distance between the first auxiliary graphic and the first target graphic, and the distance between the second auxiliary graphic and the first target graphic.

[0022] Preferably, the addition of the target auxiliary graphic has the same priority as the addition of the first auxiliary graphic and the second auxiliary graphic.

[0023] Based on the same inventive concept, the present invention also provides a layout optimization system, comprising:

[0024] An acquisition module is used to provide an initial layout, which includes several discretely arranged main graphics;

[0025] A logic operation module is used to filter target graphics in the main graphic, the target graphics including a first target graphic and a second target graphic, the extension line of the first target graphic towards the second target graphic intersects the second target graphic; obtain the addition rules of auxiliary graphics, and add auxiliary graphics around the first target graphic based on the addition rules, the auxiliary graphics including first auxiliary graphics located on both sides of the first target graphic and a second auxiliary graphic located between the first target graphic and the second target graphic; extend the two first auxiliary graphics along the direction towards the second target graphic, and connect them with the graphics extended by the second auxiliary graphic to form target auxiliary graphics, so as to optimize the auxiliary graphics, thereby optimizing the initial layout and forming an optimized layout, wherein the second auxiliary graphic extends along a direction parallel to the second target graphic.

[0026] Compared with the prior art, the layout optimization method and system of the present invention have the following advantages:

[0027] This invention provides an initial layout, which includes several separately arranged main graphics;

[0028] The process involves selecting target graphics from the main pattern. These target graphics include a first target graphic and a second target graphic, where the extension line of the first target graphic intersects with the second target graphic. Rules for adding auxiliary graphics are obtained, and based on these rules, auxiliary graphics are added around the first target graphic. These auxiliary graphics include first auxiliary graphics located on either side of the first target graphic and a second auxiliary graphic located between the first and second target graphics. The two first auxiliary graphics are extended along a direction towards the second target graphic and connected to the extended graphics of the second auxiliary graphic to form target auxiliary graphics. This optimizes the auxiliary graphics, thereby optimizing the initial layout and forming an optimized layout. The second auxiliary graphic extends in a direction parallel to the second target graphic. When using the optimized layout for photolithography, the process window can be increased. The contour variation of the photoresist layer is smaller. In subsequent etching processes, the etching process can be kept stable, ensuring the contour of the photoresist layer is as expected, thus improving chip yield.

[0029] The layout optimization system and the layout optimization method provided by this invention belong to the same inventive concept. Therefore, the layout optimization system provided by this invention possesses at least all the advantages of the layout optimization method provided by this invention. It can correct the pattern of the layout, and when photolithography is performed using the optimized layout, the contour changes in the photoresist layer are smaller when process conditions change, resulting in a stable pattern as expected. In the subsequent etching process, it can maintain the stability of the etching process, ensuring that the contour of the photoresist layer is as expected, thereby improving chip yield. Attached Figure Description

[0030] Figure 1 This is a flowchart of a layout optimization method according to one embodiment of the present invention;

[0031] Figure 2 This is a layout graphic with sub-resolution auxiliary graphics added in one embodiment;

[0032] Figure 3 This is a layout graphic with added sub-resolution auxiliary graphics in another embodiment;

[0033] Figure 4 This is a layout graphic optimized by adding sub-resolution auxiliary graphics in one embodiment of the present invention;

[0034] Figure 5 This is a comparison image of the contours formed before and after optimization by adding sub-resolution auxiliary graphics in one embodiment of the present invention;

[0035] In the picture,

[0036] 100 - First target graphic; 110 - Line end;

[0037] 200 - First auxiliary graphic; 300 - Second auxiliary graphic;

[0038] 310 - First contour; 400 - Second target graphic;

[0039] 500 - Target auxiliary graphic; 510 - Second contour. Detailed implementation manners

[0040] To make the objectives, advantages and features of the present invention clearer, the following further describes in detail the layout optimization method and system proposed by the present invention with reference to the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in very simplified forms and use non-precise scales, only for conveniently and clearly assisting in explaining the objectives of the embodiments of the present invention. It should be understood that the drawings in the specification do not necessarily show the specific structure of the present invention in proportion, and the illustrative features used to explain certain principles of the present invention in the drawings of the specification will also adopt slightly simplified drawing methods. The specific design features of the present invention disclosed herein, such as specific dimensions, directions, positions and shapes, will be partially determined by the specific application and usage environment. Also, in the following described embodiments, sometimes the same reference numerals are used among different drawings to represent the same part or parts with the same functions, and the repeated description thereof is omitted. In this specification, similar reference numerals and letters are used to represent similar items. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0041] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically and clearly defined. <�

[0042] In the description of this specification, the description referring to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0043] As shown in the Figure 1 figure. Figure 1 This involves adding sub-resolution auxiliary graphics to the existing layout. After adding the sub-resolution auxiliary graphics, the layout is directly developed. However, developing this layout results in significant changes to the contours of the photoresist layer. This can easily lead to changes in the subsequent etching process, causing instability. If the contours of the photoresist layer are not as expected, current cannot be smoothly transmitted through the metal layer, affecting chip yield.

[0044] The core idea of ​​this invention is to provide a layout optimization method that, when process conditions change, minimizes the change in the outline formed on the photoresist layer after the pattern of the layout is developed, thereby increasing the process window and ensuring the stability of the etching process.

[0045] To achieve the above ideas, this invention provides a layout optimization method, referring to... Figures 1 to 5 A specific implementation of the disclosed layout optimization method is described. The layout optimization method includes the following steps S1 to S4.

[0046] Step S1: Provide an initial layout, which includes several discretely arranged main graphics.

[0047] Specifically, refer to Figure 1 and Figure 2 As shown, the original layout consists of various patterns formed on a photomask during integrated circuit design for etching processes. The original layout includes several such patterns... Figure 2 The diagram shows several first target graphics 100 and second target graphics 400. It should be noted that... Figure 2 The graphics shown are related to the inventive points disclosed in this embodiment. The initial layout also includes other etched graphics, which have been omitted here.

[0048] Step S2: Filter the target graphics in the main graphic. The target graphics include a first target graphic 100 and a second target graphic 400. The extension line of the first target graphic 100 toward the second target graphic 400 intersects with the shape of the second target graphic 400.

[0049] Specifically, refer to Figure 1 , Figure 2 and Figure 3As shown, target graphics are selected from the main graphic using a script from the initial layout. Sub-resolution auxiliary graphics are not added at this step. Hereinafter, sub-resolution auxiliary graphics will be simply referred to as "auxiliary graphics." That is, in this embodiment, only the first target graphic 100 and the second target graphic 400 located at specific positions are selected. The first target graphic 100 has a line end 110. After development at the line end 110, the first target graphic 100 forms an arc-shaped contour in the photoresist. The second target graphic 400 is located near the line end 110. Furthermore, the extension line of the first target graphic 100 towards the second target graphic 400 intersects with the second target graphic 400.

[0050] The first target graphic 100 includes shapes such as rectangles, squares, and T-shapes. The second target graphic 400 also includes shapes such as rectangles, squares, and T-shapes, as well as... Figure 3 The U-shaped and other shapes shown are used. Since the shape of the patterns commonly used in etching processes is rectangular, the following explanation will use the first target pattern 100 and the second target pattern 400 as examples to illustrate this.

[0051] The long side of the first target graphic 100 along the longitudinal direction (i.e., Figure 2 The line extends in the direction of the middle arrow n, with the short side closest to the second target shape 400 being the line end 110. The long side of the second target shape 400 extends horizontally (i.e., Figure 2 (The direction of the middle arrow m) extends. The extension of line end 110 is perpendicular to the second target shape 400. That is, extending the first target shape 100 can form a T-shaped structure with the second target shape 400.

[0052] Both the first target graphic 100 and the second target graphic 400 are rectangles. The target graphic is selected from the main graphic. The target graphic includes the first target graphic 100 and the second target graphic 400. The intersection of the extension line of the first target graphic 100 towards the second target graphic 400 with the second target graphic 400 includes:

[0053] Filter the main graphics to obtain the first target graphic 100 and the second target graphic 400. The extension line of the short side of the first target graphic 100 intersects the long side of the second target graphic 400 perpendicularly.

[0054] Step S3: Obtain the rules for adding auxiliary graphics, and based on the rules, add auxiliary graphics around the first target graphic 100. The auxiliary graphics include first auxiliary graphics 200 located on both sides of the first target graphic 100 and second auxiliary graphics 300 located between the first target graphic 100 and the second target graphic 400.

[0055] Specifically, continue to participate Figure 1 , Figure 2 and Figure 3 As shown, the rules for adding auxiliary graphics are obtained through the design rules of the initial layout. Based on the addition rules, first auxiliary graphics 200 are added to both sides of the long side of the first target graphic 100. At the same time, a second auxiliary graphic 300 is added between the line terminal 110 and the second target graphic 400.

[0056] The shapes of the first auxiliary graphic 200 and the second auxiliary graphic 300 include rectangles, upright shapes, T-shapes, etc. Similarly, for ease of explanation, this embodiment will be described using the example where both the first auxiliary graphic 200 and the second auxiliary graphic 300 are rectangles. Further, the long side of the first auxiliary graphic 200 is parallel to the long side of the first target graphic 100. The long side of the second auxiliary graphic 300 is parallel to the long side of the second target graphic 400. In this embodiment, it is sufficient that the first auxiliary graphic 200 and the second auxiliary graphic 300 can form an arc-shaped structure at the line end 110 after development.

[0057] In addition, the line widths of the two first auxiliary graphics 200 are d1 and d2, respectively. The line width of the second auxiliary graphic 300 is d5. d1, d2, and d5 may or may not be equal. The distances of the two first auxiliary graphics 200 from the first target graphic 100 are d3 and d4, respectively. The distance of the second auxiliary graphic 300 from the first target graphic 100 is d6. d3, d4, and d6 may or may not be equal. This is not required here.

[0058] Step S4: Extend the two first auxiliary graphics 200 along the direction toward the second target graphics 400 and connect them with the graphics extended by the second auxiliary graphics 300 to form a target auxiliary graphics 500, so as to optimize the auxiliary graphics and thereby optimize the initial layout to form an optimized layout, wherein the second auxiliary graphics 300 extends along the direction parallel to the second target graphics 400.

[0059] Specifically, refer to Figure 1 , Figure 4 and Figure 5 As shown, two first auxiliary graphics 200 are extended along a direction toward the second target graphic 400 and connected with the extended graphics of the second auxiliary graphic 300 to form a target auxiliary graphic 500. The second auxiliary graphic 300 extends along a direction parallel to the second target graphic 400, including:

[0060] First, extend the first auxiliary graphic 200 along its long side. The first auxiliary graphic 200 along... Figure 4 Extend in the direction indicated by the middle arrow m.

[0061] Next, extend the second auxiliary graphic 300 along its long side. Extend the second auxiliary graphic 300 along... Figure 4 It extends in two directions where the arrow n is located in the [description] to connect with the extension line of the first auxiliary figure 200. The two first auxiliary figures 200 and the second auxiliary figure 300 are connected after extension, and the target auxiliary figure 500 is formed. From Figure 4 As can be seen, after the first auxiliary figure 200 and the second auxiliary figure 300 are extended, the formed target auxiliary figure 500 has a U-shaped structure.

[0062] The line width of the target auxiliary figure 500, and the distances from the target auxiliary figure 500 to the first target figure 100 and the second target figure 400 are equal, that is, they are still d1, d2, d3, d4, d5, and d6.

[0063] The addition of the target auxiliary figure 500 has the same priority as that of the first auxiliary figure 200 and the second auxiliary figure 300. That is, after the first auxiliary figure 200 and the second auxiliary figure 300 are added, first, the first auxiliary figure 200 and the second auxiliary figure 300 are extended and connected first, and then other-level graphic layers are added.

[0064] Refer Figure 5 As shown, after the first auxiliary figure 200 and the second auxiliary figure 300 are corrected, the target auxiliary figure 500 is formed to optimize the auxiliary figure, thereby optimizing the initial layout to form an optimized layout. After the original layout in Figure 3 is developed, the first contour 310 as shown in Figure 5 is formed on the photoresist layer. After the optimized layout in Figure 4 is developed, the second contour 510 as shown in Figure 5 is formed on the photoresist layer. From Figure 5 it can be seen that the inner circle of the first contour 310 at a is within the inner perimeter of the second contour 510, and the outer circle of the first contour 310 at b is outside the outer perimeter of the second contour 510. Therefore, from the first contour 310 and the second contour 510, it can be seen that when lithography is performed using the Figure 4 optimized layout, the contour change formed at the line end 110 is smaller, increasing the process window. That is, when the process conditions change, when lithography is performed using the Figure 4 optimized layout, when forming the contour, the process window is increased, and the formed contour change is smaller, so as to maintain process stability. In the subsequent etching process, the etching process can be maintained stable, so that the contour formed on the photoresist layer is as expected, improving the chip yield.

[0065] To implement the above idea, this embodiment also discloses a layout optimization system, including:

[0066] An acquisition module is used to provide an initial layout, which includes several discretely arranged main graphics;

[0067] A logic operation module is used to filter target graphics in the main graphic, the target graphics including a first target graphic 100 and a second target graphic 400, the extension line of the first target graphic 100 toward the second target graphic 400 intersects with the second target graphic 400; obtain the addition rules of auxiliary graphics, and add auxiliary graphics around the first target graphic 100 based on the addition rules, the auxiliary graphics including first auxiliary graphics 200 located on both sides of the first target graphic 100 and second auxiliary graphics 300 located between the first target graphic 100 and the second target graphic 400; extend the two first auxiliary graphics 200 along the direction toward the second target graphic 400 and connect them with the graphics extended by the second auxiliary graphics 300 to form a target auxiliary graphic 500, so as to optimize the auxiliary graphics, thereby optimizing the initial layout and forming an optimized layout, wherein the second auxiliary graphics 300 extends along a direction parallel to the second target graphic 400.

[0068] The layout optimization system and the layout optimization method provided in this embodiment belong to the same inventive concept. Therefore, the layout optimization system provided in this embodiment has at least all the advantages of the layout optimization method provided in this embodiment. It can optimize the pattern of the layout, and when photolithography is performed using the optimized layout, the contour changes in the photoresist layer are smaller. In the subsequent etching process, the etching process can be kept stable, so that the contour of the photoresist layer is as expected, thus improving the chip yield.

[0069] In summary, the above embodiments have provided detailed descriptions of different configurations of the layout optimization method and system. Of course, the above descriptions are only descriptions of preferred embodiments of the present invention and are not intended to limit the scope of the present invention in any way. The present invention includes but is not limited to the configurations listed in the above embodiments. Those skilled in the art can draw inferences from the above embodiments. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A layout optimization method, characterized in that, include: An initial layout is provided, which includes several separately arranged main graphics; Filter the target graphics in the main graphic, the target graphics include a first target graphic and a second target graphic, the extension line of the first target graphic toward the second target graphic intersects with the second target graphic; Obtain the rules for adding auxiliary graphics, and based on the rules, add auxiliary graphics around the first target graphic. The auxiliary graphics include first auxiliary graphics located on both sides of the first target graphic and second auxiliary graphics located between the first target graphic and the second target graphic. The two first auxiliary graphics are extended along the direction toward the second target graphic and connected with the graphics extended from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics and thereby optimize the initial layout to form an optimized layout, wherein the second auxiliary graphic extends along the direction parallel to the second target graphic.

2. The layout optimization method according to claim 1, characterized in that, The first target graphic has line ends. After the first target graphic is developed at the line ends, it forms an arc-shaped outline. The extension line of the line ends is perpendicular to the second target graphic.

3. The layout optimization method according to claim 2, characterized in that, The first target graphic has a rectangular shape, the second target graphic has a rectangular shape, and the short sides adjacent to the first target graphic and the second target graphic are line ends.

4. The layout optimization method according to claim 1, characterized in that, Both the first target graphic and the second target graphic are rectangles. The target graphic in the main graphic is selected. The target graphic includes the first target graphic and the second target graphic. The intersection of the extension line of the first target graphic towards the second target graphic and the second target graphic includes: Filter the main image to obtain the first target image and the second target image. The extension line of the short side of the first target image intersects the long side of the second target image perpendicularly.

5. The layout optimization method according to claim 1, characterized in that, The rules for adding auxiliary graphics include: By using the design rules of the initial layout, obtain the rules for adding auxiliary graphics.

6. The layout optimization method according to claim 2, characterized in that, Both the first auxiliary graphic and the second auxiliary graphic are rectangles. The direction of the long side of the first auxiliary graphic is parallel to the first target graphic, and the direction of the long side of the second auxiliary graphic is parallel to the second target graphic. The two first auxiliary graphics are extended along a direction toward the second target graphic and connected to the extended graphic of the second auxiliary graphic to form the target auxiliary graphic. The extension of the second auxiliary graphic along a direction parallel to the second target graphic includes: Extend the first auxiliary graphic along its long side; The second auxiliary graphic is extended along its long side to connect with the extension line of the first auxiliary graphic, thus forming the target auxiliary graphic.

7. The layout optimization method according to claim 1, characterized in that, The line width of the target auxiliary graphic is equal to the line width of the first auxiliary graphic and the line width of the second auxiliary graphic.

8. The layout optimization method according to claim 1, characterized in that, The distance between the auxiliary target graphic and the first target graphic and the second target graphic is equal to the distance between the first auxiliary graphic and the first target graphic, and the distance between the second auxiliary graphic and the first target graphic.

9. The layout optimization method according to claim 1, characterized in that, The addition of the target auxiliary graphic has the same priority as the addition of the first and second auxiliary graphics.

10. A layout optimization system, characterized in that, include: An acquisition module is used to provide an initial layout, which includes several discretely arranged main graphics; A logic operation module is used to filter target graphics in the main graphic. The target graphics include a first target graphic and a second target graphic. The extension line of the first target graphic toward the second target graphic intersects with the second target graphic. Obtain the rules for adding auxiliary graphics, and based on the rules, add auxiliary graphics around the first target graphic. The auxiliary graphics include first auxiliary graphics located on both sides of the first target graphic and second auxiliary graphics located between the first target graphic and the second target graphic. The two first auxiliary graphics are extended along the direction toward the second target graphic and connected with the graphics extended from the second auxiliary graphics to form a target auxiliary graphic, so as to optimize the auxiliary graphics and thereby optimize the initial layout to form an optimized layout, wherein the second auxiliary graphic extends along the direction parallel to the second target graphic.

Images