Mimicry scheduling method and device, equipment, storage medium and product
By dividing and processing ports according to the priority of data to be processed in the simulated system, the problem of scheduler delay and insufficient decision speed is solved, and the operating efficiency of the system is improved.
Patent Information
- Application Number
- CN202411418747.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-11
- Publication Date
- 2025-01-21
AI Technical Summary
In existing mimicked systems, the delay and judgment speed of the scheduler cannot meet the real-time scheduling requirements, resulting in the waiting of important data segments for a long time and reducing the operating efficiency of the system.
By introducing a data storage module into the pseudomorphic system, the data to be processed is stored in the corresponding port according to its priority, and the data to be processed is processed in sequence according to the priority of the port.
The priority scheduling and processing of important data is realized, the impact of the judgment mechanism of the scheduler on the system's operating speed is reduced, and the overall operating efficiency of the system is improved.
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Figure CN119336465A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to a mimicry scheduling method, device, equipment, storage medium and product. Background Art
[0002] By adding a heterogeneous redundant structure and a majority decision mechanism of the scheduler, the mimetic system can detect the anomaly through the scheduler when a single CPU core is attacked and cannot work normally, and clean and restart the faulty CPU; at the same time, other cores that have not been attacked continue to work, ensuring the normal operation of the entire system, thus having a strong security advantage. Although the security of the mimetic system is significantly improved, the introduction of the scheduler inevitably introduces scheduler delays. In some application scenarios, the amount of data sent by the heterogeneous CPU to the scheduler is large, and the scheduler's decision takes time; or because the scheduling CPU handles an exception, the scheduling process is temporarily suspended, resulting in the scheduler being unable to meet the decision speed that is always greater than the data segment arrival speed, that is, real-time scheduling, so the data segments to be judged will enter the waiting queue.
[0003] In the prior art, the traditional scheduling order adopts a "first come, first served" method without additional priority scheduling. This "first come, first served" scheduling order may cause important data segments to wait for a long time before being scheduled, thereby reducing system operation efficiency. Summary of the invention
[0004] The present invention provides a mimetic scheduling method, device, equipment, storage medium and product to achieve optimized scheduling of a computer mimetic system.
[0005] According to one aspect of the present invention, a mimic scheduling method is provided, comprising:
[0006] Obtaining the data to be processed in the virtualized system and determining the priority of the data to be processed;
[0007] The data to be processed is stored in a data storage module, and the storage address of the data to be processed in the data storage module is written into a corresponding port according to the priority of the data to be processed; wherein the data storage module includes at least two ports, and each port corresponds to a different priority;
[0008] The data to be processed are processed in sequence according to the priority order of each port.
[0009] Furthermore, before obtaining the data to be processed, the following steps are also included:
[0010] Prioritize the data source address to determine at least two address segments; wherein each of the address segments corresponds to a different priority.
[0011] Further, determining the priority of the data to be processed includes:
[0012] Determining, according to the source address of the data to be processed, the address segment corresponding to the data to be processed;
[0013] The priority of the address segment corresponding to the data to be processed is determined as the priority of the data to be processed.
[0014] Further, the data storage module includes an empty address pointer queue, a storage unit and at least two of the ports, storing the data to be processed in the data storage module, and writing the storage address of the data to be processed in the data storage module into the corresponding port according to the priority of the data to be processed, including:
[0015] Extracting an empty address from the empty address pointer queue as the storage address of the data to be processed; wherein the empty address pointer queue is used to store the empty addresses in the storage unit;
[0016] Determine the port corresponding to the data to be processed according to the priority of the data to be processed;
[0017] The data to be processed is stored in the storage unit according to the storage address of the data to be processed, and the storage address of the data to be processed is written into the port corresponding to the data to be processed.
[0018] Furthermore, in the port, the storage address of the data to be processed is stored in a first-in-first-out queue.
[0019] Further, the data to be processed is processed in sequence according to the priority order of each port, including:
[0020] Extracting the storage address of the data to be processed from each port in sequence according to the priority order of each port by a scheduler;
[0021] The data to be processed is read from the data storage module according to the storage address of the data to be processed for processing.
[0022] According to another aspect of the present invention, there is provided a mimic scheduling device, comprising:
[0023] A priority determination module, used to obtain the data to be processed in the mimicry system and determine the priority of the data to be processed;
[0024] A data writing module, used for storing the data to be processed into a data storage module, and writing the storage address of the data to be processed in the data storage module into a corresponding port according to the priority of the data to be processed; wherein the data storage module includes at least two ports, each of which corresponds to a different priority;
[0025] The data processing module is used to process the data to be processed in sequence according to the priority order of each port.
[0026] Optionally, the device also includes a priority classification module, which is used to prioritize the data source address and determine at least two address segments; wherein each of the address segments corresponds to a different priority.
[0027] Optionally, the priority determination module is further configured to:
[0028] Determining, according to the source address of the data to be processed, the address segment corresponding to the data to be processed;
[0029] The priority of the address segment corresponding to the data to be processed is determined as the priority of the data to be processed.
[0030] Optionally, the data storage module includes an empty address pointer queue, a storage unit and at least two of the ports, and the data writing module is further used for:
[0031] Extracting an empty address from the empty address pointer queue as the storage address of the data to be processed; wherein the empty address pointer queue is used to store the empty addresses in the storage unit;
[0032] Determine the port corresponding to the data to be processed according to the priority of the data to be processed;
[0033] The data to be processed is stored in the storage unit according to the storage address of the data to be processed, and the storage address of the data to be processed is written into the port corresponding to the data to be processed.
[0034] Optionally, in the port, the storage address of the data to be processed is stored in a first-in-first-out queue.
[0035] Optionally, the data processing module is also used for:
[0036] Extracting the storage address of the data to be processed from each port in sequence according to the priority order of each port by a scheduler;
[0037] The data to be processed is read from the data storage module according to the storage address of the data to be processed for processing.
[0038] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:
[0039] at least one processor; and
[0040] a memory communicatively connected to the at least one processor; wherein,
[0041] The memory stores a computer program that can be executed by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the mimetic scheduling method described in any embodiment of the present invention.
[0042] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the mimetic scheduling method described in any embodiment of the present invention when executed.
[0043] According to another aspect of the present invention, a computer program product is provided, the computer program product comprising a computer program / instruction, and the computer program / instruction, when executed by a processor, implements the steps of the mimetic scheduling method described in any embodiment of the present invention.
[0044] The pseudo-scheduling method disclosed in the present invention first obtains the data to be processed and determines the priority of the data to be processed; then stores the data to be processed into a data storage module, and writes the storage address of the data to be processed in the data storage module into the corresponding port; wherein the data storage module includes at least two ports, each port corresponding to a different priority; finally, the data to be processed is processed in sequence according to the priority order of each port. The pseudo-scheduling method disclosed in the present invention can prioritize the important data by distinguishing the priorities of the data to be processed and making the data to be processed of different priorities correspond to different ports, thereby effectively reducing the influence of the decision mechanism of the scheduler on the system operation speed and improving the overall operation efficiency of the system.
[0045] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0047] Figure 1 is a flowchart of a mimic scheduling method provided according to Embodiment 1 of the present invention;
[0048] Figure 2 is a flowchart of a mimic scheduling method provided according to Embodiment 2 of the present invention;
[0049] Figure 3 is a schematic diagram of writing to-be-processed data into a data storage module provided by Embodiment 2 of the present invention;
[0050] Figure 4 is a schematic diagram of a scheduling process provided according to Embodiment 2 of the present invention;
[0051] Figure 5 is a schematic diagram of a traditional scheduling method in this example provided according to Embodiment 2 of the present invention;
[0052] Figure 6 is a schematic diagram of a scheduling method of the present invention provided in accordance with Embodiment 2 of the present invention;
[0053] Figure 7 is a schematic diagram of an internal queue of a data storage module in this example provided according to Embodiment 2 of the present invention;
[0054] Figure 8 is a structural diagram of a mimic scheduling device provided according to Embodiment 3 of the present invention;
[0055] Fig. 9 It is a structural diagram of an electronic device that implements the mimic scheduling method of embodiment 4 of the present invention. DETAILED DESCRIPTION
[0056] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0057] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0058] Embodiment 1
[0059] Figure 1 This is a flowchart of a mimetic scheduling method provided in Embodiment 1 of the present invention. This embodiment is applicable to the case of scheduling a computer mimetic system. The method can be executed by a mimetic scheduling device. The mimetic scheduling device can be implemented in the form of hardware and / or software. The mimetic scheduling device can be configured in an electronic device. Figure 1 As shown, the method includes:
[0060] S110: Obtain the data to be processed in the mimicry system, and determine the priority of the data to be processed.
[0061] The data to be processed is data sent by the heterogeneous CPUs in the virtualized system to the scheduler for scheduling and processing by the scheduler.
[0062] In the scheduling of the traditional virtualized system, the scheduler adopts a "first come, first served" scheduling method, and does not adopt additional priority scheduling. In this embodiment, by distinguishing the priorities of the data to be processed, important data can be processed first.
[0063] Generally, priority process scheduling algorithms are divided into non-preemptive priority scheduling algorithms and preemptive priority scheduling algorithms. The difference is that non-preemptive algorithms will not interrupt the process of processing a process, while preemptive algorithms will interrupt the current process and process the higher priority process whenever a higher priority process arrives. Priority is divided into static priority and dynamic priority. The static priority is determined when the process is created and then remains unchanged, while the dynamic priority changes with the advancement of the process or the increase of waiting time in order to obtain better scheduling performance.
[0064] Preferably, the scheduling in the embodiment of the present invention may adopt a non-preemptive priority scheduling algorithm, and the scheduler will not change the decision object before processing the current decision, and the priority adopts a static priority.
[0065] S120, storing the data to be processed into a data storage module, and writing the storage address of the data to be processed in the data storage module into a corresponding port according to the priority of the data to be processed.
[0066] The data storage module is used to temporarily store the data to be processed. The data to be processed is first stored in the data storage module, and the scheduler extracts the data to be processed from the data storage module for scheduling. The data storage module includes at least two ports, each port corresponding to a different priority.
[0067] In this embodiment, after the data to be processed is stored in the data storage module, the storage address of the data to be processed in the data storage module needs to be written into a port of the data storage module. According to the prior priority division, each port of the data storage module corresponds to a different priority. Since the priority of the data to be processed has been determined, the port corresponding to the data to be processed can be determined according to the matching of the priority, and the storage address of the data to be processed in the data storage module is written into the corresponding port.
[0068] For example, according to the prior priority division, the data is divided into 32 priorities, and the data storage module includes 32 ports, which are sorted from high to low in priority as port 1, port 2, ..., port 32. If the currently acquired data to be processed is determined to have a priority of level 1 after judgment, it will be stored in the data storage module, and the storage address of the data in the data storage module will be written to port 1.
[0069] S130 , processing the data to be processed in sequence according to the priority order of each port.
[0070] In this embodiment, after the data to be processed is stored in the data storage module and the storage address of the data to be processed in the data storage module is written into the corresponding port, the scheduler can extract the storage address of the data to be processed in the data storage module from each port in turn according to the priority order of each port, starting from the port with the highest priority, and then read the data to be processed from the data storage module according to the extracted storage address for processing.
[0071] The mimetic scheduling method provided by the embodiment of the present invention first obtains the data to be processed in the mimetic system and determines the priority of the data to be processed; then the data to be processed is stored in the data storage module, and the storage address of the data to be processed in the data storage module is written into the corresponding port according to the priority of the data to be processed; wherein the data storage module includes at least two ports, each port corresponds to a different priority; finally, the data to be processed is processed in sequence according to the priority order of each port. The mimetic scheduling method disclosed in the present invention can prioritize the important data by distinguishing the priorities of the data to be processed and making the data to be processed of different priorities correspond to different ports, thereby effectively reducing the influence of the decision mechanism of the scheduler on the system operation speed and improving the overall operation efficiency of the system.
[0072] Embodiment 2
[0073] Figure 2 Flow chart of a mimic scheduling method provided in Embodiment 2 of the present invention. This embodiment is a refinement of the above embodiment. Figure 2 As shown, the method includes:
[0074] S210: Obtain data to be processed in the mimicry system.
[0075] In this embodiment, the data to be processed is data sent by the heterogeneous CPUs in the virtualized system to the scheduler for scheduling and processing by the scheduler.
[0076] Furthermore, before obtaining the data to be processed, it is also possible to: prioritize the data source addresses and determine at least two address segments.
[0077] Among them, each address segment corresponds to a different priority.
[0078] Specifically, in a mimicking system, the CPU needs to communicate with different address segments of different hardware devices. For the system, data at different addresses have different importance. Therefore, the data source addresses can be prioritized according to the needs and the importance of the addresses, and the data source addresses of all the data to be processed can be divided into two or more address segments.
[0079] For example, 32 address segments can be divided, with a total of 64 addresses, in order of priority from high to low, namely the highest priority starting address, the highest priority ending address, the second highest priority starting address, the second highest priority ending address...the lowest (32nd level) priority starting address, the lowest priority ending address.
[0080] S220 . Determine the address segment corresponding to the data to be processed according to the source address of the data to be processed, and determine the priority of the address segment corresponding to the data to be processed as the priority of the data to be processed.
[0081] In this embodiment, after obtaining the data to be processed, the address segment to which the data to be processed belongs can be determined according to the source address of the data to be processed, and then the priority of the data to be processed can be determined according to the priorities of the different address segments divided in advance. For example, if the source address of the data to be processed belongs to the highest priority address segment, the priority of the data to be processed is the highest priority.
[0082] Furthermore, to implement the address-based priority scheduling of the embodiment of the present invention, a priority controller can be added to the traditional scheduler. The priority controller uses the AXI protocol and is connected to the internal bus of the scheduler, in which the start address and end address information corresponding to each priority address segment are recorded. The user can send instructions to the CPU through software to change the address priority by writing the start address and end address corresponding to different priority address segments to the priority controller.
[0083] S230 , extracting an empty address from the empty address pointer queue as a storage address of the data to be processed, and determining a port corresponding to the data to be processed according to the priority of the data to be processed.
[0084] The data storage module includes an empty address pointer queue, a storage unit and at least two ports. The empty address pointer queue is a first-in-first-out queue for storing empty addresses in the storage unit. The data storage module includes at least two ports, each port corresponding to a different priority.
[0085] In this embodiment, after the data to be processed is stored in the data storage module, the storage address of the data to be processed in the data storage module needs to be written into a port of the data storage module. According to the prior priority division, each port of the data storage module corresponds to a different priority. Since the priority of the data to be processed has been determined, the port corresponding to the data to be processed can be determined according to the matching of the priority, and the storage address of the data to be processed in the data storage module is written into the corresponding port.
[0086] Preferably, the data storage module in the embodiment of the present invention can be a VOQ (virtual output queue) module. VOQ is a storage structure composed of a null address pointer queue, a storage unit RAM and a plurality of port FIFOs. The null address pointer queue is a first-in first-out queue FIFO, which is used to record the null address in the storage unit RAM where no data is stored. The storage unit RAM is used to store data, and the port FIFO is used to record the storage address after the data to be processed is written into the storage unit RAM. After reset, the null address pointer FIFO is full, and the data in each address is the address itself, indicating that all addresses in the storage unit RAM are null.
[0087] Furthermore, in order to implement the address-based priority scheduling of the embodiment of the present invention, the original FIFO module in the traditional scheduler can be replaced with a VOQ module, and the priority controller can be combined with the VOQ module and equipped with necessary logic control to implement address priority scheduling. According to the address segment priority division result, each address segment priority can correspond to a port in the VOQ module. Before the data to be processed enters the VOQ, the port corresponding to the data to be processed can be determined by matching the determined priority of the data to be processed with the priority corresponding to the port.
[0088] Figure 3 This is a schematic diagram of writing data to be processed into a data storage module provided by an embodiment of the present invention. As shown in the figure, after the data to be processed is obtained, priority judgment is performed based on the data source address of the data to be processed and the set address segment priority. After the different priorities of the data to be processed are determined, they are written into the data storage module. In the data storage module, data of different priorities correspond to different ports respectively.
[0089] S240 , storing the data to be processed into a storage unit according to the storage address of the data to be processed, and writing the storage address of the data to be processed into a port corresponding to the data to be processed.
[0090] In this embodiment, when the data to be processed is stored in the data storage module, an empty address in a storage unit RAM of the empty address pointer FIFO is first read as the storage address of the data to be processed, and then the data to be processed is written to the corresponding address of the storage unit RAM, and the storage address of the data in the storage unit RAM is written to the port FIFO corresponding to the data to be processed.
[0091] Optionally, in the port, the storage addresses of the data to be processed are stored in a first-in-first-out queue.
[0092] Specifically, the data writing process of the data storage module is to read an empty address in the empty address pointer FIFO as the storage address of the data to be processed in the storage unit RAM, write the data to be processed to the address in the storage unit RAM, and then write the address to the corresponding port FIFO. The data reading process is to first read the address information of the port FIFO, then read the data to be processed at the corresponding address of the storage unit RAM. After the data is extracted, its storage address in the storage unit RAM becomes an empty address, and finally write the empty address to the empty address pointer FIFO. In each port, the data sent to the port, that is, the storage address of the data to be processed is virtualized into a queue, so that the outputs of different ports do not affect each other. If the user changes the priority order of the address segment, the data stored in each port remains unchanged, and the storage address of the data to be processed corresponding to the new address segment continues to be stored in the queue order, that is, it does not affect the scheduling order of the data to be processed that has arrived at the data storage module but has not been processed.
[0093] S250 , extracting the storage address of the data to be processed from each port in sequence according to the priority order of each port through the scheduler, and reading the data to be processed from the data storage module according to the storage address of the data to be processed for processing.
[0094] In this embodiment, the scheduling control logic of the scheduler is: read data from each port in turn according to the priority of each port from high to low, and then extract the data to be processed from the data storage module according to the read storage address. For each port, the condition for each port to be read is that other ports with a higher priority than this port have no readable data, and this port has readable data.
[0095] Figure 4 It is a schematic diagram of a scheduling process provided by an embodiment of the present invention. As shown in the figure, the scheduler responds to the judgment request to initiate a judgment to enable the read of each port, and then reads the port data. When reading the data of a certain port, it is necessary to meet that other ports with a higher priority than this port are read empty and the port is read enabled.
[0096] For example, if a mimic scheduling system has three heterogeneous CPUs numbered CPU1, CPU2, and CPU3, and the user configures three priority address segments A, B, and C, and the priority is A>B>C. There are four data to be processed 11, 12, 13, and 14, whose source addresses belong to B, C, A, and C respectively, and they come from the corresponding heterogeneous CPUs to their respective queues in turn.
[0097] Figure 5 This is a schematic diagram of a traditional scheduling method used in this example provided by an embodiment of the present invention. As shown in the figure, when the traditional scheduling method is used, the waiting queue of each CPU is a FIFO, and the scheduling order is "first come first go", then the scheduler scheduling order is 11-12-13-14. Among them, when the most important data to be processed 13 arrives, there are relatively unimportant data segments to be judged, and it is necessary to wait until all the previous data segments are judged, so the scheduler delay has a greater impact on the overall operation of the system.
[0098] Figure 6It is a schematic diagram of a scheduling method of the present invention provided by an embodiment of the present invention. As shown in the figure, in the scheduling method provided by the embodiment of the present invention, the VOQ module is used as the data storage module, which includes ports f1, f2, and f3 (not shown in the figure), and the priority is f1>f2>f3. After the data to be processed 11, 12, 13, and 14 are stored in the data storage module, the priority is determined according to the start address and end address information corresponding to each priority address segment stored in the priority controller, and the source addresses of the data to be processed 11, 12, 13, and 14 are confirmed to correspond to the priority address segments respectively. The address stored in port f1 corresponds to the data to be processed 13, the address stored in port f2 corresponds to the data to be processed 11, and the address stored in port f3 corresponds to the data to be processed 12 and 14. Then the scheduler schedules to take the address from f1 first, if f1 is empty, it takes it from f2, if f2 is also empty, it takes it from f3, and the scheduling order is 13-11-12-14. Scheduling in this way according to the priority order can ensure that the most important data to be processed 13 can be processed first, so that the scheduler delay has less impact on the overall operation of the system.
[0099] Figure 7 This is a schematic diagram of an internal queue of a data storage module in this example provided by an embodiment of the present invention. As shown in the figure, when the data to be processed 11, 12, 13, and 14 are stored in the data storage module, empty addresses 0, 1, 2, and 3 in the storage unit are extracted from the empty address pointer queue, corresponding to the data to be processed 11, 12, 13, and 14, respectively. Then, each data to be processed is stored in the corresponding address, respectively. According to the priority of the data to be processed 11, 12, 13, and 14, the corresponding ports are f2, f3, f1, and f3, respectively. Therefore, the storage addresses written in ports f1, f2, and f3 are (2)(0)(1, 3), respectively.
[0100] The pseudo-scheduling method provided in the embodiment of the present invention divides the data to be processed into multiple priorities according to the different source addresses of the data to be processed, and makes the data to be processed of different priorities correspond to different ports, so that important data can be scheduled and processed first. In addition, the storage address of the data to be processed is stored in the port in the form of a first-in-first-out queue, so that the outputs of different ports do not affect each other. If the priority order of the address segment changes, it will not affect the scheduling order of the data to be processed that has arrived at the data storage module. The above method effectively reduces the impact of the decision mechanism of the scheduler on the system operation speed, and improves the overall operation efficiency of the system.
[0101] Embodiment 3
[0102] Figure 8 A schematic diagram of the structure of a mimic scheduling device provided in Embodiment 3 of the present invention is shown in FIG. Figure 8As shown, the device includes: a priority determination module 310 , a data writing module 320 and a data processing module 330 .
[0103] The priority determination module 310 is used to obtain the data to be processed in the mimicry system and determine the priority of the data to be processed.
[0104] The data writing module 320 is used to store the data to be processed into the data storage module, and write the storage address of the data to be processed in the data storage module into the corresponding port according to the priority of the data to be processed.
[0105] The data storage module includes at least two ports, and each port corresponds to a different priority.
[0106] The data processing module 330 is used to process the data to be processed in sequence according to the priority order of each port.
[0107] Optionally, the device further includes a priority classification module 340 for performing priority classification on the data source address to determine at least two address segments.
[0108] Among them, each address segment corresponds to a different priority.
[0109] Optionally, the priority determination module 310 is further configured to:
[0110] According to the source address of the data to be processed, the address segment corresponding to the data to be processed is determined; and the priority of the address segment corresponding to the data to be processed is determined as the priority of the data to be processed.
[0111] Optionally, the data storage module includes an empty address pointer queue, a storage unit and at least two ports, and the data writing module 320 is further used for:
[0112] Extract an empty address from the empty address pointer queue as the storage address of the data to be processed; wherein the empty address pointer queue is used to store the empty addresses in the storage unit; determine the port corresponding to the data to be processed according to the priority of the data to be processed; store the data to be processed in the storage unit according to the storage address of the data to be processed, and write the storage address of the data to be processed into the port corresponding to the data to be processed.
[0113] Optionally, in the port, the storage addresses of the data to be processed are stored in a first-in-first-out queue.
[0114] Optionally, the data processing module 330 is further used for:
[0115] The storage address of the data to be processed is extracted from each port in sequence according to the priority order of each port through the scheduler; and the data to be processed is read from the data storage module according to the storage address of the data to be processed for processing.
[0116] The mimetic scheduling device provided in the embodiment of the present invention can execute the mimetic scheduling method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0117] Embodiment 4
[0118] Fig. 9 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.
[0119] like Fig. 9 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0120] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0121] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the mimetic scheduling method.
[0122] In some embodiments, the mimetic scheduling method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the mimetic scheduling described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the mimetic scheduling method in any other appropriate manner (e.g., by means of firmware).
[0123] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0124] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0125] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0126] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
[0127] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0128] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.
[0129] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0130] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A mimic scheduling method, characterized in that: include: Obtaining the data to be processed in the virtualized system and determining the priority of the data to be processed; The data to be processed is stored in a data storage module, and the storage address of the data to be processed in the data storage module is written into a corresponding port according to the priority of the data to be processed; wherein the data storage module includes at least two ports, and each port corresponds to a different priority; The data to be processed are processed in sequence according to the priority order of each port.
2. The method according to claim 1, characterized in that Before obtaining the data to be processed, it also includes: Prioritize the data source address to determine at least two address segments; wherein each of the address segments corresponds to a different priority.
3. The method according to claim 2, characterized in that Determining the priority of the data to be processed includes: Determining, according to the source address of the data to be processed, the address segment corresponding to the data to be processed; The priority of the address segment corresponding to the data to be processed is determined as the priority of the data to be processed.
4. The method according to claim 1, characterized in that: The data storage module comprises an empty address pointer queue, a storage unit and at least two ports, storing the data to be processed in the data storage module, and writing the storage address of the data to be processed in the data storage module into the corresponding port according to the priority of the data to be processed, including: Extracting an empty address from the empty address pointer queue as the storage address of the data to be processed; wherein the empty address pointer queue is used to store the empty addresses in the storage unit; Determine the port corresponding to the data to be processed according to the priority of the data to be processed; The data to be processed is stored in the storage unit according to the storage address of the data to be processed, and the storage address of the data to be processed is written into the port corresponding to the data to be processed.
5. The method according to claim 4, characterized in that In the port, the storage addresses of the data to be processed are stored in a first-in-first-out queue.
6. The method according to claim 1, characterized in that The data to be processed are processed in sequence according to the priority order of each port, including: Extracting the storage address of the data to be processed from each port in sequence according to the priority order of each port by a scheduler; The data to be processed is read from the data storage module according to the storage address of the data to be processed for processing.
7. A mimicry scheduling device, characterized in that: include: A priority determination module, used to obtain the data to be processed in the mimicry system and determine the priority of the data to be processed; A data writing module, used for storing the data to be processed into a data storage module, and writing the storage address of the data to be processed in the data storage module into a corresponding port according to the priority of the data to be processed; wherein the data storage module includes at least two ports, each of which corresponds to a different priority; The data processing module is used to process the data to be processed in sequence according to the priority order of each port.
8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the mimic scheduling method according to any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the mimetic scheduling method according to any one of claims 1 to 6 when executed.
10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the mimetic scheduling method according to any one of claims 1 to 6 are implemented.
Citation Information
Cited By
Communication method and device, system-on-chip, storage medium and program product
CN120011111A