Method for securing program in memory

Abstract

The embodiment of the invention relates to a method for securing a program in a memory. A method of securing a program embedded in a memory within a microcontroller includes writing a boot program into a first region of the memory, and writing at least one additional program into at least one second region of the memory. One or more values of the first register are modified to provide write protection for the first region and the second region. Then, when the one or more values of the first register are associated with the write-protected state of the first region, modification to the one or more values of the first register is inhibited from being implemented.

Description

[0001] Priority claim

[0002] This application claims the benefit of priority of French Patent Application No. 2307762, filed on July 20, 2023, the contents of which are hereby incorporated by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present disclosure generally relates to methods of securing (eg, providing security protection for) programs in memory, and devices implementing these methods. Background Art

[0004] Many electronic circuits such as microcontrollers use a bootloader (BOOT), which is loaded into the non-volatile memory of the circuit when the circuit is booted, to subsequently run the boot application. Other programs can then also be loaded to run other applications. For security reasons, it is necessary to be able to write-protect (i.e., securely protect) the area of ​​the memory in which the bootloader, other programs, or just data are loaded relative to the outside of the circuit and / or relative to other applications. Current solutions cannot guarantee both optimal security during the continuous loading of the bootloader and the continuous loading of other programs, and flexibility when defining the memory area to be write-protected.

[0005] There is a need to ensure both optimal security during loading of the boot program and loading of other programs, and flexibility in defining the memory areas that are to be written to and protected.

[0006] There is a need in the art to overcome all or some of the shortcomings of known methods. Summary of the invention

[0007] An embodiment provides a method for securing a program in a memory, the method comprising: writing a boot program into a first area of ​​the memory; writing at least one additional program into at least one second area of ​​the memory; modifying one or more values ​​of a first register to provide write protection for the first area and the second area; and when the one or more values ​​of the first register are associated with the write protection state of the first area, prohibiting modification of the one or more values ​​of the first register.

[0008] In an embodiment, the first register associates a write protection status value with one or more regions of the memory.

[0009] In an embodiment, wherein prohibiting modification includes modifying a value of the second register.

[0010] In an embodiment, modification of the value of the second register is authorized depending on a state of a circuit comprising said memory.

[0011] In an embodiment, the state of the circuit including the memory is a state from among a regression state, a write-enabled state, and a configuration state.

[0012] In an embodiment, modification of the value of the second register is authorized by using a specific security code.

[0013] In an embodiment, the second register is configured to take two different values, each value being encoded on a number of bits greater than or equal to 8, each bit of one of the two different values ​​being different from a corresponding bit of the other value.

[0014] In an embodiment, the second register is non-volatile.

[0015] In an embodiment, the first register is non-volatile.

[0016] In an embodiment, modification of the one or more values ​​of the first register is inhibited from being implemented after writing of the at least one additional program.

[0017] In an embodiment, modification of the one or more values ​​of the first register is inhibited from being implemented before writing of the at least one additional program.

[0018] In an embodiment, the first region of memory is defined by two user option bytes.

[0019] In an embodiment, write protection of the boot program is implemented before writing of the at least one additional program.

[0020] An embodiment provides a microcontroller, which includes a memory and is configured to implement the above-mentioned program security method in the memory.

[0021] In an embodiment, the memory is non-volatile. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above-mentioned features and advantages and other features and advantages will be described in detail in the remaining disclosure of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which:

[0023] Figure 1 An example of an integrated circuit to which the described embodiments are applicable is shown very schematically in block form;

[0024] Figure 2 Schematically shows Figure 1 Examples of memories of integrated circuits;

[0025] Figure 3The steps of a method for securing a memory of a program according to an embodiment are schematically illustrated;

[0026] Figure 4 The present invention illustrates an implementation mode of a method for securing a program's memory; and

[0027] Figure 5 Another implementation mode of the method for securing a program in memory is shown in the figure. DETAILED DESCRIPTION

[0028] In the various figures, similar features have been indicated by similar reference numerals. In particular, common structural and / or functional features among the various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.

[0029] For clarity, only the steps and elements that are helpful for understanding the described embodiments are illustrated and described in detail.

[0030] Unless otherwise stated, when reference is made to two elements being connected together, this means a direct connection without any intermediate elements except conductors, and when reference is made to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0031] In the following description, when reference is made to terms defining absolute positions (such as terms "edge", "back", "top", "bottom", "left", "right", etc.) or terms defining relative positions (such as terms "above", "below", "upper", "lower", etc.) or terms defining directions (such as terms "horizontal", "vertical", etc.), reference is made to the orientation of the drawings, unless otherwise specified.

[0032] Unless otherwise indicated, the expressions "about", "substantially", "substantially" and "approximately" mean plus or minus 10%, preferably plus or minus 5%.

[0033] Figure 1 An example of an integrated circuit 100 to which the described embodiments apply is shown very schematically in block form. The circuit 100 is, for example, a microcontroller.

[0034] The circuit 100 includes a non-volatile memory 104 (FLASH memory), for example a flash memory type (e.g., an embedded memory of a microcontroller), which is capable of communicating with a non-volatile memory interface 106 (flash memory interface) via a communication bus 114, which is configured to write data to the non-volatile memory 104 or read data from the non-volatile memory 104.

[0035] The circuit 100 further comprises, for example, a processing unit 110 (CPU), which comprises one or more processors, which are controlled by instructions stored in an instruction memory 112 (INSTR MEM). The instruction memory 112 is, for example, a volatile random access memory (RAM). The processing unit 110 and the memory 112 communicate, for example, via a system (data, address and control) bus 140. The flash memory 104 is coupled to the system bus 140 via a non-volatile memory interface 106 and via a bus 114. The device 100 further comprises an input / output interface 108 (I / O interface), which is coupled to the system bus 140 to communicate with the outside.

[0036] Device 100 may incorporate other circuits (e.g., one or more volatile and / or non-volatile memories, or other processing units) to implement other functions. Figure 1 Among these other circuits, the circuit 100 includes, for example, a read-only or static memory 118 (ROM).

[0037] The described method relates to securing programs or data loaded into the non-volatile memory 104 .

[0038] For this purpose, the boot program is transferred directly to the memory 104, for example during a programming process in the factory. However, the contents of the flash memory can in principle be modified. Now, it must be ensured that, for example in the case of loading multiple operating systems, they cannot be modified once they have been transferred to the flash memory 104, unless there is a regression of the system or circuit 100.

[0039] One example involves a bootloader and an OEM operating system or application that must be loaded during the manufacturing process of the circuit 100, for example, by a plurality of different successive subcontractors or users. For example, the circuit 100 is in a state called "open" when it leaves the factory, i.e., the memory is not write-protected. Then, the first subcontractor has the task of loading the bootloader (iROT for the immutable root of trust) into the memory 104, and then the circuit is in configuration mode. Once loaded and protected, the circuit 100 switches to the iROT configuration mode. At this stage, the iROT bootloader can be responsible for other installation steps, including, for example, code and encryption keys. Then, another subcontractor can load one or more programs, such as, for example, one or more operating systems and / or security applications and / or updates, which, once loaded, must be protected. At this stage, the product enters a closed mode. At this stage, different installers can be responsible for non-secure installations, including code and encryption keys. Non-secure applications can then be installed.

[0040] The boot programs are implemented at system initialization in the flash memory 104 so that they can be executed each time the system is started. However, once in the flash memory, access to the boot programs must be protected to prevent modification by other boot programs, any applications, or access from outside the circuit. To achieve this, write protection is provided for the area of ​​the memory 104 containing the boot program so that the area cannot be accessed unless the circuit is restarted. Write protection is also provided for certain areas of the memory 104 (including one or more sectors) that are linked to other programs or data.

[0041] Once write-protected, it is currently difficult to enable flexibility to be maintained with respect to possible subsequent modifications of the memory area to be protected while guaranteeing the immutability of the iROT boot program.

[0042] The described embodiment provides a method for securing a program in a memory, the method comprising writing an iROT boot program into a first area of ​​the memory; writing at least one additional program (uROT (updated root of trust), a secure operating system (OS), an application) into at least one second area of ​​the memory; write-protecting the first area and the second area by modifying one or more values ​​of a first register (WRPSG1 / 2); and prohibiting modification of the one or more values ​​of the first register WRPSG1 / 2 when the one or more values ​​of the first register WRPSG1 / 2 are associated with the write protection state of the first area.

[0043] Thus, for example, by means of a single register, a write-protected area can be flexibly and easily defined. Since it is forbidden to modify the write protection for the memory dedicated to the iROT boot program, the invariance of the iROT boot program is ensured. The write protection can be used during all product manufacturing stages (for example by different subcontractors) from the stage when the circuit is in the on state to the stage when the circuit is in the off state. Thus, multiple program layers can define their own memory areas to which their own programs will be write-protected.

[0044] Figure 2 Schematically shows Figure 1 More specifically, in Figure 2In the example of , the memory includes two memory groups (Group 1, Group 2). In this example, the group of memory sectors numbered 2, 3, 14, 16, 18, and 31 is write protected by using a first register WRPSG1 / 2, which uses a bitmap to associate a write protection state value (e.g., 0 for "unprotected" and 1 for "protected") with one or more regions of the memory. In the example shown, registers WRPSG1 / 2 take values ​​WRPSG1[2]=1, WRPSG1

[14] =1, WRPSG1

[16] =1, and WRPSG1

[31] =1 to write protect the group of sectors numbered 2, 14, 16, and 31 in the first group. The other sectors in the first group are in state 0 in the first group of registers, that is, for example, WRPSG1[X]=0, where X represents the number of the group of unprotected sectors in the first group. The same reasoning applies to the second group, where registers WRPSG1 / 2 take on values ​​WRPSG2[3]=1 and WRPSG2

[18] =1 to write-protect the group of sectors numbered 3 and 18 in the second group.

[0045] Therefore, each program loaded into the circuit when the circuit is in the "on" state and the "configuration" state and before the state is "off" can flexibly define the write-protected sectors or areas of memory 104 by modifying the 0 or 1 values ​​associated with these sectors in registers WRPSG1 / 2.

[0046] Figure 3 The steps of a method for securing a program memory according to an embodiment are schematically shown.

[0047] In step 302 (start programming memory), the program securing method begins.

[0048] In step 304 (write root program (iROT)), the iROT boot program is loaded into the first area or multiple first areas of the memory 104. In one example, the first area of ​​the memory 104 is defined by two user option bytes (HDP_START, HDP_END). These two user option bytes are, for example, non-volatile.

[0049] In step 306 (write protection for the root program) after step 304, the first area corresponding to the iROT boot program is write-protected by modifying the write protection state of the WRPSG1 / 2 register corresponding to the first area (from 0 to 1).

[0050] In step 308 (write other programs (uROT, secure OS, applications)), other programs (such as other boot programs (uROT), one or more operating systems (secure OS) or one or more applications) are loaded into at least one second area of ​​the memory 104.

[0051] In step 310 (write protection for other programs (uROT, secure OS, application)), the second area is write-protected by changing the write protection state of the register WRPSG1 / 2 corresponding to the second area (from 0 to 1).

[0052] In step 312 (locking write protection for the root program), modification of the value of the register WRPSG1 / 2 associated with the write protection state of the first area is prohibited. This prohibition includes, for example, modification of the value of the second register (WRPLOCK). In one example, the value of the second register is switched to 1 to enable prohibition of modification of the value of the first register associated with the first area. In other words, when the value of the second register WRPLOCK is switched to 1, modification of the value of the register WRPSG1 / 2 associated with the first area is prohibited. For example, only the return state of the circuit enables modification of the second register.

[0053] In one example, the value of the second register WRPLOCK can only be modified by a secure and privileged program (SW) with limited access.

[0054] In another example, the value of the second register WRPLOCK is a non-volatile resource, which is defined by a user option byte, for example. This allows the register WRPLOCK to be available immediately after the processing unit 110 is turned on.

[0055] For example, when the circuit is in the "on" state or until the configuration state, the second register WRPLOCK may be modified.

[0056] In one example (illustrated by dashed arrows), steps 306, 312, 308, and 310 are performed sequentially.

[0057] In another example (illustrated by solid arrows), steps 306, 308, 310, and 312 are performed sequentially.

[0058] Figure 4 The method of securing the memory of the program is illustrated. More specifically, Figure 4 The memory 104 is depicted in different on states, configuration states, and off states (device states) corresponding to, for example, manufacturing stages of the circuit being manufactured by different subcontractors.

[0059] In the illustrated example, the circuit is first in the "on" state. In this state, the iROT boot program is loaded into, for example, a first memory area and is write-protected (write-protected area 1). For example, the monotonic counter HDPL1 is used to define the protection area of ​​the iROT program using the user option bytes OB-HDP. Then, the second boot program (uROT) is loaded into another area of ​​the memory without write protection. The operating system and / or other applications (secure OS and applications) are also loaded into another area of ​​the memory 104, and then only certain sectors of the memory that are linked to these programs are write-protected (write-protected area 2). Applications with lower security (NS Appli) are also loaded into another area of ​​the memory 104, and then only certain sectors of the memory that are linked to these applications are write-protected (write-protected area 3). In this state, the value of register WRPLOCK is 0, which means that modification of the write protection value of registers WRPSG1 / 2 associated with the memory area into which the iROT program is loaded is not prohibited.

[0060] Then, the circuit is in the configuration state. In this state, the value of the register WRPLOCK is 1, which means that the change of the write protection value of the register WRPSG1 / 2 associated with the memory area into which the iROT program is loaded is prohibited (write protection area 1 locked). However, the write protection value of the register WRPSG1 / 2 associated with other areas in the memory 104 that are different from the memory area into which the iROT program is loaded can still be changed. In the example shown, the (multiple) write protection values ​​of the register WRPSG1 / 2 associated with the operating system and / or other applications (secure OS and applications) are modified (write protection area 2') to increase the number of write-protected sectors.

[0061] The circuit is then set to the "off" state. The write protection value(s) of registers WRPSG1 / 2 associated with the less secure application (NSAppli) are modified to increase and change the number of write protected sectors (write protection area 3').

[0062] Figure 5 Another implementation mode of the in-memory security method is illustrated.

[0063] Specifically, Figure 5 The memory 104 is depicted in different states (device states) of the circuit (configuration, iROT configuration, and TZ off).

[0064] In the illustrated example, the circuit is first in the "Configuration" state. In this state, the iROT boot program is loaded into, for example, the first memory area and is write-protected (write-protected area 1). The value of the register WRPLOCK is set to 1 after write protection (write-protected area 1 locked).

[0065] In the illustrated example, the circuit is then in the "iROT configuration" state. In this state, the second boot program (uROT) is then loaded into another area of ​​the memory without being specifically write-protected. The operating system and / or other applications (secure OS and applications) are also loaded into another area of ​​the memory 104. Then, certain sectors of the memory that are only linked to this operating system and / or other applications are write-protected (write-protected area 2) by modifying the value of the register WRPSG1 / 2. The value of the register WRPLOCK remains locked at 1. In the illustrated example, the circuit is then in the off state (TZ off). Applications with lower security (NS Appli) are loaded into another area of ​​the memory 104, and then certain sectors of the memory that are only linked to these applications are write-protected (write-protected area 3). The value of the register WRPLOCK remains locked at 1.

[0066] Figure 4 and Figure 5 The example enables the flexibility of modifying the write-protected memory region to be maintained while ensuring that once the value of the register WRPLOCK has been switched to 1, changes to the write protection value associated with the iROT bootloader memory region are prohibited.

[0067] Various embodiments and variants have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variants may be combined, and that those skilled in the art will recognize other variants. Specifically, although in the disclosed examples, modifying register WRPLOCK to state 1 activates modification inhibition, those skilled in the art will be able to implement the opposite operation, i.e., a value of WRPLOCK of 0 triggers modification inhibition. In addition, for example, register WRPLOCK may be used to inhibit modification of only the portion of a sector associated with the iROT procedure WRPSG1 / 2.

[0068] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variants is within the capabilities of a person skilled in the art. Specifically, in the example shown, only one register WRPLOCK is used to prohibit the modification of values ​​corresponding to sectors of a single iROT boot program. However, a person skilled in the art can implement multiple additional registers with functions similar to those of the register WRPLOCK. These additional registers can be used like the register WRPLOCK to prohibit the modification of certain values ​​of the registers WRPSG1 / 2, which are associated with areas in the memory 104 corresponding to other programs, applications or data other than the iROT boot program and must be irreversibly write-protected.

Claims

1. A method for securing a program in a memory of a microcontroller, comprising: Writing a boot program into the first area of ​​the memory; writing at least one additional program into at least one second area of ​​the memory; modifying one or more values ​​of a first register to provide write protection for the first area and the second area; as well as When the one or more values ​​of the first register are associated with a write protection state of the first region, modification of the one or more values ​​of the first register is prohibited. 2 . The method of claim 1 , wherein the first register associates a write protection status value with one or more regions of the memory.

3. The method of claim 1 , wherein prohibiting modification comprises: A modification of the value of the second register. 4 . The method of claim 3 , wherein modification of the value of the second register is authorized based on a state of the microcontroller including the memory. 5 . The method of claim 4 , wherein the state of the microcontroller including the memory is a state selected from a home state, a write-enabled state, and a configuration state.

6. The method of claim 3, wherein modification of the value of the second register is authorized through the use of a specific security code.

7. The method of claim 6, wherein the second register is configured to take two different values, each value being encoded on a number of bits greater than or equal to 8, each bit of one of the two different values ​​being different from a corresponding bit of the other value. The method of claim 7 , wherein the second register is non-volatile.

9. The method of claim 8, wherein the first register is non-volatile.

10. The method of claim 1, wherein inhibiting modification of the one or more values ​​of the first register is implemented after writing the at least one additional program into the at least one second area of ​​the memory.

11. The method of claim 1, wherein inhibiting modification of the one or more values ​​of the first register is implemented before writing the at least one additional program to the at least one second area of ​​the memory.

12. The method of claim 1, wherein the first region of the memory is defined by two user option bytes.

13. The method according to claim 1, wherein the write protection of the boot program is implemented before writing of the at least one additional program.

14. A microcontroller comprising a memory and configured to implement the program securing method according to claim 1 in the memory.

15. The microcontroller of claim 14, wherein the memory is non-volatile.

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