SRAM total dose effect modeling simulation method based on FDSOI device

Abstract

The invention discloses an SRAM total dose effect modeling simulation method based on an FDSOI device, and relates to the technical field of integrated circuits. According to the SRAM total dose effect modeling simulation method based on the FDSOI device, the state of the FDSOI device after total dose irradiation simulation is stored so as to be used for total dose effect simulation of an SRAM circuit; according to the method, the influence of the total dose effect on electrical parameters such as threshold voltage, mutual coupling capacitance and parasitic resistance of devices in a circuit can be comprehensively considered, so that more accurate result analysis is carried out on parameters such as noise margin of the SRAM under the irradiation condition, and the method can overcome the limitation of existing circuit-level simulation. The simulation directly carried out in TCAD can avoid errors caused by an existing circuit-level simulation device model, so that the simulation result is more accurate.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a total dose effect modeling and simulation method of an SRAM (Static Random-Access Memory) based on a FDSOI (fully depleted silicon on insulator) device. Background Art

[0002] In recent years, my country's integrated circuit market has developed rapidly, and the demand for independent chip technology has become increasingly strong. FDSOI devices have attracted much attention for their advantages such as high speed, low power consumption, high integration density and good subthreshold characteristics, and are expected to receive more and more attention in the near future. In terms of aerospace radiation-resistant integrated circuits, the FDSOI structure has become a new driving force for the industry in the aerospace field because of its natural resistance to single-particle effects. The emergence of FDSOI technology has alleviated some problems. The device has a natural resistance to single-particle effects and transient dose rate radiation, and has a wide range of applications and prospects in the field of aerospace technology and national military. However, the presence of the BOX layer makes the device very sensitive to total dose radiation. Therefore, studying the total dose effect mechanism of FDSOI devices and SRAM is of far-reaching significance and can provide theoretical support for improving the circuit's ability to resist total dose radiation.

[0003] The existing circuit-level total dose effect is generally completed using HSPICE tools or Candence tools. After extracting the device model parameters and electrical characteristic parameters of TCAD simulation, the threshold voltage of the device model is modified to simulate the impact of the total dose effect on the circuit under different irradiation doses. This method is simple to operate and fast to calculate, but it only focuses on the impact of the total dose effect on the threshold voltage, a single electrical parameter, and the accuracy of its simulation method needs to be improved. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a SRAM total dose effect modeling and simulation method based on FDSOI devices. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0005] The present invention provides a SRAM total dose effect modeling and simulation method based on FDSOI devices, comprising:

[0006] Step 1: Structural modeling is performed on the FDSOI NMOS device and the FDSOIPMOS device respectively to obtain corresponding device structural models;

[0007] Step 2: adding a Radiation model and a first Traps model to the device structure model, performing a total dose irradiation simulation after setting model parameters, obtaining total dose irradiation simulation results corresponding to the FDSOI NMOS device and the FDSOI NMOS device, and saving the total dose irradiation simulation results;

[0008] Step 3: constructing an SRAM circuit model based on the FDSOI NMOS device and the FDSOIPMOS device, performing circuit simulation on the SRAM circuit model based on the total dose irradiation simulation results of the FDSOI NMOS device and the FDSOI NMOS device, and obtaining a voltage curve of a storage node of the SRAM circuit model after total dose irradiation;

[0009] Step 4: Determine the influence of the total dose irradiation effect on the SRAM circuit model according to the voltage curve of the storage node of the SRAM circuit model after the total dose irradiation.

[0010] Compared with the prior art, the present invention has the following beneficial effects:

[0011] The SRAM total dose effect modeling and simulation method based on FDSOI devices of the present invention saves the FDSOI device state after total dose irradiation simulation for total dose effect simulation of SRAM circuit, and can comprehensively consider the influence of total dose effect on the threshold voltage, mutual coupling capacitance, parasitic resistance and other electrical parameters of the device in the circuit, so as to perform more accurate result analysis on parameters such as noise margin of SRAM under irradiation conditions, and this method can overcome the limitations of existing circuit-level simulation. Simulation directly performed in TCAD can avoid the error caused by the device model of existing circuit-level simulation, so that the simulation result is more accurate.

[0012] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following specifically cites a preferred embodiment and describes it in detail with the accompanying drawings as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a flow chart of a method for modeling and simulating the total dose effect of an SRAM based on an FDSOI device provided in an embodiment of the present invention;

[0014] Figure 2 is a three-dimensional structural diagram of a 22nm FDSOI NMOS device provided by an embodiment of the present invention;

[0015] Figure 3is a two-dimensional cross-sectional view of a 22nm FDSOI NMOS device provided by an embodiment of the present invention;

[0016] Figure 4 is an Id-Vg electrical characteristic curve after total dose irradiation simulation of an FDSOI NMOS device provided by an embodiment of the present invention;

[0017] Figure 5 It is an Id-Vg electrical characteristic curve after total dose irradiation simulation of a FDSOIPMOS device provided by an embodiment of the present invention;

[0018] Figure 6 A physical structure characteristic diagram related to the radiation charge generation rate of the buried oxide layer after the total dose radiation simulation of the FDSOI NMOS device provided by an embodiment of the present invention;

[0019] Figure 7 It is a physical structure characteristic diagram related to the radiation charge generation rate of the buried oxide layer after the total dose radiation simulation of the FDSOIPMOS device provided by the embodiment of the present invention;

[0020] Figure 8 is a 6T-SRAM circuit diagram of a circuit simulation provided by an embodiment of the present invention;

[0021] Fig. 9 is a timing diagram of the working state of a 6T-SRAM circuit provided by an embodiment of the present invention;

[0022] Fig.10 It is the Q-node voltage change of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention under the total dose effect;

[0023] Fig.11 It is the voltage change of the QN node of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention under the total dose effect;

[0024] Fig.12 The voltage transfer characteristic curve of the left and right cross-coupled inverters of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention during the irradiation process.

[0025] Fig.13 It is a simulation result of the static noise margin (HSNM) of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention before and after irradiation with a total dose of 1 Mrad;

[0026] Fig.14 This is a graph showing the results of maintaining static noise margin (HSNM) of a 6T-SRAM circuit of an FDSOI device provided in an embodiment of the present invention under different irradiation doses. DETAILED DESCRIPTION

[0027] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined purpose of the invention, a SRAM total dose effect modeling and simulation method based on FDSOI devices proposed in accordance with the present invention is described in detail below in combination with the accompanying drawings and specific implementation methods.

[0028] The above and other technical contents, features and effects of the present invention are clearly presented in the following detailed description of the specific implementation modes in conjunction with the accompanying drawings. Through the description of the specific implementation modes, the technical means and effects adopted by the present invention to achieve the predetermined purpose can be more deeply and specifically understood. However, the attached drawings are only for reference and explanation purposes and are not used to limit the technical solutions of the present invention.

[0029] The embodiment of the present invention provides a method for modeling and simulating the total dose effect of SRAM based on FDSOI devices. The simulation method is implemented based on Sentaurus TCAD simulation software. Figure 1 , Figure 1 FIG. 1 is a flow chart of a method for modeling and simulating the total dose effect of an SRAM based on an FDSOI device provided by an embodiment of the present invention. Figure 1 As shown, the SRAM total dose effect modeling and simulation method based on FDSOI device of this embodiment includes:

[0030] Step 1: Structural modeling is performed on the FDSOI NMOS device and the FDSOIPMOS device respectively to obtain corresponding device structural models.

[0031] In an optional embodiment, step 1 includes:

[0032] According to the device structure parameters of FDSOI NMOS device and FDSOI PMOS device, the device structure models of FDSOI NMOS device and FDSOI PMOS device are established by using the sde tool of Sentaurus TCAD simulation software.

[0033] Optionally, the device structure parameters include: device geometry, size, doping concentration and grid density.

[0034] For example, the device structure model of a 22nm FDSOI NMOS device is established using the SDE tool of the TCAD simulation software. Figure 2 and 3 As shown, Figure 2 is a three-dimensional structural diagram of a 22nm FDSOI NMOS device provided by an embodiment of the present invention; Figure 3 2 is a two-dimensional cross-sectional view of a 22nm FDSOI NMOS device provided by an embodiment of the present invention. Figure 2 It can be seen that the device structure model of the FDSOI NMOS device includes, from bottom to top, substrate, back gate doping layer, buried oxide layer (buried layer BOX), source terminal, drain terminal and channel region, wherein the source terminal, drain terminal and channel region are located above the buried oxide layer, and there is also a gate oxide layer above the channel region, with sidewalls on both sides of the gate oxide layer. Figure 2 The numbers and color areas in the substrate indicate the doping concentrations corresponding to the colors of the corresponding layers in the device.

[0035] In this embodiment, the device structural parameters of the 22nm FDSOI NMOS device modeled by using Sentaurus software are shown in Table 1.

[0036] Table 1

[0037] Device structure parameters Numeric Channel length 22nm Channel thickness 6nm Channel width 92nm Gate oxide thickness 5nm Drain / source length 28nm Silicon film thickness 6nm Buried oxide layer thickness 20nm Substrate thickness 130nm Side wall height 30nm Side wall thickness 15nm Gate metal work function 4.5eV

[0038] Step 2: Add the Radiation model and the first Traps model to the device structure model, set the model parameters, perform total dose irradiation simulation, obtain the total dose irradiation simulation results corresponding to the FDSOI NMOS device and the FDSOI NMOS device, and save the total dose irradiation simulation results.

[0039] In an optional embodiment, the model parameters include: the irradiation dose rate and irradiation time of the Radiation model and the hole energy level position and hole concentration of the first Traps model.

[0040] In this embodiment, during the total dose irradiation simulation, the bias states of the FDSOI NMOS device and the FDSOI NMOS device are set to an ON state.

[0041] In this embodiment, the specific process of step 2 is as follows: first, activate the Radiation model in the Physics model definition of the device. Optionally, the Radiation model parameters are defined as follows: the dose rate is set to 200rad / s, the irradiation time is set to 1000s, 2000s, 3000s, 4000s and 5000s, and the corresponding total dose irradiation is 200Krad, 400Krad, 600Krad, 800Krad and 1Mrad respectively. Set the first Traps model, the hole energy level position, and the hole concentration are set to 5e18. It can be understood that these model parameters can be set according to the needs of the actual device. During the total dose irradiation simulation process, the bias state of the device is set to the ON state, and then the total dose irradiation simulation is performed to obtain the total dose irradiation simulation results corresponding to the FDSOI NMOS device and the FDSOI NMOS device, and the total dose irradiation simulation results include the device electrical characteristics after total dose irradiation and the device physical structure characteristics.

[0042] The device electrical characteristics are the Id-Vg electrical characteristics curves, see Figure 4 and Figure 5 , Figure 4 is an Id-Vg electrical characteristic curve after total dose irradiation simulation of an FDSOI NMOS device provided by an embodiment of the present invention; Figure 5 It is the Id-Vg electrical characteristic curve after the total dose irradiation simulation of the FDSOIPMOS device provided by the embodiment of the present invention. The physical structure characteristics of the device include the irradiation charge generation rate of the buried oxide layer, see Figure 6 and Figure 7 , Figure 6 A physical structure characteristic diagram related to the radiation charge generation rate of the buried oxide layer after the total dose radiation simulation of the FDSOI NMOS device provided by an embodiment of the present invention; Figure 7 It is a physical structure characteristic diagram related to the radiation charge generation rate of the buried oxide layer after the total dose radiation simulation of the FDSOIPMOS device provided by an embodiment of the present invention.

[0043] In this embodiment, in the Solve part of the total dose irradiation simulation, the device electrical characteristic files and physical structure characteristic files of the FDSOI NMOS device and the FDSOI NMOS device after total dose irradiation are saved using Plot and Save statements to obtain a physical structure characteristic file with a suffix of .tdr and an electrical characteristic file with a suffix of .sav. The above files are subsequently imported into the SRAM circuit model for circuit simulation to realize the total dose effect simulation of the SRAM circuit model.

[0044] Step 3: Construct an SRAM circuit model based on FDSOI NMOS devices and FDSOIPMOS devices, perform circuit simulation on the SRAM circuit model based on the total dose irradiation simulation results of FDSOINMOS devices and FDSOI NMOS devices, and obtain a voltage curve of the storage node of the SRAM circuit model after total dose irradiation.

[0045] Optionally, the SRAM circuit model may be a 6T-SRAM circuit, an 8T-SRAM circuit, a 10T-SRAM circuit, or a DICE-SRAM circuit. Among them, the 6T-SRAM circuit is the most basic SRAM circuit model, and other SRAM circuits are based on the 6T-SRAM circuit and are deformed to reinforce the 6T-SRAM and increase stability.

[0046] In an optional embodiment, step 3 includes:

[0047] Step 3.1: Import the FDSOI NMOS device and the total dose irradiation simulation results corresponding to the FDSOI NMOS device in the Device section of Sdevice, and set the second Traps model and corresponding model parameters in the Physics section.

[0048] In this embodiment, the physical structure characteristic file with the suffix .tdr and the electrical characteristic file with the suffix .sav are imported into the device part for the total dose effect simulation of the SRAM circuit model. Specifically, the following statement is used in the File setting of the Device part to import:

[0049] Grid = "file name.tdr"

[0050] Load = "file name.sav"

[0051] Doping = "file name.tdr"

[0052] It should be noted that the file name for file import must be the same as the file name of the .trd file and .sav file saved by the Save and Plot statements at the end of Solve in the total dose irradiation simulation of the FDSOI NMOS device and the FDSOI NMOS device, otherwise the import will fail if it cannot be recognized. Similarly, for the second Traps model, the parameters of the second Traps model defined in the Device section must be exactly the same as the model parameters of the first Traps model, otherwise the import of the Traps model will fail.

[0053] Step 3.2: Build the SRAM circuit model in the System section of Sdevice and set the operating voltage of the SRAM circuit model.

[0054] In this embodiment, the SRAM circuit model is a 6T-SRAM circuit. Specifically, four FDSOI NMOS and two FDSOIPMOS are connected in the System part of Sdevice, and each electrode in the device is set as a circuit node, and these circuit nodes are connected to form an actual 6T-SRAM circuit.

[0055] See also Figure 8 , Figure 8 6T-SRAM circuit diagram of the circuit simulation provided by the embodiment of the present invention, such as Figure 8As shown, the 6T-SRAM circuit is composed of six transistors M1-M6, transistor M2 and transistor M4 are FDSOIPMOS, and the remaining transistors M1, M3, M5 and M6 are FDSOI NMOS. Among them, the gate of transistor M1 is respectively connected to the gate of transistor M2, the drain of transistor M3, the drain of transistor M4 and the drain of transistor M6; the source of transistor M1 and the source of transistor M3 are both connected to the ground terminal Gnd; the drain of transistor M1 is respectively connected to the drain of transistor M2, the gate of transistor M3, the gate of transistor M4 and the drain of transistor M5; the source of transistor M2 and the source of transistor M4 are both connected to the power supply voltage terminal Vdd; the gates of transistor M5 and transistor M6 are both connected to the word line WL; the source of transistor M5 is connected to the bit line BL; the source of transistor M6 is connected to the bit line BLN.

[0056] In this embodiment, the voltages of the storage nodes of the 6T-SRAM circuit, i.e., the Q node and the QN node, are determined by the word line WL and the bit lines BL and BLN. When the word line WL is at a high level, the transistors M5 and M6 are turned on, so that the potentials of the Q node and the QN node change. The transistors M1 and M2 form an inverter, and the transistors M3 and M4 form another inverter. The two inverters are connected end to end to ensure that the potentials of the Q node and the QN node are always opposite. When the Q node is at a high level, the QN node is bound to be at a low level, and vice versa.

[0057] It should be noted that when actually building a 6T-SRAM circuit, the different width-to-length ratios of the NMOS pull-down tube, the PMOS pull-up tube, and the transmission tube must also be taken into account. Therefore, when constructing the SRAM circuit model, the width-to-length ratios of different MOS tubes in the SRAM circuit model are adjusted by setting the area factor.

[0058] In this embodiment, in the simulation input file, the setting command is as follows:

[0059] PMOS pmos1(source=DD drain=CH gate=CL substrate=0){physics{areafactor=1.0}}

[0060] NMOS nmos1(source=0drain=CH gate=CL substrate=0){physics{areafactor=3.0}}

[0061] PMOS pmos2(source=DD drain=CL gate=CH substrate=0){physics{areafactor=1.0}}

[0062] NMOS nmos2(source=0drain=CL gate=CH substrate=0){physics{areafactor=3.0}}

[0063] NMOS nmos3(source=BL drain=CH gate=WL substrate=0){physics{areafactor=2.0}}

[0064] NMOS nmos4(source=BLN drain=CL gate=WL substrate=0){physics{areafactor=2.0}}

[0065] Step 3.3: Set the control voltages of the word lines and bit lines of the SRAM circuit model, perform circuit simulation, and obtain the voltage curve of the storage node of the SRAM circuit model after total dose irradiation.

[0066] In this embodiment, the low level and high level duration of the word line and the bit line are set to 0.5μs, the pulse period is 1μs, the high and low level settings of the word line WL can control the conduction and shutdown of the transmission tube, and the simulation time is set to 2μs. Fig. 9 , Fig. 9 1 is a timing diagram of the working state of the 6T-SRAM circuit provided by an embodiment of the present invention. From the diagram, it can be observed how the voltages of the Q node and the QN node change with time.

[0067] In this embodiment, after the device parameter file is imported and the 6T-SRAM circuit is built, other simulation parameter settings do not need to be changed, and the circuit simulation is directly performed. Then, Svisual is used to extract the voltage curve of the storage node of the 6T-SRAM circuit after total dose irradiation.

[0068] Step 4: According to the voltage curve of the storage node of the SRAM circuit model after the total dose irradiation, determine the influence of the total dose irradiation effect on the SRAM circuit model.

[0069] In an optional embodiment, step 4 includes:

[0070] Step 4.1: Compare the voltage curve of the storage node of the SRAM circuit model after total dose irradiation with the voltage curve of the storage node of the SRAM circuit model without total dose irradiation.

[0071] In this embodiment, Svisual can be used to extract the voltage curves of the storage nodes of the 6T-SRAM circuit after and without total dose irradiation. Fig.10and Fig.11 , Fig.10 It is the Q-node voltage change of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention under the total dose effect; Fig.11 The diagram shows the voltage variation of the QN node of the 6T-SRAM circuit of the FDSOI device provided in the embodiment of the present invention under the total dose effect.

[0072] like Fig.10 As shown in the figure, the initial voltage of the Q node is set to 1V, indicating a high potential state. Within the 400Krad irradiation dose, the node voltage curve does not fluctuate. As the irradiation dose gradually increases to 600Krad, the high potential voltage amplitude corresponding to the output logic "1" drops to 0.6V, and even flips from 1V to 0V before 0.5μs; the low potential voltage amplitude corresponding to the logic "0" increases to 0.1V within 1.0μs to 1.5μs. Fig.11 As shown in the figure, the initial voltage of the QN node is set to 0V, indicating a low potential state. The node voltage does not change within the 400Krad irradiation dose. As the irradiation dose gradually increases to 600Krad, the change in the node voltage is not only reflected in the high potential voltage value corresponding to logic "1" being reduced to 0.6V and the fluctuation of the low potential voltage value, but also the high potential pulse width is narrowed with the increase of irradiation dose. When the QN node changes from logic "1" to logic "0", the time when the output logic value flips will be advanced from 1.5μs to 1.0μs.

[0073] Step 4.2: According to the voltage curve of the storage node of the SRAM circuit model after total dose irradiation, determine the voltage transfer characteristic curves of the left and right cross-coupled inverters in the SRAM circuit model under different irradiation doses.

[0074] In this embodiment, in order to measure the voltage transfer characteristic curve (VTC) of the left inverter and the right inverter of the 6T-SRAM, it is also necessary to add probes PL and PR to the 6T-SRAM circuit. By inserting a high resistor (1×10 12 Ω) resistor, set the resistor value in the Solve section to activate or deactivate the probe as required. Fig.12 , Fig.12 The voltage transfer characteristic curve of the left and right cross-coupled inverters of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention during the irradiation process.

[0075] Step 4.3: Determine the static noise margin of the SRAM circuit model under different irradiation doses based on the voltage transfer characteristic curve of the inverter.

[0076] In this embodiment, the static noise margin (SNM) of the SRAM cell can be measured by the VTC curve. Taking the SRAM retention state as an example, see Fig.13 , Fig.13 The simulation results of the static noise margin (HSNM) of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention before and after 1Mrad total dose irradiation include high level noise margin (HSNMH) and low level noise margin (HSNML), and the noise margin is the minimum value of the two. According to this method, the static noise margin of the 6T-SRAM under different irradiation doses can be measured in turn, such as Fig.14 The result diagram of the static noise margin (HSNM) of the 6T-SRAM circuit of the FDSOI device provided by the embodiment of the present invention under different irradiation doses is shown. From the figure, it can be seen that the HSNM of the 6T-SRAM circuit gradually decreases during the irradiation process, and it can be calculated that the stability of the storage unit retention state is reduced by 21%.

[0077] In this embodiment, the SRAM total dose effect modeling and simulation method based on FDSOI devices can be applied to metal oxide semiconductor field effect transistors and is suitable for a variety of SRAM circuit structures. According to the changes in the node voltage in the circuit and the changes in the SNM of the SRAM, it is determined whether the circuit fails after irradiation, thereby effectively evaluating the irradiation reliability of the SRAM circuit.

[0078] The SRAM total dose effect modeling and simulation method based on FDSOI devices in the embodiment of the present invention saves the FDSOI device state after total dose irradiation simulation for total dose effect simulation of SRAM circuit, and can comprehensively consider the influence of total dose effect on the threshold voltage, mutual coupling capacitance, parasitic resistance and other electrical parameters of the device in the circuit, so as to perform more accurate result analysis on parameters such as noise margin of SRAM under irradiation conditions, and this method can overcome the limitations of existing circuit-level simulation. Simulation directly performed in TCAD can avoid the error caused by the device model of existing circuit-level simulation, making the simulation result more accurate.

[0079] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "include", "comprise" or any other variant is intended to cover non-exclusive inclusion, so that the article or device including a series of elements includes not only those elements, but also other elements that are not explicitly listed. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the article or device including the elements. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The orientation or position relationship indicated by "up", "down", "left", "right", etc. is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

[0080] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A SRAM total dose effect modeling and simulation method based on FDSOI devices, characterized in that: include: Step 1: Structural modeling is performed on the FDSOINMOS device and the FDSOIPMOS device respectively to obtain corresponding device structural models; Step 2: adding a Radiation model and a first Traps model to the device structure model, performing a total dose irradiation simulation after setting model parameters, obtaining total dose irradiation simulation results corresponding to the FDSOI NMOS device and the FDSOI NMOS device, and saving the total dose irradiation simulation results; Step 3: constructing an SRAM circuit model based on the FDSOINMOS device and the FDSOIPMOS device, performing circuit simulation on the SRAM circuit model based on the total dose irradiation simulation results of the FDSOI NMOS device and the FDSOI NMOS device, and obtaining a voltage curve of a storage node of the SRAM circuit model after total dose irradiation; Step 4: Determine the influence of the total dose irradiation effect on the SRAM circuit model according to the voltage curve of the storage node of the SRAM circuit model after the total dose irradiation.

2. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: The step 1 comprises: According to the device structural parameters of the FDSOI NMOS device and the FDSOIPMOS device, the device structural models of the FDSOI NMOS device and the FDSOIPMOS device are established using the sde tool of the Sentaurus TCAD simulation software; the device structural parameters include: device geometry, size, doping concentration and grid density.

3. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: The model parameters include: the irradiation dose rate and irradiation time of the Radiation model and the hole energy level position and hole concentration of the first Traps model.

4. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: During the total dose irradiation simulation, the bias states of the FDSOI NMOS device and the FDSOINMOS device are set to an ON state.

5. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: The total dose irradiation simulation result includes the device electrical characteristics and device physical structure characteristics after total dose irradiation; the device physical structure characteristics include the irradiation charge generation rate of the buried oxide layer.

6. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: The SRAM circuit model includes a 6T-SRAM circuit, an 8T-SRAM circuit, a 10T-SRAM circuit or a DICE-SRAM circuit.

7. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: The step 3 comprises: Step 3.1: Import the FDSOI NMOS device and the total dose irradiation simulation result corresponding to the FDSOI NMOS device in the Device section of Sdevice, and set the second Traps model and corresponding model parameters in the Physics section; Step 3.2: construct the SRAM circuit model in the System part of Sdevice, and set the operating voltage of the SRAM circuit model; Step 3.3: Setting control voltages of the word lines and bit lines of the SRAM circuit model, performing circuit simulation, and obtaining a voltage curve of a storage node of the SRAM circuit model after the total dose irradiation.

8. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 7, characterized in that: The model parameters of the second Traps model are consistent with the model parameters of the first Traps model.

9. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 7, characterized in that: In the step 3.2, when constructing the SRAM circuit model, the width-to-length ratios of different MOS tubes in the SRAM circuit model are adjusted by setting an area factor.

10. The SRAM total dose effect modeling and simulation method based on FDSOI device according to claim 1, characterized in that: The step 4 comprises: Step 4.1: comparing a voltage curve of a storage node of the SRAM circuit model after the total dose irradiation with a voltage curve of a storage node of the SRAM circuit model without the total dose irradiation; Step 4.2: Determine voltage transfer characteristic curves of left and right cross-coupled inverters in the SRAM circuit model under different irradiation doses according to the voltage curve of the storage node of the SRAM circuit model after the total dose irradiation; Step 4.3: Determine the static noise margin of the SRAM circuit model under different irradiation doses according to the voltage transfer characteristic curve of the inverter.

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