Resonator filter structure, preparation method and resonator filter

By integrating the resonator area and the capacitor area on the substrate, the shared structure of the capacitor and the resonator is realized, which solves the problem of the large area occupied by the capacitor and the resonator in the existing technology, and achieves higher integration and lower cost. .

CN119341514APending Publication Date: 2025-01-21ROFS MICROSYST TIANJIN CO LTD
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Patent Information

Application Number
CN202411423003.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-12
Publication Date
2025-01-21

AI Technical Summary

Technical Problem

In the prior art, the capacitance and resonator occupies a large area, resulting in an increase in the entire device or circuit area, which cannot meet the design needs with high area requirements.

Method used

By integrating the resonator region and the capacitor region on the substrate, the resonator circuit structure is connected or shared with the capacitor structure, thereby realizing the integration of the capacitor and reducing the occupied area.

Benefits of technology

It reduces the area occupied by the device, reduces the cost, improves the integration level, and meets the design needs with higher area requirements.

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Abstract

The invention relates to the technical field of circuits, in particular to a resonator filter structure, a preparation method and a resonator filter, the structure specifically comprises a substrate and a circuit structure integrated on one side of the substrate; the substrate comprises a resonator region and a capacitor region; the resonator area is provided with a resonator circuit structure, the capacitor area is provided with a capacitor structure, and at least part of the resonator circuit structure is connected or shared with at least part of the capacitor structure. Thus, the capacitor is integrated on the substrate such as the silicon wafer and coexists with the resonator, the occupied area can be reduced, meanwhile, the cost can be reduced, the area of a device comprising the structure is reduced, the integration degree is improved, and therefore the design with the higher area requirement is met.
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Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a resonator filter structure, a preparation method and a resonator filter. Background Art

[0002] In the prior art, circuits involving capacitors and resonators generally integrate the capacitors and resonators together through a substrate for use. However, under this solution, the capacitors and resonators occupy a large area, which further increases the area of ​​the entire device or circuit, and cannot meet design requirements with high area requirements. Summary of the invention

[0003] In view of this, an object of the present invention is to provide a resonator filter structure, a preparation method and a resonator filter to overcome the problem of large area of ​​current related devices.

[0004] To achieve the above objectives, the present invention adopts the following technical solutions:

[0005] In a first aspect, an embodiment of the present application provides a resonator filter structure, including a substrate and a circuit structure integrated on one side of the substrate;

[0006] The substrate includes a resonator region and a capacitor region;

[0007] The resonator region is provided with a resonator circuit structure, the capacitor region is provided with a capacitor structure, and at least a portion of the structure in the resonator circuit structure is connected or shared with at least a portion of the structure in the capacitor structure.

[0008] Further, in some embodiments of the present application, the resonator circuit structure includes an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer, and a resonator upper electrode layer sequentially distributed along a first direction, wherein the first direction is a direction perpendicular to the substrate surface and away from the substrate surface;

[0009] The capacitor structure includes two capacitor units, each of which includes a capacitor lower electrode layer, a capacitor dielectric layer and a capacitor upper electrode layer sequentially distributed along the first direction, and the capacitor units correspond to each other.

[0010] Furthermore, in some embodiments of the present application, the resonator region and the two capacitor units are arranged sequentially along a second direction, and the second direction is a direction parallel to the substrate.

[0011] Furthermore, in some embodiments of the present application, different capacitor units are connected to each other through capacitor upper electrode layers of each capacitor unit.

[0012] Furthermore, in some embodiments of the present application, the resonator structure is contacted and connected to the capacitor lower electrode layer of an adjacent capacitor unit through the resonator lower electrode layer, and the capacitor lower electrode layer contacted and connected to the resonator lower electrode layer is located on a side of the resonator lower electrode layer away from the substrate.

[0013] Furthermore, in some embodiments of the present application, the resonator lower electrode layer and the capacitor lower electrode layer are formed by being deposited through the same deposition process and then patterned.

[0014] Furthermore, in some embodiments of the present application, the resonator structure is connected to the capacitor lower electrode layer of an adjacent capacitor unit through the resonator upper electrode layer, and the capacitor lower electrode layer connected to the resonator upper electrode layer is located on a side of the resonator upper electrode layer away from the substrate.

[0015] Furthermore, in some embodiments of the present application, the resonator upper electrode layer and the capacitor lower electrode layer are formed by being deposited through the same deposition process and then patterned.

[0016] Furthermore, in some embodiments of the present application, the capacitor bottom electrode layers of different capacitor units are arranged at intervals.

[0017] Furthermore, in some embodiments of the present application, the capacitor upper electrode layers of different capacitor units are connected to each other.

[0018] Further, in some embodiments of the present application, the resonator circuit structure includes an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer, and a resonator upper electrode layer sequentially distributed along a first direction, and the first direction is a direction away from the surface of one side of the substrate;

[0019] The capacitor structure includes at least two capacitor units, each of the capacitor units includes a capacitor lower electrode layer, a capacitor dielectric layer and a capacitor upper electrode layer distributed in sequence along the first direction, and the capacitor units correspond to each other.

[0020] Furthermore, in some embodiments of the present application, the material of the substrate is single crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide or diamond.

[0021] Furthermore, in some embodiments of the present application, the acoustic mirror is a cavity or a Bragg reflection layer.

[0022] In a second aspect, an embodiment of the present application further provides a method for preparing a resonator filter structure, comprising:

[0023] Planning the resonator region and the capacitor region on one side of the substrate;

[0024] Through deposition process and graphic processing, a resonator circuit structure is formed in the resonator area, and a capacitor structure is formed in the capacitor area; wherein at least part of the structure in the resonator circuit structure is connected or shared with at least part of the structure in the capacitor structure.

[0025] Further, in some embodiments of the present application, the resonator circuit structure includes an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer, and a resonator upper electrode layer sequentially distributed along a first direction, wherein the first direction is a direction perpendicular to the substrate surface and away from the substrate surface;

[0026] The capacitor structure includes a capacitor lower electrode layer, a capacitor dielectric layer and a capacitor upper electrode layer which are sequentially distributed along the first direction, and the capacitor units correspond to each other in pairs.

[0027] Further, in some embodiments of the present application, the forming of the resonator circuit structure in the resonator region and the forming of the capacitor structure in the capacitor region by the deposition process and the patterning process includes:

[0028] By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding;

[0029] Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process;

[0030] Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate;

[0031] Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer by photolithography and etching to remove the resonator upper electrode layer including the resonator upper electrode layer located in the capacitor region;

[0032] Performing a patterning process on the piezoelectric layer to remove the piezoelectric layer including the piezoelectric layer located in the capacitor region;

[0033] Depositing a capacitor lower electrode layer by a liftoff process in a region where the resonator lower electrode is away from the substrate and the resonator piezoelectric layer is removed;

[0034] Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate;

[0035] Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process;

[0036] The sacrificial layer is released to form an acoustic mirror.

[0037] Further, in some embodiments of the present application, the forming of the resonator circuit structure in the resonator region and the forming of the capacitor structure in the capacitor region by the deposition process and the patterning process includes:

[0038] By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding;

[0039] Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process;

[0040] Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate;

[0041] Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer by photolithography and etching to remove the resonator upper electrode layer including the resonator upper electrode layer located in the capacitor region;

[0042] Performing a patterning process on the piezoelectric layer to remove the piezoelectric layer including the piezoelectric layer located in the capacitor region;

[0043] Using the resonator lower electrode with the piezoelectric layer of the resonator removed as a capacitor lower electrode layer;

[0044] Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate;

[0045] Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process;

[0046] The sacrificial layer is released to form an acoustic mirror.

[0047] Further, in some embodiments of the present application, the forming of the resonator circuit structure in the resonator region and the forming of the capacitor structure in the capacitor region by the deposition process and the patterning process includes:

[0048] By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding;

[0049] Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process to retain the resonator lower electrode layer including the resonator region;

[0050] Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate and on the same side of the substrate where the resonator lower electrode layer is not disposed;

[0051] Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer located in the capacitor region by photolithography and etching;

[0052] Depositing a capacitor bottom electrode layer on the side of the resonator top electrode away from the substrate by a liftoff process;

[0053] Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate;

[0054] Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process;

[0055] The sacrificial layer is released to form an acoustic mirror.

[0056] Further, in some embodiments of the present application, the forming of the resonator circuit structure in the resonator region and the forming of the capacitor structure in the capacitor region by the deposition process and the patterning process includes:

[0057] By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding;

[0058] Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process to retain the resonator lower electrode layer including the resonator region;

[0059] Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate and on the same side of the substrate where the resonator lower electrode layer is not disposed;

[0060] Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer located in the capacitor region by photolithography and etching;

[0061] Using part of the upper electrode of the resonator as the lower electrode layer of the capacitor;

[0062] Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate;

[0063] Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process;

[0064] The sacrificial layer is released to form an acoustic mirror.

[0065] In a third aspect, an embodiment of the present application provides a resonator filter, comprising the resonator filter structure as described above.

[0066] The present invention relates to the field of circuit technology, and specifically to a resonator filter structure, a preparation method and a resonator filter, wherein the structure specifically includes a substrate and a circuit structure integrated on one side of the substrate; the substrate includes a resonator region and a capacitor region; the resonator region is provided with a resonator circuit structure, the capacitor region is provided with a capacitor structure, and at least part of the structure in the resonator circuit structure is connected or shared with at least part of the structure in the capacitor structure. In this way, by integrating the capacitor into a substrate such as a silicon wafer and coexisting with the resonator, not only can the occupied area be reduced, but also the cost can be reduced, and the area of ​​the device including the structure can be reduced, and the integration can be improved, thereby meeting the design with higher area requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0068] Figure 1 is a cross-sectional schematic diagram of a resonator filter structure provided by an embodiment of the present invention;

[0069] Figure 2 is a cross-sectional schematic diagram of a resonator filter structure provided by another embodiment of the present invention;

[0070] Figure 3-12 It is a schematic flow chart of a method for preparing a resonator filter structure provided by an embodiment of the present invention;

[0071] Fig.13 is a cross-sectional schematic diagram of a resonator filter structure provided by yet another embodiment of the present invention;

[0072] Figure 14-22 is a schematic flow chart of a method for preparing a resonator filter structure provided by yet another embodiment of the present invention;

[0073] Fig.23 is a cross-sectional schematic diagram of a resonator filter structure provided by yet another embodiment of the present invention;

[0074] Figure 24-32 is a schematic flow chart of a method for preparing a resonator filter structure provided by yet another embodiment of the present invention;

[0075] Fig.33 is a cross-sectional schematic diagram of a resonator filter structure provided by yet another embodiment of the present invention;

[0076] Figure 34-41It is a schematic flow chart of a method for preparing a resonator filter structure provided in yet another embodiment of the present invention. DETAILED DESCRIPTION

[0077] To make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be described in detail below. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other implementation methods obtained by ordinary technicians in this field without creative work belong to the scope of protection of the present invention.

[0078] Figure 1 is a cross-sectional schematic diagram of a resonator filter structure provided by an embodiment of the present invention, such as Figure 1 As shown, the resonator filter structure includes a substrate and a circuit structure integrated on one side of the substrate. The substrate includes a resonator region and a capacitor region; the resonator region is provided with a resonator circuit structure, the capacitor region is provided with a capacitor structure, and at least part of the structure in the resonator circuit structure is connected or shared with at least part of the structure in the capacitor structure.

[0079] Specifically, in the present application, optional materials for the substrate are single crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide or diamond, etc.

[0080] The substrate can be divided into a resonator region and a capacitor region, which are used to set the resonator structure and the capacitor structure respectively (of course, in some embodiments, other regions other than the resonator region and the capacitor region are also included, such as the connection region between the two and other regions). It should be noted that in the present application, the resonator structure may not be completely located in the resonator region, but may also be located in other regions. The relationship between the capacitor structure and the capacitor region is similar. Figure 1 As shown. By integrating the capacitor onto a substrate such as a silicon wafer and coexisting with the resonator, not only can the occupied area be reduced, but also the cost can be reduced, and the area of ​​the device including the structure can be reduced, and the integration can be improved, thereby meeting the design with higher area requirements.

[0081] Furthermore, in some embodiments of the present application, the resonator circuit structure includes an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer, and a resonator upper electrode layer distributed in sequence along a first direction, and the first direction is a direction perpendicular to the substrate surface and away from the substrate surface; the capacitor structure includes two capacitor units, each capacitor unit includes a capacitor lower electrode layer, a capacitor dielectric layer, and a capacitor upper electrode layer distributed in sequence along the first direction, and the capacitor units correspond to each other.

[0082] Specifically, the material of the resonator lower electrode layer and the resonator lower electrode (electrode pin) of some structures in the resonator lower electrode layer can be selected from molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or the above metals or their alloys (in the present application, a layer is formed by deposition, and a part of the layer is used to realize the function in its name, such as the part of the resonator lower electrode layer located in the resonator area is called the resonator lower electrode, so the two materials are the same and the same applies below). The acoustic mirror can be a cavity, or a Bragg reflection layer and other equivalent forms can be used. The material of the piezoelectric layer film can be a single crystal piezoelectric material, such as: single crystal aluminum nitride, single crystal gallium nitride, single crystal lithium niobate, single crystal lead zirconate titanate (PZT), single crystal potassium niobate, single crystal quartz film, or single crystal lithium tantalate and other materials; it can also be a polycrystalline piezoelectric material (corresponding to a single crystal, a non-single crystal material), such as polycrystalline aluminum nitride, zinc oxide or PZT, etc.; it can also be a rare earth element doped material containing a certain atomic ratio of the above materials, For example, it can be doped aluminum nitride, which contains at least one rare earth element, such as scandium (Sc), yttrium (Y), magnesium (Mg), titanium (Ti), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb) or lutetium (Lu), etc. The material of the upper electrode (electrode pin) of the resonator can be the same as that of the lower electrode of the resonator, and the material can be selected from molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or a composite of the above metals or their alloys, etc., wherein the materials of the upper electrode and the lower electrode are generally the same, but can also be different. The material of the capacitor bottom electrode can be selected from molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or the above metals or their alloys. The material of the dielectric layer can be selected from SiO2, Si3N4 or SiON. The material of the capacitor top electrode can be selected from molybdenum, ruthenium, gold, aluminum, magnesium, tungsten, copper, titanium, iridium, osmium, chromium or the above metals or their alloys.

[0083] It should be noted that in the present application, a plurality of capacitor units may be provided in a resonator filter structure, that is, a plurality of capacitors appearing in pairs may be integrated, for example, two capacitors may be provided. In this case, the resonator region and the two capacitor units are sequentially arranged along the second direction, which is a direction parallel to the substrate.

[0084] The present application is described below with two capacitors, and the principles of other numbers of capacitors are the same and will not be repeated here.

[0085] Furthermore, in some embodiments of the present application, different capacitor units are connected to each other through the capacitor upper electrode layer of each capacitor unit (eg Figure 1 shown).

[0086] It should be noted that in the present application, the connection between the capacitors is connected using the upper electrode layer of the capacitor. In this way, the signal does not need to be led out through the upper electrode of the capacitor, which makes the process simpler and avoids the sidewall coverage problem caused by leading out the upper electrode of the capacitor, while also saving more area.

[0087] Of course, in other embodiments of the present application, it can also be as follows Figure 2 The structure of the capacitor upper electrode lead-out is shown. However, it can be seen that in order to lead out the signal from the capacitor upper electrode, the area will be increased. The increased area has been marked as area A and area B in the figure, where area A is used to isolate the capacitor upper electrode layer from the capacitor lower electrode, and also isolate the capacitor upper electrode layer from the resonator lower electrode layer, while area B is mainly used to isolate the capacitor upper electrode layer from the capacitor lower electrode layer. The specific length of this area depends on the thickness and material of the capacitor dielectric layer.

[0088] In practical applications, the capacitor bottom electrode layers of different capacitor units can be spaced apart (patterning is performed after depositing the corresponding layers), and the capacitor top electrode layers of different capacitor units can be connected to each other (formed at one time through the same deposition process).

[0089] Based on the above embodiments, the present application provides a variety of specific structures, which are described in detail below through a number of preparation method embodiments corresponding to different structures:

[0090] First of all Figure 1 The resonator filter structure and its preparation method are introduced as shown in FIG. Figure 3-12 shown.

[0091] This structure is specifically that the resonator structure is connected to the capacitor lower electrode layer of the adjacent capacitor unit through the resonator lower electrode layer, and the capacitor lower electrode layer that is connected to the resonator lower electrode layer is located on the side of the resonator lower electrode layer away from the substrate. The preparation process of this structure includes planning the substrate resonator area and capacitor area, and then performing the following processes in sequence:

[0092] S101 , forming a recessed area in the resonator area of ​​the substrate 101 through photolithography and etching processes, depositing a sacrificial layer in the recessed area, and performing chemical and physical grinding on the sacrificial layer.

[0093] Specifically, first, photolithography and etching are performed on the silicon wafer to obtain Figure 3 The structure, then Figure 3 The sacrificial layer 110 is deposited on the structure, and chemical and physical polishing is performed to obtain Figure 4 structure.

[0094] S102 , depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process.

[0095] Specifically, the resonator lower electrode layer 102 is deposited, and the resonator lower electrode layer is patterned by photolithography and etching, such as Figure 5 .

[0096] S103, depositing a piezoelectric layer on a side of the lower electrode layer of the resonator away from the substrate.

[0097] Specifically, the piezoelectric layer 104 is deposited to form a piezoelectric layer film, such as Figure 6 .

[0098] S104, depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer by photolithography and etching to remove the resonator upper electrode layer including the resonator upper electrode layer located in the capacitor region.

[0099] Specifically, the resonator upper electrode layer 105 is deposited, and the resonator upper electrode layer is patterned by photolithography and etching to obtain the following: Figure 7 structure.

[0100] S105 , performing a patterning process on the piezoelectric layer to remove the piezoelectric layer including the piezoelectric layer located in the capacitor region.

[0101] Specifically, the piezoelectric layer 104 used to form the resonator is patterned by photolithography and etching, such as Figure 8 .

[0102] S106, depositing a capacitor lower electrode layer by a liftoff process in an area where the resonator lower electrode is away from the substrate and the resonator piezoelectric layer is removed.

[0103] Specifically, the capacitor bottom electrode layer 106 is deposited by liftoff process to obtain Fig. 9 structure.

[0104] S107, depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate.

[0105] Specifically, a capacitor dielectric layer 107 is deposited, and the capacitor dielectric layer is patterned by photolithography and etching, such as Fig.10 .

[0106] S108, depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process.

[0107] Specifically, the upper capacitor electrode 108 is deposited by liftoff process to obtain Fig.11 structure.

[0108] S109, releasing the sacrificial layer to form an acoustic mirror.

[0109] Finally, the sacrificial layer 110 is released to obtain the acoustic mirror 103, and the Fig.12 The resonator filter structure shown.

[0110] Fig.13 : is a cross-sectional schematic diagram of a resonator filter structure provided by another embodiment of the present invention. In this structure, the resonator lower electrode layer and the capacitor lower electrode layer are formed by depositing through the same deposition process and then patterning. It can be seen that the difference between this embodiment and the first embodiment is that the capacitor lower electrode and the resonator lower electrode of this embodiment are shared, so there is no need to make an additional capacitor lower electrode layer. The preparation method is as follows: Figure 14-22 As shown, the preparation process of the structure includes planning the substrate resonator area and the capacitor area, and then performing the following processes in sequence:

[0111] S201, forming a recessed area in the resonator area of ​​the substrate through photolithography and etching processes, depositing a sacrificial layer in the recessed area, and performing chemical and physical grinding on the sacrificial layer.

[0112] Specifically, photolithography and etching are performed on the silicon wafer to obtain Fig.14 Then in Fig.14 The sacrificial layer 110 is deposited on the structure, and chemical and physical polishing is performed to obtain Fig.15 structure.

[0113] S202, depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process.

[0114] Specifically, the resonator lower electrode 102 is deposited and patterned by photolithography and etching, such as Fig.16 .

[0115] S203, depositing a piezoelectric layer on a side of the lower electrode layer of the resonator away from the substrate.

[0116] Specifically, the piezoelectric layer 104 is deposited to obtain a piezoelectric layer film, such as Fig.17 .

[0117] S204, depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer by photolithography and etching to remove the resonator upper electrode layer including the resonator upper electrode layer located in the capacitor region.

[0118] Specifically, the resonator upper electrode layer 105 is deposited, and the upper electrode of the resonator is patterned by photolithography and etching to obtain the following Fig.18 structure.

[0119] S205 , performing a patterning process on the piezoelectric layer to remove the piezoelectric layer including the piezoelectric layer located in the capacitor region.

[0120] S206, using the resonator lower electrode with the piezoelectric layer of the resonator removed as a capacitor lower electrode layer.

[0121] Specifically, the piezoelectric layer of the resonator is patterned by photolithography and etching, such as Fig.19 .

[0122] S207, depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate.

[0123] Specifically, a capacitor dielectric layer 107 is deposited, and the capacitor dielectric layer is patterned by photolithography and etching, such as Fig. 20 .

[0124] S208 , depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process.

[0125] Specifically, the upper capacitor electrode 108 is deposited by liftoff process to obtain Fig.21 structure.

[0126] S209, releasing the sacrificial layer to form an acoustic mirror.

[0127] Specifically, the sacrificial layer 110 is released to obtain the acoustic mirror 103, as shown in Fig. 22 , and obtain the resonator filter structure.

[0128] Fig.23 : is a cross-sectional schematic diagram of a resonator filter structure provided by another embodiment of the present invention, in which the resonator structure is connected to the capacitor lower electrode layer of the adjacent capacitor unit through the resonator upper electrode layer, and the capacitor lower electrode layer connected to the resonator upper electrode layer is located on the side of the resonator upper electrode layer away from the substrate. It can be seen that the difference between this embodiment and the first embodiment is that the connection between the capacitor and the resonator in this embodiment is connected through the resonator upper electrode, and its preparation method is as follows: Figure 24-32 As shown, the preparation process of the structure includes planning the substrate resonator area and the capacitor area, and then performing the following processes in sequence:

[0129] S301, forming a recessed area in the resonator area of ​​the substrate through photolithography and etching processes, depositing a sacrificial layer in the recessed area, and performing chemical and physical grinding on the sacrificial layer.

[0130] Specifically, photolithography and etching are performed on the silicon wafer to obtain Fig.24 structure. Fig.24 The sacrificial layer 110 is deposited on the structure, and chemical and physical polishing is performed to obtain Fig.25 structure.

[0131] S302 , depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process to retain the resonator lower electrode layer including the resonator region.

[0132] Specifically, a resonator lower electrode 102 layer is deposited, and the resonator lower electrode is patterned by photolithography and etching, such as Fig.26 .

[0133] S303, depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate and on the same side of the substrate where the resonator lower electrode layer is not disposed.

[0134] Specifically, the piezoelectric layer 104 is deposited to obtain a piezoelectric layer film, such as Fig. 27 .

[0135] S304 , depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer located in the capacitor region by photolithography and etching.

[0136] Specifically, deposit the resonator upper electrode 105 layer, and pattern the resonator upper electrode by photolithography and etching to obtain the following: Fig.28 structure.

[0137] S305 , depositing a capacitor bottom electrode layer on a side of the resonator top electrode away from the substrate by a liftoff process.

[0138] Specifically, the capacitor bottom electrode 106 is deposited by liftoff process to obtain Fig.29 structure.

[0139] S306, depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate.

[0140] Specifically, a capacitor dielectric layer 107 is deposited, and the capacitor dielectric layer is patterned by photolithography and etching, such as Fig.30 .

[0141] S307 , depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process.

[0142] Specifically, the upper capacitor electrode 108 is deposited by liftoff process to obtain Fig.31 structure.

[0143] S308 , releasing the sacrificial layer to form an acoustic mirror.

[0144] Specifically, the sacrificial layer 110 is released to obtain the acoustic mirror 103, and the following is obtained: Fig.32 The resonator filter structure shown.

[0145] Fig.33: is a cross-sectional schematic diagram of a resonator filter structure provided by another embodiment of the present invention. In this structure, the resonator upper electrode layer and the capacitor lower electrode layer are formed by depositing through the same deposition process and then patterning. It can be seen that the difference between this embodiment and the third embodiment is that the capacitor lower electrode and the resonator upper electrode of this embodiment are shared, so there is no need to make an additional capacitor lower electrode layer. The preparation method is as follows: Figure 34-41 As shown, the preparation process of the structure includes planning the substrate resonator area and the capacitor area, and then performing the following processes in sequence:

[0146] S401, forming a recessed area in the resonator area of ​​the substrate through photolithography and etching processes, depositing a sacrificial layer in the recessed area, and performing chemical and physical grinding on the sacrificial layer.

[0147] Specifically, photolithography and etching are performed on the silicon wafer to obtain Fig.34 Then in Fig.34 The sacrificial layer 110 is deposited on the structure, and chemical and physical polishing is performed to obtain Fig.35 structure.

[0148] S402 , depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process to retain the resonator lower electrode layer including the resonator region.

[0149] Specifically, a resonator lower electrode 102 layer is deposited, and the resonator lower electrode is patterned by photolithography and etching, such as Fig.36 .

[0150] S403, depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate and on the same side of the substrate where the resonator lower electrode layer is not disposed.

[0151] Specifically, the piezoelectric layer 104 is deposited to obtain a piezoelectric layer film, such as Fig.37 .

[0152] S404, depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer located in the capacitor region by photolithography and etching.

[0153] S405, using part of the upper electrode of the resonator as the lower electrode layer of the capacitor.

[0154] Specifically, the resonator upper electrode layer 105 is deposited, and the resonator upper electrode and the capacitor lower electrode are patterned by photolithography and etching to obtain the following: Fig.38 structure.

[0155] S406, depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate.

[0156] Specifically, a capacitor dielectric layer 107 is deposited, and the capacitor dielectric layer is patterned by photolithography and etching, such as Fig.39 .

[0157] S407 , depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process.

[0158] Specifically, the upper capacitor electrode 108 is deposited by liftoff process to obtain Fig.40 structure.

[0159] S408 , releasing the sacrificial layer to form an acoustic mirror.

[0160] Specifically, the sacrificial layer 110 is released to obtain the acoustic mirror 103, and the following is obtained: Fig.41 The resonator filter structure shown.

[0161] Based on the same inventive concept, the present application also provides a resonator filter, including the resonator filter structure mentioned in the above resonator filter structure embodiment.

[0162] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.

[0163] It should be noted that, in the description of the present invention, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" refers to at least two.

[0164] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0165] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0166] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0167] In addition, each functional unit in each embodiment of the present invention may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0168] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0169] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0170] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A resonator filter structure, characterized in that: comprising a substrate and a circuit structure integrated on one side of the substrate; The substrate includes a resonator region and a capacitor region; The resonator region is provided with a resonator circuit structure, the capacitor region is provided with a capacitor structure, and at least a portion of the structure in the resonator circuit structure is connected or shared with at least a portion of the structure in the capacitor structure.

2. The resonator filter structure according to claim 1, characterized in that The resonator circuit structure includes an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer, and a resonator upper electrode layer sequentially distributed along a first direction, wherein the first direction is a direction perpendicular to the substrate surface and away from the substrate surface; The capacitor structure includes two capacitor units, each of which includes a capacitor lower electrode layer, a capacitor dielectric layer and a capacitor upper electrode layer sequentially distributed along the first direction, and the capacitor units correspond to each other.

3. The resonator filter structure according to claim 2, characterized in that The resonator region and the two capacitor units are arranged in sequence along a second direction, and the second direction is a direction parallel to the substrate.

4. The resonator filter structure according to claim 3, characterized in that Different capacitor units are connected to each other through the capacitor upper electrode layer of each capacitor unit.

5. The resonator filter structure according to claim 3, characterized in that The resonator structure is connected to the capacitor lower electrode layer of an adjacent capacitor unit through the resonator lower electrode layer, and the capacitor lower electrode layer connected to the resonator lower electrode layer is located on a side of the resonator lower electrode layer away from the substrate.

6. The resonator filter structure according to claim 3, characterized in that The resonator lower electrode layer and the capacitor lower electrode layer are formed by being deposited through the same deposition process and then patterned.

7. The resonator filter structure according to claim 3, characterized in that The resonator structure is in contact with and connected to the capacitor lower electrode layer of an adjacent capacitor unit through the resonator upper electrode layer, and the capacitor lower electrode layer in contact with and connected to the resonator upper electrode layer is located on a side of the resonator upper electrode layer away from the substrate.

8. The resonator filter structure according to claim 3, characterized in that The resonator upper electrode layer and the capacitor lower electrode layer are formed by being deposited through the same deposition process and then patterned.

9. The resonator filter structure according to claim 3, characterized in that The capacitor bottom electrode layers of different capacitor units are arranged at intervals.

10. The resonator filter structure according to claim 3, characterized in that The capacitor upper electrode layers of different capacitor units are connected to each other.

11. The resonator filter structure according to claim 1, characterized in that The resonator circuit structure comprises an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer and a resonator upper electrode layer sequentially distributed along a first direction, wherein the first direction is a direction away from a surface of one side of the substrate; The capacitor structure includes at least two capacitor units, each of the capacitor units includes a capacitor lower electrode layer, a capacitor dielectric layer and a capacitor upper electrode layer distributed in sequence along the first direction, and the capacitor units correspond to each other.

12. The resonator filter structure according to claim 1, characterized in that The substrate is made of single crystal silicon, gallium nitride, gallium arsenide, sapphire, quartz, silicon carbide or diamond.

13. The resonator filter structure according to claim 2, characterized in that The acoustic mirror is a cavity or a Bragg reflection layer.

14. A method for preparing a resonator filter structure, characterized in that: include: Planning the resonator region and the capacitor region on one side of the substrate; Through deposition process and graphic processing, a resonator circuit structure is formed in the resonator area, and a capacitor structure is formed in the capacitor area; wherein at least part of the structure in the resonator circuit structure is connected or shared with at least part of the structure in the capacitor structure.

15. The method for preparing a resonator filter structure according to claim 14, characterized in that: The resonator circuit structure includes an acoustic mirror, a resonator lower electrode layer, a piezoelectric layer, and a resonator upper electrode layer sequentially distributed along a first direction, wherein the first direction is a direction perpendicular to the substrate surface and away from the substrate surface; The capacitor structure includes a capacitor lower electrode layer, a capacitor dielectric layer and a capacitor upper electrode layer which are sequentially distributed along the first direction, and the capacitor units correspond to each other in pairs.

16. The method for preparing a resonator filter structure according to claim 15, characterized in that: The method of forming a resonator circuit structure in the resonator region and a capacitor structure in the capacitor region by a deposition process and a patterning process includes: By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding; Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process; Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate; Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer by photolithography and etching to remove the resonator upper electrode layer including the resonator upper electrode layer located in the capacitor region; Performing a patterning process on the piezoelectric layer to remove the piezoelectric layer including the piezoelectric layer located in the capacitor region; Depositing a capacitor lower electrode layer by a liftoff process in a region where the resonator lower electrode is away from the substrate and the resonator piezoelectric layer is removed; Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate; Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process; The sacrificial layer is released to form an acoustic mirror.

17. The method for preparing a resonator filter structure according to claim 15, characterized in that: The method of forming a resonator circuit structure in the resonator region and a capacitor structure in the capacitor region by a deposition process and a patterning process includes: By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding; Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process; Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate; Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer by photolithography and etching to remove the resonator upper electrode layer including the resonator upper electrode layer located in the capacitor region; Performing a patterning process on the piezoelectric layer to remove the piezoelectric layer including the piezoelectric layer located in the capacitor region; Using the resonator lower electrode with the piezoelectric layer of the resonator removed as a capacitor lower electrode layer; Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate; Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process; The sacrificial layer is released to form an acoustic mirror.

18. The method for preparing a resonator filter structure according to claim 15, characterized in that: The method of forming a resonator circuit structure in the resonator region and a capacitor structure in the capacitor region by a deposition process and a patterning process includes: By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding; Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process to retain the resonator lower electrode layer including the resonator region; Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate and on the same side of the substrate where the resonator lower electrode layer is not disposed; Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer located in the capacitor region by photolithography and etching; Depositing a capacitor bottom electrode layer on the side of the resonator top electrode away from the substrate by a liftoff process; Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate; Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process; The sacrificial layer is released to form an acoustic mirror.

19. The method for preparing a resonator filter structure according to claim 15, characterized in that: The method of forming a resonator circuit structure in the resonator region and a capacitor structure in the capacitor region by a deposition process and a patterning process includes: By means of photolithography and etching processes, a recessed region is formed in the resonator region of the substrate, a sacrificial layer is deposited in the recessed region, and the sacrificial layer is subjected to chemical and physical grinding; Depositing a resonator lower electrode layer on the side of the substrate where the deposited sacrificial layer is formed, and performing a patterning process to retain the resonator lower electrode layer including the resonator region; Depositing a piezoelectric layer on a side of the resonator lower electrode layer away from the substrate and on the same side of the substrate where the resonator lower electrode layer is not disposed; Depositing a resonator upper electrode layer on a side of the piezoelectric layer away from the substrate, and patterning the resonator upper electrode layer located in the capacitor region by photolithography and etching; Using part of the upper electrode of the resonator as the lower electrode layer of the capacitor; Depositing a capacitor dielectric layer on a side of the capacitor lower electrode layer away from the substrate; Depositing a capacitor upper electrode layer on a side of the capacitor dielectric layer away from the substrate by a Liftoff process; The sacrificial layer is released to form an acoustic mirror.

20. A resonator filter, characterized in that: Comprising a resonator filter structure as claimed in any one of claims 1-13.