Current signal adaptive sampling circuit, system and electronic device

Abstract

The present invention relates to the technical field of signal processing in analog integrated circuits, and specifically discloses a current signal adaptive sampling circuit, system and electronic device, including: a current sampling unit, a voltage conversion unit, a switching signal control unit and a voltage amplification output unit. The current sampling unit is used to sample the current target current signal and convert it into a corresponding sampled voltage signal; the switching signal control unit is used to generate switching control signals of different frequencies according to a preset frequency division control signal; the voltage conversion unit is used to convert the sampled voltage signal into a differential voltage signal on a common-mode level according to the corresponding switching control signal; the voltage amplification output unit is used to perform amplification processing on the differential voltage signal based on eliminating the offset voltage according to the corresponding switching control signal to obtain a voltage output signal. The current signal adaptive sampling circuit provided by the present invention can automatically and accurately sample and amplify the target current signal.

Description

Technical Field

[0001] The present invention relates to the technical field of signal processing in analog integrated circuits, and in particular to a current signal adaptive sampling circuit, a current signal adaptive sampling system and electronic equipment. Background Art

[0002] Current signal sampling plays an important role in the field of industrial automation, especially in the application of sensors and transmitters, which require accurate and fast measurement of the current in the circuit and convert it into an electrical signal output. The current sampling circuit needs to have the characteristics of high precision, low distortion, and high speed. Current sampling is often used in power electronics, electric vehicles, optoelectronics, communications and other fields, and is an indispensable part of the field of industrial automation.

[0003] Currently, there are few sampling and amplifying circuits for weak current signals. The schematic diagram of the conventional current signal sampling and amplifying circuit is as follows: Figure 1 As shown, the current signal sampling method is to connect one end of the target current signal Isamp to the reference voltage Vref through a resistor Rs, and the other end to the ground line, so that the voltage value flowing through the resistor Rs can directly reflect the size of the current Isamp. Then the voltage value on the resistor Rs is amplified and outputted by a corresponding voltage value through a dual-end input and single-end output operational amplifier to achieve the purpose of amplifying and outputting the target current signal. Although this method can achieve the purpose of sampling and amplifying the target current signal, one end of its target sampling current Isamp must be connected to the voltage Vref through a resistor Rs, and the other end is connected to the ground line, which greatly limits its actual application environment. Isamp also has a large dependence on the current capacity of Vref. At the same time, the offset error of its dual-end input and single-end output operational amplifier will also be introduced into the target sampling current, which will cause a large error between the final output current signal and the real current signal.

[0004] Therefore, how to provide a sampling circuit that can automatically and accurately sample and amplify the target current signal has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0005] The present invention provides a current signal adaptive sampling circuit, a current signal adaptive sampling system and an electronic device, which solve the problem existing in the related art that it is impossible to accurately sample and amplify the target current signal.

[0006] As a first aspect of the present invention, there is provided an adaptive sampling circuit for current signals, which includes: a current sampling unit, a voltage conversion unit, a switching signal control unit, and a voltage amplification output unit. The current sampling unit is electrically connected to the voltage conversion unit, the voltage amplification output unit is electrically connected to the voltage conversion unit, and the switching signal control unit is respectively electrically connected to the voltage conversion unit and the voltage amplification output unit.

[0007] The current sampling unit is used to sample the current target current signal and convert it into a corresponding sampled voltage signal.

[0008] The switching signal control unit is used to generate switching control signals with different frequencies according to a preset frequency division control signal.

[0009] The voltage conversion unit is used to convert the sampled voltage signal into a differential voltage signal on a common mode level according to the corresponding switching control signal.

[0010] The voltage amplification output unit is used to perform amplification processing on the differential voltage signal based on eliminating the offset voltage according to the corresponding switching control signal to obtain a voltage output signal corresponding to the current target current signal.

[0011] Further, the voltage amplification output unit includes: a cross-sampling storage module and an amplification processing module. The input end of the cross-sampling storage module is connected to the output end of the voltage conversion unit, the output end of the cross-sampling storage module is connected to the input end of the amplification processing module, and the output end of the amplification processing module is the output end of the voltage amplification output unit.

[0012] The cross-sampling storage module is used to perform cross-sampling storage processing on the differential voltage signal in each switching period to obtain a cross-sampling storage result.

[0013] The amplification processing module is used to perform amplification processing on the cross-sampling storage result to obtain a voltage output signal after eliminating the offset voltage.

[0014] Further, the cross-sampling storage module includes: a first sampling storage unit and a second sampling storage unit. The first sampling storage unit and the second sampling storage unit are electrically connected, and both ends of the first sampling storage unit and both ends of the second sampling storage unit are respectively connected to the output end of the voltage conversion unit and the input end of the amplification processing module.

[0015] Both the first sampling and storage unit and the second sampling and storage unit are configured to turn on one of their respective sampling and storage branches during the first half cycle of each switching period to obtain a first storage voltage, and to turn on the other of their respective sampling and storage branches during the second half cycle of each switching period to obtain a second storage voltage.

[0016] Further, the amplification processing module includes: a fully differential amplifier, a positive-phase amplification processing unit, and a negative-phase amplification processing unit. The positive-phase amplification processing unit is connected to the positive input terminal of the fully differential amplifier, the negative-phase amplification processing unit is connected to the negative input terminal of the fully differential amplifier, the positive-phase output terminal of the fully differential amplifier is connected to the positive-phase amplification processing unit, and the negative-phase output terminal of the fully differential amplifier is connected to the negative-phase amplification processing unit.

[0017] The positive-phase amplification processing unit and the negative-phase amplification processing unit are capable of jointly determining the amplification factor of the fully differential amplifier under the control of the switching control signal.

[0018] The positive-phase amplification processing unit and the negative-phase amplification processing unit are further capable of controlling their respective amplification processing switch branches according to the switching control signal to cooperate with the cross-sampling and storage module, so that the voltage difference between the first storage voltage and the second storage voltage cancels out the offset voltage of the fully differential amplifier.

[0019] The fully differential amplifier is configured to amplify the differential-mode voltage signal according to the determined amplification factor to obtain a voltage output signal corresponding to the current target signal.

[0020] Further, the positive-phase amplification processing unit includes an eighth capacitor, a tenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, and a sixteenth switch.

[0021] Both ends of the thirteenth switch are respectively connected to the positive-phase input terminal and the positive-phase output terminal of the fully differential amplifier.

[0022] One end of the eighth capacitor is connected to the positive-phase input terminal of the fully differential amplifier, the other end of the eighth capacitor is respectively connected to one end of the fourteenth switch and one end of the fifteenth switch, the other end of the fourteenth switch is connected to the positive-phase output terminal of the fully differential amplifier, the other end of the fifteenth switch is connected to one end of the tenth capacitor, the other end of the tenth capacitor is connected to one end of the sixteenth switch, the other end of the sixteenth switch is connected to the positive-phase output terminal of the fully differential amplifier, and the input terminal of the common-mode level is also connected between the other end of the fifteenth switch and one end of the tenth capacitor.

[0023] The negative-phase terminal amplification processing unit includes a ninth capacitor, an eleventh capacitor, a seventeenth switch, an eighteenth switch, a nineteenth switch, and a twentieth switch.

[0024] Both ends of the seventeenth switch are respectively connected to the negative-phase input terminal and the negative-phase output terminal of the fully differential amplifier.

[0025] One end of the ninth capacitor is connected to the negative-phase input terminal of the fully differential amplifier, the other end of the ninth capacitor is respectively connected to one end of the eighteenth switch and one end of the nineteenth switch, the other end of the eighteenth switch is connected to the negative-phase output terminal of the fully differential amplifier, the other end of the nineteenth switch is connected to one end of the eleventh capacitor, the other end of the eleventh capacitor is connected to one end of the twentieth switch, the other end of the twentieth switch is connected to the negative-phase output terminal of the fully differential amplifier, and an input terminal of a common-mode level is also connected between the other end of the nineteenth switch and one end of the eleventh capacitor.

[0026] In the first half cycle of each switching period, the thirteenth switch and the seventeenth switch are closed so that the positive-phase input terminal and the positive-phase output terminal of the fully differential amplifier are connected and the negative-phase input terminal and the negative-phase output terminal are connected, and the offset voltage of the fully differential amplifier can be stored in the first sampling and storage unit and the second sampling and storage unit to jointly form the first stored voltage with the positive-phase differential-mode voltage signal.

[0027] In the second half cycle of each switching period, the fourteenth switch and the eighteenth switch are closed so that the eighth capacitor and the ninth capacitor jointly bear the storage of the second stored voltage with the first sampling and storage unit and the second sampling and storage unit, and the second stored voltage includes the offset voltage of the fully differential amplifier and the negative-phase differential-mode voltage signal.

[0028] Further, the first sampling and storage unit includes: a ninth switch, a tenth switch, and a sixth capacitor. One end of the ninth switch and one end of the tenth switch are both connected to the output terminal of the voltage conversion unit. The other end of the ninth switch and the other end of the tenth switch are both connected to one end of the sixth capacitor. The other end of the sixth capacitor is connected to the positive-phase input terminal of the fully differential amplifier.

[0029] The second sampling and storage unit includes: an eleventh switch, a twelfth switch, and a seventh capacitor. One end of the eleventh switch and one end of the twelfth switch are both connected to the output terminal of the voltage conversion unit. The other end of the eleventh switch and the other end of the twelfth switch are both connected to one end of the seventh capacitor. The other end of the seventh capacitor is connected to the negative-phase input terminal of the fully differential amplifier.

[0030] In the first half of each switching cycle, the ninth switch and the twelfth switch are closed, and the tenth switch and the eleventh switch are open, so that the sixth capacitor and the seventh capacitor store the first stored voltage;

[0031] In the second half of each switching cycle, the ninth switch and the twelfth switch are open, and the tenth switch and the eleventh switch are closed, so that the sixth capacitor and the seventh capacitor store the second stored voltage.

[0032] Further, the voltage conversion unit includes: a positive-phase coupling switch unit and a negative-phase coupling switch unit. The positive-phase coupling switch unit and the negative-phase coupling switch unit are electrically connected, and both the positive-phase coupling switch unit and the negative-phase coupling switch unit are respectively connected to the current sampling unit and the voltage amplification output unit;

[0033] The positive-phase coupling switch unit is used to couple half of the sampled voltage signal on the common-mode level in the form of a positive-phase voltage to obtain the positive-phase differential voltage signal;

[0034] The negative-phase coupling switch unit is used to couple half of the sampled voltage signal on the common-mode level in the form of a negative-phase voltage to obtain the negative-phase differential voltage signal.

[0035] Further, the positive-phase coupling switch unit includes: a first switch, a second switch, a fifth switch, a sixth switch, and a fourth capacitor. One end of the series connection of the first switch and the second switch is connected to one end of the series connection of the fifth switch and the sixth switch, and the other end of the series connection of the first switch and the second switch is connected to the other end of the series connection of the fifth switch and the sixth switch.

[0036] The negative-phase coupling switch unit includes: a third switch, a fourth switch, a seventh switch, an eighth switch, and a fifth capacitor. One end of the series connection of the third switch and the fourth switch is connected to one end of the series connection of the seventh switch and the eighth switch, and the other end of the series connection of the third switch and the fourth switch is connected to the other end of the series connection of the seventh switch and the eighth switch.

[0037] One end of the fourth capacitor is connected to the series connection end between the first switch and the second switch, the other end of the fourth capacitor is connected to the series connection end between the third switch and the fourth switch, one end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch, and the other end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch;

[0038] One end of the series connection of the first switch and the second switch is the input end of the common-mode level, and the other end of the series connection of the first switch and the second switch is the positive phase end of the voltage conversion unit.

[0039] One end of the series connection of the third switch and the fourth switch is the input end of the common-mode level, and the other end of the series connection of the third switch and the fourth switch is the negative phase end of the voltage conversion unit.

[0040] As another aspect of the present invention, there is provided a current signal adaptive sampling system, which includes a controller and the aforementioned current signal adaptive sampling circuit. The controller is electrically connected to the current signal adaptive sampling circuit. The controller is used to generate a preset frequency division control signal. The current signal adaptive sampling circuit is used to generate switch control signals of different frequencies according to the preset frequency division control signal, convert the sampled voltage signal obtained by sampling the target current according to the switch control signal into a differential mode voltage signal on the common mode, and perform amplification processing on the differential mode voltage signal based on eliminating the offset voltage to obtain a voltage output signal corresponding to the current target current signal.

[0041] As another aspect of the present invention, there is provided an electronic device, which includes: a device to be sampled and the aforementioned current signal adaptive sampling system, and the current signal adaptive sampling system is electrically connected to the device to be sampled.

[0042] The current signal adaptive sampling circuit provided by the present invention samples the target current signal in real time through the current sampling unit, converts it into a differential mode voltage signal on the common mode level through the voltage conversion unit, and then performs amplification processing on the differential mode voltage signal based on eliminating the offset voltage through the voltage output amplification unit to obtain the final voltage output signal. This current signal adaptive sampling circuit can not only amplify the weak target current signal, but also eliminate the offset error caused by the asymmetry of components in the circuit, so as to obtain an accurate current signal sampling and amplification output result. Therefore, the current signal adaptive sampling circuit provided by the present invention can automatically and accurately sample and amplify the target current signal, and has a simple structure, stable performance and is easy to implement. Description of the Drawings

[0043] The drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present invention, but do not constitute a limitation to the present invention.

[0044] Figure 1 It is a schematic diagram of a current sampling circuit in the prior art.

[0045] Figure 2It is the structural block diagram of the current signal adaptive sampling circuit provided by the present invention.

[0046] Figure 3 It is the circuit structure schematic diagram of the current signal adaptive sampling circuit provided by the present invention.

[0047] Figure 4 It is the switching signal control waveform diagram of the current signal adaptive sampling circuit provided by the present invention.

[0048] Figure 5 It is the application circuit schematic diagram of the current signal adaptive sampling circuit provided by the present invention.

[0049] Figure 6 It is the structural block diagram of the current signal adaptive sampling system provided by the present invention. Detailed implementation manners

[0050] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments may be combined with each other. The present invention will be described in detail below with reference to the drawings and in combination with the embodiments.

[0051] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0052] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so as to implement the embodiments of the present invention described here. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0053] Currently, for the current signal sampling and amplifying circuit, due to its circuit structure limitations, its actual application environment is restricted, and due to the existence of the offset error of the operational amplifier, there are large errors in the sampling results.

[0054] Based on this, in this embodiment, a current signal adaptive sampling circuit is provided. Figure 2is a structural block diagram of the current signal adaptive sampling circuit 10 provided according to an embodiment of the present invention. As Figure 2 shown, it includes: a current sampling unit 100, a voltage conversion unit 200, a switch signal control unit 300, and a voltage amplification output unit 400. The current sampling unit 100 is electrically connected to the voltage conversion unit 200, the voltage amplification output unit 400 is electrically connected to the voltage conversion unit 200, and the switch signal control unit 300 is electrically connected to the voltage conversion unit 200 and the voltage amplification output unit 400 respectively.

[0055] The current sampling unit 100 is used to sample the current target current signal and convert it into a corresponding sampled voltage signal.

[0056] The switch signal control unit 300 is used to generate switch control signals with different frequencies according to a preset frequency division control signal.

[0057] The voltage conversion unit 200 is used to convert the sampled voltage signal into a differential mode voltage signal on a common mode level according to the corresponding switch control signal.

[0058] The voltage amplification output unit 400 is used to perform amplification processing on the differential mode voltage signal based on eliminating the offset voltage according to the corresponding switch control signal, and obtain a voltage output signal corresponding to the current target current signal.

[0059] In the embodiment of the present invention, the current sampling unit 100 samples the target current signal in real time and can convert the sampled target current signal into a sampled voltage signal. Here, it should be noted that the sampled voltage signal is specifically an AC voltage signal. Therefore, the AC sampled voltage signal needs to be further processed by the voltage conversion unit 200.

[0060] Specifically, the voltage conversion unit 200 can couple the sampled voltage signal to the common mode level to obtain a differential mode voltage signal on the common mode level. That is to say, the voltage conversion unit 200 can modulate the weak sampled voltage signal on the common mode level to obtain a modulated differential mode voltage signal. And the modulated differential mode voltage signal still needs to be amplified by the voltage amplification output unit 400. During this amplification process, the voltage amplification output unit 400 can eliminate the offset voltage brought by its own amplification, so as not to affect the result of amplifying the differential mode voltage signal. And because the error brought by its own offset voltage is eliminated, the accuracy of the final sampling result can also be improved.

[0061] It should be noted that the startup processes of the voltage conversion unit 200 and the voltage amplification output unit 400 are both controlled by the switching control signals with different frequencies output by the switching signal control unit 300. Therefore, both the voltage conversion unit 200 and the voltage amplification output unit 400 can operate under the control of the switching control signal.

[0062] Therefore, for the current signal adaptive sampling circuit provided by the present invention, the target current signal is sampled in real time by the current sampling unit, and after being converted into a differential-mode voltage signal on the common-mode level by the voltage conversion unit, the differential-mode voltage signal is amplified by the voltage output amplification unit based on eliminating the offset voltage to obtain the final voltage output signal. Such a current signal adaptive sampling circuit can not only amplify the weak target current signal, but also eliminate the offset error caused by the asymmetry of components in the circuit, so as to obtain an accurate current signal sampling and amplification output result. Therefore, the current signal adaptive sampling circuit provided by the present invention can automatically and accurately sample and amplify the target current signal, and has a simple structure, stable performance and is easy to implement.

[0063] In the embodiment of the present invention, as Figure 3 shown, the current sampling unit 100 may specifically include: a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2 and a third capacitor C3. One end of the first resistor R1 is connected to the input terminal of the target sampling current Isamp, and the other end of the first resistor R1 is connected to the output terminal of the target sampling current Isamp; the first capacitor C1 is connected in parallel with the first resistor R1; one end of the second capacitor C2 is connected to one end of the first resistor R1, and the other end of the second capacitor C2 is connected to the signal ground; one end of the third capacitor C3 is connected to the other end of the first resistor R1, and the other end of the third capacitor C3 is connected to the signal ground; one end of the second resistor R2 is connected to one end of the first resistor R1, and the other end of the second resistor R2 is connected to the positive phase terminal Vp of the voltage conversion unit 200; one end of the third resistor R3 is connected to the other end of the first resistor R1, and the other end of the third resistor R3 is connected to the negative phase terminal Vn of the voltage conversion unit 200.

[0064] It should be understood that in the embodiment of the present invention, first, the first resistor R1 in the current sampling unit is used to convert the target sampling current Isamp into a corresponding sampling voltage signal Vdm = Isamp * R1. At the same time, since the target sampling current often contains some high-frequency interference signals, the capacitors C1, C2, and C3 in the current sampling unit are used to filter some high-frequency interference signals. Therefore, in the embodiment of the present invention, through the current sampling unit, the required target current signal can be converted into a voltage signal, and at the same time, the high-frequency interference signals are filtered out to obtain a real sampling signal.

[0065] In an embodiment of the present invention, as Figure 3 shown, the voltage conversion unit 200 includes: a positive-phase coupling switch unit 210 and a negative-phase coupling switch unit 220. The positive-phase coupling switch unit 210 and the negative-phase coupling switch unit 220 are electrically connected, and both the positive-phase coupling switch unit 210 and the negative-phase coupling switch unit 220 are respectively connected to the current sampling unit 100 and the voltage amplification output unit 400;

[0066] The positive-phase coupling switch unit 210 is configured to couple half of the sampled voltage signal on the common-mode level in the form of a positive-phase voltage to obtain the positive-phase differential-mode voltage signal;

[0067] The negative-phase coupling switch unit 220 is configured to couple half of the sampled voltage signal on the common-mode level in the form of a negative-phase voltage to obtain the negative-phase differential-mode voltage signal.

[0068] Specifically, the sampled voltage signal output by the current sampling unit 100 can be divided into two. Among them, half of the sampled voltage signal is coupled on the common-mode level through the positive-phase coupling switch unit to obtain the positive-phase differential-mode voltage signal, and the other half of the sampled voltage signal is coupled on the common-mode level through the negative-phase coupling switch unit to obtain the negative-phase differential-mode voltage signal. In this way, both the positive-phase differential-mode voltage signal and the negative-phase differential-mode voltage signal are input to the voltage amplification output unit for fully differential amplification processing to obtain the final voltage output signal.

[0069] Further specifically, as Figure 3 shown, the positive-phase coupling switch unit 210 includes: a first switch K1, a second switch K2, a fifth switch K5, a sixth switch K6, and a fourth capacitor C4. One end of the series connection of the first switch K1 and the second switch K2 is connected to one end of the series connection of the fifth switch K5 and the sixth switch K6, and the other end of the series connection of the first switch K1 and the second switch K2 is connected to the other end of the series connection of the fifth switch K5 and the sixth switch K6. It should be understood that one end of the series connection of the first switch K1 and the second switch K2 is connected to one end of the series connection of the fifth switch K5 and the sixth switch K6, and this connected end is the input terminal Vcm of the common-mode level; the other end of the series connection of the first switch K1 and the second switch K2 is connected to the other end of the series connection of the fifth switch K5 and the sixth switch K6, and this connected end is used to form the positive-phase end Vp of the voltage conversion unit 200.

[0070] Specifically, the negative-phase coupling switch unit 220 includes: a third switch K3, a fourth switch K4, a seventh switch K7, an eighth switch K8, and a fifth capacitor C5. One end of the series connection of the third switch K3 and the fourth switch K4 is connected to one end of the series connection of the seventh switch K7 and the eighth switch K8, and the other end of the series connection of the third switch K3 and the fourth switch K4 is connected to the other end of the series connection of the seventh switch K7 and the eighth switch K8. It should be understood that one end of the series connection of the third switch K3 and the fourth switch K4 is connected to one end of the series connection of the seventh switch K7 and the eighth switch K8, and this connected end is the input terminal Vcm of the common-mode level; the other end of the series connection of the third switch K3 and the fourth switch K4 is connected to the other end of the series connection of the seventh switch K7 and the eighth switch K8, and this connected end is used to form the negative-phase end Vn of the voltage conversion unit 200.

[0071] Specifically, one end of the fourth capacitor C4 is connected to the series connection end between the first switch K1 and the second switch K2, and the other end of the fourth capacitor C4 is connected to the series connection end between the third switch K3 and the fourth switch K4. One end of the fifth capacitor C5 is connected to the series connection end between the fifth switch K5 and the sixth switch K6, and the other end of the fifth capacitor C5 is connected to the series connection end between the fifth switch K5 and the sixth switch K6;

[0072] One end of the series connection of the first switch K1 and the second switch K2 is the input terminal Vcm of the common-mode level, and the other end of the series connection of the first switch K1 and the second switch K2 is the positive-phase end Vp of the voltage conversion unit.

[0073] One end of the series connection of the third switch K3 and the fourth switch K4 is the input terminal Vcm of the common-mode level, and the other end of the series connection of the third switch K3 and the fourth switch K4 is the negative-phase end Vn of the voltage conversion unit.

[0074] In the embodiment of the present invention, the sampled voltage difference across the first resistor R1 in the current sampling unit 100 is Vdm = Isamp * R1, where Isamp is the target sampled current; the positive-phase end voltage Vp in the voltage conversion unit = Vcm + 0.5 * Vdm; the negative-phase end voltage Vn in the voltage conversion unit = Vcm - 0.5 * Vdm, where Vdm is the sampled voltage difference across the first resistor R1.

[0075] It should be noted that in the embodiment of the present invention, in the switching capacitor network composed of the first switch K1 to the eighth switch K8, the fourth capacitor C4, and the fifth capacitor C5 in the voltage conversion unit 200, the differential mode voltage Vdm signal at the input end is evenly distributed and stored in the fourth capacitor C4 and the fifth capacitor C5. The voltage between the two plates of the fourth capacitor C4 is 0.5*Vdm, and the voltage between the two plates of the fifth capacitor C5 is -0.5*Vdm (in the circuit schematic diagram of the embodiment of the present invention, it is default that the upper plate of the capacitor is the positive voltage terminal). Then, through the way of capacitor coupling, the voltages of the fourth capacitor C4 and the fifth capacitor C5 are coupled to the common mode level Vcm, so that the voltages of the two output ends of the voltage conversion unit are Vp = Vcm + 0.5*Vdm and Vn = Vcm - 0.5*Vdm respectively, perfectly transferring and superimposing the differential mode signal on the common mode voltage Vcm. Therefore, Vp and Vn can be directly connected to the input ends of the fully differential amplifier in the voltage amplification output unit, completely eliminating the problem of setting the common mode level at the input end of the conventional fully differential amplifier, simplifying the circuit network structure at the input end of the fully differential amplifier, and reducing the complexity of the design of the fully differential amplifier.

[0076] Since the target sampling signal is generally relatively weak and needs to be amplified by a certain multiple before better logical analysis and processing can be carried out, it is necessary to further amplify and process the signal Vdm = Isamp*R1 collected by the current sampling unit.

[0077] In the embodiment of the present invention, as Figure 3 shown, the voltage amplification output unit 400 includes: a cross-sampling storage module 410 and an amplification processing module 420. The input end of the cross-sampling storage module 410 is connected to the output end of the voltage conversion unit 200, the output end of the cross-sampling storage module 410 is connected to the input end of the amplification processing module 420, and the output end of the amplification processing module 420 is the output end of the voltage amplification output unit.

[0078] The cross-sampling storage module 410 is used to perform cross-sampling storage processing on the differential mode voltage signal in each switching cycle to obtain a cross-sampling storage result.

[0079] The amplification processing module 420 is used to perform amplification processing on the cross-sampling storage result to obtain a voltage output signal after eliminating the offset voltage.

[0080] It should be understood that the cross-sampling storage module 410 in the embodiment of the present invention can perform cross-sampling storage processing on the differential mode voltage signal in each switching cycle. Specifically, for each switching cycle, different switch branches are turned on in the first half cycle and the second half cycle to achieve cross-storage. After performing amplification processing on the cross-storage result, the offset voltage is eliminated, and the signal amplification accuracy is improved.

[0081] Specifically, the cross-sampling storage module 410 includes: a first sampling storage unit 411 and a second sampling storage unit 412. The first sampling storage unit 411 and the second sampling storage unit 412 are electrically connected. Both ends of the first sampling storage unit 411 and both ends of the second sampling storage unit 412 are respectively connected to the output end of the voltage conversion unit 200 and the input end of the amplification processing module 420.

[0082] Both the first sampling storage unit 411 and the second sampling storage unit 412 are configured to turn on one sampling storage branch of each of them in the first half cycle of each switching period to obtain a first storage voltage, and to turn on the other sampling storage branch of each of them in the second half cycle of each switching period to obtain a second storage voltage.

[0083] More specifically, the first sampling storage unit 411 includes: a ninth switch K9, a tenth switch K10, and a sixth capacitor C6. One end of the ninth switch K9 and one end of the tenth switch K10 are both connected to the output end of the voltage conversion unit 200. The other end of the ninth switch K9 and the other end of the tenth switch K10 are both connected to one end of the sixth capacitor C6. The other end of the sixth capacitor C6 is connected to the positive-phase input terminal Vpin of the fully differential amplifier AMP.

[0084] The second sampling storage unit 412 includes: an eleventh switch K11, a twelfth switch K12, and a seventh capacitor C7. One end of the eleventh switch K11 and one end of the twelfth switch K12 are both connected to the output end of the voltage conversion unit 200. The other end of the eleventh switch K11 and the other end of the twelfth switch K12 are both connected to one end of the seventh capacitor C7. The other end of the seventh capacitor C7 is connected to the negative-phase input terminal Vnin of the fully differential amplifier AMP.

[0085] In the first half cycle of each switching period, the ninth switch K9 and the twelfth switch K12 are closed, and the tenth switch K10 and the eleventh switch K11 are opened, so that the sixth capacitor C6 and the seventh capacitor C7 store the first storage voltage.

[0086] In the second half cycle of each switching period, the ninth switch K9 and the twelfth switch K12 are opened, and the tenth switch K10 and the eleventh switch K11 are closed, so that the sixth capacitor C6 and the seventh capacitor C7 store the second storage voltage.

[0087] In an embodiment of the present invention, the amplification processing module 420 includes: a fully differential amplifier AMP, a positive-phase terminal amplification processing unit 421, and a negative-phase terminal amplification processing unit 422. The positive-phase terminal amplification processing unit 421 is connected to the positive input terminal of the fully differential amplifier AMP, and the negative-phase terminal amplification processing unit 422 is connected to the negative input terminal of the fully differential amplifier AMP. The positive-phase output terminal of the fully differential amplifier AMP is connected to the positive-phase terminal amplification processing unit 421, and the negative-phase output terminal of the fully differential amplifier AMP is connected to the negative-phase terminal amplification processing unit 422.

[0088] The positive-phase terminal amplification processing unit 421 and the negative-phase terminal amplification processing unit 422 can jointly determine the amplification factor of the fully differential amplifier under the control of the switch control signal.

[0089] The positive-phase terminal amplification processing unit 421 and the negative-phase terminal amplification processing unit 422 can also control their respective amplification processing switch branches according to the switch control signal to cooperate with the cross-sampling storage module, so that the voltage difference between the first storage voltage and the second storage voltage cancels out the offset voltage of the fully differential amplifier.

[0090] The fully differential amplifier AMP is used to amplify the differential-mode voltage signal according to the determined amplification factor to obtain a voltage output signal corresponding to the current target signal.

[0091] In an embodiment of the present invention, the positive-phase terminal amplification processing unit 421 includes an eighth capacitor C8, a tenth capacitor C10, a thirteenth switch K13, a fourteenth switch K14, a fifteenth switch K15, and a sixteenth switch K16.

[0092] Both ends of the thirteenth switch K13 are respectively connected to the positive-phase input terminal and the positive-phase output terminal of the fully differential amplifier AMP.

[0093] One end of the eighth capacitor C8 is connected to the positive-phase input terminal of the fully differential amplifier AMP. The other end of the eighth capacitor C8 is respectively connected to one end of the fourteenth switch K14 and one end of the fifteenth switch K15. The other end of the fourteenth switch K14 is connected to the positive-phase output terminal of the fully differential amplifier AMP. The other end of the fifteenth switch K15 is connected to one end of the tenth capacitor C10. The other end of the tenth capacitor C10 is connected to one end of the sixteenth switch K16. The other end of the sixteenth switch K16 is connected to the positive-phase output terminal Vop of the fully differential amplifier AMP. A common-mode level input terminal Vcm is also connected between the other end of the fifteenth switch K15 and one end of the tenth capacitor C10.

[0094] The negative-phase terminal amplification processing unit 422 includes a ninth capacitor C9, an eleventh capacitor C11, a seventeenth switch K17, an eighteenth switch K18, a nineteenth switch K19, and a twentieth switch K20.

[0095] Both ends of the seventeenth switch K17 are respectively connected to the negative-phase input terminal Vin and the negative-phase output terminal Von of the fully differential amplifier AMP.

[0096] One end of the ninth capacitor C9 is connected to the negative-phase input terminal Vnin of the fully differential amplifier AMP. The other end of the ninth capacitor C9 is respectively connected to one end of the eighteenth switch K18 and one end of the nineteenth switch K19. The other end of the eighteenth switch K18 is connected to the negative-phase output terminal Von of the fully differential amplifier AMP. The other end of the nineteenth switch K19 is connected to one end of the eleventh capacitor C11. The other end of the eleventh capacitor C11 is connected to one end of the twentieth switch K20. The other end of the twentieth switch K20 is connected to the negative-phase output terminal Von of the fully differential amplifier AMP. A common-mode level input terminal Vcm is also connected between the other end of the nineteenth switch K19 and one end of the eleventh capacitor C11.

[0097] In the first half cycle of each switching period, the thirteenth switch K13 and the seventeenth switch K17 are closed so that the positive-phase input terminal Vpin and the positive-phase output terminal Vop of the fully differential amplifier AMP are connected, and the negative-phase input terminal Vnin and the negative-phase output terminal Von are connected. The offset voltage of the fully differential amplifier AMP can be stored in the first sampling and storage unit and the second sampling and storage unit to jointly form the first stored voltage with the positive-phase differential-mode voltage signal.

[0098] In the second half cycle of each switching period, the fourteenth switch K14 and the eighteenth switch K18 are closed so that the eighth capacitor C8 and the ninth capacitor C9 jointly bear the storage of the second stored voltage with the first sampling and storage unit and the second sampling and storage unit. The second stored voltage includes the offset voltage of the fully differential amplifier AMP and the negative-phase differential-mode voltage signal.

[0099] In the embodiment of the present invention, the devices that determine the amplification factor of the fully differential amplifier AMP in the voltage amplification output unit are the sixth capacitor C6, the eighth capacitor C8, the seventh capacitor C7, and the ninth capacitor C9, where C6:C8 = C7:C9 = m:1 (usually m≥1). Since the capacitance values of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 are different, it will cause the charging times to be asynchronous. Therefore, the circuit design of the embodiment of the present invention introduces the tenth capacitor C10 and the eleventh capacitor C11. The tenth capacitor C10 is in parallel with the eighth capacitor C8 during the charging stage, and the sum of the capacitance values when the tenth capacitor C10 is in parallel with the eighth capacitor C8 is exactly equal to the capacitance of the sixth capacitor C6. The purpose is to make the charging speed of the eighth capacitor C8 match that of the sixth capacitor C6. The eleventh capacitor C11 is also in parallel with the ninth capacitor C9 during the charging stage, and the sum of the capacitance values when the eleventh capacitor C11 is in parallel with the ninth capacitor C9 is exactly equal to the capacitance of the seventh capacitor C7. The purpose is to make the charging speed of the ninth capacitor C9 match that of the seventh capacitor C7. Finally, the charging times of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 can be synchronized, greatly reducing the error problem caused by the large difference in the capacitance values of the capacitors that determine the amplification factor in the conventional method, and better improving the accuracy of the circuit amplification output.

[0100] In addition, in the embodiment of the present invention, in the voltage amplification output unit 400, the fully differential amplifier AMP included therein and the cross-sampling storage module 410 that performs positive and negative cross-sampling storage amplification on the input signal under the control of the switching signal can eliminate the offset voltage Vos error of the switched-capacitor amplifier itself and improve the signal amplification accuracy. The specific principle is as follows: In the first half cycle of a switching period, the ninth switch K9 and the twelfth switch K12 are closed, and the tenth switch K10 and the eleventh switch K11 are opened. Vdm is sampled and stored in the sixth capacitor C6 and the seventh capacitor C7. At this time, the thirteenth switch K13 and the seventeenth switch K17 are closed, and the fourteenth switch K14 and the eighteenth switch K18 are opened, so that the positive-phase input terminal and the negative-phase input terminal of the fully differential amplifier AMP are connected to their respective output terminals to form a closed-loop structure, and the offset voltage Vos of the fully differential amplifier AMP itself is also stored in the sixth capacitor C6 and the seventh capacitor C7. That is, the voltage between the two plates of the capacitor is Vdm + Vos. In the second half cycle of a switching period, the ninth switch K9 and the twelfth switch K12 are opened, and the tenth switch K10 and the eleventh switch K11 are closed. -Vdm is sampled and stored in the sixth capacitor C6 and the seventh capacitor C7 (in the circuit schematic diagram of the embodiment of the present invention, it is default that the left plate of the capacitor is the positive voltage terminal). The voltage between the two plates of the capacitor is -Vdm + Vos. The thirteenth switch K13 and the seventeenth switch K17 are opened, and the fourteenth switch K14 and the eighteenth switch K18 are closed. At this time, after the charges on the sixth capacitor C6 and the seventh capacitor C7 are redistributed with the eighth capacitor C8 and the ninth capacitor C9, Vop = m*(Vdm + Vos) and Von = m*(-Vdm + Vos) can be obtained at the two output terminals of the fully differential amplifier AMP. Therefore, the voltage difference between the two output terminals of the fully differential amplifier AMP is Vod = Vop - Von = 2*m*Vdm, and the offset voltage Vos is cancelled out, leaving only the amplified differential-mode voltage Vod. Finally, based on this, the target sampling current is calculated as:

[0101]

[0102] Therefore, after the positive and negative cross-sampling storage amplification of the input signal adopted by the present invention, the offset voltage Vos of the fully differential amplifier AMP itself can be completely cancelled out at the output end, achieving the effect of completely eliminating the offset voltage Vos error of the fully differential amplifier itself and improving the signal amplification accuracy.

[0103] The specific design and working process of the fully differential amplifier in the embodiments of the present invention will be further described in detail below. As described above, since the target sampling signal is generally relatively weak and needs to be amplified by a certain multiple before better logical analysis and processing can be carried out, it is necessary to further amplify the signal Vdm = Isamp * R1 collected by the current sampling unit. Therefore, a precise amplifier needs to be designed. In the embodiments of the present invention, a fully differential amplifier is designed in the voltage amplification output unit, which can perform cross-sampling storage and amplification on the input signal under the control of a switching signal, eliminate the offset voltage Vos error of the switched-capacitor amplifier itself, and improve the signal amplification accuracy.

[0104] The input terminals of the fully differential amplifier AMP are insulated, and no charge flows into the interior of the input terminals. Therefore, the total charge of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 remains unchanged before and after the switch is switched, satisfying the principle of charge conservation. Therefore, the voltage amplification factor can be determined as: Gv = 2 * (C8 / C6) = 2 * (C9 / C7) = 2 * m.

[0105] At the same time, considering that the capacitance values of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 are different, which will cause different charging speeds. Therefore, the tenth capacitor C10 and the eleventh capacitor C11 are introduced. The tenth capacitor C10 is in parallel with the eighth capacitor C8 during the charging stage, and its purpose is to make the charging speed of the eighth capacitor C8 match that of the sixth capacitor C6. The eleventh capacitor C11 is also in parallel with the ninth capacitor C9 during the charging stage, and its purpose is to make the charging speed of the ninth capacitor C9 match that of the seventh capacitor C7. Finally, the charging times of the sixth capacitor C6 and the eighth capacitor C8, and the seventh capacitor C7 and the ninth capacitor C9 can be made the same, greatly reducing the error problem caused by the asynchronous charging time of the conventional method and better improving the accuracy of the circuit amplification output.

[0106] Since the fully differential amplifier is used in the embodiments of the present invention, it is necessary to superimpose and transfer the input voltage signal Vdm to the common-mode level Vcm (the input terminal voltage of the fully differential amplifier must be within a certain voltage range. If the input signal is too low or too high, the input-stage differential pair transistors will be in an abnormal amplification state. Usually, the common-mode level Vcm = 0.5 * Vcc, that is, the midpoint voltage of the power supply). Therefore, in the embodiments of the present invention, the input voltage signal Vdm is translated to the common-mode level Vcm through the voltage conversion unit, so that the positive-phase terminal voltage Vp in the voltage conversion unit = Vcm + 0.5 * Vdm; the negative-phase terminal voltage Vn in the voltage conversion unit = Vcm - 0.5 * Vdm; and Vp - Vn = Vdm. It should be understood that the embodiments of the present invention can automatically superimpose and transfer different voltage signals Vdm to the common-mode level Vcm to achieve adaptive sampling.

[0107] In the embodiments of the present invention, the two circuit modules of the voltage conversion unit and the voltage amplification output unit both use switched capacitors to perform the function of charge transfer and superposition storage. Therefore, through the switch signal control unit, switch control waveforms with different frequencies are output to respectively control the operation of the two circuit modules of the voltage conversion unit and the voltage amplification output unit.

[0108] Specifically, as Figure 3 shown, the switch signal control unit 300 includes a fundamental frequency oscillator 310 and a frequency divider 320. The frequency divider 320 is electrically connected to the fundamental frequency oscillator 310. The fundamental frequency oscillator 310 is used to connect to a controller, and the controller can generate a preset frequency division control signal. The fundamental frequency oscillator 310 generates a preset frequency according to the preset frequency division control signal. The frequency divider 320 can divide the preset frequency into multiple different branches according to switch data to connect to multiple different switches in the voltage conversion unit and the voltage amplification output unit, so as to realize the control of different switches.

[0109] To sum up, for the current signal adaptive sampling current in the embodiments of the present invention, first, the current sampling unit is used to convert the target sampling current Isamp into a voltage signal Vdm = Isamp * R1. After filtering processing, it is input into the voltage conversion unit. Then, after the voltage conversion unit performs level superposition processing on Vdm, it is input into the voltage amplification output unit for amplification processing. Finally, the amplified voltage signal Vod = Vop - Vop is output. Finally, the target sampling current is calculated as:

[0110] Next, in combination with Figure 4 the switch waveforms shown, the principle that the voltage amplification output unit in the embodiments of the present invention can amplify the differential mode voltage signal based on eliminating the offset error will be described in detail.

[0111] Connect the input and output ends of the target sampling current Isamp to both ends of the first resistor R1 respectively. The current signal adaptive sampling circuit provided by the present invention will automatically perform sampling and filtering processing on the target sampling current Isamp and then input it into the voltage conversion unit for level superposition transfer. Then, it is amplified and output by the fully differential amplifier AMP in the voltage amplification output unit. Finally, the amplified differential mode voltage Vod = Vop - Von is obtained, and thus the target sampling current Isamp = K * Vod is deduced. Therefore, it can be clearly seen that this circuit has both extremely high current sampling accuracy and the characteristics of stable performance, simple structure, and strong operability.

[0112] Specifically, as Figure 3As shown, in the signal sampling and amplification process of the circuit of the present invention, it can not only automatically eliminate the offset error Vos caused by the asymmetry of components in the circuit, but also accurately amplify and output the sampling signal. The specific working principle is deduced and analyzed in detail by mathematical formulas as follows:

[0113] Let the offset voltage be Vos, the capacitance ratio coefficient of the sixth capacitor C6 to the eighth capacitor C8 be m, the capacitance ratio coefficient of the seventh capacitor C7 to the ninth capacitor C9 be m, the voltage at the positive terminal of the voltage conversion unit be Vp, the voltage at the negative terminal be Vn, the voltage at the positive input terminal of the fully differential amplifier AMP be Vpin, the voltage at the negative input terminal be Vnin, the voltage at the positive output terminal of the fully differential amplifier AMP be Vop, the voltage at the negative output terminal be Von, the sampling resistor be the first resistor R1, and the target sampling current be Isamp.

[0114] For the current signal adaptive sampling circuit provided by the present invention, its switch signal control waveform diagram is as Figure 4 shown. When K9, K12, K13, and K17 are closed, the total charge on C6 and C8 is:

[0115] Q1 = (Vp - Vop) * C6 + (Vcm - Vop) * C8, (1)

[0116] When K9, K12, K13, and K17 are closed, the total charge on C7 and C9 is:

[0117] Q2 = (Vn - Von) * C7 + (Vcm - Von) * C9, (2)

[0118] At this time, due to the closing of its switch, the input terminal and the output terminal of the fully differential amplifier AMP are connected, so it can be obtained that:

[0119] Vpin = Vop, (3)

[0120] Vnin = Von, (4)

[0121] Since the connection mode of this fully differential amplifier AMP is a closed-loop negative feedback structure, the fully differential amplifier AMP operates in the linear region. At the same time, considering the existence of the offset voltage Vos introduced by the asymmetry of its circuit components, according to the principles of "virtual short" and "virtual open", its offset voltage Vos can be obtained as:

[0122] Vos = Vpin - Vnin = Vop - Von, (5)

[0123] When K10, K11, K14, and K18 are closed, the total charge on C6 and C8 is:

[0124] Q11 = (Vn - Vpin) * C6 + (Vop - Vpin) * C8, (6)

[0125] When K10, K11, K14, and K18 are closed, the total charge on C7 and C9 is:

[0126] Q21 = (Vp - Vnin) * C7 + (Von - Vnin) * C9, (7)

[0127] Since the input terminals of the fully differential amplifier AMP are insulated gate input terminals made of silicon dioxide material and there is no current path, it can be ensured that the total charge on capacitors C6 and C8, C7 and C9 remains unchanged before and after the switch is toggled. Therefore, according to the principle of charge conservation, we have:

[0128] Q1 = Q11, (8)

[0129] Q2 = Q21, (9)

[0130] Substituting the above equations (1), (2), (6), and (7) into equations (8) and (9) respectively, we get:

[0131] (Vp - Vop) * C6 + (Vcm - Vop) * C8 = (Vn - Vpin) * C6 + (Vop - Vpin) * C8, (10)

[0132] (Vn - Von) * C7 + (Vcm - Von) * C9 = (Vp - Vnin) * C7 + (Von - Vnin) * C9, (11)

[0133] Since C6 = C7 = m * C8 = m * C9 = m * C and substituting it into the above equations (10) and (11), we get:

[0134] (Vp - Vop) * m + (Vcm - Vop) = (Vn - Vpin) * m + (Vop - Vpin), (12)

[0135] (Vn - Von) * m + (Vcm - Von) = (Vp - Vnin) * m + (Von - Vnin), (13)

[0136] Further simplifying the above equations (12) and (13), we get:

[0137] m * Vp - (m + 1) * Vop + Vm = m * Vn - (m + 1) * Vpin + Vop, (14)

[0138] m * Vn - (m + 1) * Von + Vm = m * Vp - (m + 1) * Vnin + Von, (15)

[0139] Subtracting the left and right sides of the above equations (14) and (15) respectively gives:

[0140] m*(Vp - Vn) - (m + 1)*(Vop - Von) = m*(Vn - Vp) - (m + 1)*(Vpin - Vin) + (Vop - Von), (16)

[0141] Substituting the above equation (5) into (16) and simplifying gives:

[0142] (Vop - Von) - (m + 1)*Vos - m*(Vp - Vn) = m*(Vp - Vn) - (m + 1)*Vos, (17)

[0143] Further simplifying the above equation (17) gives:

[0144] Vop - Von = 2*m*(Vp - Vn), (18)

[0145] Since Vp - Vn = Vdm = Isamp*R1, and substituting it into the above equation (18) gives:

[0146] Vop - Von = 2*m*Vdm = 2*m*Isamp*R1, (19)

[0147] Also, since Vod = Vop - Von, and substituting it into the above equation (19) gives:

[0148] Vod = Vop - Von = 2*m*Vdm = 2*m*Isamp*R1, (20)

[0149] From equation (20), it can be transformed to:

[0150]

[0151] Let The sampling current Isamp can be obtained as:

[0152] Isamp = K*Vod. (22)

[0153] From the formulas (17) and (18) derived above, it can be clearly seen that the offset voltage Vos in the current signal adaptive sampling circuit of the present invention is completely cancelled out after being processed by the voltage amplification output unit operation. Therefore, the present invention can completely eliminate the offset error caused by the asymmetry of components in the circuit.

[0154] In the embodiment of the present invention, the output terminal voltage difference Vod of the fully differential amplifier AMP is Vod = Vop - Von = 2*n*(Vp - Vn) = 2*m*Vdm = 2*m*Isamp*R1, where Isamp is the target sampling current.

[0155] Therefore, by measuring the voltage Vop at the positive output terminal of the fully differential amplifier AMP and then measuring the voltage Von at the negative output terminal of the fully differential amplifier AMP, the voltage difference between these two test ports is Vod = Vop - Von. Also, since both m and R1 are known quantities, the target sampling current Isamp can be accurately calculated according to the derived formula as follows:

[0156]

[0157] Let Then Isamp = K * (Vop - Von) = K * Vod, so its coefficient K can be arbitrarily set by changing the values of m and R1.

[0158] Therefore, the current signal adaptive sampling circuit according to the embodiment of the present invention can not only automatically convert a weak current signal into a differential mode voltage signal on a common mode level and amplify and output the differential mode voltage signal through the voltage amplification output unit, but also completely eliminate the offset error caused by the asymmetry of components in the circuit. Therefore, the current signal adaptive sampling circuit provided by the present invention can sample and amplify the current signal very precisely.

[0159] It can be seen from this that the current signal adaptive sampling circuit provided by the present invention can not only automatically convert a weak current signal into a differential mode voltage signal on a common mode level and amplify and output the differential mode voltage signal through the voltage amplification output unit, but also completely eliminate the offset error caused by the asymmetry of components in the circuit. Therefore, the current signal adaptive sampling circuit provided by the present invention can sample and amplify the current signal very precisely.

[0160] In summary, when performing current sampling, by connecting the input and output terminals of the target sampling current Isamp to both ends of the first resistor R1 respectively, the current signal adaptive sampling circuit will automatically sample and filter the target current Isamp, then input it into the voltage conversion unit for level superposition and transfer, and then amplify and output it through the switched-capacitor amplifier AMP in the voltage amplification output unit. Finally, the amplified differential mode voltage Vod = Vop - Von is obtained, and thus the target sampling current Isamp = K * Vod is deduced. Therefore, the current signal adaptive sampling circuit according to the embodiment of the present invention has both extremely high current sampling accuracy and the characteristics of stable performance, simple structure, and strong operability.

[0161] Figure 5 This is an application schematic diagram of the current signal adaptive sampling current provided by the embodiment of the present invention. Combining Figure 5As shown, the current signal adaptive sampling circuit of the present invention is applied in a leakage protector device, and its purpose is to sample the leakage current signals of the live wire / neutral wire. The two ends of the current lead-out wire of the induction coil are respectively connected to the two ends of the first resistor R1 in the current sampling unit. When there is a leakage current in the live wire / neutral wire, due to the change in magnetic flux in its induction coil, a corresponding induced current Isamp will be generated. After the induced current Isamp flows through the first resistor R1, a voltage difference Vdm = Isamp * R1 will be formed across the two ends of the first resistor R1. Then, Vdm is input to the voltage conversion unit after being filtered by the first capacitor C1, the second capacitor C2, the third capacitor C3, the second resistor R2, and the third resistor R3; under the control of the switching signal control unit, the voltage conversion unit transports and superimposes the input Vdm voltage onto the common-mode level Vcm through the fourth capacitor C4 and the fifth capacitor C5. After several switching signal cycles, the voltages of the fourth capacitor C4, the fifth capacitor C5, as well as Vp and Vn finally reach a balance and stability, where Vp = Vcm + 0.5 * Vdm and Vn = Vcm - 0.5 * Vdm.

[0162] Then, the voltages Vp and Vn are input into the voltage amplification and output unit as input signals. After being amplified by the fully differential amplifier AMP with double-ended input and double-ended output, the final voltage difference Vod = Vop - Von = 2 * n * (Vp - Vn) = 2 * m * Vdm = 2 * m * Isamp * R1 is output, where Vop is the voltage at the positive-phase output terminal of the fully differential amplifier AMP, Von is the voltage at the negative-phase output terminal of the fully differential amplifier AMP, and Isamp is the target sampling current, obtaining the target sampling current

[0163] It can be clearly seen from the above embodiments that by connecting the input and output ends of the target sampling current Isamp to the two ends of the first resistor R1 respectively, the current signal adaptive sampling circuit will automatically sample and filter the target current Isamp, then input it into the voltage conversion unit for level superposition and transfer, and then be amplified and output by the fully differential amplifier AMP in the voltage amplification and output unit. Finally, the amplified differential-mode voltage Vod = Vop - Von is obtained, and thus the target sampling current Isamp = K * Vod is deduced. Therefore, the current signal adaptive sampling circuit provided by the present invention has both extremely high current sampling accuracy and the characteristics of stable performance, simple structure, and strong operability.

[0164] As another embodiment of the present invention, as Figure 6As shown in the figure, a current signal adaptive sampling system 1 is provided, which includes a controller 20 and the aforementioned current signal adaptive sampling circuit 10. The controller 20 is electrically connected to the current signal adaptive sampling circuit 10. The controller 20 is used to generate a preset frequency division control signal. The current signal adaptive sampling circuit 10 is used to generate switch control signals with different frequencies according to the preset frequency division control signal, and convert the sampled voltage signal obtained by sampling the target current according to the switch control signal into a differential mode voltage signal on a common mode voltage, and perform amplification processing on the differential mode voltage signal based on eliminating the offset voltage to obtain a voltage output signal corresponding to the current target current signal.

[0165] In an embodiment of the present invention, the controller 20 can specifically be a controller in an embedded language, such as a single-chip microcomputer, etc., which can be realized.

[0166] For the current signal adaptive sampling system provided by the present invention, the target current signal is sampled in real time by the current sampling unit, and after being converted into a differential mode voltage signal on a common mode level by the voltage conversion unit, the differential mode voltage signal is amplified by the voltage output amplification unit based on eliminating the offset voltage to obtain the final voltage output signal. This current signal adaptive sampling circuit can not only amplify the weak target current signal, but also eliminate the offset error caused by the asymmetry of components in the circuit, so as to obtain an accurate current signal sampling and amplification output result. Therefore, the current signal adaptive sampling system provided by the present invention can automatically and accurately sample and amplify the target current signal, and has a simple structure, stable performance and is easy to implement.

[0167] For the specific working principle of the current signal adaptive sampling system provided by the present invention, reference can be made to the specific description of the aforementioned current signal adaptive sampling circuit, which will not be elaborated here.

[0168] As another embodiment of the present invention, an electronic device is provided, which includes: a device to be sampled and the aforementioned current signal adaptive sampling system. The current signal adaptive sampling system is electrically connected to the device to be sampled.

[0169] In an embodiment of the present invention, the device to be sampled can be, for example, Figure 5 a leakage protector device, etc. The present invention embodiment does not limit the device to be sampled, as long as it is a device that needs to perform current sampling.

[0170] For the electronic device provided by the present invention, since the aforementioned current signal adaptive sampling system is adopted, it can automatically and accurately sample and amplify the target current signal of the device to be sampled, and has a simple structure, stable performance and is easy to implement.

[0171] It is understood that the above embodiments are merely exemplary embodiments adopted to illustrate the principles of the present invention. However, the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also regarded as the protection scope of the present invention.

Claims

1. An adaptive sampling circuit for current signals, characterized in that, Comprising: A current sampling unit, a voltage conversion unit, a switch signal control unit, and a voltage amplification output unit. The current sampling unit is electrically connected to the voltage conversion unit. The voltage amplification output unit is electrically connected to the voltage conversion unit. The switch signal control unit is electrically connected to the voltage conversion unit and the voltage amplification output unit respectively. The current sampling unit is used to sample the current target current signal and convert it into a corresponding sampled voltage signal. The switch signal control unit is used to generate switch control signals with different frequencies according to a preset frequency division control signal. The voltage conversion unit is used to convert the sampled voltage signal into a differential voltage signal on a common mode level according to the corresponding switch control signal. The voltage amplification output unit is used to perform amplification processing on the differential voltage signal based on eliminating the offset voltage according to the corresponding switch control signal, and then obtain a voltage output signal corresponding to the current target current signal. The voltage conversion unit includes: a positive-phase coupling switch unit and a negative-phase coupling switch unit. The positive-phase coupling switch unit and the negative-phase coupling switch unit are electrically connected, and both the positive-phase coupling switch unit and the negative-phase coupling switch unit are respectively connected to the current sampling unit and the voltage amplification output unit. The positive-phase coupling switch unit is used to couple half of the sampled voltage signal in the form of a positive-phase voltage on the common mode level to obtain the positive-phase differential voltage signal. The negative-phase coupling switch unit is used to couple half of the sampled voltage signal in the form of a negative-phase voltage on the common mode level to obtain the negative-phase differential voltage signal. The positive-phase coupling switch unit includes: a first switch, a second switch, a fifth switch, a sixth switch, and a fourth capacitor. One end of the series connection of the first switch and the second switch is connected to one end of the series connection of the fifth switch and the sixth switch. The other end of the series connection of the first switch and the second switch is connected to the other end of the series connection of the fifth switch and the sixth switch. The negative-phase coupling switch unit includes: a third switch, a fourth switch, a seventh switch, an eighth switch, and a fifth capacitor. One end of the series connection of the third switch and the fourth switch is connected to one end of the series connection of the seventh switch and the eighth switch. The other end of the series connection of the third switch and the fourth switch is connected to the other end of the series connection of the seventh switch and the eighth switch. One end of the fourth capacitor is connected to the series connection end between the first switch and the second switch, and the other end of the fourth capacitor is connected to the series connection end between the third switch and the fourth switch. One end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch, and the other end of the fifth capacitor is connected to the series connection end between the fifth switch and the sixth switch. One end of the series connection of the first switch and the second switch is the input end of the common mode level, and the other end of the series connection of the first switch and the second switch is the positive-phase end of the voltage conversion unit. One end of the third switch and the fourth switch connected in series is the input end of the common-mode level, and the other end of the third switch and the fourth switch connected in series is the negative phase end of the voltage conversion unit.

2. The current signal adaptive sampling circuit according to claim 1, wherein The voltage amplification output unit includes: a cross-sampling storage module and an amplification processing module. The input end of the cross-sampling storage module is connected to the output end of the voltage conversion unit, the output end of the cross-sampling storage module is connected to the input end of the amplification processing module, and the output end of the amplification processing module is the output end of the voltage amplification output unit. The cross-sampling storage module is used to perform cross-sampling storage processing on the differential-mode voltage signal in each switching cycle to obtain a cross-sampling storage result. The amplification processing module is used to perform amplification processing on the cross-sampling storage result to obtain a voltage output signal after eliminating the offset voltage.

3. The adaptive sampling circuit for current signals according to claim 2, wherein The cross-sampling storage module includes: a first sampling storage unit and a second sampling storage unit. The first sampling storage unit and the second sampling storage unit are electrically connected, and both ends of the first sampling storage unit and both ends of the second sampling storage unit are respectively connected to the output end of the voltage conversion unit and the input end of the amplification processing module. Both the first sampling storage unit and the second sampling storage unit are used to turn on one sampling storage branch of each of them in the first half cycle of each switching cycle to obtain a first storage voltage, and are used to turn on the other sampling storage branch of each of them in the second half cycle of each switching cycle to obtain a second storage voltage.

4. The current signal adaptive sampling circuit according to claim 3, wherein The amplification processing module includes: a fully differential amplifier, a positive-phase end amplification processing unit, and a negative-phase end amplification processing unit. The positive-phase end amplification processing unit is connected to the positive input end of the fully differential amplifier, the negative-phase end amplification processing unit is connected to the negative input end of the fully differential amplifier, the positive-phase output end of the fully differential amplifier is connected to the positive-phase end amplification processing unit, and the negative-phase output end of the fully differential amplifier is connected to the negative-phase end amplification processing unit. The positive-phase end amplification processing unit and the negative-phase end amplification processing unit can jointly determine the amplification factor of the fully differential amplifier under the control of the switching control signal. The positive-phase end amplification processing unit and the negative-phase end amplification processing unit can also control their respective amplification processing switch branches according to the switching control signal to cooperate with the cross-sampling storage module, so that the result of the voltage difference between the first storage voltage and the second storage voltage cancels the offset voltage of the fully differential amplifier. The fully differential amplifier is used to perform amplification processing on the differential-mode voltage signal according to the determined amplification factor to obtain a voltage output signal corresponding to the current target signal.

5. The current signal adaptive sampling circuit according to claim 4, wherein The positive-phase end amplification processing unit includes an eighth capacitor, a tenth capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, and a sixteenth switch. Both ends of the thirteenth switch are respectively connected to the positive-phase input end and the positive-phase output end of the fully differential amplifier. One end of the eighth capacitor is connected to the positive input terminal of the fully differential amplifier. The other end of the eighth capacitor is respectively connected to one end of the fourteenth switch and one end of the fifteenth switch. The other end of the fourteenth switch is connected to the positive output terminal of the fully differential amplifier. The other end of the fifteenth switch is connected to one end of the tenth capacitor. The other end of the tenth capacitor is connected to one end of the sixteenth switch. The other end of the sixteenth switch is connected to the positive output terminal of the fully differential amplifier. A common-mode level input terminal is also connected between the other end of the fifteenth switch and one end of the tenth capacitor; The negative-phase end amplification processing unit includes a ninth capacitor, an eleventh capacitor, a seventeenth switch, an eighteenth switch, a nineteenth switch, and a twentieth switch. Both ends of the seventeenth switch are respectively connected to the negative input terminal and the negative output terminal of the fully differential amplifier; One end of the ninth capacitor is connected to the negative input terminal of the fully differential amplifier. The other end of the ninth capacitor is respectively connected to one end of the eighteenth switch and one end of the nineteenth switch. The other end of the eighteenth switch is connected to the negative output terminal of the fully differential amplifier. The other end of the nineteenth switch is connected to one end of the eleventh capacitor. The other end of the eleventh capacitor is connected to one end of the twentieth switch. The other end of the twentieth switch is connected to the negative output terminal of the fully differential amplifier. A common-mode level input terminal is also connected between the other end of the nineteenth switch and one end of the eleventh capacitor; In the first half of each switching period, the thirteenth switch and the seventeenth switch are closed so that the positive input terminal and the positive output terminal of the fully differential amplifier are connected, and the negative input terminal and the negative output terminal are connected. The offset voltage of the fully differential amplifier can be stored in the first sampling and storage unit and the second sampling and storage unit to jointly form the first stored voltage with the positive-phase differential-mode voltage signal; In the second half of each switching period, the fourteenth switch and the eighteenth switch are closed so that the eighth capacitor and the ninth capacitor jointly bear the storage of the second stored voltage with the first sampling and storage unit and the second sampling and storage unit. The second stored voltage includes the offset voltage of the fully differential amplifier and the negative-phase differential-mode voltage signal.

6. The current signal adaptive sampling circuit according to claim 4, wherein The first sampling and storage unit includes: a ninth switch, a tenth switch, and a sixth capacitor. One end of the ninth switch and one end of the tenth switch are both connected to the output terminal of the voltage conversion unit. The other end of the ninth switch and the other end of the tenth switch are both connected to one end of the sixth capacitor. The other end of the sixth capacitor is connected to the positive input terminal of the fully differential amplifier; The second sampling and storage unit includes: an eleventh switch, a twelfth switch, and a seventh capacitor. One end of the eleventh switch and one end of the twelfth switch are both connected to the output terminal of the voltage conversion unit. The other end of the eleventh switch and the other end of the twelfth switch are both connected to one end of the seventh capacitor. The other end of the seventh capacitor is connected to the negative input terminal of the fully differential amplifier; In the first half of each switching period, the ninth switch and the twelfth switch are closed, and the tenth switch and the eleventh switch are opened, so that the sixth capacitor and the seventh capacitor store the first stored voltage; In the second half of each switching period, the ninth switch and the twelfth switch are opened, and the tenth switch and the eleventh switch are closed, so that the sixth capacitor and the seventh capacitor store the second stored voltage.

7. An adaptive sampling system for current signals, characterized in that, Comprising a controller and the current signal adaptive sampling circuit according to any one of claims 1 to 6, the controller is electrically connected to the current signal adaptive sampling circuit, the controller is configured to generate a preset frequency division control signal, and the current signal adaptive sampling circuit is configured to generate switching control signals of different frequencies according to the preset frequency division control signal, and convert the sampled voltage signal converted after sampling the target current according to the switching control signal into a differential voltage signal on a common mode electrical, and perform amplification processing based on eliminating the offset voltage on the differential voltage signal to obtain a voltage output signal corresponding to the current target current signal.

8. An electronic device, characterized in that, Comprising: A device to be sampled and the current signal adaptive sampling system according to claim 7, the current signal adaptive sampling system is electrically connected to the device to be sampled.

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