Systems and methods for low latency packet processing

Abstract

A system and method for low latency packet processing are disclosed. Systems and methods of processing data packets are described herein. An example network adapter may include a network interface operably coupled to a communication network and packet processing circuitry operably coupled to the network interface. The packet processing circuitry may receive a message over the network interface; retrieving, by the packet processing circuitry, a work queue element (WQE) index identifying a location of the WQE in the receive queue; determining that the message is associated with the small payload; the message is processed under the condition that the WQE is not consumed; receiving a subsequent message through the network interface; and processing the subsequent message using the WQE. In this manner, the systems and methods described herein reduce the latency of data packet processing.

Description

Technical Field

[0001] Examples of the present disclosure relate generally to data communications and, more particularly, to apparatus for interfacing between computing devices and packet data networks. Background Art

[0002] InfiniBand (IB) is a high-speed interconnect technology commonly used in high-performance computing (HPC) and data center environments. Computing devices (host processors and peripherals) are connected to the IB fabric through network adapters. To send and receive messages over the network, the network adapter can use work items called work queue elements (WQEs), regardless of the size and type of the message.

[0003] Applicants have identified a number of deficiencies and problems associated with processing data packets in an HPC data center environment due to the size and type of messages. Many of these identified problems have been addressed by developing solutions included in embodiments of the present disclosure, many examples of which are described in detail below. Summary of the invention

[0004] Systems, methods, and computer program products are provided for low-latency packet processing.

[0005] In one aspect, a network adapter is provided. The network adapter includes: a network interface operably coupled to a communication network; a packet processing circuit operably coupled to the network interface, wherein the packet processing circuit is configured to: receive a message through the network interface; retrieve a work queue element (WQE) index, the WQE index identifying the position of the WQE in a receive queue; determine that the message is associated with a small payload; process the message without consuming the WQE; receive a subsequent message through the network interface; and process the subsequent message using the WQE.

[0006] In some embodiments, subsequent messages are not associated with small payloads.

[0007] In some embodiments, the small payload comprises a data payload that does not require writing to one or more memory indexes associated with the memory.

[0008] In some embodiments, the packet processing circuit is further configured to write the message to a completion notification indicating that the message has been processed.

[0009] In some embodiments, the packet processing circuit is further configured to: determine a receive queue state associated with the receive queue prior to receiving the message; and maintain the receive queue state in response to processing the message.

[0010] In some embodiments, the message comprises an instant message.

[0011] In another aspect, a method of processing a data packet is provided. The method includes: receiving a message through a network interface; retrieving a work queue element (WQE) index, the WQE index identifying a position of the WQE in a receive queue; determining through a packet processing circuit that the message is associated with a small payload; processing the message through the packet processing circuit without consuming the WQE; receiving a subsequent message through the network interface; and processing the subsequent message through the packet processing circuit using the WQE.

[0012] In another aspect, a computer program product for processing a data packet is provided. The computer program product includes a non-transitory computer-readable medium containing code, the code being configured to cause an apparatus to: receive a message through a network interface; retrieve, through a packet processing circuit, a work queue element (WQE) index that identifies a position of the WQE in a receive queue; determine that the message is associated with a small payload; process the message through the packet processing circuit without consuming the WQE; receive a subsequent message through the network interface; and process the subsequent message through the packet processing circuit using the WQE.

[0013] The above summary is only used to summarize some illustrative examples to provide a basic understanding of certain aspects of the present disclosure. It should be understood that the embodiments described above are only examples and should not narrow the scope or spirit of the disclosure in any way. It should be appreciated that in addition to the embodiments summarized herein, the scope of the present disclosure also includes many potential embodiments, some of which will be further described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Having thus generally described the embodiments of the present disclosure, reference will now be made to the accompanying drawings. The components shown in the drawings may or may not exist in certain embodiments described herein. Some examples may include fewer (or more) components than those shown in the drawings.

[0015] Figure 1 An example data communication system according to an embodiment of the present invention is shown; and

[0016] Figure 2 A low-latency packet processing method according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0017] Overview

[0018] InfiniBand (IB) is a high-speed interconnect technology commonly used in high-performance computing (HPC) and data center environments. Computing devices (host processors and peripherals) connect to the IB fabric through network adapters, called channel adapters in IB parlance. The host processor (or host) uses a host channel adapter (HCA), while peripherals connect to the IB fabric using a target channel adapter (TCA).

[0019] A client process, such as a software application process, running on a host processor communicates with the transport layer of the IB structure by manipulating a transport service instance, called a "queue pair" (QP), which consists of a send work queue and a receive work queue (often referred to simply as a send queue and a receive queue). In order to send and receive messages on the network using a network adapter, a client can initiate a work request (WRS), which causes the driver to place a work item, called a work queue element (WQE), in the appropriate work queue (e.g., a send queue or a receive queue). For example, when a network adapter needs to receive a message, it publishes a receive description by creating a WQE and then adding the WQE to a receive queue (e.g., a shared receive queue (SRQ)). Each WQE in the receive queue may include processing parameters, such as a memory descriptor, a pointer to the location in memory where each message will be spread, and metadata that can be used to assemble a data packet containing the message. For each WQE being processed, a completion notification (e.g., a completion queue element (CQE)) can be generated, indicating that the message has been processed according to the processing parameters. Once a CQE is issued, the WQE will be considered "consumed" and the software layer expects another WQE to be reissued to the receive queue to receive another message. In some cases, a single WQE (e.g., a receive WQE) may be used multiple times to receive / distribute multiple data packets or messages before being considered "consumed".

[0020] In some cases, depending on the size and type of payload associated with the message, the data packet may not need to be spread to memory (e.g., possibly a WQ-specified buffer). An example of such a message is immediate data. Immediate data is typically a small piece of information (e.g., 32 bits or less) that is sent to the receiver along with the message to provide additional context or signal the completion of the operation. When the sender initiates a send operation using a message with a small payload, the message is contained in a WQE and sent along with the message. After the operation is completed, the receiver extracts the message and the message is available in the corresponding CQE. In some embodiments, the configuration of the communication network (e.g., a connection) may determine whether the message is available in the corresponding CQE after processing. Since the message is not spread to the data area of ​​the memory, the message does not need to consume a WQE before it is available in the CQE. Processing such a WQE (which can be arranged in a receive queue using a link list structure) may pollute the device cache and increase the latency of data packet processing.

[0021] An example of the present invention identifies messages that do not need to be spread to a data area of ​​memory (e.g., a buffer specified by a WQE), and processes such messages without requiring them to consume a WQE. Thus, an example of the present invention can maintain the state of the receive queue without making any changes, and can use the same WQE for subsequent incoming messages. In addition, the driver may be notified that the WQE is still unused, and a new WQE does not need to be issued to process subsequent incoming messages.

[0022] Although the above terminology and some examples in the following description are based on features of the IB architecture and vocabulary taken from the IB specification, similar mechanisms exist in networks and I / O devices that operate in accordance with other protocols such as Ethernet and Fibre Channel. IB terminology and features are used herein for convenience and clarity and are used herein by way of example, not by way of limitation.

[0023] Embodiments of the present invention will be described more fully below with reference to the accompanying drawings, in which some but not all embodiments are shown. In fact, the present disclosure can be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein; on the contrary, these embodiments are provided so that the present disclosure will satisfy applicable legal requirements. Where possible, any term expressed in the singular herein shall also include the plural form, and vice versa, unless expressly provided otherwise. In addition, as used herein, the terms "one" and / or "an" shall refer to "one or more", even if the phrase "one or more" is also used herein. In addition, when it is said herein that something is "based on" something else, it may also be based on one or more other things. In other words, unless expressly stated otherwise, "based on" as used herein means "based at least in part on" or "based at least in part on". The same reference numerals refer to the same elements.

[0024] As used herein, "operably coupled" may refer to a functional connection between network components to facilitate the transmission of data packets between connected components, ensuring that the transmission, reception and / or processing of data packets are accurate and timely. This connection can be achieved by direct or indirect means, such as physical wiring, wireless communication, intermediate equipment, software-based protocols, etc., and may include mechanisms for handling data packet transmission, including routing, error detection and flow control. It should also be understood that "operably coupled" as used herein means that the components can be formed integrally with each other, or they can be formed separately and coupled together. In addition, "operably coupled" means that the components can be formed directly with each other, or they can be formed with each other by one or more components located between the components that are operably coupled together. In addition, "operably coupled" may mean that the components can be detached from each other, or they are permanently coupled together. In addition, "operably coupled" may mean that the components can be electronically connected and / or fluidly connected to each other.

[0025] As used herein, "data," "content," "information," and similar terms may be used interchangeably to refer to data that can be sent, received, and / or stored in accordance with embodiments of the present disclosure. Therefore, the use of any such terms should not be viewed as limiting the spirit and scope of embodiments of the present disclosure. In addition, where a computing device is described herein as receiving data from another computing device, it should be appreciated that the data may be received directly from the other computing device or indirectly via one or more intermediate computing devices, such as, for example, one or more servers, relays, routers, network access points, base stations, hosts, etc., sometimes referred to herein as a "network." Similarly, where a computing device is described herein as sending data to another computing device, it will be appreciated that the data may be sent directly to the other computing device or indirectly via one or more intermediate computing devices, such as, for example, one or more servers, relays, routers, network access points, base stations, hosts, etc.

[0026] As used herein, "illustrative," "exemplary," and "example" are not intended to convey any qualitative assessment, but merely to convey an illustration of an example. Thus, use of any such terms should not be taken to limit the spirit and scope of embodiments of the present invention.

[0027] As used herein, "in one embodiment," "according to one embodiment," "in some embodiments," and the like generally mean that the particular feature, structure, or characteristic following the phrase may be included in at least one embodiment of the present disclosure, and may be included in more than one embodiment of the present disclosure (importantly, these phrases are not necessarily referring to the same embodiment).

[0028] Example Data Communication System

[0029] Figure 1 FIG. 1 shows a data communication system 100 according to an embodiment of the present invention. Figure 1 As shown, data communication system 100 may include a host processor in the form of a central processing unit (CPU) 102 and a host memory 104 (also referred to as system memory) connected to an appropriate bus 110, such as a PCI bus. (PCIe) bus, as is known in the art. CPU 102 may include multiple processing cores (not shown) and may perform the functions described herein under the control of program instructions in software. The software may be downloaded to system 100 in electronic form, such as over a network. Additionally or alternatively, the software may be stored in a tangible, non-transitory computer-readable storage medium, such as an optical, magnetic, or electronic memory.

[0030] A network adapter 108, such as an IB host channel adapter (HCA), can connect the data communication system 100 to the network 106. The network adapter 108 can include a network interface 114 coupled to the network 106, and a host interface 112 coupled to the CPU 102 and the memory 104 via a bus 110. A packet processing circuit 116 coupled between the network interface 114 and the host interface 112 can generate outgoing packets for transmission on the network 106, as described below, and can also process incoming packets received from the network. The host interface 112, the network interface 114, and the packet processing circuit 116 can generally include dedicated hardware logic, the details of which will be apparent to those skilled in the art after reading this specification. Alternatively or additionally, at least some of the functions of the packet processing circuit 116 can be implemented in software on a suitable programmable processor.

[0031] In some embodiments, a client process running on CPU 102 may communicate with a peer (e.g., a source host) over network 106 via network adapter 108 in a queue pair (QP) format. Each QP may include a send work queue and a receive work queue. To send a message over network 106 using network adapter 108, a client process running on CPU 102, such as a process generated by application software, may submit a work request for execution by network adapter 108. The work request may specify the message to be sent by a pointer to a location in a buffer in data area 128 of memory 104. As shown in FIG. Figure 1As shown, a driver running on the CPU 102 may process a work request to generate a WQE 122A and place the WQE 122A in a send queue (SQ) 120 in the memory 104. Each WQE 122A may include metadata 124A, such as addressing and protocol information, used by the network adapter 108 in constructing a packet header and transmitting the corresponding one or more packets. In addition, each WQE 122A may include a descriptor 126A, which indicates the actual message to be included in the packet payload. The descriptor 126A may contain a pointer to an appropriate buffer in the data area 128 of the memory 104. Alternatively, for an inline WQE where the actual message is stored within the WQE 122A itself, the driver may copy the message directly from the data area 128 to the descriptor 126A, so that the WQE 122A may include the actual message instead of a pointer to the message. As described above and further below, the driver can dynamically and automatically decide under software control when to generate an inline WQE 122A and when to use a pointer-based WQE. To do this, the driver can set a flag (usually a single bit) in the WQE 122A to indicate whether the data following the bit includes a pointer or actual inline data.

[0032] In some embodiments, the network adapter 108 may read the WQE 122A from the appropriate queue via a direct memory access (DMA) transaction on the bus 110, which may be performed by the host interface 112. The packet processing circuit 116 may parse the WQE 122A and, in particular, determine whether each WQE 122 is a pointer-based type or an inline type. In the former case, the host interface 112 may perform another bus transaction to read the message from the location indicated by the pointer in the memory 104. In the latter case, when the WQE 122A is an inline type, the additional bus transaction may not be required. The packet processing circuit 116 may then construct one or more packets containing the message and send the packets to the network 106 via the network interface 114.

[0033] Upon completion of execution of WQE 122A, packet processing circuitry 116 may write a completion report, such as a completion queue element (CQE) 132, to a designated completion queue (CQ) 130 in memory 104. Depending on the reliability requirements of the transport protocol, packet processing circuitry 116 may write CQE 132 immediately after sending the message requested by WQE 122A, or it may wait until an acknowledgement is received from the message destination. Client processes running on CPU 102 may read CQE 132 from their assigned CQ 130 and thus be able to determine that their work requests have been satisfied.

[0034] In order to receive messages over the network 106 using the network adapter 108, a driver running on the CPU 102 may prepare incoming messages by issuing receive work requests. These work requests are processed to generate WQEs 122B, which are then placed in the appropriate receive queues 121. Each WQE 122B may include metadata 124B, such as addressing and protocol information, used by the network adapter 108 in interpreting packet headers and reassembling the corresponding one or more packets. In addition, each WQE 122B may include a descriptor 126B that points to a location in memory where the incoming message is to be stored (e.g., a memory index). When the network adapter 108 detects an incoming message, it may read the WQE 122B from the receive queue 121 using a DMA transaction on the bus 110, which may be performed by the host interface 112. The packet processing circuit 116 may parse the received packet and use the information in the WQE 122B to determine the appropriate location in the data area 128 of the memory 104 for storing the incoming message. If WQE 122B contains a pointer, host interface 112 performs a bus transaction to write the incoming message to the location indicated by the pointer in memory 104. Packet processing circuitry 116 may also generate a CQE 132 indicating that the message has been received and processed according to the parameters specified in WQE 122B.

[0035] Once CQE 132 is issued, WQE 122B is considered "consumed" and the driver running on CPU 102 is expected to re-issue another WQE 122 into receive queue 121 in preparation for receiving another message. This ensures that network adapter 108 is ready to receive and process new incoming messages over network 106.

[0036] Example Method for Low-Latency Packet Processing

[0037] Figure 2 A method 200 for low-latency packet processing according to an embodiment of the present invention is shown. As shown in block 202, the method may include receiving a message via a network interface. In some embodiments, a network adapter (e.g., Figure 1 ) can receive messages from a source host. Typically, when a source host creates a message to send, it can break the message into smaller units called data packets. These data packets can then be encapsulated with an appropriate header, such as a transport layer header, which can include information such as the destination QP and other control data. Once prepared, the source host can send the message via the network (e.g., Figure 1 The network 106 shown sends the data packet to the network adapter.

[0038] As shown in block 204, the method may include retrieving a work queue element (WQE) index that identifies the location of a WQE in a receive queue. As described herein, in response to receiving a message, a network adapter typically selects the next available WQE from a receive queue by monitoring a header pointer of the receive queue (e.g., using a DMA transaction). The header pointer may be a dynamic reference that indicates the location of the next WQE to be processed in the receive queue. The WQE index of the selected WQE may be used to link the message with the WQE to ensure that the message is placed in the correct buffer location and managed correctly.

[0039] As indicated at block 206, the method may include determining that the message is associated with a small payload. In some embodiments, a small payload may refer to a data payload of 32 bytes or less in size that does not require writing to one or more memory indexes associated with a memory.

[0040] As shown in block 208, the method may include processing the message without consuming a WQE. When processing the message, the WQE identifies, in part, a specific memory index or buffer to which the message should be spread. If the message does not need to be spread to memory, the use of the WQE may be bypassed, and the message may be processed without consuming a WQE identified by the WQE index. More importantly, in response to determining that the message is associated with a small payload, the network adapter is configured to not even read the WQE in the receive queue. In response to processing the message, the network adapter may generate or issue a CQE indicating that the message has been processed.

[0041] Typically, there is a logical flow between WQE and CQE when processing a message. To process a message, a network adapter may use a WQE and may perform the requested operation, such as sending or receiving data or performing an RDMA operation. When the operation is completed, the network adapter may generate a CQE containing information about the completed operation, such as a work request ID (which is typically used to associate the CQE with the original WQE), the operation status, and any additional flags or information. The network adapter may then place the CQE in the appropriate CQ and generate an event or interrupt to notify the system that a new completion entry is available. When each message is processed using a WQE and a CQE is generated indicating that the message has been processed, there is a logical flow associating the WQE and the CQE. By processing messages without using a WQE while still generating a CQE, the correlation between the WQE and the CQE is decoupled. By decoupling the correlation between the WQE and the CQE, the queue state associated with the receive queue before receiving the message is maintained even after the message is processed because the WQE originally intended for the message is now used to process subsequent messages. In some embodiments, the CQE may include a flag or information therein indicating that the WQE is not used for a completed work request. This information allows the driver to determine that it does not need to reissue a new WQE in response to that particular CQE. In other words, based on the information provided in the CQE, the driver can efficiently manage its resources without unnecessarily allocating new WQEs when they are not needed.

[0042] As shown in block 210, the method may include receiving a subsequent message via the network interface. In some embodiments, the subsequent message may not be associated with a small payload. For example, the subsequent message may be associated with a data payload that may need to be dispersed to one or more memory indexes associated with the memory. In embodiments where the subsequent message is also associated with a small payload, the subsequent message is processed similarly to the message, i.e., without consuming a WQE. Thus, the subsequent message may refer to any subsequently received message that is not associated with a small payload.

[0043] As indicated at block 212, the method may include processing the subsequent message using the WQE. As described herein, because the WQE that was originally expected to process the message was not used to process the message, the WQE may be used to process the subsequent message.

[0044] The following is a description of embodiments of the present disclosure with reference to block diagrams and flow charts. Therefore, it should be understood that each block of the block diagram and flow chart can be implemented in the following forms: a computer program product; a completely hardware embodiment; a completely firmware embodiment; a combination of hardware, a computer program product and / or firmware; and / or an apparatus, system, computing device, computing entity, etc. that executes instructions, operations, steps, and similar terms (e.g., executable instructions, execution instructions, program codes, etc.) on a computer-readable storage medium. For example, the retrieval, loading, and execution of the code can be performed sequentially so that one instruction is retrieved, loaded, and executed at a time. In some exemplary embodiments, the retrieval, loading, and / or execution can be performed in parallel so that multiple instructions are retrieved, loaded, and / or executed together. Therefore, such an embodiment can produce a machine that performs a specific configuration of the steps or operations specified in the block diagram and flow chart. Therefore, the block diagram and flow chart diagrams support various combinations of embodiments for executing specified instructions, operations, or steps.

[0045] Many modifications and other embodiments of the invention proposed herein will occur to those skilled in the art with the benefit of the teachings given in the foregoing description and the associated drawings. Although the drawings illustrate only certain components of the methods and systems described herein, it is to be understood that various other components may also be a part of the disclosure herein. In addition, in some cases, the above method may include fewer steps, while in other cases additional steps may be included. In some cases, modifications to the steps of the above method may be performed in any order and in any combination.

[0046] Therefore, it is to be understood that the invention is not to be limited to the specific embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims.Although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.

[0047] Incorporated by Reference

[0048] To supplement the present disclosure, the present application incorporates by reference the following commonly assigned patent applications in their entirety:

[0049]

Claims

1. A network adapter, comprising: a network interface operatively coupled to a communications network; a packet processing circuit operatively coupled to the network interface, wherein the packet processing circuit is configured to: receiving a message via the network interface; Retrieve the work queue element WQE index, which identifies the position of the WQE in the receive queue; determining that the message is associated with a small payload; processing the message without consuming the WQE; receiving a subsequent message via the network interface; and The subsequent message is processed using the WQE.

2. The network adapter of claim 1, wherein the subsequent message is not associated with a small payload. 3 . The network adapter of claim 1 , wherein the small payload comprises a data payload that does not need to be written to one or more memory indexes associated with a memory.

4. The network adapter of claim 1 , wherein the packet processing circuit is further configured to: The message is written to a completion notification, indicating that the message has been processed.

5. The network adapter of claim 1 , wherein the packet processing circuit is further configured to: determining a receive queue state associated with the receive queue prior to receiving the message; and The receive queue state is maintained in response to processing the message.

6. The network adapter of claim 1, wherein the message comprises an instant message.

7. A method for processing a data packet, the method comprising: receiving messages via a network interface; Retrieve the work queue element WQE index, which identifies the position of the WQE in the receive queue; determining, by the packet processing circuitry, that the message is associated with a small payload; processing the message by the packet processing circuit without consuming the WQE; receiving a subsequent message via the network interface; and The subsequent message is processed by the packet processing circuit using the WQE. The method of claim 7 , wherein the subsequent message is not associated with a small payload.

9. The method of claim 7, wherein the small payload comprises a data payload that does not need to be written to one or more memory indexes associated with a memory.

10. The method of claim 7, wherein the method further comprises writing the message to a completion notification indicating that the message has been processed.

11. The method according to claim 7, wherein the method further comprises: determining a receive queue state associated with the receive queue prior to receiving the message; as well as The receive queue state is maintained in response to processing the message.

12. The method of claim 7, wherein the message comprises an instant message.

13. A computer program product for processing a data packet, the computer program product comprising a non-transitory computer readable medium, the non-transitory computer readable medium comprising code configured to cause an apparatus to: receiving messages via a network interface; Retrieving, by the packet processing circuit, a work queue element WQE index, the index identifying a position of the WQE in the receive queue; determining that the message is associated with a small payload; processing the message by the packet processing circuit without consuming the WQE; receiving subsequent messages via the network interface; and The subsequent message is processed by the packet processing circuit using the WQE.

14. The computer program product of claim 13, wherein the subsequent message is not associated with a small payload.

15. The computer program product of claim 13, wherein the small payload comprises a data payload that does not need to be written to one or more memory indexes associated with a memory.

16. The computer program product of claim 13, wherein the code is further configured to cause the apparatus to: The message is written to a completion notification, indicating that the message has been processed.

17. The computer program product of claim 13, wherein the code is further configured to cause the apparatus to: determining a receive queue state associated with the receive queue prior to receiving the message; and The receive queue state is maintained in response to processing the message.

18. The computer program product of claim 13, wherein the message comprises an instant message.

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