Semiconductor structure and preparation method thereof
By setting up a high -doping concentration of the first electrical type heavy doping layer by setting a high -doping concentration between the first electrical type extension layer of the hyperjacking IGBT device and the second -conductive types, forming a self -built electric field, solving the direction current density The problem of high downgrading of the hourly turnover has achieved lower diversion voltage drops and better loss.
Patent Information
- Application Number
- CN202411485228.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-23
- Publication Date
- 2025-01-21
AI Technical Summary
Existing superjunction IGBT devices are difficult to reduce the on-voltage drop when the on-current density is small.
By setting up a doping concentration between the first electrical delay area between the first electrical type and the secondary conductivity type, the first electrical type of the doping concentration is greater than the extension layer to form a self -built electric field, inhibit the single -pole conductivity mode, enhance the conductivity modulation effect.
Effectively reduce the downtime drop, and optimize the folding relationship between the pitch voltage drop and the loss loss of the SJ-IgBT device.
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Figure CN119342853A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor integrated circuit manufacturing, and in particular relates to a semiconductor structure and a preparation method thereof. Background Art
[0002] The super-junction insulated gate bipolar transistors (SJ-IGBT) in the prior art, benefiting from the charge modulation mechanism of the superjunction, have a higher drift region doping concentration than the traditional field-stop insulated gate bipolar transistors (FS-IGBT), which can significantly reduce the on-state voltage drop of the device; and due to the mutual depletion between the P column and the N column, the device can speed up the extraction of excess carriers during the shutdown process, reduce the shutdown loss, and greatly optimize the compromise relationship between the on-state voltage drop and the shutdown loss of the device.
[0003] However, the second conductive type columnar diffusion region (P column) and the second conductive type well region (P well) connected in the SJ-IGBT will exist in a unipolar conduction mode when the device conduction current density is small, and most of the second conductive type carriers (holes) injected from the collector are collected by the second conductive type columnar diffusion region (P column) and flow out from the emitter through the second conductive type well region (P well), while the first conductive type carriers (electrons) diffuse in the drift region. This will lead to a weaker conductivity modulation effect of the SJ-IGBT device and an increase in the on-state voltage drop.
[0004] Therefore, there is an urgent need for a structure or method that can reduce the on-state voltage drop of a super junction IGBT device when the on-state current density is small.
[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology part of the present application. Summary of the invention
[0006] In view of the above shortcomings of the prior art, an object of the present invention is to provide a semiconductor structure and a preparation method thereof, which are used to solve the problem in the prior art that it is difficult to reduce the on-state voltage drop of a super junction IGBT device when the on-state current density is low.
[0007] To achieve the above object, the present invention provides a semiconductor structure, the semiconductor structure comprising: a first conductivity type epitaxial layer, a second conductivity type columnar diffusion region and a first conductivity type heavily doped layer;
[0008] More than two second conductive type columnar diffusion regions are spaced apart and distributed in the first conductive type epitaxial layer; the first conductive type heavily doped layer is located at the contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, and the first conductive type doping concentration of the first conductive type heavily doped layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer.
[0009] Optionally, the thickness of the first conductivity type heavily doped layer is less than half of the minimum distance between two adjacent second conductivity type columnar diffusion regions.
[0010] Optionally, the semiconductor structure also includes a second conductivity type well region, a first conductivity type heavily doped region and a second conductivity type heavily doped region; the second conductivity type well region is located in the first conductivity type epitaxial layer and on the second conductivity type columnar diffusion region; the first conductivity type heavily doped region and the second conductivity type heavily doped region are located in the second conductivity type well region, and the second conductivity type well region is connected to the second conductivity type columnar diffusion region.
[0011] Optionally, the semiconductor structure also includes a gate, a collector and a metal interconnection layer; the gate is located on a side of the first conductive type epitaxial layer close to the second conductive type well region, and the collector is located on a side of the first conductive type epitaxial layer away from the second conductive type well region; the metal interconnection layer is electrically connected to the gate and the second conductive type heavily doped region, respectively, to lead out the electrical connection between the gate and the emitter.
[0012] Optionally, a first conductivity type buffer layer is further included between the collector and the first conductivity type epitaxial layer, and a first conductivity type doping concentration of the first conductivity type buffer layer is greater than a first conductivity type doping concentration of the first conductivity type epitaxial layer.
[0013] Optionally, the first conductivity type is N-type, and the second conductivity type is P-type.
[0014] Optionally, the first conductivity type is P type, and the second conductivity type is N type.
[0015] The present invention also provides a method for preparing a semiconductor structure, the method for preparing any one of the semiconductor structures described above, the method comprising:
[0016] Providing a first conductive type epitaxial layer, and disposing two or more spaced-apart columnar trenches on the first conductive type epitaxial layer;
[0017] The exposed inner surface of the columnar trench is covered with a heavily doped layer of the first conductivity type, wherein the first conductivity type doping concentration of the heavily doped layer of the first conductivity type is greater than the first conductivity type doping concentration of the first conductivity type epitaxial layer;
[0018] A second conductive type material is filled in the columnar trench covering the first conductive type heavily doped layer to form a second conductive type columnar diffusion region.
[0019] Optionally, the first conductive type heavily doped layer is provided by vapor phase epitaxial growth.
[0020] Optionally, the preparation method further comprises:
[0021] After forming the second conductive type columnar diffusion region, a gate is provided on one side of the first conductive type epitaxial layer close to the columnar trench;
[0022] A second conductivity type well region, a first conductivity type heavily doped region, and a second conductivity type heavily doped region are provided in a corresponding region on the second conductivity type columnar diffusion region in the first conductivity type epitaxial layer, wherein the second conductivity type well region is connected to the second conductivity type columnar diffusion region;
[0023] Disposing a collector electrode on a side of the first conductive type epitaxial layer away from the columnar trench;
[0024] A metal interconnection layer is disposed on the surfaces of the gate, the first conductive type heavily doped region, and the collector to respectively lead out electrical connections of the gate, the emitter, and the collector.
[0025] As described above, the semiconductor structure and the method for preparing the same according to the present invention have the following beneficial effects:
[0026] The present invention arranges a first conductive type heavily doped layer having a doping concentration greater than that of the first conductive type epitaxial layer at a contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, so that the first conductive type epitaxial layer and the first conductive type heavily doped layer form a self-built electric field due to the doping concentration difference, thereby suppressing the unipolar conduction mode existing when the on-current density is small, enhancing the conductivity modulation effect, and reducing the on-voltage drop;
[0027] The present invention sets the thickness of the first conductive type heavily doped layer so that the first conductive type heavily doped layer will not significantly affect the performance of the super junction structure formed by the first conductive type epitaxial layer and the second conductive type columnar diffusion region. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 It shows a schematic structural diagram of a semiconductor structure in Embodiment 1 of the present invention.
[0029] Figure 2It shows a schematic diagram of the structure of a super junction IGBT in the prior art.
[0030] Figure 3 It is a schematic structural diagram showing the arrangement of columnar grooves in step 1 of the method for preparing a semiconductor structure according to the second embodiment of the present invention.
[0031] Figure 4 It is a schematic diagram of the structure presented by providing a heavily doped layer of the first conductivity type in step 2 of the method for preparing a semiconductor structure according to the second embodiment of the present invention.
[0032] Figure 5 It is a schematic structural diagram showing the formation of a second conductivity type columnar diffusion region in step 3 of the method for preparing a semiconductor structure according to the second embodiment of the present invention.
[0033] Figure 6 It shows a schematic diagram of the structure presented by setting a second conductivity type well region, a first conductivity type heavily doped region and a second conductivity type heavily doped region, a gate and a collector in an example of step 3 of the method for preparing a semiconductor structure of the second embodiment of the present invention.
[0034] Component number description
[0035] 10. Epitaxial layer of first conductivity type; 11. Columnar trench; 12. Heavy doped layer of first conductivity type; 20. Columnar diffusion region of second conductivity type; 21. Well region of second conductivity type; 22. Heavy doped region of first conductivity type; 23. Heavy doped region of second conductivity type; 31. Gate; 32. Collector; 33. Metal interconnect layer; 34. Buffer layer of first conductivity type; 35. Gate region; 36. Gate oxide layer. DETAILED DESCRIPTION
[0036] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0037] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.
[0038] For convenience of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings.
[0039] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0040] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0041] Embodiment 1:
[0042] The present invention provides a semiconductor structure, such as Figure 1 As shown, the semiconductor structure includes: a first conductivity type epitaxial layer, a second conductivity type columnar diffusion region and a first conductivity type heavily doped layer;
[0043] More than two second conductive type columnar diffusion regions are spaced apart and distributed in the first conductive type epitaxial layer; the first conductive type heavily doped layer is located at the contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, and the first conductive type doping concentration of the first conductive type heavily doped layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer.
[0044] In the prior art, super-junction insulated gate bipolar transistors (SJ-IGBT) benefit from the charge modulation mechanism of the superjunction. Compared with the traditional field-stop insulated gate bipolar transistors (FS-IGBT), they have a higher drift region doping concentration, which can significantly reduce the on-state voltage drop of the device. In addition, due to the mutual depletion between the P column and the N column, the device can speed up the extraction of excess carriers during the shutdown process, reduce the shutdown loss, and greatly optimize the compromise relationship between the on-state voltage drop and the shutdown loss of the device. However, as Figure 2As shown in the figure, the second conductive type columnar diffusion region (P column) and the second conductive type well region (P well) connected in the SJ-IGBT will have a unipolar conduction mode when the device conduction current density is small. Most of the second conductive type carriers (holes) injected from the collector are collected by the second conductive type columnar diffusion region (P column) and flow out from the emitter through the second conductive type well region (P well), while the first conductive type carriers (electrons) diffuse in the drift region. This will lead to a weaker conductivity modulation effect of the SJ-IGBT device and an increase in the on-state voltage drop.
[0045] The present invention sets a first conductive type heavily doped layer whose first conductive type doping concentration is greater than the first conductive type doping concentration of the first conductive type epitaxial layer at the contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, so that the first conductive type epitaxial layer and the first conductive type heavily doped layer form a self-built electric field due to the existence of the doping concentration difference, thereby suppressing the unipolar conduction mode existing when the on-current density is small, avoiding that most of the second conductive type carriers injected from the collector are collected by the second conductive type columnar diffusion region and flow out from the emitter through the second conductive type well region, thereby enhancing the conductivity modulation effect, reducing the on-state voltage drop, and further optimizing the compromise relationship between the on-state voltage drop and the turn-off loss of the SJ-IGBT device.
[0046] In one embodiment, the thickness of the first conductivity type heavily doped layer is less than half of the minimum distance between two adjacent second conductivity type columnar diffusion regions.
[0047] The present invention sets the thickness of the first conductive type heavily doped layer to be less than half of the minimum distance between two adjacent second conductive type columnar diffusion regions, so that the first conductive type heavily doped layer will not be connected between two adjacent second conductive type columnar diffusion regions due to excessive thickness, thereby avoiding obvious influence on the performance of the super junction structure formed by the first conductive type epitaxial layer and the second conductive type columnar diffusion region, thereby ensuring that the device has improved conductivity modulation effect while ensuring the performance of the SJ-IGBT.
[0048] In one embodiment, Figure 1 As shown, the semiconductor structure also includes a second conductivity type well region, a first conductivity type heavily doped region and a second conductivity type heavily doped region; the second conductivity type well region is located in the first conductivity type epitaxial layer and on the second conductivity type columnar diffusion region; the first conductivity type heavily doped region and the second conductivity type heavily doped region are located in the second conductivity type well region, and the second conductivity type well region is connected to the second conductivity type columnar diffusion region.
[0049] In one embodiment, Figure 1As shown, the semiconductor structure also includes a gate, a collector and a metal interconnection layer; the gate is located on a side of the first conductive type epitaxial layer close to the second conductive type well region, and the collector is located on a side of the first conductive type epitaxial layer away from the second conductive type well region; the metal interconnection layer is electrically connected to the gate and the second conductive type heavily doped region, respectively, to lead out the electrical connection between the gate and the emitter.
[0050] In one embodiment, Figure 1 As shown, the gate includes a gate region and a gate oxide layer, and the gate oxide layer includes a surface of the gate region.
[0051] In one embodiment, Figure 1 As shown, a first conductive type buffer layer is further included between the collector and the first conductive type epitaxial layer, and the first conductive type doping concentration of the first conductive type buffer layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer.
[0052] In one embodiment, the first conductivity type is N type, and the second conductivity type is P type.
[0053] In one embodiment, the first conductivity type is P type, and the second conductivity type is N type.
[0054] Embodiment 2:
[0055] The present invention further provides a method for preparing a semiconductor structure, the method being used to prepare the semiconductor structure described in any one of the above-mentioned embodiments 1, the method comprising:
[0056] Step 1: providing a first conductive type epitaxial layer, and disposing two or more spaced-apart columnar trenches on the first conductive type epitaxial layer;
[0057] Step 2: Covering the exposed inner surface of the columnar trench with a heavily doped layer of the first conductivity type, wherein the first conductivity type doping concentration of the first conductivity type heavily doped layer is greater than the first conductivity type doping concentration of the first conductivity type epitaxial layer;
[0058] Step 3: Fill the columnar trench covering the first conductive type heavily doped layer with a second conductive type material to form a second conductive type columnar diffusion region.
[0059] The method for preparing the semiconductor structure of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that the above sequence does not strictly represent the sequence of the method for preparing the semiconductor structure protected by the present invention, and those skilled in the art may change it according to the actual preparation steps.
[0060] First, proceed to step 1, such as Figure 3As shown, a first conductive type epitaxial layer is provided, and more than two spaced-apart columnar trenches are arranged on the first conductive type epitaxial layer.
[0061] Then, proceed to step 2, such as Figure 4 As shown, the inner surface exposed on the columnar trench is covered with a first conductive type heavily doped layer, and the first conductive type doping concentration of the first conductive type heavily doped layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer.
[0062] In one embodiment, the first conductive type heavily doped layer is formed by vapor phase epitaxial growth.
[0063] Finally, proceed to step 3, such as Figure 5 As shown, a second conductive type material is filled in the columnar trench covering the first conductive type heavily doped layer to form a second conductive type columnar diffusion region.
[0064] The present invention arranges a first conductive type heavily doped layer having a first conductive type doping concentration greater than the first conductive type doping concentration of the first conductive type epitaxial layer in a columnar groove before arranging a second conductive type columnar diffusion region, so that the first conductive type heavily doped layer is located at a contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, so that the first conductive type epitaxial layer and the first conductive type heavily doped layer form a self-built electric field due to the existence of the doping concentration difference, thereby suppressing a unipolar conduction mode existing when the on-current density is small, avoiding that most of the second conductive type carriers injected from the collector are collected by the second conductive type columnar diffusion region and flow out from the emitter through the second conductive type well region, thereby enhancing the conductivity modulation effect, reducing the on-state voltage drop, and further optimizing the compromise relationship between the on-state voltage drop and the turn-off loss of the SJ-IGBT device.
[0065] In one embodiment, the preparation method further comprises:
[0066] like Figure 6 As shown, after forming the second conductive type columnar diffusion region, a gate is arranged on one side of the first conductive type epitaxial layer close to the columnar trench;
[0067] A second conductivity type well region, a first conductivity type heavily doped region, and a second conductivity type heavily doped region are provided in a corresponding region on the second conductivity type columnar diffusion region in the first conductivity type epitaxial layer, wherein the second conductivity type well region is connected to the second conductivity type columnar diffusion region;
[0068] Disposing a collector electrode on a side of the first conductive type epitaxial layer away from the columnar trench;
[0069] A metal interconnection layer is disposed on the surfaces of the gate, the first conductive type heavily doped region, and the collector to respectively lead out electrical connections of the gate, the emitter, and the collector.
[0070] In one embodiment, Figure 6 As shown, the gate includes a gate region and a gate oxide layer, and the gate oxide layer includes a surface of the gate region.
[0071] In one embodiment, Figure 6 As shown, before setting the collector, a first conductive type buffer layer is set on a side of the first conductive type epitaxial layer away from the columnar groove, and the first conductive type doping concentration of the first conductive type buffer layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer; and a collector is set on a side of the first conductive type buffer layer away from the columnar groove.
[0072] In summary, the semiconductor structure and preparation method thereof of the present invention can set a first conductive type heavily doped layer having a doping concentration greater than that of the first conductive type epitaxial layer at the contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, so that the first conductive type epitaxial layer and the first conductive type heavily doped layer form a self-built electric field due to the doping concentration difference, thereby suppressing the unipolar conduction mode existing when the on-current density is small, enhancing the conductivity modulation effect, and reducing the on-state voltage drop; in addition, by setting the thickness of the first conductive type heavily doped layer, the first conductive type heavily doped layer will not have a significant impact on the performance of the super junction structure formed by the first conductive type epitaxial layer and the second conductive type columnar diffusion region.
[0073] Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
[0074] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A semiconductor structure, characterized in that: The semiconductor structure comprises: a first conductive type epitaxial layer, a second conductive type columnar diffusion region and a first conductive type heavily doped layer; More than two second conductive type columnar diffusion regions are spaced apart and distributed in the first conductive type epitaxial layer; the first conductive type heavily doped layer is located at the contact interface between the first conductive type epitaxial layer and the second conductive type columnar diffusion region, and the first conductive type doping concentration of the first conductive type heavily doped layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer.
2. The semiconductor structure according to claim 1, characterized in that: The thickness of the first conductivity type heavily doped layer is less than half of the minimum distance between two adjacent second conductivity type columnar diffusion regions.
3. The semiconductor structure according to claim 1, characterized in that: The semiconductor structure also includes a second conductivity type well region, a first conductivity type heavily doped region, and a second conductivity type heavily doped region; the second conductivity type well region is located in the first conductivity type epitaxial layer and on the second conductivity type columnar diffusion region; the first conductivity type heavily doped region and the second conductivity type heavily doped region are located in the second conductivity type well region, and the second conductivity type well region is connected to the second conductivity type columnar diffusion region.
4. The semiconductor structure according to claim 3, characterized in that: The semiconductor structure also includes a gate, a collector and a metal interconnection layer; the gate is located on a side of the first conductive type epitaxial layer close to the second conductive type well region, and the collector is located on a side of the first conductive type epitaxial layer away from the second conductive type well region; the metal interconnection layer is electrically connected to the gate and the second conductive type heavily doped region, respectively, to lead out an electrical connection between the gate and the emitter.
5. The semiconductor structure according to claim 1, characterized in that: A first conductivity type buffer layer is further included between the collector and the first conductivity type epitaxial layer. The first conductivity type doping concentration of the first conductivity type buffer layer is greater than the first conductivity type doping concentration of the first conductivity type epitaxial layer.
6. The semiconductor structure according to any one of claims 1 to 5, characterized in that: The first conductivity type is N type, and the second conductivity type is P type.
7. The semiconductor structure according to any one of claims 1 to 5, characterized in that: The first conductivity type is P type, and the second conductivity type is N type.
8. A method for preparing a semiconductor structure, characterized in that: The preparation method is used to prepare the semiconductor structure according to any one of claims 1 to 7, and the preparation method comprises: Providing a first conductive type epitaxial layer, and disposing two or more columnar trenches spaced apart from each other on the first conductive type epitaxial layer; A first conductive type heavily doped layer is covered on the inner surface exposed by the columnar groove, and the first conductive type doping concentration of the first conductive type heavily doped layer is greater than the first conductive type doping concentration of the first conductive type epitaxial layer; a second conductive type material is filled in the columnar groove covering the first conductive type heavily doped layer to form a second conductive type columnar diffusion region.
9. The method for preparing a semiconductor structure according to claim 8, characterized in that: The first conductive type heavily doped layer is provided by vapor phase epitaxial growth.
10. The method for preparing a semiconductor structure according to claim 8, characterized in that: The preparation method also include:. After forming the second conductive type columnar diffusion region, a gate is provided on one side of the first conductive type epitaxial layer close to the columnar trench; A second conductivity type well region, a first conductivity type heavily doped region, and a second conductivity type heavily doped region are provided in a corresponding region on the second conductivity type columnar diffusion region in the first conductivity type epitaxial layer, wherein the second conductivity type well region is connected to the second conductivity type columnar diffusion region; Disposing a collector electrode on a side of the first conductive type epitaxial layer away from the columnar trench; A metal interconnection layer is disposed on the surfaces of the gate, the first conductive type heavily doped region, and the collector to respectively lead out electrical connections of the gate, the emitter, and the collector.