Super junction IGBT and manufacturing method thereof

Abstract

The present invention provides a superjunction IGBT and a method for manufacturing the same. The superjunction IGBT includes: a drift region; a pillar region formed within the drift region, the pillar region having a conductivity type opposite to that of the drift region; the pillar region extending along the thickness of the drift region, with multiple pillar regions arranged side by side and spaced apart within the drift region; an epitaxial layer formed on the upper surface of the drift region; a central portion of the superjunction IGBT serving as a cell region, and a peripheral portion serving as a terminal region; a gate structure formed on the portion of the epitaxial layer located in the cell region; a terminal ring region provided in the portion of the epitaxial layer located in the terminal region, the terminal ring region forming a ring around the cell region; and a conductivity type opposite to that of the epitaxial layer. The superjunction IGBT provided by the present invention improves the pressure-bearing capacity of the terminal region.

Description

Technical Field

[0001] The present application relates to a semiconductor technology, and in particular to a super junction IGBT and a method for manufacturing the same. Background Art

[0002] The insulated gate bipolar transistor (IGBT) is a power semiconductor device that combines the advantages of the metal oxide semiconductor field effect transistor (MOSFET) and the bipolar junction transistor (BJT). It features high input impedance and low conduction losses, making it ideal for use in high-voltage, high-current applications such as inverters, motor drives, and electric vehicles. The super junction IGBT (Super Junction IGBT) is a power device that combines super junction technology with the IGBT structure. By introducing P-type and N-type super junction regions within the device, it significantly reduces on-resistance and switching losses, improves high-voltage resistance, and offers significant advantages in efficiency and heat dissipation. This design makes the super junction IGBT more suitable for high-voltage, high-power, and high-efficiency applications such as motor drives, photovoltaic inverters, and electric vehicle control.

[0003] A traditional super junction IGBT such as Figure 1 As shown in the figure, 1 is the emitter metal region, 2 is the dielectric layer, 3 is the N+ emitter, 4 is the P-well region (also known as the Pwell region), 5 is the gate poly, 6 is the gate oxide layer, and 7 is the second epitaxial growth. 8 is the superjunction P column region, 9 is the N-drift region, 10 is the N+ field stop region, 11 is the P+ collector region, 12 is the collector metal, 13 is the terminal P-type main junction region, and 14 is the field oxide layer.

[0004] The voltage-withstanding capacity of the superjunction IGBT's terminal region primarily depends on the "second epitaxial layer 7 + superjunction P-pillar region 8 + N-drift region 9." In a superjunction IGBT, the N-type layer of the second epitaxial layer 7 acts as a hole-blocking layer, increasing the carrier concentration in the drift region and thereby reducing the on-state voltage drop. Therefore, the concentration of this layer must be sufficiently high to fully function. However, this also prevents the second epitaxial layer 7 from being fully depleted during device breakdown, limiting the voltage-withstanding capacity of the terminal region.

[0005] Furthermore, in the superjunction IGBT, the N-drift region 9 and the superjunction P-pillar region 8 work together to achieve charge balance. To maximize the performance advantages of the superjunction IGBT and ensure process stability, the concentration of the N-drift region 9 must be kept high. This is because a higher concentration in the N-drift region 9 increases the rate at which carriers are extracted from the superjunction region during switching, and a higher concentration also makes process control easier. This results in a rapid decay of the electric field in the N-drift region 9, further limiting the voltage-bearing capacity of the terminal region.

[0006] In summary, the secondary epitaxy 7 and N-drift region 9 have very low stress-bearing capacity, and the device's stress-bearing capacity is primarily limited by the thickness of the superjunction region 8. However, due to process and cost constraints, there is an upper limit to the thickness of the superjunction region 8. This results in the operating voltage of current superjunction IGBTs generally being below 900V, thus limiting their application range. Summary of the Invention

[0007] In order to solve one of the above technical defects, an embodiment of the present application provides a super junction IGBT and a manufacturing method thereof.

[0008] According to a first aspect of an embodiment of the present application, a super junction IGBT is provided, comprising:

[0009] A drift region; a column region is formed in the drift region, wherein the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region;

[0010] An epitaxial layer is formed on the upper surface of the drift region; the central portion of the super junction IGBT serves as a cell region, and the peripheral portion serves as a terminal region; a gate structure is formed on the portion of the epitaxial layer located in the cell region; a terminal ring region is provided on the portion of the epitaxial layer located in the terminal region, and the terminal ring region is ring-shaped around the cell region; the conductivity type of the terminal ring region is opposite to the conductivity type of the epitaxial layer.

[0011] According to a second aspect of an embodiment of the present application, a method for manufacturing a super junction IGBT is provided, wherein a central portion of the super junction IGBT serves as a cell region and a peripheral portion serves as a terminal region; the method comprising:

[0012] forming a drift region on the substrate;

[0013] A column region is formed in the drift region; the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region;

[0014] forming an epitaxial layer on an upper surface of the drift region;

[0015] A terminal ring region is formed at a portion of the epitaxial layer located in the terminal region. The terminal ring region surrounds the cell region in a ring shape. The conductivity type of the terminal ring region is opposite to that of the epitaxial layer.

[0016] A gate structure is formed on a portion of the epitaxial layer located in the cell region.

[0017] The technical solution provided in the embodiment of the present application is as follows: a column region is formed in the drift region, and the conductivity type of the column region is opposite to the conductivity type of the drift region; the column region extends along the thickness direction of the drift region, and multiple column regions are arranged side by side and at intervals in the drift region; an epitaxial layer is formed on the upper surface of the drift region; the central part of the super junction IGBT serves as a cell region, and the peripheral part serves as a terminal region; a gate structure is formed on the portion of the epitaxial layer located in the cell region; a terminal ring region is provided on the portion of the epitaxial layer located in the terminal region, and the terminal ring region is ring-shaped around the cell region; the conductivity type of the terminal ring region is opposite to that of the epitaxial layer; the existence of the terminal ring region can make the device fully depleted during breakdown, and even if the concentration of the epitaxial layer is very high, it can still be fully depleted, thereby improving the pressure-bearing capacity of the terminal region, and further improving the breakdown voltage of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0019] Figure 1 Schematic diagram of a longitudinal cross-sectional view of a conventional super junction IGBT;

[0020] Figure 2 A schematic longitudinal cross-sectional view of a super junction IGBT provided in an embodiment of the present application;

[0021] Figure 3 A top view of a super junction IGBT provided in an embodiment of the present application;

[0022] Figure 4 for Figure 3 Magnified view of area C in the middle;

[0023] Figure 5 A flow chart of a super junction IGBT manufacturing method provided in an embodiment of the present application;

[0024] Figure 6 A schematic diagram of the structure for forming a pressure-bearing region and a drift region in the super-junction IGBT manufacturing method provided in an embodiment of the present application;

[0025] Figure 7 A schematic diagram of the structure of forming a pillar region in the super junction IGBT manufacturing method provided in an embodiment of the present application;

[0026] Figure 8 A schematic diagram of the structure of forming an epitaxial layer in the super junction IGBT manufacturing method provided in an embodiment of the present application;

[0027] Figure 9 A schematic structural diagram of a terminal ring region formed in a super junction IGBT manufacturing method provided in an embodiment of the present application;

[0028] Figure 10 A schematic diagram of the structure of forming a field oxide layer in the super junction IGBT manufacturing method provided in an embodiment of the present application;

[0029] Figure 11 A schematic structural diagram of a gate structure formed in a super junction IGBT manufacturing method provided in an embodiment of the present application;

[0030] Figure 12 This is a schematic structural diagram of forming a metal field plate and an emitter metal region in the super junction IGBT manufacturing method provided in an embodiment of the present application;

[0031] Figure 13 This is a schematic structural diagram of forming a field stop region, a collector, and a collector metal layer in the super junction IGBT manufacturing method provided in an embodiment of the present application;

[0032] Figure 14 Schematic diagram comparing the breakdown voltage of the super junction IGBT provided in an embodiment of the present application and that of traditional devices.

[0033] Reference numerals:

[0034] In the background technology:

[0035] 1-Emitter metal region; 2-Dielectric layer; 3-N+ emitter; 4-P well region (also known as: Pwell region); 5-Gate Poly; 6-Gate oxide layer; 7-Second epitaxial growth; 8-Super junction P column region; 9-N-drift region; 10-N+ field stop region; 11-P+ collector region; 12-Collector metal; 13-Terminal P-type main junction region; 14-Field oxide layer.

[0036] In a specific embodiment:

[0037] 1-Emitter metal region; 2-Dielectric layer; 3-N+ emitter; 4-Well region; 5-Gate; 6-Gate oxide layer; 7-Epitaxial layer; 8-Pillar region; 9-Drift region; 10-Field stop region; 11-Collector; 12-Collector metal layer; 13-Terminal ring region; 14-Field oxide layer; 15-Metal field plate; 16-Bearing region;

[0038] 21-cellular region; 22-terminal region. DETAILED DESCRIPTION

[0039] In order to make the technical solutions and advantages of the embodiments of the present application more clearly understood, the exemplary embodiments of the present application are further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, and are not an exhaustive list of all the embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other unless they conflict.

[0040] This embodiment provides a super junction IGBT with a relatively high operating voltage.

[0041] like Figures 2 to 4 As shown, the super junction IGBT provided by this embodiment includes: a drift region 9 and an epitaxial layer 7. The drift region 9 is formed on a substrate, such as a silicon substrate. The epitaxial layer 7 is formed on the upper surface of the drift region 9.

[0042] A stud region 8 is formed within the drift region 9. The stud region 8 has a conductivity type opposite to that of the drift region 9. When the drift region 9 is N-type, the stud region 8 is P-type; when the drift region 9 is P-type, the stud region 8 is N-type. This embodiment uses only N-type drift regions 9 and P-type stud regions 8 as examples. The stud region 8 extends along the thickness of the drift region 9. Multiple stud regions 8 are arranged side by side and spaced apart within the drift region 9. Furthermore, a collector is formed at the end of the stud region 8 facing away from the epitaxial layer 7.

[0043] The conductivity type of the epitaxial layer 7 is the same as that of the drift region 9. In this embodiment, an N-type epitaxial layer 7 is used as an example. The doping concentration of the epitaxial layer 7 can be greater than the doping concentration of the drift region 9, less than the doping concentration of the drift region 9, or the same as the doping concentration of the drift region 9.

[0044] The central part of the super junction IGBT serves as the cell region, and the peripheral part serves as the terminal region. Figure 3 In the figure, the overlapping portion between the area where the double-headed arrow a is located and the area where the double-headed arrow b is located is used as the cell area 21, and the peripheral portion is used as the terminal area 22. Figure 4 The dotted line in the figure indicates the boundary between the cell area 21 and the terminal area 22, and the dotted line position only indicates the approximate position.

[0045] A gate structure is formed on the portion of epitaxial layer 7 located in cell region 21. The gate structure includes a well region 4 formed within and above epitaxial layer 7. For N-type epitaxial layer 7, well region 4 is P-type. A hole is formed downward from the upper surface of well region 4 and extends into epitaxial layer 7. A gate oxide layer 6 and gate 5 are sequentially formed within the hole. N+ emitter electrodes 3 are formed on either side of gate oxide layer 6, and a dielectric layer 2 is formed above N+ emitter electrode 3 and gate 5. An emitter metal region 1 is formed on the upper surface of epitaxial layer 7 and the upper surface of dielectric layer 2.

[0046] The portion of the epitaxial layer 7 located in the terminal region 22 is provided with a terminal ring region 13, which is ring-shaped around the cell region 21. The conductivity type of the terminal ring region 13 is opposite to that of the epitaxial layer 7. For an N-type epitaxial layer 7, the terminal ring region 13 is P-type.

[0047] The terminal ring region 13 can serve as a depletion region, so that the device is fully depleted during breakdown. Even if the concentration of the epitaxial layer 7 is very high, sufficient depletion can be achieved, thereby improving the pressure-bearing capacity of the terminal region and further improving the breakdown voltage of the device.

[0048] The technical solution provided in this embodiment forms a column region in the drift region, and the conductivity type of the column region is opposite to the conductivity type of the drift region; the column region extends along the thickness direction of the drift region, and multiple column regions are arranged side by side and at intervals in the drift region; an epitaxial layer is formed on the upper surface of the drift region; the central part of the super junction IGBT serves as the cell region, and the peripheral part serves as the terminal region; the portion of the epitaxial layer located in the cell region is formed with a gate structure; the portion of the epitaxial layer located in the terminal region is provided with a terminal ring region, which is ring-shaped around the cell region; the conductivity type of the terminal ring region is opposite to the conductivity type of the epitaxial layer; the existence of the terminal ring region can make the device fully depleted during breakdown, and even if the concentration of the epitaxial layer is very high, it can still be fully depleted, thereby improving the pressure-bearing capacity of the terminal region, and further improving the breakdown voltage of the device.

[0049] The number of the terminal ring region 13 can be one, two, or more. When the doping concentration of the terminal ring region 13 is low, the number of the terminal ring region 13 is one; when the doping concentration of the terminal ring region 13 is high, the number of the terminal ring region 13 is at least two, and the at least two terminal ring regions 13 are arranged at intervals.

[0050] During superjunction IGBT operation, the collector injects carriers (holes for N-channel devices) into drift region 9. This increased carrier concentration significantly reduces the on-resistance of drift region 9, effectively reducing device conduction losses. The presence of epitaxial layer 7 blocks collector-injected carriers (holes) from flowing toward the emitter, reducing device on-resistance. The higher the concentration of epitaxial layer 7, the more pronounced its blocking effect on collector-injected carriers (holes), further improving device performance. Setting the doping concentration of epitaxial layer 7 to greater than 4.5E14 significantly enhances carrier blocking.

[0051] In this embodiment, the doping concentration of the epitaxial layer 7 is set to 4.5E14~7.5E15. The epitaxial layer 7 acts as a hole blocking layer, which can increase the concentration of carriers in the drift region, thereby blocking the collector from injecting carriers, thereby reducing the on-state voltage drop. In addition, the doping concentration of the epitaxial layer 7 is less than 7.5E15. It can also enable sufficient depletion when the device breaks down, thereby improving the voltage resistance of the terminal region, which is conducive to improving the breakdown voltage of the device. Based on the above technical solution, one implementation method is: along the direction from the cell region 21 to the terminal region 22, the distance between adjacent terminal ring regions 13 gradually increases. The distance between adjacent terminal ring regions 13 close to the cell region is smaller, and the distance between adjacent terminal ring regions 13 away from the cell region is larger, which can make the electric field distribution of the device more uniform.

[0052] The width and depth of each terminal ring region 13 can be adaptively adjusted according to the performance and size of the device. In this embodiment, the depth and width of each terminal ring region 13 are the same. The terminal ring region 13 is a rounded rectangle in the device to reduce electric field concentration.

[0053] On the basis of the above technical solution, a field oxide layer 14 is formed on the upper surface of the epitaxial layer 7, and a metal field plate 15 is formed on the upper surface of the field oxide layer. Multiple metal field plates 15 are arranged at intervals, and each metal field plate 15 passes through the field oxide layer 14 and is in electrical contact with a corresponding terminal ring area 13. The metal field plate 15 can optimize the electric field on the surface of the device, block external mobile ions, and shield the charges in the external molding compound or passivation layer, thereby improving the reliability of the device. The field oxide layer 14 isolates the metal field plate 15 from the epitaxial layer 7, keeping the two insulated, and can protect the terminal area and avoid contamination of the terminal area.

[0054] Furthermore, the super-junction IGBT includes a pressure-bearing region 16 formed on the lower surface of the drift region 9. The conductivity type of the pressure-bearing region 16 is the same as that of the drift region 9. For an N-type drift region 9, the pressure-bearing region 16 is N-type. The doping concentration of the pressure-bearing region 16 is lower than that of the drift region 9, which helps fully expand the depletion region in the vertical direction of the device, thereby enhancing the device's withstand voltage capability.

[0055] In addition, an N-type field stop region 10 is formed on the lower surface of the pressure-bearing region 16 , a P-type collector 11 is formed on the lower surface of the field stop region 10 , and a collector metal layer 12 is formed on the lower surface of the collector 11 .

[0056] In the above solution, the bottom of the pillar region 8 can extend downward to be flush with the lower surface of the drift region 9, or it can maintain a certain distance from the lower surface of the drift region 9. In this embodiment, the distance between the bottom of the pillar region 8 and the lower surface of the drift region 9 is less than 12 μm, which is equivalent to the thickness of the drift region 9 below the pillar region 8 being less than 12 μm. The doping concentration of the drift region 9 is 3E14-5E15, which can improve the device's withstand voltage capability and performance, and can also make the production process more stable, which is conducive to improving the yield rate and ensuring better product consistency.

[0057] The thickness of the pressure-bearing region 16 should be greater than 15 μm, and the doping concentration of the pressure-bearing region should be less than 3E14, which can further improve the voltage resistance of the device.

[0058] On the basis of the above technical solution, this embodiment also provides a method for manufacturing a super junction IGBT, which is used to manufacture the above super junction IGBT. Figure 5 As shown, the manufacturing method includes:

[0059] Step 101: forming a drift region on a substrate.

[0060] Step 102 : forming a pillar region in the drift region; the conductivity type of the pillar region is opposite to that of the drift region; the pillar region extends along the thickness direction of the drift region, and a plurality of pillar regions are arranged side by side and at intervals in the drift region.

[0061] Step 103: forming an epitaxial layer on the upper surface of the drift region.

[0062] Step 104 : forming a terminal ring region in the portion of the epitaxial layer located in the terminal region. The terminal ring region is ring-shaped and surrounds the cell region. The conductivity type of the terminal ring region is opposite to that of the epitaxial layer.

[0063] Step 105 : forming a gate structure on the portion of the epitaxial layer located in the cell region.

[0064] In the superjunction IGBT obtained through the above steps, the presence of the terminal ring region enables the device to be fully depleted during breakdown. Even if the concentration of the epitaxial layer is very high, sufficient depletion can be achieved, thereby improving the pressure-bearing capacity of the terminal region and further improving the breakdown voltage of the device.

[0065] Based on the above solution, this embodiment provides a specific implementation method:

[0066] In the above step 101, a pressure-bearing region 16 is first formed on the silicon substrate, and the pressure-bearing region 16 can be formed by epitaxy or single crystal growth. Then, a drift region 9 is formed on the upper surface of the pressure-bearing region 16, and the drift region 9 is formed by epitaxy, as shown in FIG. Figure 6 As shown. The conductivity type of the pressure-bearing region 16 is the same as that of the drift region 9, for example, both are N-type. The doping concentration of the pressure-bearing region 16 is lower than that of the drift region 9. For example, if the doping concentration of the drift region 9 is 3E14-5E15, the doping concentration of the pressure-bearing region 16 is less than 3E14. The thickness of the pressure-bearing region 16 is greater than 15μm. The doping concentration of the pressure-bearing region 16 is lower than that of the drift region 9, which helps the device's depletion region to fully expand in the vertical direction, thereby enhancing the device's voltage withstand capability.

[0067] In the above step 102, a pillar region 8 is formed in the N-type drift region 9 by implantation epitaxy or trench epitaxy. A plurality of pillar regions 8 are arranged side by side and spaced apart, as shown in FIG. Figure 7 As shown. In this embodiment, the pillar region 8 is a P pillar, and the area between adjacent P pillars constitutes an N pillar. The P pillars and N pillars are arranged alternately and perpendicular to the surface of the drift region 9 to form a super junction structure. In this embodiment, the distance between the bottom end of the pillar region 8 and the lower surface of the drift region 9 is less than 12μm, which is equivalent to the thickness of the drift region 9 below the pillar region 8 being less than 12μm. This can improve the device's withstand voltage capability and performance, and can make the production process more stable, which is conducive to improving the yield rate and ensuring better product consistency.

[0068] In the above step 103, an epitaxial layer 7 is formed on the upper surface of the drift region 9 by epitaxial growth, as shown in FIG. Figure 8 The doping concentration of the epitaxial layer 7 can be 4.5E14 to 7.5E15. The drift region 9 can also be referred to as the first epitaxial layer, and the epitaxial layer 7 can also be referred to as the second epitaxial layer.

[0069] In the above step 104, a P-type terminal ring region 13 is formed on the epitaxial layer 7 by implantation and diffusion through a mask plate, or the terminal ring region 13 can also be formed by growing a groove in the epitaxial layer 7, such as Figure 9 shown.

[0070] In this embodiment, a plurality of terminal ring regions 13 are arranged around the cell region 21 in a ring shape, and the plurality of terminal ring regions 13 are arranged at intervals.

[0071] In one embodiment, the distance between adjacent terminal ring regions 13 gradually increases from the cell region 21 toward the terminal region 22. The distance between adjacent terminal ring regions 13 near the cell region is smaller, while the distance between adjacent terminal ring regions 13 farther from the cell region is larger, which can achieve a more uniform electric field distribution in the device. The width and depth of each terminal ring region 13 can be adaptively adjusted based on the performance and size of the device. In this embodiment, each terminal ring region 13 has the same depth and width. The terminal ring region 13 is a rounded rectangular shape within the device, which can reduce electric field concentration.

[0072] Furthermore, a field oxide layer 14 is formed on the upper surface of the epitaxial layer 7. The field oxide layer 14 can be formed by a thermal oxidation process. Then, through holes are opened in the field oxide layer 14 at positions corresponding to the terminal ring regions 13 by an etching process until the terminal ring regions 13 are exposed. Figure 10 shown.

[0073] Then, a gate structure is formed, specifically, a gate oxide layer 6, a gate 5, a well region 4, an N+ emitter 3 and a dielectric layer 2 are formed through a series of positive full processes to form a cell region 21. Figure 11 shown.

[0074] Metal field plates 15 and emitter metal regions 1 are formed on the surface of the field oxide layer 14 and in each through hole by a deposition and etching process. The metal field plates 15 are arranged at intervals, and each metal field plate 15 is in electrical contact with a corresponding terminal ring region 13. Figure 12 shown.

[0075] Afterwards, a series of backside processes are used to form the field stop region 10, the collector 11 and the collector metal layer 12, as shown in FIG. Figure 13 shown.

[0076] The super-junction IGBT obtained by the above scheme has a high voltage-bearing capability. Simulation and experimental verification show that it can withstand a voltage greater than 1200V, and can show great application value in higher voltage fields (>900V).

[0077] Furthermore, each step in the above-mentioned manufacturing method can be realized by applying the existing manufacturing process of super junction IGBT, which has good process compatibility, does not require additional preparation equipment or processes, and does not increase production costs.

[0078] like Figure 14 As shown in the figure, the horizontal axis is the breakdown voltage BV of the device, the vertical axis is the collector current IC, the solid line is the simulation curve of the traditional super junction IGBT device, the long dashed line is the simulation curve of the super junction IGBT device provided by this embodiment, and the short dashed line is the measured curve of the super junction IGBT device provided by this embodiment. Figure 14 It can be clearly seen that the pressure-bearing capacity of traditional super-junction IGBT devices is only about 1030V, while the pressure-bearing capacity of the super-junction IGBT device provided in this embodiment reaches more than 1400V in both simulation and actual measurement, and the pressure-bearing capacity is significantly better than that of traditional devices.

[0079] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0080] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0081] In this application, unless otherwise expressly specified or limited, terms such as "mounted," "connected," "connect," and "fixed" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integration; mechanical connections, electrical connections, or communication; direct connections or indirect connections through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of these terms in this application based on specific circumstances.

[0082] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0083] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A super junction IGBT, characterized in that: include: A drift region; a column region is formed in the drift region, wherein the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region; An epitaxial layer is formed on the upper surface of the drift region; the central portion of the superjunction IGBT serves as a cell region, and the peripheral portion serves as a terminal region; a gate structure is formed on the portion of the epitaxial layer located in the cell region; a terminal ring region is provided on the portion of the epitaxial layer located in the terminal region, and the terminal ring region is in the shape of a rounded rectangle surrounding the cell region; the conductivity type of the terminal ring region is opposite to that of the epitaxial layer; The pressure-bearing region is formed on the lower surface of the drift region; the conductivity type of the pressure-bearing region is the same as that of the drift region, and the doping concentration of the pressure-bearing region is lower than the doping concentration of the drift region; the thickness of the pressure-bearing region is greater than 15 μm, and the doping concentration of the pressure-bearing region is less than 3E14.

2. The super junction IGBT according to claim 1, wherein: The number of the terminal ring areas is at least two, and the at least two terminal ring areas are arranged at intervals.

3. The super junction IGBT according to claim 1, wherein: Also includes: a field oxide layer formed on the upper surface of the epitaxial layer; a metal field plate formed on the upper surface of the field oxide layer; A plurality of metal field plates are arranged at intervals, and each metal field plate passes through the field oxide layer and is in electrical contact with a corresponding terminal ring region.

4. The super junction IGBT according to claim 1, wherein: The distance between adjacent terminal ring regions gradually increases from the cellular region to the terminal region.

5. The super junction IGBT according to claim 1, wherein: The doping concentration of the epitaxial layer is: 4.5E14~7.5E15.

6. The super junction IGBT according to claim 1, wherein: The distance between the bottom end of the pillar region and the lower surface of the drift region is less than 12 μm.

7. The super junction IGBT according to any one of claims 1 to 6, characterized in that: Also includes: a field cutoff region formed on the lower surface of the pressure-bearing region; a collector formed on a lower surface of the field stop region; The collector metal layer is formed on the lower surface of the collector.

8. A method for manufacturing a super junction IGBT, characterized in that: The central portion of the super junction IGBT is used as a cell region, and the peripheral portion is used as a terminal region; the method includes: forming a drift region on a substrate, comprising: forming a pressure-bearing region on the substrate; forming a drift region on an upper surface of the pressure-bearing region; wherein the conductivity type of the pressure-bearing region is the same as that of the drift region, and the doping concentration of the pressure-bearing region is less than the doping concentration of the drift region; and wherein the thickness of the pressure-bearing region is greater than 15 μm, and the doping concentration of the pressure-bearing region is less than 3E14; A column region is formed in the drift region; the conductivity type of the column region is opposite to that of the drift region; the column region extends along the thickness direction of the drift region, and a plurality of column regions are arranged side by side and at intervals in the drift region; forming an epitaxial layer on an upper surface of the drift region; A terminal ring region is formed in the portion of the epitaxial layer located in the terminal region. The terminal ring region surrounds the cell region and is in the shape of a rounded rectangular ring. The conductivity type of the terminal ring region is opposite to that of the epitaxial layer. A gate structure is formed on a portion of the epitaxial layer located in the cell region.

9. The manufacturing method according to claim 8, characterized in that After the terminal loop is formed, it also includes: forming a field oxide layer on an upper surface of the epitaxial layer; Opening through holes at positions corresponding to the terminal ring regions in the field oxide layer until the terminal ring regions are exposed; Metal field plates are formed on the surface of the field oxide layer and in each through hole. The metal field plates are arranged at intervals, and each metal field plate is in electrical contact with a corresponding terminal ring area.

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