Method for constructing low-energy memristor

Abstract

The application discloses a method for constructing a low-energy-consumption memristor and relates to the technical field of memristor construction. The application aims to solve the problem of how to reduce the energy consumption of a two-dimensional material memristor. The application comprises the following steps: a single-layer MoS2 is deposited on a silicon wafer with a 300nm SiO2 layer by using a chemical vapor deposition method; the silicon wafer with the deposited single-layer MoS2 is placed into a vacuum annealing furnace for annealing treatment to obtain a two-dimensional MoS2 material; a photoetching process is used to pattern a new silicon wafer to preform the position of a bottom electrode, a bottom electrode of Au is evaporated on the preformed bottom electrode position by using a high-vacuum thermal evaporation method, and Cr is evaporated at the same time; a Sb2O3 thin film is evaporated on the electrode; the prepared two-dimensional MoS2 material is transferred onto the prepared Sb2O3 thin film by using a wet method, and the triangular MoS2 is etched into a strip shape by using an electron beam exposure method and an etching machine; Au is evaporated as a top electrode by using a thermal evaporation method, the device is placed into a vacuum annealing furnace for annealing, and finally, a memristor is prepared.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memristor construction, and in particular to a method for constructing a low-energy-consumption memristor. BACKGROUND

[0002] A memristor is a resistive device with memory function, and is considered as a key member of the "fourth" basic electronic element together with resistance, capacitance and inductance. The memristor has the characteristics of simulation and hysteresis, which can simulate synapses and neurons by imitating the working mechanism of organisms to realize the function of storage and calculation integration, rather than single simulation of surface characteristics, and is helpful to realize brain-like intelligence beyond limited artificial intelligence. The appearance of the memristor marks a revolutionary change in data storage and processing technology, and has an impact on advanced computing architectures such as neuromorphic computing and basic scientific research. The variable resistance of the memristor is similar to the synaptic plasticity of neural networks, which realizes the adaptive regulation function of the connection strength between neurons. Therefore, the memristor can be applied to a neuromorphic computing system as a key element for simulating biological neurons and synapses. The low energy consumption, high density and non-volatility of the memristor make it the best choice for brain-like computing, and its application in neuromorphic computing can promote the development of brain-like computer systems, and thus is expected to overcome the limitations of the von Neumann architecture.

[0003] Two-dimensional material memristors are widely studied due to their compatibility with CMOS technology, stability and other characteristics, but how to reduce the energy consumption of two-dimensional material memristors is still a key challenge. SUMMARY

[0004] The present application provides a method for constructing a low-energy-consumption memristor, which comprises the following steps:

[0005] S1: depositing a single layer of MoS2 on a silicon wafer with a 300nm SiO2 layer by chemical vapor deposition (CVD); and placing the silicon wafer with the deposited single layer of MoS2 into a vacuum annealing furnace for annealing treatment to obtain a two-dimensional MoS2 material;

[0006] S2: performing patterning on a new silicon wafer by a photolithography process to preform the position of a bottom electrode, and evaporating 30-80nm Au as the bottom electrode and simultaneously evaporating 5-15nm Cr to make the bottom electrode more stable at the preformed position of the bottom electrode by a high-vacuum thermal evaporation method;

[0007] S3: evaporating Sb2O3 on the electrode of step S2 by a high-vacuum thermal evaporation method, placing excess Sb2O3 in a tungsten boat, 3， The evaporation current is 25-35A, and the evaporation speed is ensured to be The evaporation thickness is 3-7nm to obtain an Sb2O3 thin film;

[0008] S4: transferring the two-dimensional MoS2 material prepared in step S1 onto the Sb2O3 film prepared in step S3 by a wet transfer method, transferring 1-5 layers, and then using an electron beam exposure method and an etching machine to etch the triangular MoS2 into a strip shape;

[0009] S5: evaporating 30-90 nm of Au as a top electrode by a thermal evaporation method, and placing the device in a vacuum annealing furnace at a temperature of 120-200 DEG C for 1-3 h to improve the interface contact, thereby finally preparing the memristor.

[0010] The application further provides that: in step S1, an excess of sulfur powder is placed in the tube furnace used in the chemical vapor deposition method, the temperature of the sulfur powder is 150-170 DEG C, the Ar flow rate is 140-180 sccm, the temperature of the tube furnace is raised from room temperature to 500 DEG C in 1 h, then a 2*2 cm silicon wafer is placed in the tube furnace, the temperature is raised to 780-860 DEG C in 35-45 min, O2 is introduced into the tube furnace, and the temperature is kept constant for 30-55 min, and then the tube furnace is cooled to 500 DEG C and taken out.

[0011] The application further provides that: in step S4, the wet transfer method is first to use a spin coater to spin coat the two-dimensional MoS2 material, spin coating two layers of polymethyl methacrylate (PMMA), heat the 120 DEG C hot plate for 1 min, and then cut to a size of 2*2 mm; the cut two-dimensional MoS2 material is placed in an etching solution for etching, the spin-coated PMMA film is separated from the two-dimensional MoS2 material, and a cover glass is used to fish the PMMA film into deionized water for repeated cleaning.

[0012] The application further provides that: the etching solution is prepared by mixing HF and deionized water at a ratio of 1:3.

[0013] The application further provides that: the film is cleaned 4-6 times.

[0014] The application further provides that: in step S4, SF6 gas is used in the etching process of the etching machine, the gas flow rate is 5-15 sccm, the power is 60-80 W, and the etching time is 8-12 s.

[0015] The application has the following beneficial effects:

[0016] 1、The MoS2 low-energy consumption memristor is designed and constructed by interface engineering in combination with Sb2O3, the evaporation speed is controlled to enable the MoS2 / Sb2O3 interface to have good contact, the introduction of the high dielectric constant Sb2O3 layer increases the equivalent resistance value between the electrodes, effectively reduces the working current of the memristor, meanwhile, the high dielectric constant material can better optimize the electric field distribution, promote the effective injection and migration of carriers, so that the energy consumption of the MoS2 memristor is reduced and the energy efficiency is improved. The energy consumption of the MoS2 / Sb2O3 memristor prepared by the application is reduced by an order of magnitude compared with that without the Sb2O3 layer, reaching the pJ level.

[0017] 2、The introduction of the high dielectric constant layer effectively expands the working voltage range of the MoS2 memristor, which was originally likely to cause device breakdown failure when exceeding 1V, and now is expanded to 7V, enhancing the stability and applicability of the device. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 The structure schematic diagram of the prepared memristor is shown.

[0019] Figure 2 The optical microscope diagram of the memristor is shown.

[0020] Figure 3 The I-V characteristic curve of 0.5-2V is shown.

[0021] Figure 4 The I-V cycle characteristic curve diagram of 100 times is shown.

[0022] Figure 5 The pulse voltage-current curve diagram of the memristor is shown.

[0023] Figure 6 The pulse positive voltage-current curve diagram of the memristor is shown.

[0024] Figure 7 The pulse negative voltage-current curve diagram of the memristor is shown.

[0025] Figure 8 The curve diagram of the synaptic performance of the memristor under pulse frequency is shown.

[0026] Figure 9 The curve diagram of the synaptic performance of the memristor under pulse frequency is shown.

[0027] Figure 10 The defect diagram of the synaptic performance of the memristor under pulse frequency is shown.

[0028] Figure 11 The energy consumption curve diagram of the memristor under the condition of example 1 is shown.

[0029] Figure 12The IV characteristic curve of 0.5-2.5V is shown.

[0030] Figure 13 The energy consumption curve of the memristor under the condition of example 2 is shown.

[0031] Figure 14 The energy consumption curve of the memristor under the condition of example 3 is shown.

[0032] Figure 15 The energy consumption curve of the memristor under the condition of example 4 is shown.

[0033] Figure 16 The energy consumption curve of the memristor under the condition of example 5 is shown.

[0034] Figure 17 The energy consumption curve of the memristor under the condition of example 6 is shown. DETAILED DESCRIPTION

[0035] Those skilled in the art can improve the process parameters according to the content herein. In particular, it should be pointed out that all similar replacements and changes are obvious to those skilled in the art, and they are considered to be included in the present application. The method and application of the present application have been described by the preferred embodiments, and the related personnel can modify or appropriately change and combine the method and application described herein without departing from the content, spirit and scope of the present application, to realize and apply the present application technology.

[0036] The present application provides a method for constructing a low-energy memristor, comprising the following steps:

[0037] S1: using chemical vapor deposition (CVD) to deposit a single layer of MoS2 on a silicon wafer with a 300nm SiO2 layer; placing the silicon wafer with deposited single layer of MoS2 into a vacuum annealing furnace for annealing treatment to obtain a two-dimensional MoS2 material;

[0038] S2: using photolithography process to pattern on a new silicon wafer to preform the position of the bottom electrode, and using high vacuum thermal evaporation method to evaporate 30-80nm Au as the bottom electrode at the preformed bottom electrode position, and simultaneously evaporate 5-15nm Cr to make the bottom electrode more stable;

[0039] S3: again using high vacuum thermal evaporation method to evaporate Sb2O3 on the electrode of step S2, placing excess Sb2O3 in a tungsten boat, the evaporation current is 25-35A, and the evaporation speed is The evaporation thickness is 3-7nm to obtain a Sb2O3 film;

[0040] S4: transferring the two-dimensional MoS2 material prepared in step S1 onto the Sb2O3 film layer prepared in step S3 by wet transfer, transferring 1-5 layers, and then using an electron beam exposure method and an etching machine to etch the triangular MoS2 into a strip shape;

[0041] S5: evaporating 30-90 nm Au as a top electrode by a thermal evaporation method, and placing the device into a vacuum annealing furnace at a temperature of 120-200 DEG C for 1-3 h to improve the interface contact, thereby finally preparing a memristor.

[0042] In step S1, an excess of sulfur powder is placed in a tube furnace used for chemical vapor deposition in advance, and the temperature of the sulfur powder is 150-170 DEG C. The tube furnace is raised from room temperature to 500 DEG C in an Ar flow of 140-180 sccm for 1 h. At this time, a silicon wafer with a size of 2*2 cm is placed in the tube furnace. The temperature is raised to 780-860 DEG C for 35-45 min. O2 is introduced into the tube furnace, and the temperature is kept constant for 30-55 min. Then, the silicon wafer is taken out when the tube furnace is cooled to 500 DEG C.

[0043] In step S4, the wet transfer method is as follows: first, a spin coater is used to spin coat the two-dimensional MoS2 material prepared in step 1 with two layers of polymethyl methacrylate (PMMA), and the temperature of a hot plate is 120 DEG C for 1 min. Then, the two-dimensional MoS2 material is cut into a size of 2*2 mm. The cut two-dimensional MoS2 material is placed in an etching solution for etching. After the PMMA film is separated from the two-dimensional MoS2 material, a cover glass is used to fish the film into deionized water, and the film is repeatedly washed 4-6 times.

[0044] The etching solution is prepared by mixing HF and deionized water at a ratio of 1:3.

[0045] In the etching process in step S4, SF6 gas is used, the gas flow is 5-15 sccm, the power is 60-80 W, and the etching time is 8-12 s.

[0046] Example 1

[0047] In this embodiment, a low-energy-consumption memristor is constructed by using the above method, and the specific steps are as follows:

[0048] S1: using a chemical vapor deposition method (CVD) to deposit a single-layer MoS2 on a silicon wafer with a 300 nm SiO2 layer; and placing the silicon wafer with the deposited single-layer MoS2 into a vacuum annealing furnace for annealing treatment, so as to obtain a two-dimensional MoS2 material;

[0049] S2: using a photolithography process to pattern the new silicon wafer to preform a position of a bottom electrode, and evaporating 10 nm Cr+60 nm Au as a bottom electrode on the preformed position of the bottom electrode by a high-vacuum thermal evaporation method;

[0050] S3: Reuse the method of high vacuum thermal evaporation, evaporate Sb2O3 powder on the electrode of step S2, put excess Sb2O3 powder in a tungsten boat, the evaporation current is 30 A, and the evaporation speed is ensured to be The evaporation thickness is 4 nm;

[0051] S4: Transfer the two-dimensional MoS2 material prepared in step S1 to the Sb2O3 layer prepared in step S3 by wet transfer, transfer 3 layers, and use an electron beam exposure method and an etching machine to etch to form a strip-shaped triangle MoS2;

[0052] S5: Evaporate 60 nm Au as a top electrode by using a thermal evaporation method, put the device into a vacuum annealing furnace, the temperature is 150 DEG C, and the time is 2 h, to improve the interface contact, and finally prepare a memristor.

[0053] The I-V cycle and synaptic performance of the memristor are tested by using 4200-SCS parameter analysis, and the reference Figure 1 is a schematic diagram of the finally prepared memristor structure, Figure 2 is an optical microscope of the memristor. Reference Figure 3 shows the I-V characteristic curve of 0.5V-2V, Figure 4 shows the high stability of 100 I-V cycles. Reference Figure 5 , 6 , 7 shows the synaptic performance of the device in pulse current dependence plasticity, and the device is not broken down when working at a voltage higher than 7V, which greatly expands the safe operating voltage compared with the existing 1V device, Figure 8 , 9 , 10 respectively shows the synaptic performance of the device in pulse frequency dependence plasticity and pulse number dependence plasticity, and the reference Figure 5 , 6 , 7, 8, 9, 10 proves that the memristor prepared by the application has synaptic plasticity, and shows its application potential in the synaptic field. Reference Figure 11 A single pulse with a duration of 50 μs can calculate the energy consumption at this time as 5.36 x 10 -10 J / spike, which is reduced by an order of magnitude compared with the energy consumption of nJ level when the dielectric layer Sb2O3 is not added.

[0054] Example 2

[0055] The difference between this embodiment and example 1 is only that the number of layers of two-dimensional MoS2 is 2 layers by wet transfer.

[0056] Reference Figure 12 is the I-V characteristic curve under 0.5-2.5V voltage, Figure 13For the single pulse graph with pulse duration of 50 μs, the energy consumption at this time is calculated to be 7.8 x 10 -10 J / spike.

[0057] Example 3

[0058] The difference between this example and Example 1 is only that the number of layers of two-dimensional MoS2 transferred by wet method is 1 layer.

[0059] Figure 14 For the single pulse graph with pulse duration of 50 μs, the energy consumption at this time is calculated to be 8.11 x 10 - 10 J / spike.

[0060] Example 4

[0061] The difference between this example and Example 1 is only that the number of layers of two-dimensional MoS2 transferred by wet method is 4 layers.

[0062] Figure 15 For the single pulse graph with pulse duration of 50 μs, the energy consumption at this time is calculated to be 8.46 x 10 - 10 J / spike.

[0063] Example 5

[0064] The difference between this example and Example 1 is only that the thickness of the dielectric layer Sb2O3 evaporated is 3 nm.

[0065] Figure 16 For the single pulse graph with pulse duration of 50 μs, the energy consumption at this time is calculated to be 8.67 x 10 - 10 J / spike.

[0066] Example 6

[0067] The difference between this example and Example 1 is only that the thickness of the dielectric layer Sb2O3 evaporated is 5 nm.

[0068] Figure 17 For the single pulse graph with pulse duration of 50 μs, the energy consumption at this time is calculated to be 6.54 x 10 - 10 J / spike.

[0069] To sum up, the application realizes the design and construction of MoS2 low-energy consumption memristor by interface engineering combined with Sb2O3, and the MoS2 / Sb2O3 interface has good contact by controlling the evaporation speed, the introduction of the high dielectric constant Sb2O3 layer increases the equivalent resistance value between the electrodes, effectively reduces the working current of the memristor, at the same time, the high dielectric constant material can better optimize the electric field distribution, promote the effective injection and migration of carriers, so that the energy consumption of the MoS2 memristor is reduced and the energy efficiency is improved. The energy consumption of the MoS2 / Sb2O3 memristor prepared by the application is reduced by an order of magnitude compared with that without adding the Sb2O3 layer, reaching the pJ level. The introduction of the high dielectric constant layer effectively expands the working voltage range of the MoS2 memristor, which originally may cause device breakdown failure when exceeding 1V, now expanded to 7V, enhancing the stability and applicability of the equipment.

[0070] The above only describes the preferred embodiments of the application, and it should be pointed out that for ordinary skilled persons in the art, several improvements and refinements can be made without departing from the principles of the application, and these improvements and refinements should also be within the protection scope of the application.

Claims

1. A method for constructing a low-power memristor, characterized in that: It includes the following steps: S1: A monolayer of MoS2 was deposited on a silicon wafer with a 300nm SiO2 layer using chemical vapor deposition (CVD); the silicon wafer with the deposited monolayer of MoS2 was placed in a vacuum annealing furnace for annealing to obtain a two-dimensional MoS2 material. S2: The patterning process is used to pre-determine the position of the bottom electrode on the new silicon wafer. Then, 30-80nm Au is deposited at the pre-determined position of the bottom electrode by high vacuum thermal evaporation as the bottom electrode, and 5-15nm Cr is deposited at the same time to make the bottom electrode more stable. S3: Using a high-vacuum thermal evaporation method, Sb2O3 is deposited on the electrode described in step S2, and an excess of Sb2O3 is placed in the tungsten boat. 3， The evaporation current is 25-35A, ensuring an evaporation rate of 0.05-0.15 Å / s and an evaporation thickness of 3nm-7nm to obtain Sb2O3 thin films; S4: The two-dimensional MoS2 material obtained in step S1 is transferred to the Sb2O3 film obtained in step S3 by wet transfer, 1-5 layers are transferred, and then the triangular MoS2 is etched into strips by electron beam exposure and etching machine. S5: 30-90nm Au is deposited as the top electrode using thermal evaporation. The device is then placed in a vacuum annealing furnace at a temperature of 120-200℃ for 1-3 hours to improve the interface contact and finally fabricate a memristor.

2. The method for constructing a low-power memristor according to claim 1, characterized in that: In step S1, the tube furnace used in the chemical vapor deposition method is pre-filled with excess sulfur powder at a temperature of 150-170°C. Under an atmosphere with an Ar flow rate of 140-180 sccm, the tube furnace is heated from room temperature to 500°C in 1 hour. Then, a 2×2cm silicon wafer is placed in the furnace and heated to 780-860°C after 35-45 minutes. O2 is then introduced into the tube furnace and the temperature is kept constant for 30-55 minutes. After cooling to 500°C with the tube furnace, the wafer is removed.

3. The method for constructing a low-power memristor according to claim 1, characterized in that: In step S4, the etching process uses SF6 gas with a flow rate of 5-15 sccm, a power of 60-80W, and an etching time of 8-12s.

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