Mainboard, mainboard system, server, node interconnection structure and server system

Abstract

The invention discloses a mainboard, a mainboard system, a server, a node interconnection structure and a server system, and relates to the technical field of data transmission. The first connector is located at one end of the main board, so that a processor arranged on the main board transmits data to the first connector through a bus protocol in the main board to realize data transmission between the processor and the first connector. The data transmission is directly realized from the inside of the mainboard without cable routing, and if the data is used as a second node in the node interconnection structure, the interface space of the processor is also reduced. The first connector is connected with the connector assembly through the plugging part arranged at one end of the connector assembly, so that plugging connection between the processor and the connector of the connector assembly is realized, and subsequent data can be conveniently transmitted to other equipment. The plugging part is arranged at one end of the connector assembly, pluggable connection in a plugging mode is achieved between the connector assembly and the first connector, the whole mainboard does not need to be disassembled and assembled, the connector assembly is replaced only in the plugging mode, and operation steps are simplified.

Description

Technical Field

[0001] The present invention relates to the technical field of data transmission, and in particular to a mainboard, a mainboard system, a server, a node interconnection structure and a server system. Background Art

[0002] In the node interconnection structure, the first node uses a connector assembly in the form of a male and female connector to output a cable to input to the second node installed with a server network card that complies with the Open Compute Project (OCP) interface specification, thereby realizing communication between the first node and the second node. The central processing unit (CPU) in the first node will reserve an interface for connecting the cable with the female connector to realize data transmission within the node, which will result in a messy cable connection and correspondingly large signal damage. Since the second node has the same structure as the first node, the corresponding reserved interface is not connected to other interfaces, resulting in the occupation of the CPU interface space. At the same time, the connector assembly of the male and female connectors of the first node is installed at the node in the form of a fixed structural member. If the communication cable between the first node and the second node is damaged or bent, the replacement of the male and female connectors requires the entire first node to be disassembled and replaced, which is a relatively complicated operation.

[0003] Therefore, how to save the space inside the node and simplify the assembly and disassembly operations of the connector components of the node is an urgent problem to be solved by those skilled in the art. Summary of the invention

[0004] The purpose of the present invention is to provide a mainboard, a mainboard system, a server, a node interconnection structure and a server system to solve the problem that the reserved interface of the node processor occupies a large interface space and the connector assembly and disassembly operation is complicated.

[0005] In order to solve the above technical problems, the present invention provides a mainboard, comprising a processor and a first connector;

[0006] The processor is arranged on the mainboard, and the first connector is located at one end of the mainboard and is used to receive data of the processor transmitted by a bus protocol inside the mainboard;

[0007] The first connector is connected to the connector assembly via a plug-in component disposed at one end of the connector assembly to achieve data transmission between the processor and the connector of the connector assembly.

[0008] In one aspect, the connector assembly includes a second connector and an adapter plate;

[0009] The second connector is directly connected to one end of the adapter board;

[0010] The plug-in component is arranged at the other end of the adapter plate;

[0011] The adapter board is connected to the first connector via the plug-in component.

[0012] In another aspect, the connector assembly includes a third connector;

[0013] The plug-in component is arranged at one end of the third connector;

[0014] The third connector is connected to the first connector via the plug-in component.

[0015] On the other hand, the first connector is provided with a limiting boss;

[0016] The limiting boss cooperates with the slot of the first connector, and adjacent slots are connected by the limiting boss, so as to be inserted along a preset path when the pin of the plug-in component is inserted into the slot.

[0017] On the other hand, the adapter board is provided with a reminder device and a first controller;

[0018] The reminder device is connected to the first controller;

[0019] The first controller is used to receive the link bandwidth rate sent by the first connector and transmitted to the processor; when the link bandwidth rate is lower than the preset link bandwidth rate, generate a reminder instruction and send it to the reminder device, so that the reminder device can perform work reminders according to the reminder instruction.

[0020] On the other hand, when the number of the processors does not exceed a preset number, the processors are transmitted to the first connector via a bus protocol inside the mainboard;

[0021] When the number of the processors exceeds the preset number, the slots corresponding to the external pins of the processors are connected to the plug-in component of the connector assembly; wherein the length of the plug-in component is the same as the sum of the lengths of the slots corresponding to the external pins of each processor;

[0022] Correspondingly, the multiple processors are in a master-slave relationship, the master processor and the standby processor are connected to each other, the enable signal corresponding to the connection between the slot corresponding to the external pin of the master processor and the plug-in component of the connector assembly is valid; the enable signal corresponding to the connection between the slot corresponding to the external pin of the standby processor and the plug-in component of the connector assembly is invalid;

[0023] The processor is used to receive the computing resource usage corresponding to the processor itself in the server to which it belongs;

[0024] If the computing resource usage of the main processor exceeds the preset resource usage, the main processor sends a first enable change instruction to the standby processor; so that the standby processor changes the enable signal corresponding to the plug-in component of the corresponding slot to a valid enable signal according to the first enable change instruction;

[0025] The main processor generates a second enable change instruction so as to change the enable signal corresponding to the corresponding slot being plugged into the plug-in component to an enable signal being invalid according to the second enable change instruction.

[0026] In order to solve the above technical problems, the present invention further provides a motherboard system, comprising a plurality of the above motherboards;

[0027] Multiple mainboards are connected via corresponding connector components to achieve data transmission between the mainboards.

[0028] In order to solve the above technical problem, the present invention also provides a server, including the above mainboard system.

[0029] In order to solve the above technical problems, the present invention further provides a node interconnection structure, comprising a plurality of the above servers; wherein the servers include a first server and a second server;

[0030] The first server is provided with a network card, and an interface of a fourth connector is reserved at the network card;

[0031] The second server is connected to the fourth connector of the network card of the first server through its own connector component to achieve interconnection between the first server and the second server.

[0032] In one aspect, a connector assembly of a server includes a first switch and a second controller;

[0033] The first switch is connected to the second controller;

[0034] The second controller is used to receive the data transmission volume transmitted from each second server to the first server; if the data transmission volume is less than the preset transmission volume, the first switch is controlled to close the data output of the connector component of the second server.

[0035] In order to solve the above technical problems, the present invention also provides a server system, which is composed of the above node interconnection structure.

[0036] The present invention provides a mainboard, comprising a processor and a first connector; the processor is arranged on the mainboard, and the first connector is located at one end of the mainboard and is used to receive data of the processor transmitted by a bus protocol inside the mainboard; the first connector is connected to the connector assembly through a plug-in component arranged at one end of the connector assembly to realize data transmission between the processor and the connector of the connector assembly.

[0037] The beneficial effect of the present invention is that on the one hand, the original first connector on the mainboard is used, and the first connector is located at one end of the mainboard, so that the processor set on the mainboard is transmitted to the first connector by the bus protocol inside the mainboard to realize data transmission between the processor and the first connector. If it is used as the first node in the node interconnection structure, the risk of signal damage caused by the messy cable routing caused by the conventional server internal processor connecting the reserved interface of the processor to the connector assembly through the cable connection is avoided, and data transmission is realized directly from the inside of the mainboard without cable routing. If it is used as the second node in the node interconnection structure, the interface space of the processor is also reduced. On the other hand, the first connector is connected to the connector assembly through a plug-in component set at one end of the connector assembly to realize the plug-in connection between the processor and the connector of the connector assembly, which is convenient for subsequent data transmission to other devices. In addition, compared with the conventional connector assembly of the first node using a fixed structural member installation method, a plug-in component is set at one end of the connector assembly of the present invention, and a pluggable connection is realized between the first connector. Even if the cable connecting the connector assembly to the external device is damaged, when replacing the connector assembly, there is no need to disassemble the entire mainboard, and the connector assembly is replaced only by plugging and unplugging, which simplifies the operation steps.

[0038] Secondly, the second connector is directly connected to one end of the adapter board, so that there is no additional cable or intermediate component between the two, so as to reduce signal loss and improve electrical performance. The adapter board is connected to the first connector through a plug-in component, which improves the convenience of hot plugging while supporting the second connector. The third connector is connected to the first connector through a plug-in component to realize the replacement function of the plug-in mode of the connector component. The limit boss ensures that the pins or holes are correctly aligned to avoid poor contact or damage caused by errors. Avoid inserting the connector component too deep to damage the internal terminals or circuits. After the connector component is fully inserted, additional mechanical support is provided to ensure the stability and reliability of the connection. At the same time, polarity identification is also achieved through the unique shape or position of the boss and the slot to prevent reverse insertion. The first controller is connected to the reminder device, and generates a reminder instruction based on the comparison of the current link bandwidth rate with the preset link bandwidth rate by real-time monitoring of the link bandwidth rate, and promptly reminds the current abnormal situation so that the user can handle the abnormality in time. During the signal switching process, the plug-in components of the connector assembly are directly connected to each processor. Through the monitoring method of the active and standby processors, the enable signal of the corresponding connecting plug-in component changes when the corresponding processor switches, thereby improving the accuracy of data switching and the reliability of signal processing.

[0039] In addition, the present invention also provides a mainboard system, a server, a node interconnection structure and a server system, which have the same beneficial effects as the above-mentioned mainboard. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0041] Figure 1 is a schematic diagram of a conventional upper and lower node interconnection structure;

[0042] Figure 2 A schematic diagram of the structure of a mainboard provided by an embodiment of the present invention;

[0043] Figure 3 A schematic diagram of the structure of another mainboard provided by an embodiment of the present invention;

[0044] Figure 4 A schematic diagram of a node interconnection structure provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0046] The core of the present invention is to provide a mainboard, a mainboard system, a server, a node interconnection structure and a server system to solve the problem that the reserved interface of the node processor occupies a large interface space and the connector assembly and disassembly operation is complicated.

[0047] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0048] As an innovative network card architecture, Multi-host OCP network cards support network traffic connecting multiple CPU slots without traversing the inter-process bus, and directly connect to the Peripheral Component Interconnect Express (PCIe) standard to access, optimize overall network performance and maximum throughput, maximize network data processing performance, and better meet demanding applications and market requirements. With Multi-host OCP network cards, multiple CPUs of a multi-way server can be directly connected to the network through their respective designated PCIe interfaces. Multi-host OCP network cards are highly scalable heterogeneous computing and storage platforms that interconnect multiple computing and storage nodes with the outside world through a single network card, reducing the number of switches, network cards, and network cables, and taking into account both high performance and low power consumption of network cards.

[0049] Figure 1 is a schematic diagram of a conventional upper and lower node interconnection structure, such as Figure 1 As shown, the processor 1 of the upper node is on the server motherboard 2 of the upper node, and an interface (Mini Cool Edge IO (MCIO) interface 3) is reserved to connect with the interface of the female connector 4 of the connector assembly, so as to realize the connection between the processor 1 and the female connector 4, so as to facilitate the connection with the network card 6 of the lower node through the subsequent male connector 5 to realize the interconnection with the outside world. The reserved interface of the processor 1 of the upper node is connected to the interface of the female connector 4 through a cable, resulting in the risk of signal interference and damage during wiring. At the same time, the female connector 4 is fixed to the upper node by a fixed structural member, resulting in the need to disassemble the entire upper node when replacing the female connector 4 if the cable is damaged during the interconnection process with the outside world, resulting in cumbersome operation. The server provided by the present invention can solve the above problems.

[0050] Figure 2 A schematic diagram of the structure of a mainboard provided by an embodiment of the present invention, such as Figure 2 As shown, it includes a processor 1 and a first connector 7;

[0051] The processor 1 is arranged on the mainboard 2, and the first connector 7 is located at one end of the mainboard 2, and is used to receive data of the processor 1 transmitted by the bus protocol inside the mainboard 2;

[0052] The first connector 7 is connected to the connector assembly 10 via a plug-in component 9 disposed at one end of the connector assembly 10 to achieve data transmission between the processor 1 and the connector of the connector assembly 10. Specifically, the motherboard in this embodiment can be a server motherboard or a motherboard of other hardware devices, which is not limited here and can be set according to actual conditions.

[0053] The first connector is located on the mainboard. The first connector in this embodiment uses the original connector of the mainboard, which is not used in the conventional node interconnection structure scenario and is a connector that has always existed on the mainboard. The type of the first connector in this embodiment is not limited, and it can be an OCP connector or other connectors.

[0054] The OCP connector on the motherboard is mainly used for efficient interconnection between data centers and servers. The first connector is located at one end of the motherboard. It should be noted that the first connector is fixed to the motherboard, and its fixing method can be welding or other fixing methods to achieve electrical and mechanical connection. The first connector is used to receive data from the processor transmitted by the bus protocol inside the motherboard. Here, the original data of the processor is changed from the interface cable connection method to the motherboard internal bus protocol transmission method. The bus protocol can be a PCIe bus connection or other bus protocol connection. It is not limited here, as long as it is an internal connection of the motherboard. Internal transmission of the motherboard achieves a higher data transmission rate. Due to the short distance of internal data, the signal transmission delay is low, which reduces the complexity of external cables and improves the high anti-interference of the complex cable routing of the data.

[0055] The connector assembly in this embodiment may be a part of the device on the mainboard, or a device attached to and isolated from the mainboard, which is not limited here.

[0056] The connector assembly can be specifically corresponding to the connector, or it can be a general term for the connector and the adapter. It should be noted that in addition to achieving compatibility between different protocols, the adapter is also used to support the corresponding connector, making it easier to plug and unplug the connector assembly. The type of connector in this embodiment is not limited, and can be the same as the type of the first connector, or different.

[0057] One end of the connector assembly is provided with a plug-in component, and the other end is connected to other servers or other devices to achieve interconnection. The plug-in component here can be a gold finger array, which is provided for good electrical contact and is essentially a pluggable electrical connection located at the edge of the connector assembly. It can also adopt a plug and socket method such as an RJ45 interface, and can also adopt a straight plug connector, crimping, threaded wiring, etc., which is not limited here, as long as the plug-in method between the connector assembly and the first connector is achieved.

[0058] The connector assembly is connected to the first connector by means of a plug-in connection with a plug-in component, so that the data of the first connector is connected to other servers through the connector assembly for transmission, or the data of other servers is transmitted to the processor for subsequent processing. The data transmission path formed between the processor, the first connector and the connector assembly in this embodiment improves the anti-interference performance of data transmission compared to conventional cable transmission. At the same time, the connector assembly adopts a plug-in connection of a plug-in component to avoid the complicated operation of replacing the connector assembly due to damage to the cable with other servers, and adopts a plug-in method for replacement, thereby improving the ease of operation.

[0059] The embodiment of the present invention provides a motherboard, including a processor and a first connector; the processor is arranged on the motherboard, and the first connector is located at one end of the motherboard, and is used to receive the data of the processor transmitted by the bus protocol inside the motherboard; the first connector is connected to the connector assembly through a plug-in component arranged at one end of the connector assembly to realize data transmission between the processor and the connector of the connector assembly. On the one hand, the original first connector on the motherboard is used, and the first connector is located at one end of the motherboard, so that the processor arranged on the motherboard is transmitted to the first connector by the bus protocol inside the motherboard to realize data transmission between the processor and the first connector. If it is used as the first node in the node interconnection structure, the risk of signal damage caused by the messy cable routing caused by the conventional server internal processor connecting the reserved interface of the processor to the connector assembly through the cable is avoided, and data transmission is realized directly from the inside of the motherboard without cable routing. If it is used as the second node in the node interconnection structure, the interface space of the processor is also reduced. On the other hand, the first connector is connected to the connector assembly through a plug-in component arranged at one end of the connector assembly to realize the plug-in connection between the processor and the connector of the connector assembly, which is convenient for subsequent data transmission to other devices. In addition, compared to the conventional connector assembly of the first node which adopts a fixed structural installation method, a plug-in component is provided at one end of the connector assembly of the present invention to realize a plug-in connection with the first connector. Even if the cable connecting the connector assembly to the external device is damaged, when replacing the connector assembly, there is no need to disassemble the entire mainboard, and the connector assembly can be replaced by plugging only, thereby simplifying the operation steps.

[0060] In some embodiments, the connector assembly includes a second connector and an adapter plate;

[0061] The second connector is directly connected to one end of the adapter board;

[0062] The other end of the adapter plate is provided with a plug-in component;

[0063] The adapter board is connected to the first connector via a plug-in component.

[0064] Specifically, the second connector of this embodiment may be of the same type as the first connector or may be different, and this is not limited here. The adapter board is used to support the second connector so that it is connected to the first connector by plugging, making the plugging and unplugging method more convenient. Since the interface size of the second connector is relatively small, this embodiment uses an adapter board as a supporting component. In addition, the second connector is directly connected to one end of the adapter board, and the direct connection here can be a welding method, in which the pins or terminals of the second connector are directly welded to the pads on the adapter board. It can be a surface mount method, in which the pins of the second connector are mounted on the pads of the adapter board. It can also be a through-hole method, in which the pins of the second connector are passed through the holes of the adapter board and welded from the back of the adapter board, or it can be fixed mechanically, etc. This is not limited here.

[0065] The second connector provided in this embodiment is directly connected to one end of the adapter board, so that there is no additional cable or intermediate component between the two, so as to reduce signal loss and improve electrical performance. The adapter board is connected to the first connector through a plug-in component, which improves the convenience of hot plugging while supporting the second connector.

[0066] In other embodiments, Figure 3 A schematic diagram of the structure of another motherboard provided by an embodiment of the present invention, such as Figure 3 As shown, the connector assembly 10 includes a third connector 11;

[0067] A plug-in component 9 is provided at one end of the third connector 11;

[0068] The third connector 11 is connected to the first connector 7 via the plug component 9 .

[0069] Specifically, the connector assembly in this embodiment only includes the third connector, where the third connector can be a male connector and a female connector, the first end of the female connector is connected to the male connector, and the second end of the female connector is provided with a plug component, which is directly plugged and connected to the first connector. The third connector can also be other connectors, which are not limited here.

[0070] The contact conductor of the male connector is needle-shaped and convex, while the contact conductor of the female connector is hole-shaped and concave. In the connector of the electronic device, the output end of the circuit is usually equipped with a plug, i.e., a male connector, and the input end of the circuit is equipped with a socket, i.e., a female connector. The second end of the female connector is provided with a plug-in component to connect the auxiliary first connector to the female connector.

[0071] The third connector corresponding to this embodiment is connected to the first connector through a plug-in component to achieve a plug-in replacement function of the connector assembly.

[0072] In some embodiments, the first connector is provided with a slot; wherein a plurality of rows of terminal modules are provided on the side wall of the slot; each row of terminal modules includes a plurality of terminals;

[0073] The connector assembly is contact-connected with a plurality of terminals of the first connector via a plug-in component.

[0074] Specifically, when the plug-in component is a gold finger array, the gold finger is a golden conductive contact, and the surface can be gold-plated to improve conductivity and wear resistance. During the connection process, the connector assembly needs to be inserted into the slot of the first connector to achieve contact between the gold finger of the connector assembly and the terminal of the first connector to achieve electrical connection. The first connector includes a bump or a notch for polarity. In order to ensure the correct polarity connection, an anti-reverse feature of the bump or the notch is provided to ensure that the gold finger is correctly inserted and avoid the wrong connection direction. The side wall of the slot of the first connector is provided with a plurality of rows of terminal modules, and the terminal module includes a plurality of terminals. The terminals are usually elastic metal strips, which are fixed together by an injection molding process to form a plurality of rows of terminal modules. The contact surface of the elastic contact part on the terminal for contacting the gold finger can be gold-plated to improve the reliability of the contact. The edge corresponding to the plug-in component can be beveled to ensure correct connection. The bevel is always performed on the edge of the gold finger to ensure successful connection with the device.

[0075] In addition, the width and length of the gold finger are set according to the specific standard of the first connector and are not limited here.

[0076] The terminals in the slot of the first connector provided in this embodiment are arranged so that the connector assembly contacts and connects with a plurality of terminals through plug-in components, thereby achieving electrical connection between the connector assembly and the first connector, and also achieving pluggable connection of the connector assembly.

[0077] In some embodiments, the first connector is provided with a limiting boss;

[0078] The limiting boss cooperates with the slot of the first connector, and adjacent slots are connected by the limiting boss, so as to be inserted along a preset path when the pin of the plug-in component is inserted into the slot.

[0079] Specifically, the limiting boss is a mechanical structure used to ensure that the connector assembly to which the plug-in component belongs is correctly inserted and positioned in the first connector. The limiting boss and the slot are used in conjunction with each other, and a limiting boss is included between every two slots, that is, the two slots are connected by the limiting boss to ensure that the pins of the plug-in component are inserted into the slot according to a preset path.

[0080] The limiting boss provided in this embodiment ensures that the pins or holes are correctly aligned to avoid poor contact or damage caused by errors. It prevents the connector assembly from being inserted too deep to damage the internal terminals or circuits. After the connector assembly is fully inserted, additional mechanical support is provided to ensure the stability and reliability of the connection. At the same time, the unique shape or position of the boss and the slot can also realize polarity identification to prevent reverse insertion.

[0081] In some embodiments, the limiting boss includes a first limiting boss and a second limiting boss;

[0082] The first limiting boss is connected with the slot of the first connector and is located at one end of the first connector where the slot is provided, and adjacent slots are separated by the first limiting boss;

[0083] The second limiting boss is arranged along the length of the slot of the first connector, and is used for locking the pin of the plug-in component after it is fully inserted into the slot.

[0084] Specifically, it includes a first limiting boss and a second limiting boss. The first limiting boss is located at one end of the first connector. The first limiting boss is connected to the slot. Adjacent slots are separated by the first limiting boss to provide blocking in the initial stage of the connector assembly insertion process to prevent the connector assembly from being inserted too early or at a wrong angle.

[0085] The second limiting boss can be located at the other end of the first connector or distributed along the length of the first connector. Its function is to provide additional positioning and locking after the plug-in component of the connector assembly is fully inserted, thereby preventing the connector assembly from accidentally falling off due to vibration or external force during use.

[0086] The first limiting boss and the second limiting boss in this embodiment are precisely matched with the internal structure of the slot of the first connector to ensure that the connector assembly can be smoothly inserted and correctly positioned, thereby improving reliability and stability.

[0087] In some embodiments, a reminder device and a first controller are provided on the adapter board;

[0088] The reminder device is connected to the first controller;

[0089] The first controller is used to receive the link bandwidth rate sent by the first connector and transmitted to the processor; when the link bandwidth rate is lower than the preset link bandwidth rate, a reminder instruction is generated and sent to the reminder device, so that the reminder device performs work reminder according to the reminder instruction.

[0090] Specifically, a reminder device and a first controller are provided on the adapter board, and the first controller is used to receive link bandwidth rate monitoring between the corresponding processor inside the mainboard and the first connector. When the link bandwidth rate is lower than the preset link bandwidth rate, the corresponding internal transmission situation cannot be viewed intuitively due to data transmission inside the mainboard. Therefore, it is necessary to generate a reminder instruction for the abnormal situation that the current link bandwidth rate is lower than the preset link bandwidth rate, and the reminder is performed by the reminder device.

[0091] It should be noted that the specific type and shape of the reminder device in this embodiment are not limited. It can be a light-emitting diode for display in response to a reminder instruction, such as turning red to remind. Other reminder devices can also be used, or it can be connected to the control platform of the interactive interface and displayed in real time on the screen, etc., which are not limited here.

[0092] The first controller provided in this embodiment is connected to the reminder device, and generates a reminder instruction by real-time monitoring of the link bandwidth rate, based on the comparison between the current link bandwidth rate and the preset link bandwidth rate, and promptly reminds the current abnormal situation so that the user can handle the abnormality in time.

[0093] In some embodiments, when the number of processors does not exceed a preset number, the processors are transmitted to the first connector via a bus protocol inside the mainboard;

[0094] When the number of processors exceeds the preset number, the slots corresponding to the external pins of the processors are connected to the plug-in components of the connector assembly; wherein the length of the plug-in components is the same as the sum of the lengths of the slots corresponding to the external pins of each processor;

[0095] Correspondingly, the multiple processors are in a master-slave relationship, the master processor and the standby processor are connected to each other, the enable signal corresponding to the connection between the slot corresponding to the external pin of the master processor and the plug-in component of the connector assembly is valid; the enable signal corresponding to the connection between the slot corresponding to the external pin of the standby processor and the plug-in component of the connector assembly is invalid;

[0096] The processor is used to receive the computing resource usage of its own processor corresponding to the server;

[0097] If the computing resource usage of the main processor exceeds the preset resource usage, the main processor sends a first enable change instruction to the standby processor; so that the standby processor changes the enable signal corresponding to the plug-in component of the corresponding slot to a valid enable signal according to the first enable change instruction;

[0098] The main processor generates a second enable change instruction so as to change the enable signal corresponding to the corresponding slot being plugged into the plug-in component to an enable signal being invalid according to the second enable change instruction.

[0099] Specifically, considering that there is not only one processor in the server, but also multiple processors, therefore, when the number of processors is limited, that is, the number of processors does not exceed the preset number, the processor is transmitted to the first connector through the bus protocol inside the motherboard, and the transmission is directly carried out through the internal communication of the motherboard.

[0100] If the number of processors exceeds the preset number, in order to avoid confusion in the bus protocol transmission inside the motherboard, this embodiment directly connects the slots corresponding to the external pins of the processors to the plug-in components to avoid signal interruption during data transmission. The length of the plug-in components is the same as the sum of the lengths of the slots corresponding to the external pins of each processor, so as to ensure that the slots of all processors can be completely inserted by the plug-in components.

[0101] There is a master-slave relationship between the processors inside the motherboard. By default, the master processor is used to calculate the computing resources of the server. The standby processor is in an idle state. The master processor is connected to the standby processor. When the computing resources of the master processor are occupied more, the standby processor will be used for subsequent signal processing. At this time, signal switching between the master and standby processors is required. Although the master processor and the standby processor are plugged into the plug-in component, in order to emphasize that the standby processor does not perform signal switching in the idle state, the master processor and the standby processor are connected to each other. The enable signal corresponding to the connection between the slot corresponding to the external pin of the master processor and the plug-in component of the connector assembly is valid; the enable signal corresponding to the connection between the slot corresponding to the external pin of the standby processor and the plug-in component of the connector assembly is invalid.

[0102] Only when the computing resource usage of the main processor exceeds the preset resource usage, the signal is switched, that is, the standby processor performs subsequent computing resource calculations and signal transmission. At this time, the specific switching process requires the main processor to send a first enable change instruction to the standby processor, and the standby processor changes the corresponding enable signal to a valid enable signal according to the received first enable change instruction. At this time, the main processor should be in an idle state, and it is necessary to generate a second enable change instruction to change its corresponding enable signal to an invalid enable signal.

[0103] In the signal switching process provided in this embodiment, the plug-in components of the connector assembly are directly connected to each processor. Through the monitoring method of the primary and standby processors, the enable signal of the corresponding connection plug-in component changes when the corresponding processor switches, thereby improving the accuracy of data switching and the reliability of signal processing.

[0104] Furthermore, the present invention also provides a mainboard system, comprising a plurality of mainboards;

[0105] Multiple mainboards are connected via corresponding connector components to achieve data transmission between the mainboards.

[0106] It should be noted that multiple mainboards can correspond to multiple mainboards within a server node to achieve connection between mainboards; they can correspond to one mainboard within a server node to achieve connection between mainboards of multiple servers.

[0107] In different application scenarios, the corresponding connection relationship is different. There are multiple motherboards in a server, and multiple motherboards correspond to one connector component, so as to realize data transmission between multiple motherboards in the node. If you want to connect with the motherboards in other nodes, you need to set up an additional connector component in the server, connect the connector components corresponding to the multiple motherboards with the additional connector component, so as to realize data transmission between the motherboards in other nodes.

[0108] There are multiple mainboards in a server, and each of the mainboards corresponds to a connector component. If you want to realize data transmission between the multiple mainboards inside the node, the connector components corresponding to the multiple mainboards are connected to each other; if you want to realize connection with the mainboards inside other nodes, you need to set up an additional connector component inside the server, and the connector components corresponding to the multiple mainboards are connected to the additional connector component, so as to realize data transmission between the mainboards inside other nodes.

[0109] There is one mainboard in one server. If transmission between mainboards of multiple servers is to be realized, the mainboards are connected to the corresponding connector components.

[0110] For the introduction of a motherboard system provided by the present invention, please refer to the above method embodiment, and the present invention will not be repeated here. It has the same beneficial effects as the above motherboard. Furthermore, the present invention also provides a node interconnection structure, Figure 4 A schematic diagram of a node interconnection structure provided by an embodiment of the present invention, such as Figure 4 As shown, the server 8 includes a first server 14 and a second server 13;

[0111] The first server 14 is provided with a network card 6, and an interface of a fourth connector 12 is reserved at the network card;

[0112] The second server 13 is connected to the fourth connector 12 of the network card 6 of the first server 14 through its own connector assembly 10 to achieve interconnection between the first server 14 and the second server 13 .

[0113] Specifically, the server of the present invention can be used as an upper node of the upper and lower node interconnection structure, or as a lower node, which is not limited here. At the same time, in addition to the application scenarios of the upper and lower node interconnection structure, it can also be used as a separate server, which is not limited here, and can be processed according to actual conditions, as long as the above problems can be solved.

[0114] In addition, the node interconnection structure of the present invention can be an upper and lower node interconnection structure, a left and right node interconnection structure, or a vertical node interconnection structure. The server positions corresponding to the upper and lower node interconnection structures and the left and right node interconnection structures are placed in the same plane. The vertical node interconnection structure is in a three-dimensional space, and the servers are stacked, or on the basis of the corresponding stacking method, a structure that exists in a matrix manner. Regardless of the type of node interconnection structure, the number of corresponding servers is not limited. Corresponding to the node interconnection structure, the number of the first server is one, and the number of the corresponding second server is at least one.

[0115] For the current multiple host multi-processor management and scheduling scenario, it is connected to a centralized control system through multiple hosts, where one server serves as a central control node, responsible for managing and controlling all hosts. The specific steps are to achieve multiple server sharing by internally setting up a network card. An interface for the fourth connector is reserved at the network card of one of the servers here. The fourth connector here may be the same as or different from the first connector, the second connector, and the third connector mentioned in the above embodiments, and is not limited here.

[0116] The remaining servers are connected to the interface of the fourth connector of the network card of one of the servers through their respective connector components, so as to realize the interconnection between multiple servers and realize the function of sharing the network card.

[0117] Regarding the setting of the fourth connector, it is to set the interface of the fourth connector added under different bandwidths.

[0118] The establishment process of shared resources in this embodiment is to dynamically allocate network card resources according to the remaining resource utilization of multiple servers. It can also be integrated through data loopback centralized processing and fault-tolerant switching processing.

[0119] The connection relationship between multiple servers of the node interconnection structure provided in this embodiment realizes the system connection function of multiple servers sharing one network card on the basis of solving the interface space of the processor inside each server and the plug-in and replacement of the connector component.

[0120] In some embodiments, a connector assembly of a server includes a first switch and a second controller;

[0121] The first switch is connected to the second controller;

[0122] The second controller is used to receive the data transmission volume transmitted from each second server to the first server; if the data transmission volume is less than the preset transmission volume, the first switch is controlled to close the data output of the connector component of the second server.

[0123] Specifically, if the data transmission volume during the transmission process between the servers is less than the preset transmission volume, it may correspond to the interconnection scenario between the servers that no transmission is required, and the data output of the connecting machine component can be turned off by the first switch. At this time, the work of the corresponding second servers is not affected.

[0124] The second controller in this embodiment and the first controller in the above embodiment may be of the same type or different type, and may be set according to actual conditions.

[0125] The connector component in this embodiment includes a first switch and a second controller. The connection relationship between the first switch and the second controller can be based on the situation that when there is no need for interconnection, transmission and sharing between servers, the function can be turned off by the first switch without affecting the working conditions inside each second server, thereby improving the flexibility and versatility of the system.

[0126] Furthermore, the present invention also provides a server system, which is composed of the above-mentioned node interconnection structure.

[0127] Specifically, the server system is connected to a centralized control system through multiple hosts, and uses centralized management tools for unified management and scheduling. The control system corresponding to the server system can be a central control node or a distributed control system, which is responsible for managing and controlling all hosts and providing a unified interface for administrators to operate and monitor. Corresponding to the registration of the server host, each host needs to register its own information with the control plane before joining the Multi-host system, including the Internet Protocol Address (IP) address, hardware configuration, available resources, etc. The control system will record this information and assign a unique identifier to each host. The control system performs resource scheduling and allocation based on the host's registration information and the administrator's needs. It can reasonably allocate tasks to different hosts based on the host's performance and load to achieve load balancing and optimal performance. The control system is responsible for managing the communication between hosts so that they can collaborate and share resources. It can set up virtual networks, provide virtual IP addresses for hosts, and protect the host's information through network isolation and security measures.

[0128] When a host fails or times out, the control plane can detect and run the corresponding processing. It can reallocate tasks to other normal hosts to ensure the stability and reliability of the system. In general, it is to centrally manage and schedule multiple hosts, and allocate resources and schedule tasks through the control system to improve the performance and availability of the entire system. It is widely used in distributed systems and cloud computing, and can effectively improve resource utilization and system scalability.

[0129] For an introduction to a server system provided by the present invention, please refer to the above method embodiment, which will not be described in detail herein. It has the same beneficial effects as the above node interconnection structure.

[0130] The above is a detailed introduction to a mainboard, a mainboard system, a server, a node interconnection structure and a server system provided by the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the present invention.

[0131] It should also be noted that, in this specification, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A motherboard, characterized in that: comprising a processor and a first connector; The processor is arranged on the mainboard, and the first connector is located at one end of the mainboard and is used to receive data of the processor transmitted by a bus protocol inside the mainboard; The first connector is connected to the connector assembly via a plug-in component disposed at one end of the connector assembly to achieve data transmission between the processor and the connector of the connector assembly.

2. The mainboard according to claim 1, characterized in that: The connector assembly includes a second connector and an adapter plate; The second connector is directly connected to one end of the adapter board; The plug-in component is arranged at the other end of the adapter plate; The adapter board is connected to the first connector via the plug-in component.

3. The mainboard according to claim 1, characterized in that: The connector assembly includes a third connector; The plug-in component is arranged at one end of the third connector; The third connector is connected to the first connector via the plug-in component.

4. The mainboard according to claim 2 or 3, characterized in that: The first connector is provided with a limiting boss; The limiting boss cooperates with the slot of the first connector, and adjacent slots are connected by the limiting boss, so as to be inserted along a preset path when the pin of the plug-in component is inserted into the slot.

5. The mainboard according to claim 2, characterized in that: The adapter board is provided with a reminder device and a first controller; The reminder device is connected to the first controller; The first controller is used to receive the link bandwidth rate sent by the first connector and transmitted to the processor; when the link bandwidth rate is lower than the preset link bandwidth rate, generate a reminder instruction and send it to the reminder device, so that the reminder device can perform work reminders according to the reminder instruction.

6. The mainboard according to claim 2, characterized in that: When the number of the processors does not exceed a preset number, the processors are transmitted to the first connector via a bus protocol inside the mainboard; When the number of the processors exceeds the preset number, the slots corresponding to the external pins of the processors are connected to the plug-in component of the connector assembly; wherein the length of the plug-in component is the same as the sum of the lengths of the slots corresponding to the external pins of each processor; Correspondingly, the multiple processors are in a master-slave relationship, the master processor and the standby processor are connected to each other, the enable signal corresponding to the connection between the slot corresponding to the external pin of the master processor and the plug-in component of the connector assembly is valid; the enable signal corresponding to the connection between the slot corresponding to the external pin of the standby processor and the plug-in component of the connector assembly is invalid; The processor is used to receive the computing resource usage corresponding to the processor itself in the server to which it belongs; If the computing resource usage of the main processor exceeds the preset resource usage, the main processor sends a first enable change instruction to the standby processor; so that the standby processor changes the enable signal corresponding to the plug-in component of the corresponding slot to a valid enable signal according to the first enable change instruction; The main processor generates a second enable change instruction so as to change the enable signal corresponding to the corresponding slot being plugged into the plug-in component to an enable signal being invalid according to the second enable change instruction.

7. A motherboard system, characterized in that: A mainboard comprising a plurality of mainboards according to any one of claims 1 to 6; Multiple mainboards are connected via corresponding connector components to achieve data transmission between the mainboards.

8. A server, characterized in that: Including the mainboard system described in claim 7.

9. A node interconnection structure, characterized in that: The method comprises a plurality of servers as claimed in claim 8; wherein the servers comprise a first server and a second server; The first server is provided with a network card, and an interface of a fourth connector is reserved at the network card; The second server is connected to the fourth connector of the network card of the first server through its own connector component to achieve interconnection between the first server and the second server.

10. The node interconnection structure according to claim 9, characterized in that: The connector assembly of the server includes a first switch and a second controller; The first switch is connected to the second controller; The second controller is used to receive the data transmission volume transmitted from each second server to the first server; if the data transmission volume is less than the preset transmission volume, the first switch is controlled to close the data output of the connector component of the second server.

11. A server system, characterized in that: The node interconnection structure is composed of the node interconnection structure described in claim 9 or 10.

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