Method for executing FFT (Fast Fourier Transform), processor and computing equipment

By decomposing the FFT calculation into multiple calculation stages in the processor, and using the vector operation unit and the matrix operation unit respectively for calculation, the problem of low FFT efficiency in the existing technology is solved, and a more efficient FFT calculation is achieved.

CN119356733AActive Publication Date: 2025-01-24HUAWEI TECH CO LTD +1

Patent Information

Application Number
CN202411224268.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-06
Filing Date
2023-08-29
Publication Date
2025-01-24
Estimated Expiration
2043-08-29

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Abstract

The embodiment of the invention belongs to the technical field of computing, and particularly relates to a method for executing FFT, a processor and computing equipment. The method includes a processor decomposing a fast Fourier transform (FFT) calculation into a plurality of calculations in response to an execution request of the FFT calculation of an application program. The processor sequentially executes a plurality of calculation stages, and when the target calculation stage is executed, twiddle factor calculation is executed based on the vector operation unit, and DFT calculation is executed based on the matrix operation unit. And after the execution of the plurality of calculation stages is completed, based on the execution result of the last calculation stage, determining the execution result of the FFT calculation, and returning the execution result to the application program. According to the invention, the processor can achieve the calculation of the FFT based on the vector operation unit and the matrix operation unit, and can improve the FFT calculation execution efficiency of the processor.
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Description

[0001] This application is a divisional application. The application number of the original application is 202311113216.4, and the original application date is August 29, 2023. The entire contents of the original application are incorporated into this application by reference.

[0002] This application and the Chinese application with application number 202311113216.4 both claim the priority of the Chinese patent application with application number 202310667453.9 filed on June 6, 2023 and invention name “A method for optimizing an application”, all contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of computer technology, and in particular to a method, processor and computing device for performing FFT. Background Art

[0004] Discrete Fourier Transform (DFT) is a commonly used technology in the computer field, which is used to convert discrete time domain data and discrete frequency domain data. Generally, when performing DFT, Fast Fourier Transform (FFT) technology is used to improve processing efficiency.

[0005] In the related art, FFT can be implemented by a processor with a scalar operation unit and / or a vector operation unit, that is, FFT can be implemented by scalar operation and / or vector operation. However, the efficiency of implementing FFT by scalar operation and / or vector operation is still not high. Summary of the invention

[0006] The embodiment of the present application provides a method, processor and computing device for performing FFT, which can improve the efficiency of performing FFT. The technical solution is as follows:

[0007] In a first aspect, a method for performing FFT is provided, the method being performed by a processor including a vector operation unit and a matrix operation unit, the method for performing FFT by the processor comprising:

[0008] The processor responds to the execution request of the fast Fourier transform (FFT) calculation of the application. The FFT calculation is decomposed into multiple calculation stages, wherein the multiple calculation stages include at least one target calculation stage, and the target calculation stage includes the rotation factor calculation and the discrete Fourier transform (DFT) calculation after the FFT calculation is split. The multiple calculation stages are executed in sequence, wherein when the target calculation stage is executed, the rotation factor calculation is performed based on the vector operation unit, and the DFT calculation is performed based on the matrix operation unit. After completing the execution of the multiple calculation stages, the execution result of the FFT calculation is determined based on the execution result of the last calculation stage, and the execution result is returned to the application.

[0009] In the scheme shown in the present application, during the process of performing FFT calculation, the processor can implement the complex vector multiplication calculation corresponding to the rotation factor and the input data through the vector operation unit, and implement the DFT calculation of the rotated input data and the DFT matrix through the matrix operation unit. In this way, the rotation factor calculation and the DFT calculation are respectively implemented by the vector operation unit and the matrix operation unit, which can improve the calculation efficiency of the rotation factor calculation and the DFT calculation, and thus improve the efficiency of the processor in performing FFT calculation, compared with only implementing the rotation factor calculation and the DFT calculation through the scalar operation unit or the vector operation unit.

[0010] In one implementable manner, the rotation factor calculation includes complex vector multiplication calculation of the input data of the target calculation stage and the corresponding rotation factor. The rotation factor calculation is performed based on the vector operation unit, including: performing the complex multiplication calculation of the input data of the target calculation stage and the corresponding rotation factor based on the vector operation unit to obtain a calculation result, and the calculation result includes the input data of each butterfly unit in the target calculation stage.

[0011] In the solution shown in the present application, the vector operation unit can realize the complex multiplication calculation of input data and multiple rotation factors by performing a complex vector multiplication calculation once, which can improve the efficiency of the processor in performing the rotation factor calculation.

[0012] In one implementable manner, the DFT calculation includes a complex matrix multiplication calculation of the input data of each butterfly unit and the DFT matrix in the target calculation phase, and the DFT calculation is performed based on the matrix operation unit, including: obtaining the real data and imaginary data in the input data of each butterfly unit. Obtaining the real data and imaginary data of each column element in the DFT matrix. Based on the real data and imaginary data corresponding to each butterfly unit, the real data and imaginary data corresponding to the DFT matrix, and the matrix operation unit, the complex matrix multiplication calculation is implemented.

[0013] In the scheme shown in the present application, when the DFT calculation is implemented based on the matrix operation unit, the real data and the imaginary data in the input data can be separated to form a real data matrix and an imaginary data matrix for DFT matrix calculation respectively. In this way, separating the real data and the imaginary data and calculating with the DFT matrix can avoid non-continuous access to the real data and the imaginary data, thereby improving the efficiency of the DFT calculation.

[0014] In an implementable manner, based on the real data and imaginary data corresponding to each butterfly unit, the real data and imaginary data corresponding to the DFT matrix, and the matrix operation unit, a complex matrix multiplication calculation is implemented, including: the real data in the input data of each butterfly unit is formed into a first real matrix by row. The imaginary data in the input data of each butterfly unit is formed into a first imaginary matrix by row. The real data included in each column element of the DFT matrix is ​​formed into a second real matrix by column. The imaginary data included in each column element of the DFT matrix is ​​formed into a second imaginary matrix by column. Based on the first real matrix, the first imaginary matrix, the second real matrix, the second imaginary matrix, and the matrix operation unit, a complex matrix multiplication calculation is implemented.

[0015] In the scheme shown in the present application, the real data and imaginary data of the input data for DFT calculation are composed of a first real matrix and a first imaginary matrix, and the DFT matrix is ​​divided into a second real matrix and a second imaginary matrix. In this way, the matrix operation unit performs complex matrix multiplication calculations on the first real matrix, the first imaginary matrix, the second real matrix and the second imaginary matrix, respectively, which can reduce the matrix size for matrix multiplication calculations, thereby reducing the storage space of the matrix and improving the matrix calculation efficiency. In addition, non-continuous access to the real data and the imaginary data is avoided, further improving the efficiency of the DFT calculation.

[0016] In an implementable manner, the number of columns in the DFT matrix is ​​N, and complex matrix multiplication calculation is implemented based on the first real matrix, the first imaginary matrix, the second real matrix, the second imaginary matrix and the matrix operation unit, including: adding the yth row of the first real matrix to the xth row, and deleting the real data of the yth row to obtain a third real matrix, wherein y=N+2-x, when N is an even number, x∈[2, N / 2], when N is an odd number, x∈[2, (N+1) / 2]. Subtracting the yth row from the xth row of the first imaginary matrix, and deleting the imaginary data of the yth row to obtain a third imaginary matrix. The first M columns of the second real matrix form a fourth real matrix, wherein when N is an even number, M=N / 2+1, and when N is an odd number, M=(N+1) / 2. The first M columns of the second imaginary matrix form a fourth imaginary matrix. The third real matrix, the third imaginary matrix, the fourth real matrix, and the fourth imaginary matrix are input into a matrix operation unit, and the matrix operation unit performs complex matrix multiplication calculation.

[0017] In the scheme shown in the present application, the symmetry of the DFT matrix is ​​used to reduce the size of the first real matrix, the first imaginary matrix, the second real matrix, and the second imaginary matrix for DFT calculation to obtain the corresponding third real matrix, the third imaginary matrix, the fourth real matrix, and the fourth imaginary matrix. Then the matrix operation unit can obtain the calculation result of the DFT calculation by performing complex matrix multiplication on the reduced-size third real matrix, the third imaginary matrix, the fourth real matrix, and the fourth imaginary matrix. In this way, by reducing the size of the matrix, the efficiency of the processor in performing DFT calculation can be further improved.

[0018] In an achievable manner, the calculation result of each calculation stage in the FFT calculation is composed of the output data of the butterfly unit included in the calculation stage, and the method also includes: for each calculation stage, before performing the calculation, the input data of the calculation stage is read in batches according to the specified reading step length, and the input data read each time is stored separately in a specified number of vector registers, the specified number is the same as the value of the specified reading step length, the specified reading step length is equal to the ratio of the length of the input data calculated by the FFT to the specified value, and the specified value is equal to the product of the bases corresponding to the calculation stage and other calculated calculation stages. For each calculation stage, after completing the calculation, the output data of each butterfly unit is obtained in turn, the output data of the first butterfly unit obtained is stored in the memory according to the specified storage interval, and the output data of other butterfly units after the first butterfly unit obtained is stored in the memory after the position where the output data of the butterfly unit was stored last time, and the specified storage interval is equal to the ratio of the length of the input data calculated by the FFT to the base of the calculation stage.

[0019] In the scheme shown in the present application, a new butterfly network can be constructed by reading input data according to a specified reading step size in each calculation stage of the FFT calculation, and storing output data according to the execution storage interval. In this butterfly network, the input data corresponding to the same rotation factor in each calculation stage of the FFT calculation can be arranged continuously. In this way, the input data corresponding to each calculation stage can be read continuously, and then by storing the input data corresponding to the same rotation factor in different vector registers, it is possible to read the input data of each butterfly unit in the calculation stage. In this way, compared with the existing butterfly network, it is possible to avoid non-continuous reading of the input data of the calculation stage when reading the input data of the butterfly unit. Therefore, the use of the butterfly network provided by the present application can improve the efficiency of the rotation factor calculation.

[0020] In one implementable manner, the rotation factor calculation includes complex vector multiplication calculation of the rotation factor corresponding to the input data of the target calculation stage and the DFT matrix, and the DFT calculation includes complex matrix multiplication calculation of the input data of the target calculation stage and the DFT matrix.

[0021] In the scheme shown in the present application, since the target calculation stage may be stored in multiple butterfly units corresponding to the same rotation factor, the input data of the multiple butterfly units need to be respectively subjected to complex multiplication calculations with the same rotation factor, and the calculation results of the complex multiplication calculations corresponding to the multiple butterfly units need to be subjected to complex matrix multiplication operations with the same DFT matrix. Therefore, in the present application, the rotation factor calculation can be set as the calculation of the rotation factor and the DFT matrix, and then the DFT calculation can be set as the calculation of the input data of the target calculation stage and the DFT matrix after the calculation. In this way, performing the calculation of the rotation factor and the DFT matrix once can avoid multiple calculations of the input data and the rotation factor, thereby improving the efficiency of the processor in performing FFT calculations.

[0022] In an achievable manner, the rotation factor calculation is performed based on the vector operation unit, including: the real data in the input data of each butterfly unit is formed into a fifth real matrix by row, and the imaginary data in the input data of each butterfly unit is formed into a fifth imaginary matrix by row. The real data included in each column element of the DFT matrix is ​​formed into a sixth real matrix by column, and the imaginary data included in each column element of the DFT matrix is ​​formed into a sixth imaginary matrix by column. Through the vector operation unit, the real data of the rotation factor corresponding to the s-th row in the fifth real matrix is ​​multiplied by the s-th column of the sixth real matrix to obtain a seventh real matrix, and the imaginary data of the rotation factor corresponding to the s-th row in the fifth imaginary matrix is ​​multiplied by the s-th column of the sixth imaginary matrix to obtain a seventh imaginary matrix, wherein s∈[1,N], N is the number of columns in the DFT matrix.

[0023] Performing DFT calculation based on the matrix operation unit includes: implementing complex matrix multiplication calculation based on the fifth real matrix, the fifth imaginary matrix, the seventh real matrix, the seventh imaginary matrix and the matrix operation unit.

[0024] In the scheme shown in the present application, the rotation factor calculation is set to the calculation of the rotation factor and the DFT matrix, and then the DFT calculation is set to the calculation of the input data of the target calculation stage and the DFT matrix after the calculation, and when performing the rotation factor calculation and the DFT calculation, the real data and the imaginary data can be calculated separately, which can further improve the efficiency of the processor in performing FFT calculations.

[0025] In one implementable manner, when N is an even number, s∈[2, N / 2], and when N is an odd number, s∈[2, (N+1) / 2]; before the real data in the input data of each butterfly unit are organized into a fifth real matrix by row, it includes: performing complex multiplication calculation on the input data of the rth row in the input data of each butterfly unit and the compensation rotation factor to obtain the updated rth row of input data, and the compensation rotation factor is calculated by the rotation factors corresponding to the input data of the rth row and the input data of the sth row in the input data of each butterfly unit, r=N+2-s.

[0026] Based on the fifth real matrix, the fifth imaginary matrix, the seventh real matrix, the seventh imaginary matrix and the matrix operation unit, a complex matrix multiplication calculation is implemented, including: adding the rth row of the fifth real matrix to the sth row, deleting the real data of the rth row, obtaining an eighth real matrix, subtracting the rth row from the sth row of the fifth imaginary matrix, and deleting the imaginary data of the rth row, obtaining an eighth imaginary matrix; forming a ninth real matrix with the first M columns of the seventh real matrix, and forming a ninth imaginary matrix with the first M columns of the seventh imaginary matrix, wherein when N is an even number, M=N / 2+1, and when N is an odd number, M=(N+1) / 2; inputting the eighth real matrix, the eighth imaginary matrix, the ninth real matrix, and the ninth imaginary matrix into the matrix operation unit, and the matrix operation unit performs the complex matrix multiplication calculation to obtain a result matrix, wherein the first M columns of data in the result matrix are respectively the output data of the M butterfly units in the target calculation stage.

[0027] In the solution shown in the present application, when performing the complex matrix multiplication calculation of the input data and the DFT matrix after the rotation factor calculation, the symmetry of the DFT matrix can be further combined to reduce the size of the fifth real matrix and the fifth imaginary matrix corresponding to the input data and the seventh real matrix and the seventh imaginary matrix corresponding to the DFT matrix. This can further improve the efficiency of the processor in performing DFT calculations.

[0028] In a second aspect, a processor is provided, which includes a vector operation unit and a matrix operation unit, and the processor is used to implement the method for performing FFT provided in the above-mentioned first aspect and any one of the implementable methods of the first aspect, wherein the vector operation unit included in the processor is used to perform the vector operation included in the FFT calculation, and the matrix operation unit is used to perform the matrix operation included in the FFT calculation.

[0029] In a third aspect, a computing device is provided, which includes a memory and a processor as described in the second aspect above, wherein the memory stores at least one instruction, and the processor is used to execute the at least one instruction to implement the method for performing FFT provided in the first aspect above and any achievable method in the first aspect.

[0030] In a fourth aspect, a computer-readable storage medium is provided, which stores a computer program code. When the computer program code is executed by a computer device, the computer device executes the method for performing FFT provided in the above-mentioned first aspect and any one of the implementable methods of the first aspect.

[0031] In a fifth aspect, a computer program product comprising instructions is provided. When the computer program product is run on a computer device, the computer device executes the method for performing FFT provided in the first aspect and any achievable method of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a flow chart of implementing 18-point FFT calculation by Cooley-Tukey provided in an embodiment of the present application;

[0033] Figure 2 is a structural schematic diagram of a butterfly unit provided in an embodiment of the present application;

[0034] Figure 3 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application;

[0035] Figure 4 is a structural diagram of a processor provided in an embodiment of the present application;

[0036] Figure 5 is a flow chart of a method for performing FFT provided in an embodiment of the present application;

[0037] Figure 6 It is a structural diagram of a butterfly network provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0039] Discrete Fourier Transform (DFT) is a Fourier transform that presents discrete forms in both time domain data and frequency domain data, and is used to transform discrete time domain sampled data into discrete frequency domain sampled data. In data form, the input data (discrete time domain sampled data) and output data (discrete frequency domain data) of DFT are complex sequences of finite length, and the lengths of the two complex sequences are equal.

[0040] Fast Fourier Transform (FFT) is a method for quickly calculating DFT or inverse DFT. Compared with DFT, FFT has lower computational complexity.

[0041] The Cooley-Tukey algorithm is a commonly used FFT algorithm based on a divide-and-conquer strategy. It can decompose the DFT of a complex sequence with a length of N into DFTs of lengths N1 and N2 and complex multiplications with rotation factors, where N = N1*N2.

[0042] Figure 1 This is a flowchart that implements 18-point FFT calculations through Cooley-Tukey, which can be called a butterfly network. Figure 1 As shown, the calculation process of FFT calculation can be decomposed into multiple calculation stages (stages). The number of calculation stages is equal to the number of bases (radix) divided by the length of the input data. Among them, the input data is a complex sequence, and the length of the input data is the length of the complex sequence. For the FFT calculation with the length of input data N, it can be called N-point FFT calculation. For example, for the FFT calculation of N points, assuming that N can be decomposed into N1, N2, ..., Ni (N = N1*N2*...*Ni), then the calculation process of the FFT of N points can include i calculation stages. N1, N2, ..., Ni can be called bases. N1 is the base corresponding to the first calculation stage, N2 is the base corresponding to the second calculation stage, and Ni is the base corresponding to the i-th calculation stage.

[0043] In FFT calculation, the input data of the first calculation stage is the input data corresponding to the execution of FFT calculation. For other calculation stages after the first calculation stage, the input data of each calculation stage is the output data of the previous calculation stage, and the length of the input data of each calculation stage is the same. A calculation stage can be divided into at least one block (section), and a block can be divided into at least one butterfly unit (butterfly). By performing butterfly calculation on each butterfly unit in the calculation stage, the output data of the calculation stage can be obtained. Among them, a calculation stage includes N / Ni butterfly units, where N is the length of the input data of the calculation stage, and Ni is the basis corresponding to the calculation stage. The input data of the calculation stage can constitute the input data of each butterfly unit, and the length of the input data corresponding to each butterfly unit is equal to the basis of the calculation stage. For example Figure 1 As shown, the 18-point FFT calculation can be divided into three calculation stages. The first calculation stage corresponds to a basis of 3, including 6 butterfly units; the second calculation stage corresponds to a basis of 3, including 6 butterfly units; the third calculation stage corresponds to a basis of 2, including 9 butterfly units. In addition, Figure 1Where in_stride is the input stride of the target calculation stage, which indicates the storage interval of the input data of each butterfly unit in the input data of the corresponding calculation stage. out_stride is the output stride of the target calculation stage, which indicates the storage interval of the output data of each butterfly unit in the output data of the corresponding calculation stage. section_num is the number of sections included in the calculation stage.

[0044] The butterfly calculation of the butterfly unit can be divided into rotation factor calculation and DFT calculation. In one example, the rotation factor calculation can be a complex vector multiplication calculation of the input data of the butterfly unit and the rotation factor, and the DFT calculation can be a complex matrix multiplication calculation of the rotated input data (the input data after the complex multiplication calculation of the rotation factor) and the DFT matrix corresponding to the butterfly unit. Among them, the DFT matrix corresponding to the butterfly unit is related to the structure of the butterfly unit, and the DFT matrix corresponding to each butterfly unit in each calculation stage is the same.

[0045] like Figure 2 As shown, Figure 2 The structures of the radix-2 butterfly unit and the radix-3 butterfly unit are shown respectively. The DFT matrix corresponding to the butterfly unit is a complex matrix. In one example, the DFT calculation corresponding to the radix-N butterfly unit can be expressed as:

[0046]

[0047] in, is the rotated input data corresponding to the base N butterfly unit, is the DFT matrix corresponding to the base N butterfly unit, is the output data corresponding to the base-N butterfly unit. is the rotation factor.

[0048] In the related art, FFT calculation is generally implemented through a scalar operation unit and / or a vector operation unit, that is, the rotation factor calculation and DFT matrix calculation included in the FFT calculation are performed through the scalar operation unit and / or the vector operation unit, and the execution efficiency is low.

[0049] The embodiment of the present application provides a method for performing FFT calculation, which can combine a vector operation unit and a matrix operation unit to jointly implement FFT calculation and improve the execution efficiency of FFT calculation. Figure 3 Schematic diagram of a computing device provided in an embodiment of the present application. Figure 3As shown, the computing device 300 may include: a bus 302, a processor 304, a memory 306, and the optional computing device 300 may also include a communication interface 308. The processor 304, the memory 306 and the communication interface 308 communicate through the bus 302. The computing device 300 may be a server or a terminal device. It should be understood that the present application does not limit the number of processors and memories in the computing device 300. The computing device 300 may be a device for running a model, a terminal or a server. When the computing device 300 is a terminal, the computing device 300 includes but is not limited to a desktop computer, a mobile phone, a notebook, a tablet computer, etc. When the computing device 300 is a server, the computing device 300 may be a separate server, or a server cluster composed of multiple servers, or may be a physical machine, or may be a virtual machine, a container, etc. virtualized by virtual technology.

[0050] The bus 302 may be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 3 The bus 302 may include a path for transmitting information between various components of the computing device 300 (eg, the memory 306, the processor 304, and the communication interface 308).

[0051] The processor 304 may include any one or more of a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor (MP), or a digital signal processor (DSP). The processor 304 may further include a vector operation unit and a matrix operation unit, and the vector operation unit may be a scalable vector extension (SVE), which may be used to perform the rotation factor calculation included in the FFT calculation. The matrix operation unit may be a scalable matrix unit (SME) which may be used to perform the DFT calculation included in the FFT calculation.

[0052] The memory 306 may include a volatile memory, such as a random access memory (RAM). The memory 306 may also include a non-volatile memory, such as a read-only memory (ROM), a flash memory, a hard disk drive (HDD) or a solid state drive (SSD). All of the above memories may be referred to as global memories.

[0053] The communication interface 308 uses a transceiver module such as, but not limited to, a network interface card or a transceiver to implement communication between the computing device 300 and other devices or a communication network.

[0054] Figure 4 is a schematic diagram of a processor structure provided in an embodiment of the present application, and the processor may be the above-mentioned Figure 3 The processor 304 in the computing device, such as Figure 4 As shown, the processor includes a vector operation unit and a matrix operation unit. The processor can execute the operation method provided in the embodiment of the present application. Figure 5 is a flow chart of a method for performing FFT provided in an embodiment of the present application, see Figure 5 , the method for the processor to perform FFT includes:

[0055] Step 501: The processor responds to an execution request of a Fast Fourier Transform (FFT) calculation from an application.

[0056] The application may be any application involving FFT calculation, such as a high performance computing (HPC) application, an artificial intelligence (AI) application, etc. During the running process, when the FFT calculation is required, the application may send an FFT execution request to the processor. For example, the application may be VASP (Vienna Ab-initio Simulation Package). When the wave function needs to be solved in VASP, a wave function solution request may be sent to the processor, and the wave function solution request is an FFT execution request. The wave function is a common function in the field of quantum mechanics. The solution of the wave function can be obtained by performing FFT calculation on the input data of the wave function to obtain the solution result of the wave function.

[0057] In one example, for the method of performing FFT provided in the present application, a technician can write the corresponding processing program as an FFT processing function and add it to a mathematical library, wherein the mathematical library can be stored in a computing device that executes an application, including a large number of processing functions, which can be used to implement various mathematical calculations involved in the application. When an FFT calculation needs to be performed in the application, an FFT execution request can be sent to the processor, and then the processor can execute the FFT processing function by calling to implement the following steps.

[0058] Step 502: Decompose the FFT calculation into multiple calculation stages, wherein the multiple calculation stages include at least one target calculation stage, and the target calculation stage includes rotation factor calculation and discrete Fourier transform DFT calculation after the FFT calculation is split.

[0059] In one example, after receiving an execution request for FFT calculation, the processor can obtain the length of the input data to be FFT calculated and decompose the FFT calculation into multiple calculation stages. For example, the processor can decompose the length of the input data according to the Cooley-Tukey algorithm to obtain the calculation stages for performing FFT calculation on the input data and the basis corresponding to each calculation stage. For example, if the number of data elements in the input data is 8, 8 can be decomposed into 2*2*2, and the process of performing FFT on the input data includes three calculation stages, and the basis corresponding to each calculation stage is 2. For example, when the number of data elements in the input data is 27, 27 can be decomposed into 3*3*3, and the process of performing FFT on the input data includes three calculation stages, and the basis corresponding to each calculation stage is 3.

[0060] In the multiple calculation stages corresponding to the FFT calculation, each calculation stage includes rotation factor calculation and DFT calculation, but since the rotation factors in the first calculation stage are generally 1, the rotation factor calculation of the first calculation stage may not be performed in implementation. In the embodiment of the present application, the target calculation stage may refer to other calculation stages after the first calculation stage. The DFT calculation of the target calculation stage refers to the DFT calculation in each butterfly unit in each corresponding section after the input data of the target calculation stage is split according to the basis.

[0061] Step 503, execute multiple calculation stages in sequence, wherein, when executing to the target calculation stage, the rotation factor calculation is performed based on the vector operation unit, and the DFT calculation is performed based on the matrix operation unit.

[0062] After determining the multiple calculation stages corresponding to the FFT calculation, the processor can execute the multiple calculation stages in sequence. Among them, when executing the first calculation stage, the matrix multiplication calculation of the FFT input data and the DFT matrix can be implemented based on the matrix operation unit. When executing the target calculation stage after the first calculation stage, the rotation factor calculation can be performed based on the vector operation unit, and the DFT calculation can be performed based on the matrix operation unit.

[0063] In one example, the rotation factor calculation includes complex vector multiplication calculation of input data of the target calculation stage and the corresponding rotation factor, and the DFT calculation includes complex matrix multiplication calculation of the rotated input data of each butterfly unit in the target calculation stage and the DFT matrix.

[0064] For the rotation factor calculation performed based on the vector operation unit in step 503:

[0065] When performing rotation factor calculation, the input data of the specified number of butterfly units can be stored in vector registers respectively, and the rotation selection factors corresponding to the specified number of butterfly units can be stored in vector registers. Then, based on the vector multiplication instruction, the complex vector multiplication calculation of the input data of the specified number of butterfly units and the corresponding rotation factors is implemented in the vector operation unit.

[0066] The following is an exemplary method for calculating the rotation factor performed by the vector operation unit provided in the present application:

[0067] Step A1: For the target computing node, if the basis of the target computing stage is R, the input data of t butterfly units can be read in a section of the target computing stage. The real part of the input data of a butterfly unit read each time can be stored in R vector registers. The imaginary part of the input data can be stored in R vector registers Wherein, t=min(vscale, n_butterfly), vscale is the length of input data that can be stored in the vector register, and n_butterfly is the number of butterfly units under each section in the butterfly layer.

[0068] Step A2: respectively read the rotation factors corresponding to the t butterfly units in step A1, wherein the real part data of the rotation factors corresponding to each butterfly unit can be stored in R vector registers respectively. The imaginary data of the rotation factor corresponding to each butterfly unit can be stored in R vector registers respectively.

[0069] Step A3: Calculate using SVE multiplication instructions and The product of and The product of Then use the SVE fused multiply and subtract instructions to calculate minus and The result is stored in the vector register In; using SVE fused multiply-add instruction to calculate Plus and The result of the multiplication is stored in the vector register Among them, The data stored in is the real data included in the result data of the rotation factor calculation corresponding to t butterfly units. The data stored in is the imaginary data included in the result data of the rotation factor calculation corresponding to t butterfly units, i∈[0, R-1].

[0070] The above steps A1-A3 can be performed to obtain the rotation factor calculations corresponding to t butterfly units. The rotation factor calculations corresponding to other butterfly units in the target calculation phase can also be completed based on the same steps, which will not be repeated in the embodiment of the present application.

[0071] In the process of calculating the rotation factors included in the target calculation stage, the result data that has been obtained can be used as input data for the DFT calculation in the target calculation stage to perform subsequent calculations. In this way, the rotation factor calculation and DFT calculation in the target calculation stage are performed in parallel, which can improve the efficiency of performing FFT calculations.

[0072] In the embodiment of the present application, the complex multiplication calculation of the butterfly unit input data and the rotation factor can be converted into a complex vector multiplication calculation and implemented by the vector operation unit. In this way, a complex vector multiplication calculation can realize the complex multiplication calculation of the input data and multiple rotation factors, which can improve the efficiency of the rotation factor calculation in the FFT calculation.

[0073] For the DFT calculation performed based on the matrix operation unit in step 503:

[0074] When performing DFT calculations, the real data and imaginary data in the input data of each butterfly unit can be obtained, and the real data and imaginary data of each column element in the DFT matrix can be obtained. Based on the real data and imaginary data corresponding to each butterfly unit, the real data and imaginary data corresponding to the DFT matrix, and the matrix operation unit, complex matrix multiplication calculations are implemented.

[0075] Among them, when performing DFT calculation, the input data of each butterfly unit refers to the input data after rotation. In the embodiment of the present application, the real data and imaginary data of the rotated input data are stored in the vector register respectively. Therefore, the real data and imaginary data of the input data are separated and calculated with the DFT matrix. In this way, continuous reading of data and imaginary data can be achieved, and the calculation efficiency of DFT can be improved.

[0076] In one example, the complex matrix multiplication calculation corresponding to the input data of each butterfly unit and the DFT matrix may include: the real data in the input data of each butterfly unit is formed into a first real matrix by row, and the imaginary data in the input data of each butterfly unit is formed into a first imaginary matrix by row. The real data included in each column element of the DFT matrix is ​​formed into a second real matrix by column, and the imaginary data included in each column element of the DFT matrix is ​​formed into a second imaginary matrix by column. Based on the first real matrix, the first imaginary matrix, the second real matrix, the second imaginary matrix and the matrix operation unit, the complex matrix multiplication calculation is implemented. Among them, in the first real matrix, each row element can be the real data in the rotated input data corresponding to a butterfly unit. In the first imaginary matrix, each row element can be the imaginary data in the rotated input data corresponding to a butterfly unit.

[0077] The following is an exemplary method of complex matrix multiplication calculation performed by a matrix operation unit provided in the present application:

[0078] Step B1, initialize two matrix registers ZA with all 0s r , ZA i .

[0079] Step B2: Load the real data of each column in the DFT matrix into r vector registers The imaginary data of each column is loaded into r vector registers in, Store the elements of each column of the second real matrix separately, where Store each column element of the second imaginary part matrix separately.

[0080] Step B3, loading the real data included in the input data of the n butterfly units in the target calculation stage into n vector registers by row Load the imaginary data included in the input data of n butterfly units into n vector registers by row in, Store the elements of each row of the first real matrix separately, where Store the elements of each row of the first imaginary part matrix separately.

[0081] Step B4, using external accumulation instructions to achieve and The outer product of r ,accomplish and The outer product of i , where k∈[0,r-1].

[0082] Step B5, use the external accumulation and subtraction instructions to implement Z r minus and The outer product of r ,accomplish and The outer product of the outer product is accumulated in ZA i .

[0083] After executing the above steps B4 to B5, the calculation result of the complex matrix multiplication calculation performed by the matrix operation unit can be obtained, wherein the calculation result consists of a real matrix and an imaginary matrix, and the real matrix is ​​stored in ZA r The imaginary matrix is ​​stored in ZA i In this way, by using two matrix registers and using external accumulation addition / subtraction instructions to operate on real data and imaginary data respectively, the additional SVE instruction overhead can be reduced and the calculation efficiency can be improved.

[0084] In the embodiment of the present application, when the DFT calculation is performed based on the matrix operation unit, the DFT matrix can be decomposed into two matrices composed of real data and imaginary data, and then the complex matrix multiplication calculation is performed with the two matrices composed of real data and imaginary data in the corresponding input data. In this way, the real data and the imaginary data are respectively composed of matrices for calculation. Compared with mixing the real data and the imaginary data into one matrix for calculation, on the one hand, non-continuous access to the real data and the imaginary data can be avoided, which can improve the efficiency of constructing the matrix. On the other hand, the size of the matrix is ​​reduced, which can reduce the storage space occupied by the matrix and improve the calculation efficiency of the matrix.

[0085] Step 504: After completing the execution of multiple calculation stages, determine the execution result of the FFT calculation based on the execution result of the last calculation stage, and return the execution result to the application.

[0086] After completing the execution of multiple calculation stages in the FFT calculation, the output data of the last calculation stage can be used as the execution result of the FFT calculation, and the execution result of the FFT can be returned to the application.

[0087] In the embodiment of the present application, the complex multiplication calculation of the rotation factor is implemented by the vector operation unit, and the complex matrix multiplication operation of the DFT matrix is ​​implemented by the matrix operation unit, which can improve the efficiency of executing FFT calculations.

[0088] The method for performing FFT execution provided in this application can be combined with Figure 1 The butterfly network implementation shown can also be combined with other self-sorting or non-self-sorting butterfly network implementations. When the method for performing FFT execution provided by the present application is combined with a self-sorting butterfly network implementation, the sorting of input data for FFT calculation can be avoided, which can further improve the efficiency of the processor in performing FFT calculations.

[0089] An embodiment of the present application provides a method for performing DFT calculation based on a matrix operation unit. In this method, the symmetry of the DFT matrix can be combined to reduce the size of the matrix for DFT calculation, thereby further improving the efficiency of the matrix operation unit in performing DFT calculation.

[0090] The symmetry of the DFT matrix includes: when the number of columns N in the DFT matrix is ​​an even number, the xth column and the yth column in the DFT matrix are conjugate symmetric, x∈[2, N / 2], y=N+2-x. When the number of columns N in the DFT matrix is ​​an odd number, the xth column and the yth column in the DFT matrix are conjugate symmetric, x∈[2, (N+1) / 2], y=N+2-x. For example, when the size of the DFT matrix W is 8×8, the elements of the 2nd column in the DFT matrix are conjugate symmetric with the elements of the 8th column, the elements of the 3rd column are conjugate symmetric with the elements of the 7th column, and the elements of the 4th column are conjugate symmetric with the elements of the 6th column. In this way, after the real data in the DFT matrix are formed into a second real matrix and the imaginary data in the DFT matrix are formed into a second imaginary matrix, the elements of the xth column and the yth column in the second real matrix are equal, and the elements of the xth column and the yth column in the second imaginary matrix are opposite.

[0091] When performing the outer product of two matrices, if one of the matrices has two columns with equal elements or two columns with opposite elements, the following optimization can be performed:

[0092]

[0093] As can be seen from the above formula, when two matrices are outer-producted, if one of the matrices has two columns with equal elements, the two columns with equal elements can be merged into one column to obtain an updated matrix. For the other matrix, the elements of the two corresponding rows in the other matrix can be added, and one row of elements can be deleted to obtain another updated matrix. The outer product results of the two updated matrices are the same as the outer product results of the two matrices before the update. Since the two updated matrices are reduced in size relative to the two matrices before the update, the efficiency of the outer product calculation can be improved by using the two updated matrices to perform outer product calculation.

[0094]

[0095] As can be seen from the above formula, when two matrices are outer-producted, if one of the matrices has two columns with opposite elements, the two columns with equal elements can be merged into one column to obtain an updated matrix. For another matrix, the elements of two corresponding rows in the other matrix can be subtracted, and one row of elements can be deleted to obtain another updated matrix. The outer product results of the two updated matrices are the same as the outer product results of the two matrices before the update. Since the two updated matrices are reduced in size relative to the two matrices before the update, the efficiency of the outer product calculation can be improved by using the two updated matrices to perform outer product calculation.

[0096] Accordingly, in the embodiment of the present application, the symmetry of the above-mentioned DFT matrix and the optimization method shown in the above-mentioned two formulas are used to optimize the first real matrix, the first imaginary matrix, the second real matrix and the second imaginary matrix for the outer product calculation, which can improve the efficiency of the outer product calculation of the first real matrix, the first imaginary matrix, the second real matrix and the second imaginary matrix. The above-mentioned step 503 in which the DFT calculation is performed based on the matrix operation unit may also include:

[0097] Step C1, add the yth row of the first real matrix to the xth row, and delete the real data of the yth row to obtain a third real matrix, where y=N+2-x, when N is an even number, x∈[2, N / 2], and when N is an odd number, x∈[2, (N+1) / 2].

[0098] Step C2: subtract the yth row from the xth row of the first imaginary matrix, and delete the imaginary data of the yth row to obtain a third imaginary matrix.

[0099] Step C3, the first M columns of the second real matrix are used to form a fourth real matrix, where when N is an even number, M=N / 2+1, and when N is an odd number, M=(N+1) / 2.

[0100] Step C4, forming a fourth imaginary part matrix from the first M columns of the second imaginary part matrix.

[0101] After obtaining the third real matrix and the third imaginary matrix corresponding to the input data for DFT calculation after updating, and the fourth real matrix and the fourth imaginary matrix corresponding to the DFT matrix, the third real matrix, the third imaginary matrix, the fourth real matrix and the fourth imaginary matrix can be used for complex matrix multiplication calculation based on the matrix operation unit.

[0102] The following is an exemplary method of complex matrix multiplication calculation performed by a matrix operation unit after combining the symmetry of a DFT matrix (the size of the DFT matrix is ​​8×8) provided in an embodiment of the present application:

[0103] Step D1, initialize two matrix registers ZA with all 0s r , ZA i .

[0104] Step D2, load the real data of the first 5 columns in the DFT matrix into r vector registers Load the imaginary data of the first 5 columns of the DFT matrix into r vector registers in, Each column element in the fourth real part matrix is ​​stored in Each column element in the fourth imaginary part matrix is ​​stored in .

[0105] Step D3, loading the real part data included in the input data of the 8 butterfly units to be executed for DFT calculation into 8 vector registers by row Load the imaginary data included in the input data of the 8 butterfly units into 8 vector registers by row in, Store each row element of the first real matrix separately, Store the elements of each row of the first imaginary part matrix separately.

[0106] Step D4, through the SVE instruction and and and Perform addition and store the result in right and and and Perform subtraction and store the result in in, Store each row element of the third real matrix separately, Store each row element of the third imaginary part matrix separately.

[0107] Step D5, using external accumulation instructions to achieve and The outer product of r ,accomplish and The outer product of i .

[0108] Step D6, with ZA r minus and The result of the outer product refreshes ZA again r ,by and The outer product of i The result of the addition refreshes ZA again i .

[0109] After executing the above steps D5 to D6, the calculation result of the complex matrix multiplication calculation performed by the matrix operation unit can be obtained.

[0110] In the embodiment of the present application, the DFT calculation is optimized for the symmetry of the DFT matrix. The above optimization method replaces the SME external accumulation addition / subtraction instructions with higher latency by the SVE addition / subtraction instructions with lower latency, thereby reducing the execution overhead of the instructions. At the same time, due to the symmetry, the DFT matrix only needs to store some elements, reducing the storage overhead and memory access overhead. Furthermore, by inserting SVE calculation instructions in SME calculations, the chip pipeline can be better utilized, thereby improving the overall computing efficiency.

[0111] Figure 6 Schematic diagram of a novel butterfly network structure provided by the embodiment of the present application. In FFT calculation, the input data at the same position in different sections in the target calculation stage corresponds to the same rotation factor. Figure 6 In the butterfly network shown, input data corresponding to the same rotation factor can be arranged to adjacent positions in the input data of the calculation stage.

[0112] for Figure 6 The construction method of the butterfly network shown can be as follows:

[0113] For each calculation stage, the input data of the calculation stage is read in batches according to the specified read step before calculation, and the input data read each time is stored separately in a specified number of vector registers. Among them, the specified number is the same as the value of the specified read step, and the specified read step is equal to the ratio of the length of the input data calculated by FFT to the specified value, and the specified value is equal to the product of the basis corresponding to the calculation stage and other calculated calculation stages.

[0114] The specified read step size corresponding to each calculation stage is Figure 6 The in_stride corresponding to each calculation stage in the butterfly network shown. Among them, the in_stride1 of the first calculation stage is equal to N / R0, where N is the length of the input data of the first calculation stage, R0 is the basis of the first calculation stage, and the in_stride i of the i-th calculation stage after the first calculation stage is equal to R i is the basis corresponding to the i-th calculation stage.

[0115] like Figure 6 As shown, in Figure 6 In the second calculation stage of the butterfly network, in_stride is 2, that is, the reading stride is specified to be 2. When reading the input data of this calculation stage, two input data can be read each time, and then the two input data can be stored in two vector registers respectively. For example, 0, 1; 2, 3; 4, 5 can be read continuously; then the read 0, 2, 4 are stored in vector register A, and 1, 3, 5 are stored in vector register B. In this way, the rotation factors corresponding to the input data in vector register A and vector register B are the same.

[0116] For each calculation stage, after the calculation is completed, the output data of each butterfly unit is obtained in turn, and the output data of the first butterfly unit obtained is stored in the memory according to the specified storage interval, and the output data of other butterfly units after the first butterfly unit are obtained and stored in the memory after the position where the output data of the butterfly unit was last stored. The specified storage interval is equal to the ratio of the length of the input data calculated by the FFT to the basis of the calculation stage.

[0117] Among them, the specified storage interval corresponding to each calculation stage is Figure 6 The out_stride corresponding to each calculation stage in the butterfly network shown. Among them, the out_stride i of the i-th calculation stage is equal to N / R i , where R i is the basis corresponding to the i-th calculation stage.

[0118] like Figure 6 As shown, in Figure 6In the second calculation stage of the butterfly network, out_stride is 6, that is, the specified storage interval is 6. When reading and storing the input data of the calculation stage, the data is stored according to the specified storage interval. For example, for the outputs 0, 6, and 12 of the first butterfly unit, 0 can be stored at the starting position of the output data of the second calculation stage in the memory, and then 6 can be stored by offsetting 6 storage positions after the position where 0 is stored, and then 12 can be stored by offsetting 6 storage positions after the position where 6 is stored. For the outputs 1, 7, and 13 of the second butterfly unit, 1 can be stored by offsetting one storage position after the position where 0 is stored, 7 can be stored by offsetting one storage position after the position where 6 is stored, and 13 can be stored by offsetting one storage position after the position where 12 is stored.

[0119] Starting from the first calculation stage of the FFT calculation, the input data of the calculation stage is read according to the specified reading step size provided in the embodiment of the present application, and the output data of the calculation stage is stored according to the specified storage interval provided in the embodiment of the present application, so that the following can be constructed: Figure 6 The computational flow corresponding to the butterfly network shown. Figure 6 In the butterfly network shown, in the input data of each calculation stage, the corresponding input data of the same rotation factor can be adjacent. In addition, Figure 6 The butterfly network shown is the butterfly network corresponding to the 18-point FFT calculation, which includes three calculation stages. The first calculation stage corresponds to a basis of 3, in_stride of 6, out_stride of 6, number of sections of 6, and each section includes 1 butterfly unit; the second calculation stage corresponds to a basis of 3, in_stride of 2, out_stride of 6, number of sections of 2, and each section includes 3 butterfly units; the third calculation stage corresponds to a basis of 2, in_stride of 1, out_stride of 9, number of sections of 1, and 9 butterfly units in a section.

[0120] In one example, the application Figure 6 The butterfly network shown performs FFT calculations, and the input data corresponding to the same rotation factor in each calculation stage is stored continuously. Therefore, the input data of the calculation stage can be read continuously, and the input data corresponding to the same rotation factor can be stored in different vector registers respectively, and the number of vector memories is the same as the number of input data corresponding to the same rotation factor.

[0121] In this way, the rotation factors corresponding to the input data stored in each vector register are the same. Therefore, the rotation factors corresponding to the input data stored in the vector register can be loaded into the vector register, and then the rotation factors stored in the vector register and the input data stored in each vector register can be used to calculate the rotation factors.

[0122] So, relative to the application Figure 1 The butterfly network shown performs the FFT calculation, applying Figure 6 The butterfly network shown in the figure performs FFT calculation. On the one hand, it can realize the continuous reading of input data in the calculation stage, avoiding the discontinuous access of input data according to the butterfly unit. On the other hand, it can reduce the number of times the rotation factor is read, avoiding the need to read the rotation factor corresponding to each butterfly unit separately. Figure 6 The butterfly network shown performs FFT calculations, which can further improve the efficiency of performing the rotation factor calculations.

[0123] In addition, the above reading, storing and calculating of input data and rotation factors can be specifically divided into reading, storing and calculating of real data and imaginary data. The specific reading, storing and calculating process of real data and imaginary data is similar to the steps A1-A3 above, and will not be described in detail in this application.

[0124] exist Figure 6 Based on the butterfly network shown, the rotation factor calculation included in the above-mentioned target calculation stage can be a complex vector multiplication calculation of the rotation factor corresponding to the input data of the target calculation stage and the DFT matrix, and the DFT calculation can be a complex matrix multiplication calculation of the input data of the target calculation stage and the DFT matrix.

[0125] If the number of sections included in the target calculation stage is large, the number of butterfly units corresponding to the same rotation factor in the target calculation stage is large. In this way, for the multiple butterfly units corresponding to the same rotation factor, the input data of the multiple butterfly units need to perform complex vector multiplication calculations with the same rotation factor respectively, and then perform complex matrix multiplication calculations with the same DFT matrix. Therefore, in an embodiment of the present application, for the target calculation stage including a large number of sections (such as when the number of sections is greater than the length MVL supported by the matrix operation unit SME, or greater than the number threshold set by the technician), the rotation factor can be multiplied with the DFT matrix first to complete the rotation factor calculation, and then the input data of the butterfly unit can be multiplied with the DFT matrix after the rotation factor calculation. In this way, through a single multiplication operation of the rotation factor and the DFT matrix, it is possible to replace multiple multiplication operations performed by the rotation factor and the input data of multiple butterfly units, thereby improving the efficiency of performing FFT calculations. Figure 6 Based on the butterfly network shown, the processing of performing the rotation factor calculation and the DFT calculation can be specifically as follows:

[0126] Step E1, the real part data in the input data of each butterfly unit are combined into a fifth real part matrix by row, and the imaginary part data in the input data of each butterfly unit are combined into a fifth imaginary part matrix by row.

[0127] Step E2: The real part data included in each column element of the DFT matrix are grouped into a sixth real part matrix by column, and the imaginary part data included in each column element of the DFT matrix are grouped into a sixth imaginary part matrix by column.

[0128] For the processing of steps E1-E2, reference may be made to the processing of step B2 above, which will not be described in detail here.

[0129] Step E3, multiplying the real data of the rotation factor corresponding to the sth row in the fifth real matrix by the sth column of the sixth real matrix to obtain a seventh real matrix, where s∈[1,N], and N is the number of columns in the DFT matrix.

[0130] Step E4, multiplying the imaginary data of the rotation factor corresponding to the s-th row in the fifth imaginary matrix by the s-th column of the sixth imaginary matrix to obtain a seventh imaginary matrix.

[0131] Among them, step E3-step E4 is the calculation of the rotation factor, and the specific calculation process can be implemented by the vector operation unit, which will not be introduced in detail in this application. The seventh real matrix and the seventh imaginary matrix are the DFT matrices after the rotation factor calculation.

[0132] Due to the structural change of the butterfly network, the rotation factor corresponding to each input data in each calculation stage will change. For each calculation stage, the updated rotation factor corresponding to the input data can be calculated by the following formula:

[0133]

[0134] Where N is the length of the input data for FFT calculation, N s _ i is the number of butterfly units included in each section in the calculation stage. i represents the order of the calculation stage in the FFT calculation. j represents the position of the butterfly unit where the input data is located in the corresponding section, and k represents the position of the input data in the corresponding butterfly unit.

[0135] In addition, the updated rotation factors can be pre-calculated and stored in the memory of the computing device. When the rotation factor calculation is required, the processor can directly obtain the updated rotation factors from the memory, thereby improving the calculation efficiency of the rotation factors.

[0136] Step E5, implementing complex matrix multiplication calculation based on the fifth real matrix, the fifth imaginary matrix, the seventh real matrix, the seventh imaginary matrix and the matrix operation unit.

[0137] The processing process of step E5 is the implementation process of DFT calculation. For the specific processing process of step E5, reference may be made to the steps of implementing DFT calculation by the matrix operation unit shown in step 503 above, which will not be described in detail here.

[0138] The embodiment of the present application also provides a method for performing DFT calculation based on a matrix operation unit, in which the above Figure 6 The corresponding DFT calculation is combined with the symmetry of the DFT matrix to reduce the size of the matrix for DFT calculation to improve the efficiency of the matrix operation unit in performing the DFT calculation. The processing of the above step E5 may include:

[0139] Step G1, the first M columns of the seventh real matrix form a ninth real matrix, and the first M columns of the seventh imaginary matrix form a ninth imaginary matrix, wherein when N is an even number, M=N / 2+1, and when N is an odd number, M=(N+1) / 2.

[0140] The seventh real matrix is ​​a matrix composed of real data corresponding to the multiplication of the DFT matrix and the rotation factor, and the seventh imaginary matrix is ​​a matrix composed of imaginary data corresponding to the multiplication of the DFT matrix and the rotation factor.

[0141] Step G2, add the rth row of the fifth real matrix to the sth row, and delete the real data of the rth row to obtain the eighth real matrix, subtract the rth row from the sth row of the fifth imaginary matrix, and delete the imaginary data of the rth row to obtain the eighth imaginary matrix. Wherein, s∈[2, N / 2], when N is an odd number, s∈[2, (N+1) / 2].

[0142] Among them, since the first M columns in the seventh real matrix or the seventh imaginary matrix have been multiplied by the rotation factors corresponding to the input data of the first M rows, the input data of the first M rows include the input data of the s-th row. In this way, when the symmetry of the DFT matrix is ​​used to perform DFT calculations, the input data of the r-th row in the matrix composed of input data will be combined with the input data of the s-th row and calculated together with the rotation factors corresponding to the s-th row. Therefore, before forming the fifth real matrix and the fifth imaginary matrix, the input data of the r-th row can be compensated for the rotation factors, so that after the compensated input data of the r-th row is calculated with the rotation factors corresponding to the s-th row, the effect of calculating the input data of the r-th row with the rotation factors of the r-th row can be achieved.

[0143] For example, the input data of the rth row and the compensation rotation factor can be complex multiplied to obtain the updated input data of the rth row, wherein the compensation rotation factor is calculated by the rotation factors corresponding to the input data of the rth row and the input data of the sth row in the input data of each butterfly unit. The specific calculation can be as follows:

[0144] For example, the rotation factors corresponding to the input data of the sth row are: T′ i,a =[W i,0,a W i,1,a …W i,t-1,a ]. The rotation factors corresponding to the input data of the rth row are: T′ i,b =[W i,0,b W i,1,b …W i,t-1,b ]. Due to T′ i,a The common rotation factor of the input data of the sth row and the input data of the rth row is multiplied into the DFT matrix. Therefore, the input data of the rth row needs to be compensated for the rotation factor to eliminate the influence of the rotation factor corresponding to the input data of the sth row on the input data of the rth row. Before performing the DFT calculation, T′ i,a The imaginary part of each element is negated to obtain the negated result. Then calculate T′ i,b Divide by the inverted result to obtain a new rotation factor (i.e., compensation rotation factor) T″ i,b (Actual calculation T″ i,b When T′ i,b Element-wise with T′ i,a multiplication).

[0145] Step G3, input the eighth real matrix, the eighth imaginary matrix, the ninth real matrix, and the ninth imaginary matrix into the matrix operation unit, and the matrix operation unit performs complex matrix multiplication calculation to obtain a result matrix, wherein the first M columns of data in the result matrix are the output data of the M butterfly units in the target calculation stage.

[0146] The specific implementation process of step G3 can refer to the steps of implementing DFT calculation by the matrix operation unit shown in the above step 503, which will not be repeated here.

[0147] The present application also provides a computer program product including instructions. The computer program product may be software or a program product including instructions that can be run on a computing device or stored in any available medium. When the computer program product is run on at least one computing device, the at least one computing device executes the method for performing FFT provided in the present application.

[0148] The embodiment of the present application also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium that can be stored by a computing device or a data storage device such as a data center containing one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk). The computer-readable storage medium includes instructions that instruct the computing device to execute the method for executing FFT in the embodiment of the present application.

[0149] In the present application, the words such as term "first", "second" are used to distinguish the same item or similar item with substantially the same effect and function, and it should be understood that there is no logical or temporal dependency between "first" and "second", and quantity and execution order are not limited. It should also be understood that although the following description uses the terms first, second, etc. to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish an element from another element. For example, without departing from the scope of various examples, the first real matrix can be referred to as the second real matrix, and similarly, the second real matrix can be referred to as the first real matrix. The first real matrix and the second real matrix can both be collectively referred to as real matrices, and in some cases, can be separate and different real matrices.

[0150] The term "at least one" in this application means one or more, and the term "plurality" in this application means two or more.

[0151] The above description is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A method for performing FFT, characterized in that The method comprises: The processor responds to an execution request of a Fast Fourier Transform (FFT) calculation of an application program, and the processor includes a vector operation unit and a matrix operation unit; The processor decomposes the FFT calculation into multiple calculation stages, wherein the multiple calculation stages include at least one target calculation stage, the target calculation stage includes rotation factor calculation and discrete Fourier transform DFT calculation, wherein the DFT calculation is obtained after decomposing the FFT calculation; The processor sequentially executes the plurality of calculation stages, wherein, when executing to the target calculation stage, the rotation factor calculation is performed based on the vector operation unit, and the DFT calculation is performed based on the matrix operation unit; After completing the execution of the multiple calculation stages, the processor determines the execution result of the FFT calculation based on the execution result of the last calculation stage, and returns the execution result to the application.

2. The method according to claim 1, characterized in that The rotation factor calculation includes a complex vector multiplication calculation of the input data of the target calculation stage and the corresponding rotation factor, and the rotation factor calculation is performed based on the vector operation unit, including: Based on the vector operation unit, a complex multiplication calculation of the input data of the target calculation stage and the corresponding rotation factor is performed to obtain a calculation result, and the calculation result includes the input data of each butterfly unit in the target calculation stage.

3. The method according to claim 2, characterized in that The DFT calculation includes a complex matrix multiplication calculation of the input data of each butterfly unit in the target calculation stage and a DFT matrix, and the performing of the DFT calculation based on the matrix operation unit includes: Acquire real data and imaginary data in the input data of each butterfly unit; Obtaining real data and imaginary data of each column element in the DFT matrix; The complex matrix multiplication calculation is implemented based on the real data and imaginary data corresponding to each butterfly unit, the real data and imaginary data corresponding to the DFT matrix, and a matrix operation unit.

4. The method according to claim 3, characterized in that The method of implementing the complex matrix multiplication calculation based on the real data and imaginary data respectively corresponding to the butterfly units, the real data and imaginary data respectively corresponding to the DFT matrix, and a matrix operation unit includes: Combining the real part data in the input data of each butterfly unit into a first real part matrix by row; The imaginary part data in the input data of each butterfly unit are formed into a first imaginary part matrix by row; Combining the real part data included in each column element of the DFT matrix into a second real part matrix by column; Combining the imaginary part data included in each column element of the DFT matrix into a second imaginary part matrix by column; The complex matrix multiplication calculation is implemented based on the first real matrix, the first imaginary matrix, the second real matrix, the second imaginary matrix and a matrix operation unit.

5. The method according to claim 4, characterized in that The number of columns in the DFT matrix is ​​N, and the complex matrix multiplication calculation is implemented based on the first real matrix, the first imaginary matrix, the second real matrix, the second imaginary matrix and the matrix operation unit, including: Add the yth row of the first real matrix to the xth row, and delete the real data of the yth row to obtain a third real matrix, wherein y=N+2-x, when N is an even number, x∈[2, N / 2], and when N is an odd number, x∈[2, (N+1) / 2]; Subtract the yth row from the xth row of the first imaginary part matrix, and delete the imaginary part data of the yth row to obtain a third imaginary part matrix; The first M columns of the second real part matrix are used to form a fourth real part matrix, wherein when N is an even number, M=N / 2+1, and when N is an odd number, M=(N+1) / 2; The first M columns of the second imaginary part matrix are used to form a fourth imaginary part matrix; The third real matrix, the third imaginary matrix, the fourth real matrix, and the fourth imaginary matrix are input into a matrix operation unit, and the matrix operation unit performs the complex matrix multiplication calculation.

6. The method according to claim 1, characterized in that The calculation result of each calculation stage in the FFT calculation is composed of output data of the butterfly unit included in the calculation stage, and the method further includes: For each calculation stage, before calculation, the input data of the calculation stage is read in batches according to the specified reading step length, and the input data read each time is stored separately in a specified number of vector registers, the specified number is the same as the value of the specified reading step length, the specified reading step length is equal to the ratio of the length of the input data calculated by the FFT to a specified value, and the specified value is equal to the product of the bases corresponding to the calculation stage and other calculated calculation stages respectively; For each calculation stage, after completing the calculation, the output data of each butterfly unit is obtained in turn, the output data of the first butterfly unit obtained is stored in the memory according to the specified storage interval, and the output data of other butterfly units after the first butterfly unit obtained is stored in the memory after the position where the output data of the butterfly unit was last stored, and the specified storage interval is equal to the ratio of the length of the input data of the FFT calculation to the basis of the calculation stage.

7. The method according to claim 6, characterized in that The rotation factor calculation includes the complex vector multiplication calculation of the rotation factor corresponding to the input data of the target calculation stage and the DFT matrix, and the DFT calculation includes the complex matrix multiplication calculation of the input data of the target calculation stage and the DFT matrix.

8. The method according to claim 7, characterized in that The step of performing the rotation factor calculation based on the vector operation unit includes: The real part data in the input data of each butterfly unit are combined into a fifth real part matrix by row, and the imaginary part data in the input data of each butterfly unit are combined into a fifth imaginary part matrix by row; Combining the real part data included in each column element of the DFT matrix into a sixth real part matrix by column, and combining the imaginary part data included in each column element of the DFT matrix into a sixth imaginary part matrix by column; By means of the vector operation unit, the real data of the rotation factor corresponding to the s-th row in the fifth real matrix is ​​multiplied by the s-th column of the sixth real matrix to obtain a seventh real matrix, and the imaginary data of the rotation factor corresponding to the s-th row in the fifth imaginary matrix is ​​multiplied by the s-th column of the sixth imaginary matrix to obtain a seventh imaginary matrix, wherein s∈[1,N], and N is the number of columns in the DFT matrix; The performing the DFT calculation based on the matrix operation unit includes: The complex matrix multiplication calculation is implemented based on the fifth real matrix, the fifth imaginary matrix, the seventh real matrix, the seventh imaginary matrix and the matrix operation unit.

9. The method according to claim 8, characterized in that When N is an even number, s∈[2, N / 2], and when N is an odd number, s∈[2, (N+1) / 2]; Before the real part data in the input data of each butterfly unit are formed into a fifth real part matrix by row, the method includes: Performing complex multiplication calculation on the input data of the rth row in the input data of each butterfly unit and the compensation rotation factor to obtain updated input data of the rth row, wherein the compensation rotation factor is calculated by the rotation factors corresponding to the input data of the rth row and the input data of the sth row in the input data of each butterfly unit, r=N+2-s; The method of implementing the complex matrix multiplication calculation based on the fifth real matrix, the fifth imaginary matrix, the seventh real matrix, the seventh imaginary matrix and the matrix operation unit includes: Add the r-th row of the fifth real matrix to the s-th row and delete the real data of the r-th row to obtain an eighth real matrix, subtract the r-th row from the s-th row of the fifth imaginary matrix and delete the imaginary data of the r-th row to obtain an eighth imaginary matrix; The first M columns of the seventh real matrix form a ninth real matrix, and the first M columns of the seventh imaginary matrix form a ninth imaginary matrix, wherein when N is an even number, M=N / 2+1, and when N is an odd number, M=(N+1) / 2; The eighth real matrix, the eighth imaginary matrix, the ninth real matrix and the ninth imaginary matrix are input into a matrix operation unit, and the matrix operation unit performs the complex matrix multiplication calculation to obtain a result matrix, wherein the first M columns of data in the result matrix are respectively the output data of the M butterfly units in the target calculation stage.

10. A processor, characterized in that: The processor comprises a vector operation unit and a matrix operation unit, and the processor is used to execute the method for performing FFT as described in any one of claims 1 to 9 above.

11. A computing device, characterized in that: The computing device comprises a memory and a processor as claimed in claim 10 above, wherein the memory stores at least one instruction, and the processor is configured to execute the at least one instruction to implement the method for performing FFT as claimed in any one of claims 1 to 9 above.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program code, and when the computer program code is executed by a computer device, the computer device executes the method for performing FFT according to any one of claims 1 to 9.

13. A computer program product comprising instructions, characterized in that When the computer program product is run on a computer device, the computer device is enabled to execute the method for performing FFT according to any one of claims 1 to 9.

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