Unibus circuit with flexible configuration driving capability and control method

Abstract

The invention relates to a unibus circuit with flexible configuration driving capability and a control method, the circuit comprises a unibus signal line P1 connected with a communication host and a sensor, at the end of the communication host, the unibus signal line P1 is connected with a working power supply through a pull-up resistor Rup1, and a current-limiting resistor R1 is also arranged on the unibus signal line P1; the system also comprises a group of bus auxiliary signal lines P2... Pi... Pn. For any bus auxiliary signal line Pi, at the end of the communication host, the bus auxiliary signal line Pi is connected with a working power supply through a pull-up resistor Rupi, and a current-limiting resistor Ri is arranged on the bus auxiliary signal line Pi; the end, far away from the communication host, of the current-limiting resistor Ri is connected with the end, far away from the communication host, of the current-limiting resistor R1 after passing through a corresponding control switch Ki; i and n are natural numbers, and 1lt; i < = n. According to the method, the driving capability of the single bus is flexibly configured. Due to the fact that the bus auxiliary signal lines are additionally arranged, the bus driving capacity is set according to needs, and the single-bus circuit has the flexible configuration driving capacity.

Description

Technical Field

[0001] The present invention relates to the field of single bus circuits, and in particular to a single bus circuit with flexible configuration driving capability and a control method. Background Art

[0002] A single bus has only one data line, and data exchange and control in the system are all completed by this line. The device (host or slave) is connected to the data line through an open-drain or three-state port to allow the device to release the bus when it is not sending data, allowing other devices to use the bus. Its internal equivalent circuit is as follows: Figure 1 As shown: The single bus requires an external pull-up resistor of approximately 5k; in this way, the idle state of the single bus is a high level. Regardless of the reason, if the transmission process needs to be temporarily suspended and the transmission process is required to continue, the bus must be in an idle state. There is no limit on the recovery time between bit transmissions, as long as the bus is in an idle state (high level) during the recovery period. If the bus remains at a low level for more than 480us, all devices on the bus will be reset. In addition, when powered by parasitic means, in order to ensure that the single bus devices have sufficient power supply current in certain working conditions (such as during temperature conversion, EEPROM writing, etc.), a strong pull-up must be provided on the bus, such as Figure 1 MOSFET shown.

[0003] Single bus applications are very broad, such as Figure 2 As shown in the figure, it is a circuit diagram of a single-chip microcomputer using a single bus to read the output of a temperature sensor. There can be multiple temperature sensors or other sensors on this single bus. The single-chip microcomputer (MCU) can read the data of these sensors through the single bus protocol. In practice, these sensors have a parasitic power supply circuit inside, and the single-chip microcomputer supplies power to these sensor ICs. When the single bus is at a high level, on the one hand, power is supplied to the chip through a diode, and on the other hand, the internal capacitor C of the chip (capacitance is about 800pF) is charged. When the single bus is at a low level, the diode is cut off, and the internal capacitor C supplies power to the chip.

[0004] At present, many sensors or chips use a single bus (such as HDQ, 1-wire) for power supply and communication. Figure 2 As shown, different sensors or different numbers of chips have different requirements for the power supply capacity (load capacity) of the communication bus. Some chips or a large number of chips in parallel will consume more energy during the communication process. If the bus driving capacity is insufficient, the communication bus will be seriously pulled down, which may cause communication abnormalities. However, if the driving capacity is too sufficient, it may cause the output low-level signal to be too high, or the sensor as a slave may not be able to pull down the bus, resulting in communication abnormalities.

[0005] like Figure 3As shown in the figure, the principle of the parasitic power supply circuit is that the single-chip microcomputer (microprocessor) uses a single bus to power the sensor (chip). Inside the single-chip microcomputer, the I / O interface connected to the single bus P uses a pull-up resistor Rup to connect to the working power supply, and then a current limiting resistor R is used to control the load capacity of the single bus. Generally speaking, as long as the resistance value of the current limiting resistor R is certain, the driving capacity of the single bus circuit is determined and cannot change with the load driving capacity of the sensor. In many cases, the driving capacity of the communication host (MCU, single-chip microcomputer) and the sensor (other chips) will not match. Summary of the invention

[0006] Aiming at the current situation that the driving capabilities of a single-bus communication host and a sensor do not match, and a communication host cannot adapt to a variety of sensors or chips, the present invention provides a single-bus circuit and a control method with flexible configuration driving capabilities.

[0007] The technical solution of the present invention is: a single bus circuit with flexible configuration driving capability, comprising a single bus signal line P1 connecting a communication host and a sensor, at the communication host end, the single bus signal line P1 is connected to a working power supply through a pull-up resistor Rup1, and a current limiting resistor R1 is also provided on the single bus signal line P1;

[0008] It also includes a set of bus auxiliary signal lines P2...Pi...Pn;

[0009] For any bus auxiliary signal line Pi, at the end of the communication host, the bus auxiliary signal line Pi is connected to the working power supply through the pull-up resistor Rupi, and a current limiting resistor Ri is set on the bus auxiliary signal line Pi; the current limiting resistor Ri is connected to the end away from the communication host through the corresponding control switch Ki and the current limiting resistor R1 is connected to the end away from the communication host; here i and n are natural numbers, and 1 <i≤n。

[0010] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: the pull-up resistor Rup1 is much larger than the current limiting resistor R1; the pull-up resistor Rupi is much larger than the current limiting resistor Ri.

[0011] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: the current limiting resistor R1 is equal to any current limiting resistor Ri.

[0012] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: the pull-up resistor Rup1 and the pull-up resistor Rupi both have a resistance value of 10K Ω, and the current limiting resistor R1 and any current limiting resistor Ri both have a resistance value of 10Ω.

[0013] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: the pull-up resistor Rup1 has the same resistance value as any pull-up resistor Rupi.

[0014] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: n=7, the resistance of the pull-up resistor Rup1 is 10K Ω, the resistance values ​​of the pull-up resistors Rup2, Rup3, Rup4, Rup5, Rup6, and Rup7 are 1.25K Ω, 2.5K Ω, 5K Ω, 20K Ω, 40K Ω, and 80K Ω respectively, the resistance value of the current limiting resistor R1 is 10Ω, and the resistance values ​​of R2, R3, R4, R5, R6, and R7 are 1.25Ω, 2.5Ω, 5Ω, 20Ω, 40Ω, and 80Ω respectively.

[0015] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: a control switch K1 is provided on the single bus signal line P1.

[0016] Furthermore, in the above-mentioned single bus circuit with flexible configuration driving capability: the control switch K1 and the control switch Ki are MOS tubes controlled by a microprocessor respectively.

[0017] The present invention also provides a control method for a single bus circuit with flexible configuration driving capability, wherein the single bus circuit comprises a single bus signal line P1 and a group of bus auxiliary signal lines P2 ... Pi ... Pn; the single bus signal line P1 and the bus auxiliary signal line Pi have a floating input mode and a high output mode under the control of an MCU;

[0018] The control method comprises the following steps:

[0019] When powered on, the bus auxiliary signal lines P2...Pn are all in floating input mode, and the single bus signal line P1 is in output high mode;

[0020] The MCU sets the working mode of the bus auxiliary signal lines P2...Pn according to the configuration parameters.

[0021] Furthermore, in the above-mentioned control method of the single bus circuit with flexible configuration driving capability: the single bus signal line P1 has two modes of high output, namely, push-pull output and open-drain pull-up.

[0022] The invention adds a bus auxiliary signal line so that the bus driving capability can be set according to needs, and is a single bus circuit with flexible configuration driving capability.

[0023] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is the internal equivalent circuit of a single bus;

[0025] Figure 2 This is a circuit diagram of a single-chip microcomputer using a single bus to read the output of a temperature sensor;

[0026] Figure 3 It is the principle of the parasitic power supply circuit where the single-chip microcomputer powers the sensor through the single bus.

[0027] Figure 4 It is the single bus circuit of the present invention with flexible configuration of driving ability.

[0028] Figure 5 It is the single bus circuit of Embodiment 2 of the present invention. Detailed implementation manners

[0029] As Figure 4 shown, this embodiment is a single bus circuit with flexible configuration of driving ability, including a single bus signal line P1 connecting the communication host and the sensor. At the communication host end, the single bus signal line P1 is connected to the working power supply through a pull-up resistor Rup1, and a current-limiting resistor R1 is also provided on the single bus signal line P1; it also includes a group of bus auxiliary signal lines P2...Pi...Pn; where i and n are natural numbers, and 1 < i ≤ n. For any bus auxiliary signal line Pi, at the communication host end, the bus auxiliary signal line Pi is connected to the working power supply through a pull-up resistor Rup i, and a current-limiting resistor Ri is provided on the bus auxiliary signal line Pi; the current-limiting resistor Ri is connected to the end of the current-limiting resistor R1 far from the communication host through the corresponding control switch Ki at the end far from the communication host. In practice, the pull-up resistor Rup1 is much larger than the current-limiting resistor R1; the pull-up resistor Rup i is much larger than the current-limiting resistor Ri. In practice, as Figure 1 shown in the schematic diagram, the pull-up resistor is 4.7K. For the convenience of calculation in this embodiment, n is taken as 7. Therefore, there is one single bus signal line P1 and six bus auxiliary signal lines P2, P3, P4, P5, P6, P7. The seven pull-up resistors are 10K Ω, and the seven current-limiting resistors are 10Ω respectively. A control switch K, namely K1, K2, K3, K4, K5, K6, K7 respectively, is added to each of the one single bus signal line P1 and the six bus auxiliary signal lines P2, P3, P4, P5, P6, P7. They are electronic switches made of MOS transistors, and whether the switch is closed is controlled by the MCU to achieve flexible configuration of the driving ability. The push-pull output high ability of each single bus signal line P and the six bus auxiliary signal lines Pi is 35mA. At this time, the switches K1, K2, K3, K4, K5, K6, K7 on the one single bus signal line P1 and the six bus auxiliary signal lines P2, P3, P4, P5, P6, P7 are all closed, and the output low ability is 5mA only when the control switch K1 is closed.

[0030] When starting up, P2...Pn are all in the floating input mode, and P1 is in the mode of output high (push-pull output or open-drain pull-up).

[0031] Mode selection:

[0032] 1. MCU sets the working mode of P2...Pn according to the configuration parameters.

[0033] 2. The configuration parameters can be modified externally through the communication interface to set the working mode of P2...Pn.

[0034] Enhanced Output High:

[0035] When the upper output of P1 is high, according to the required enhanced capability, P2-Pm (2<=m<=n) is synchronously controlled to change to open drain output mode and output high.

[0036] The ability to output high depends on the upper resistor.

[0037] If an additional P pin is synchronously controlled, the driving capacity is doubled, and the output capacity is approximately equal to 5K Ω. If three P pins are synchronously controlled, the driving capacity is quadrupled, and the output capacity is approximately equal to 2.5K Ω.

[0038] Extremely high output:

[0039] When the push-pull output of P1 is high, according to the required enhanced capability, P2-Pm (2<=m<=n) is synchronously controlled to change to push-pull output mode, and the output is high.

[0040] If an additional P pin is synchronously controlled, the driving capacity is doubled. If 3 P pins are synchronously controlled, the driving capacity is quadrupled. If an additional P pin is synchronously controlled, the driving capacity is doubled, and the output capacity is approximately equal to 5KΩ pull-up + 10mA. If 3 P pins are synchronously controlled, the driving capacity is quadrupled, and the output capacity is approximately equal to 2.5KΩ + 20mA.

[0041] Enhanced Output Low:

[0042] When P1 outputs low, P2-Pm (2<=m<=n) is synchronously controlled to change to high output mode and output low according to the required enhanced capability.

[0043] If an additional P pin is synchronously controlled, the driving capacity is doubled. If 3 P pins are synchronously controlled, the driving capacity is quadrupled. If an additional P pin is synchronously controlled, the driving capacity is doubled, and the output capacity is approximately equal to 10mA-5K Ω pull-up. If 3 P pins are synchronously controlled, the driving capacity is quadrupled, and the output capacity is approximately equal to 20mA-2.5K Ω.

[0044] Input is not enhanced:

[0045] When P is in open-drain high or switched to pull-up input waiting for chip response, P2...Pn are all switched to floating input mode.

[0046] Input pull-up:

[0047] When P is in open-drain high or switched to pull-up input waiting for chip response, P2-Pm (2<=m<=n) are all switched to pull-up input mode.

[0048] If an additional P pin is synchronously controlled, the pull-up capability is approximately equal to 5K Ω. If three P pins are synchronously controlled, the pull-up capability is quadrupled, and the pull-up capability is approximately equal to 2.5K Ω.

[0049] Example 2 Figure 5 As shown, this embodiment is the same as Embodiment 1, and also has a single bus signal line P1 and six bus auxiliary signal lines P2, P3, P4, P5, P6, and P7, except that the resistance values ​​of the pull-up resistors and the current limiting resistors are different. The resistance values ​​of the pull-up resistors Rup2, Rup3, Rup4, Rup5, Rup6, and Rup7 are 1.25K Ω, 2.5K Ω, 5K Ω, 20K Ω, 40K Ω, and 80K Ω, respectively, the resistance value of the current limiting resistor R1 is 10Ω, and the resistance values ​​of R2, R3, R4, R5, R6, and R7 are 1.25Ω, 2.5Ω, 5Ω, 20Ω, 40Ω, and 80Ω, respectively. At this time, each signal line includes a bus signal line P1. The drives of the six bus auxiliary signal lines P2, P3, P4, P5, P6, and P7 are all different, and increase or decrease in multiples. The driving capacity of the bus signal line P1 is 5mA as a benchmark, and the driving capacities of P4, P3, and P2 are 10mA, 20mA, and 40mA respectively. The driving capacities of P5, P6, and P7 are 2.5mA, 1.25mA, and 0.625mA respectively. Under the control of the MCU, the driving capacity of P1 can be increased or decreased as needed. In practice, the control switches K7, K6, K5, K1, K4, K3, and K2 correspond to MCU output data lines 1-7 respectively.

Claims

1. A single bus circuit with flexible configuration driving capability, comprising a single bus signal line P1 connecting a communication host and a sensor, wherein at the communication host end, the single bus signal line P1 is connected to a working power supply through a pull-up resistor Rup1, and a current limiting resistor R1 is also provided on the single bus signal line P1; characterized in that: It also includes a set of bus auxiliary signal lines P2...Pi...Pn; For any bus auxiliary signal line Pi, at the end of the communication host, the bus auxiliary signal line Pi is connected to the working power supply through the pull-up resistor Rupi, and a current limiting resistor Ri is set on the bus auxiliary signal line Pi; the current limiting resistor Ri is connected to the end away from the communication host through the corresponding control switch Ki and the current limiting resistor R1 is connected to the end away from the communication host; here i and n are natural numbers, and 1 <i≤n。 2. The single bus circuit with flexible configuration driving capability according to claim 1, characterized in that: The pull-up resistor Rup1 is much larger than the current limiting resistor R1; the pull-up resistor Rupi is much larger than the current limiting resistor Ri.

3. The single bus circuit with flexible configuration driving capability according to claim 2, characterized in that: The current limiting resistor R1 is equal to any current limiting resistor Ri.

4. The single bus circuit with flexible configuration driving capability according to claim 3, characterized in that: The pull-up resistor Rup1 and the pull-up resistor Rupi both have a resistance of 10K, and the current limiting resistor R1 and any current limiting resistor Ri both have a resistance of 10Ω.

5. The single bus circuit with flexible configuration driving capability according to claim 2, characterized in that: The pull-up resistor Rup1 has the same resistance value as any pull-up resistor Rupi.

6. The single bus circuit with flexible configuration driving capability according to claim 4, characterized in that: n=7, the resistance of the pull-up resistor Rup1 is 10KΩ, the resistance values ​​of the pull-up resistors Rup2, Rup3, Rup4, Rup5, Rup6, and Rup7 are 1.25KΩ, 2.5KΩ, 5KΩ, 20K, 40K, and 80K respectively, the resistance value of the current limiting resistor R1 is 10Ω, and the resistance values ​​of R2, R3, R4, R5, R6, and R7 are 1.25, 2.5Ω, 5Ω, 20Ω, 40, and 80Ω respectively.

7. The single bus circuit with flexible configuration driving capability according to claim 6, characterized in that: A control switch K1 is provided on the single bus signal line P1.

8. The single bus circuit with flexible configuration driving capability according to claim 7, characterized in that: The control switch K1 and the control switch Ki are MOS tubes controlled by a microprocessor respectively.

9. A control method for a single bus circuit with flexible configuration drive capability, characterized in that: The single bus circuit comprises a single bus signal line P1 and a group of bus auxiliary signal lines P2…Pi…Pn; The single bus signal line P1 and the bus auxiliary signal line Pi have floating input mode and output high mode under MCU control; The control method comprises the following steps: When powered on, the bus auxiliary signal lines P2...Pn are all in floating input mode, and the single bus signal line P1 is in output high mode; The MCU sets the working mode of the bus auxiliary signal lines P2...Pn according to the configuration parameters.

10. The control method of a single bus circuit with flexible configuration driving capability according to claim 1, characterized in that: The single bus signal line P1 has two modes of high output: push-pull output and open-drain pull-up.

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