Model file generation method and device, equipment, storage medium and program product

By generating a model file, detecting and compensating for the etching load deviation, the etching quality problem caused by the load effect in the etching process is solved, and the higher etching accuracy and stability are achieved.

CN119358499AActive Publication Date: 2025-01-24SHENZHEN JINGYUAN INFORMATION TECH CO LTD
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Patent Information

Application Number
CN202411380819.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-30
Publication Date
2025-01-24
Estimated Expiration
2044-09-30

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Abstract

The invention discloses a model file generation method and device, equipment, a storage medium and a program product, and relates to the technical field of etching. The model file generation method comprises the steps of obtaining target load effect data corresponding to a plurality of target position points in a chip layout; according to the coordinate position of each target position point and a range division strategy corresponding to the target etching load effect, obtaining a plurality of area ranges corresponding to each target position point; for each target position point, respectively calculating the area density of the area range corresponding to the target position point; according to the target load effect data of each target position point and the region density of each corresponding region range, respectively determining a target influence region of each target position point affected by the target etching load effect; and generating a model file corresponding to the target etching load effect according to the target influence area corresponding to each target position point.
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Description

Technical Field

[0001] The present application belongs to the field of etching technology, and in particular relates to a method, device, equipment, storage medium and program product for generating a model file. Background Art

[0002] In integrated circuit manufacturing, as the critical dimensions shrink, the load effect in the etching process is becoming more and more common. The load effect refers to the effect that the etching rate of the pattern to be etched in different environments decreases or is unevenly distributed due to the difference in the consumption and supply of the etching gas. If the load effect in the etching process is not well resolved, it will seriously affect the etching quality of the pattern.

[0003] In the existing method, etching is mainly compensated by optical proximity correction, using two methods: enlarging the pattern size or reducing the pattern size.

[0004] However, this method can only solve the aspect ratio effect in the load effect, and does not take into account the influence of the long-range etching load effect or the short-range etching load effect in the load effect, resulting in poor etching quality. Summary of the invention

[0005] The embodiments of the present application provide a method, device, equipment, storage medium and program product for generating a model file, which can improve the etching quality in an etching process.

[0006] In one aspect of an embodiment of the present application, a method for generating a model file is provided, comprising:

[0007] Obtaining target load effect data corresponding to each of a plurality of target position points in a chip layout, wherein the plurality of target position points are position points capable of measuring a target etching load effect, and the target etching load effect includes at least one of a long-range etching load effect and a short-range etching load effect;

[0008] According to the coordinate position of each target position point and the range division strategy corresponding to the target etching load effect, a plurality of area ranges corresponding to each target position point are obtained respectively;

[0009] For each target position point, the regional density of the area range corresponding to the target position point is calculated respectively, and the regional density is used to characterize the proportion of the area occupied by the etching area within the area range;

[0010] According to the target load effect data of each target position point and the regional density of each corresponding regional range, the target influence area of ​​each target position point affected by the target etching load effect is determined respectively, and the target influence area is the regional range where the regional density meets the preset fitting condition;

[0011] According to the target influence area corresponding to each target position point, a model file corresponding to the target etching load effect is generated, so as to detect the etching load deviation of each chip layout according to the model file. The etching load deviation is the deviation caused by the target etching load effect.

[0012] In one aspect of an embodiment of the present application, a device for generating a model file is provided, comprising:

[0013] A data acquisition module, used to acquire target load effect data corresponding to each of a plurality of target position points in a chip layout, wherein the plurality of target position points are position points capable of measuring a target etching load effect, and the target etching load effect includes at least one of a long-range etching load effect and a short-range etching load effect;

[0014] A region division module, for obtaining a plurality of region ranges corresponding to each target position point according to the coordinate position of each target position point and the range division strategy corresponding to the target etching load effect;

[0015] A density calculation module is used to calculate the regional density of the area range corresponding to each target position point, and the regional density is used to characterize the proportion of the area occupied by the etching area within the area range;

[0016] A region determination module is used to determine the target impact region of each target position point affected by the target etching load effect according to the target load effect data of each target position point and the region density of each corresponding region range, wherein the target impact region is the region range where the region density meets the preset fitting condition;

[0017] The file generation module is used to generate a model file corresponding to the target etching load effect according to the target influence area corresponding to each target position point, so as to detect the etching load deviation of each chip layout according to the model file. The etching load deviation is the deviation caused by the target etching load effect.

[0018] According to one aspect of an embodiment of the present application, an electronic device is provided, which includes: a memory and a program or instruction stored in the memory and executable on a processor, wherein when the program or instruction is executed by the processor, a method for generating a model file as provided in any aspect of the above-mentioned embodiment of the present application is implemented.

[0019] In one aspect of an embodiment of the present application, a readable storage medium is provided, on which a program or instruction is stored. When the program or instruction is executed by a processor, a method for generating a model file as provided in any aspect of the above-mentioned embodiment of the present application is implemented.

[0020] According to one aspect of an embodiment of the present application, a computer program product is provided. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes a method for generating a model file as provided in any aspect of the above-mentioned embodiment of the present application.

[0021] In the generation method of the model file provided in the embodiment of the present application, according to the target etching load effect, multiple corresponding target position points in the chip layout are selected, and the regional density of multiple regional ranges corresponding to each target position point is calculated respectively. Then, according to the target load effect data of each target position point and the regional density of each regional range corresponding to each target position point, the target influence area in each target position point that is most obviously affected by the target etching load effect is determined. Finally, according to the target influence area corresponding to each target position point, a model file corresponding to the target etching load effect is generated. In this way, the model file finally obtained by the embodiment of the present application records the target influence area of ​​each target position point that is most obviously affected by the target etching load effect. According to the model file, the preset model can be optimally configured, so that the preset model can accurately detect the etching load deviation caused by the target etching load effect of the chip layout, and then can solve the long-range etching load effect and short-range etching load effect problems occurring in the etching process, and improve the etching quality in the etching process. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0023] Figure 1 It is a flowchart of a method for generating a model file provided by an embodiment of the present application;

[0024] Figure 2 is a flowchart of a method for generating a model file provided in another embodiment of the present application;

[0025] Figure 3 This is a schematic diagram of the area range corresponding to the target position point under the long-range etching load effect provided by an embodiment of the present application;

[0026] Figure 4 This is a schematic diagram of target position points of a long-range etching loading effect provided by an embodiment of the present application;

[0027] Figure 5 This is a schematic diagram of the target position point of the short-range etching loading effect provided by an embodiment of the present application;

[0028] Figure 6 It is a structural schematic diagram of a device for generating a model file provided by an embodiment of the present application;

[0029] Figure 7 It is a structural diagram of a device for generating a model file provided in one embodiment of the present application. DETAILED DESCRIPTION

[0030] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0031] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0032] It should be noted that the acquisition, storage, use, and processing of data in the technical solution of this application are in compliance with the relevant provisions of national laws and regulations.

[0033] It should be noted that in the embodiments of the present application, certain software, components, models and other existing solutions in the industry may be mentioned, and they should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.

[0034] In the existing method, etching is mainly compensated by optical proximity correction, using two methods: enlarging the pattern size or reducing the pattern size. However, this method can only solve the aspect ratio effect in the load effect, and does not take into account the influence of the long-range etching load effect or the short-range etching load effect in the load effect, resulting in poor etching quality.

[0035] The purpose of the present application is to provide a method, device, equipment, storage medium and program product for generating a model file. In the method for generating a model file provided in the embodiment of the present application, according to the target etching load effect, multiple corresponding target position points in the chip layout are selected, and the regional density of multiple regional ranges corresponding to each target position point is calculated respectively. Then, according to the target load effect data of each target position point and the regional density of each regional range corresponding to each target position point, the target influence area in each target position point that is most obviously affected by the target etching load effect is determined. Finally, according to the target influence area corresponding to each target position point, a model file corresponding to the target etching load effect is generated. In this way, the model file finally obtained by the embodiment of the present application records the target influence area in which each target position point is most obviously affected by the target etching load effect. According to the model file, the preset model can be optimally configured, so that the preset model can accurately detect the etching load deviation caused by the target etching load effect of the chip layout, thereby solving the long-range etching load effect and short-range etching load effect problems occurring in the etching process, and improving the etching quality in the etching process.

[0036] The following describes the specific embodiments of the method, device, equipment, storage medium and program product for generating the model file provided by the embodiments of the present application. The following first describes the method for generating the model file.

[0037] Figure 1 A flow chart of a method for generating a model file is provided. The method for generating a model file can be applied to a server. The method for generating a model file can include the following S101 to S105.

[0038] S101, obtaining target load effect data corresponding to each of a plurality of target position points in a chip layout, wherein the plurality of target position points are position points capable of measuring a target etching load effect, and the target etching load effect includes at least one of a long-range etching load effect and a short-range etching load effect.

[0039] In this embodiment, the target position point is a position point determined according to the target etching load effect and capable of measuring the target etching load effect.

[0040] The target etching load effect refers to the effect that the etching rates at different locations in the chip layout are different or the etching distribution at different locations in the chip layout is uneven due to the difference in the consumption and supply of the etching gas.

[0041] Among them, the long-range etching load effect refers to the load effect in which the etching speed gradually decreases as the area to be etched increases within the macroscopic range; the short-range etching load effect refers to the load effect in which the etching speed is slow in places where the etching pattern is dense, and the etching speed is fast in places where the etching pattern is sparse within the local range. For example, when the target etching load effect is the long-range etching load effect, what needs to be reflected at this time is the change law between the etching speed and the etching area within the macroscopic range. Therefore, at this time, feature points can be selected from each unit in the chip layout as target position points; when the target etching load effect is the short-range etching load effect, what needs to be reflected at this time is the change law between the etching speed and the etching area within the microscopic range. Therefore, at this time, multiple feature points can be selected from specific units in the chip layout as target position points.

[0042] The target load effect data is used to characterize data reflecting the specific situation of the target etching load effect. For example, the target load effect data can be the etching depth of each target position point.

[0043] As an example, when the target etching load effect is a long-range etching load effect, the server selects feature points from each unit in the chip layout as target position points, and obtains the etching depth of each target position point.

[0044] S102, obtaining a plurality of area ranges corresponding to each target position point according to the coordinate position of each target position point and the range division strategy corresponding to the target etching load effect.

[0045] In this embodiment, the range division strategy is used to represent a strategy for dividing the area where the target location point is located.

[0046] For example, when the target etching load effect is a long-range etching load effect, the range division strategy may be to set the initial length to 10 um, and set the step length of 5 um to increase successively until 10 area ranges are obtained. The area range may be a rectangular area or a circular area.

[0047] As an example, the server takes the coordinate position of the target point as the center, and then divides the first area range corresponding to the target point with a rectangular side length of 10um. Then increase the step size, that is, use 15um as the rectangular side length to divide the second area range corresponding to the target point. In this way, increase multiple step sizes in sequence until 10 area ranges corresponding to the target point are obtained.

[0048] S103, for each target position point, respectively calculating the regional density of the region range corresponding to the target position point, where the regional density is used to characterize the proportion of the area occupied by the etching region within the region range.

[0049] In this embodiment, the area density is the ratio of the area occupied by the etched area within the area to the total area within the area.

[0050] As an example, for each area range corresponding to the target location point, the server uses image processing technology (such as edge detection or morphological operation) to identify the etched area within the area range, and calculates the ratio of the area of ​​the etched area to the total area within the area range, thereby obtaining the area density of each area range.

[0051] S104, according to the target load effect data of each target position point and the regional density of each corresponding regional range, respectively determine the target influence area of ​​each target position point affected by the target etching load effect, the target influence area is the regional range where the regional density meets the preset fitting condition.

[0052] In this embodiment, the target impact region is used to characterize the region within each region range of the target location point that has a significant impact on the target etching load effect of the target location point.

[0053] The preset fitting condition is used to screen the target impact area. For example, the preset fitting condition may be a preset density threshold.

[0054] As an example, the server pre-sets a density threshold, and then compares the regional density corresponding to each area range with the density threshold. When the regional density corresponding to the area range exceeds the density threshold, it is considered that the area range has a significant impact on the target etching load effect of the target location point, and the area range is determined as the target affected area of ​​the target location point affected by the target etching load effect.

[0055] S105, generating a model file corresponding to the target etching load effect according to the target influence area corresponding to each target position point, so as to detect the etching load deviation of each chip layout according to the model file, and the etching load deviation is the deviation caused by the target etching load effect.

[0056] In this embodiment, the model file may include the coordinates of the target location point and the target influence area corresponding to the target location point.

[0057] As an example, the server integrates the target impact area corresponding to each target position point to generate a model file corresponding to the target etching load effect. The model file is then integrated into the EDA tool or the pre-set model, so that the EDA tool or the pre-set model can detect the target etching load effect of each chip layout in the full chip design process according to the target impact area of ​​each target position point in the model file.

[0058] As another example, Figure 2 As shown, a flow chart of another method for generating a model file is provided. Among them, the target etching load effect includes a long-range etching load effect and a short-range etching load effect. The server first collects the long-range etching load effect data through S201, and then calculates the density of different ranges of the target position points corresponding to the long-range etching load effect through S202. Then, the short-range etching load effect data is collected through S203, and then the density of different ranges of the target position points corresponding to the short-range etching load effect is calculated through S204. Then, the densities of different ranges corresponding to the long-range etching load effect and the short-range etching load effect are fitted respectively through S205, and finally, the area range corresponding to the smallest fitting error is determined through S206 as the target influence area, so as to generate a model file according to the target influence area.

[0059] In the method for generating the model file provided in the present embodiment, according to the target etching load effect, multiple corresponding target position points in the chip layout are selected, and the regional density of multiple regional ranges corresponding to each target position point is calculated respectively. Then, according to the target load effect data of each target position point and the regional density of each regional range corresponding to each target position point, the target influence area in each target position point that is most obviously affected by the target etching load effect is determined. Finally, according to the target influence area corresponding to each target position point, a model file corresponding to the target etching load effect is generated. In this way, the model file finally obtained by the embodiment of the present application records the target influence area of ​​each target position point that is most obviously affected by the target etching load effect. According to the model file, the preset model can be optimally configured, so that the preset model can accurately detect the etching load deviation caused by the target etching load effect of the chip layout, and then solve the long-range etching load effect and short-range etching load effect problems occurring in the etching process, and improve the etching quality in the etching process.

[0060] As an optional embodiment, the range partitioning strategy includes a minimum partitioning length, a maximum partitioning length, and an interval step length;

[0061] S102 may specifically include:

[0062] Obtaining a minimum division length, a maximum division length, and an interval step length corresponding to a target etching load effect;

[0063] Starting from the minimum division length, the interval step length is increased successively until the maximum division length is reached, and multiple division lengths corresponding to the target position point are obtained;

[0064] For each target position point, the following is performed respectively: taking the coordinate position of the target position point as the center, dividing into multiple area ranges corresponding to the target position point according to each division length.

[0065] In this embodiment, the range division strategy matches the target etching load effect. For example, when the target etching load effect is a long-range etching load effect, the corresponding range division strategy may be: the minimum division length is 50um, the maximum division length is 100um, and the interval step is 5um; when the target etching load effect is a short-range etching load effect, the corresponding range division strategy may be: the minimum division length is 1um, the maximum division length is 30um, and the interval step is 1.5um.

[0066] For example, Figure 3 As shown, a schematic diagram of the area range corresponding to the target position point under the long-range etching load effect is provided. Among them, the area range corresponding to the target position point is a circular area. Specifically, with the target position point as the center and 50um as the radius, the small circle 310 constructed is the smallest area range; with the target position point as the center and 100um as the radius, the large circle 320 constructed is the largest area range. Then, between the small circle 310 and the large circle 320, multiple circles are further divided according to the interval step size, so that multiple area ranges corresponding to the target position point under the long-range etching load effect can be obtained.

[0067] As an example, the server first obtains the coordinate position of the target position point and the minimum division length, maximum division length and interval step length corresponding to the target etching load effect.

[0068] Then, the division length sequence corresponding to the target position point is calculated. Specifically, starting from the minimum division length, an interval step is increased each time until the maximum division length is reached, thereby obtaining multiple division lengths corresponding to the target position point to form a division length sequence.

[0069] Then, for each division length in the division length sequence, a square area or a circular area is divided with the coordinate position of the target position point as the center as the area range corresponding to the target position point.

[0070] Specifically, in the case of a circular area, the area is divided using the division length as the radius to obtain the area range corresponding to the target position point.

[0071] In the case of a square area, subtract half of the division length from the x-direction coordinate of the target position point, and add half of the division length to the y-direction coordinate to obtain the upper left corner vertex position of the square area; add half of the division length to the x-direction coordinate of the target position point, and add half of the division length to the y-direction coordinate to obtain the upper right corner vertex position of the square area; add half of the division length to the x-direction coordinate of the target position point, and subtract half of the division length from the y-direction coordinate to obtain the lower right corner vertex position of the square area; subtract half of the division length from the x-direction coordinate of the target position point, and subtract half of the division length from the y-direction coordinate to obtain the lower left corner vertex position of the square area, so as to obtain the area range corresponding to the target position point.

[0072] As shown in Table 1 below, a schematic table of different regional ranges and corresponding densities corresponding to target position points is provided. Among them, the first column is the serial number corresponding to the target position point, the second column is the X-axis coordinate corresponding to the target position point, the third column is the Y-axis coordinate corresponding to the target position point, the fourth column is the critical size corresponding to the target position point, the sixth column is the target etching load effect type corresponding to the target position point, the seventh column is the etching load deviation corresponding to the target position point, the eighth column is the regional range corresponding to the target position point, and the ninth column is the density of the regional range corresponding to the target position point.

[0073] Table 1 Schematic diagram of different area ranges and corresponding densities corresponding to target location points

[0074]

[0075] Through this embodiment, multiple area ranges are systematically divided according to the coordinate position of the target position point and the range division strategy corresponding to the target etching load effect, which is helpful for the subsequent optimization analysis of the target etching load effect, and further improves the etching quality in the etching process.

[0076] As an optional embodiment, S104 may specifically include:

[0077] For each target location point, perform the following steps respectively:

[0078] A target number of regional ranges are randomly selected from the regional ranges corresponding to the target position points to form a fitting regional group, where the target number corresponds to the target etching load effect;

[0079] For each fitting area group corresponding to the target position point, the area density of each area range in the fitting area group is fitted to obtain the fitting load effect data;

[0080] According to each fitting load effect data and the target load effect data of the target position point, the fitting error of each fitting area group is obtained;

[0081] The region range in the fitting region group with the smallest fitting error is determined as the target affected region of the target position point affected by the target etching load effect.

[0082] In this embodiment, according to the complexity of the etching load effect and the process precision requirement, it is necessary to select an appropriate number of regional ranges from each regional range for fitting, and the number of the fittings is the predetermined target number.

[0083] The target number corresponds to the target etching load effect. Considering that the etching area of ​​the long-range etching load effect is larger than that of the short-range etching load effect, its fitting complexity is higher. In order to ensure the efficiency of the fitting, the target number of the long-range etching load effect can be smaller than the target number corresponding to the short-range etching load effect. For example, when the target etching load effect is the long-range etching load effect, the target number can be 3; when the target etching load effect is the short-range etching load effect, the target number can be 5.

[0084] As an example, when the target etching load effect is a long-range etching load effect, for each target position point, the server selects three area ranges from all corresponding area ranges randomly or according to a preset selection strategy (for example, selection based on the size of the area range) to form a fitting area group, until various combinations are traversed to obtain multiple fitting area groups corresponding to the target position point.

[0085] Then, for each fitting region group, according to the region density of each region range in the fitting region group, a statistical method (such as linear regression or polynomial regression, etc.) is used to fit the relationship between the region density and the target etching load effect to obtain fitting load effect data. These data reflect the predicted etching load effect under the configuration of the current fitting region group.

[0086] Then, for each fitting region group, the fitting load effect data obtained by fitting is compared with the target load effect data of the target position point, and the fitting error corresponding to the fitting region group is calculated.

[0087] Finally, the fitting errors of all fitting area groups are compared, and the group with the smallest fitting error is selected as the optimal fitting area group. The area range in this group is determined as the target affected area of ​​the target position point affected by the target etching load effect. These areas will be paid special attention to in the subsequent process control to ensure the accuracy of the etching process.

[0088] Through this embodiment, the target influence area of ​​the target position point affected by the target etching load effect is determined according to the target load effect data of the target position point and the corresponding regional density of each regional range. In this way, the optimal influence area of ​​the target position point affected by the target etching load effect is solved through density fitting, which is helpful for the subsequent generation of the model file corresponding to the target etching load effect, and the etching load deviation caused by the target etching load effect can be accurately detected according to the model file, thereby improving the etching quality in the etching process.

[0089] As an optional embodiment, S103 may specifically include:

[0090] For each area range of each target location point, perform the following operations respectively:

[0091] Obtain the area of ​​the region range and the etching area of ​​the etching region within the region range;

[0092] Divide the etched area by the region area to obtain the region density of the region range.

[0093] In this embodiment, when the area range is a square area range, the server uses the side length of the area range to calculate the area of ​​the area range; when the area range is a circular area range, the server uses the radius of the area range to calculate the area of ​​the area range.

[0094] Then, the server identifies the etching region within the regional range and calculates the etching area of ​​the etching region within the regional range.

[0095] Finally, the area density within the region range is obtained by dividing the etched area within the region range by the region area within the region range.

[0096] Through this embodiment, the regional density of the regional range is calculated according to the regional area of ​​the regional range and the etching area of ​​the etching area, which is helpful to solve the optimal affected area of ​​the target position point by the target etching load effect through density fitting, thereby improving the etching quality in the etching process.

[0097] As an optional embodiment, the target load effect data includes a critical dimension and an etching load deviation;

[0098] S101 may specifically include:

[0099] Obtain the key dimensions corresponding to multiple target position points in the chip layout;

[0100] The critical dimensions of each target position point are subtracted from the reference dimensions corresponding to the target etching load effect to obtain the etching load deviation of each target position point.

[0101] In this embodiment, the reference size is a target size value set according to the performance requirements and process capabilities of the chip design. For example, the reference size can be a preset value.

[0102] As an example, the server can use high-precision measurement tools such as scanning electron microscope (SEM), atomic force microscope (AFM) or optical critical dimension meter (OCD) to accurately measure the target position point on the chip layout, so as to obtain the critical dimension corresponding to the target position point.

[0103] Then, for each target position point, the measured critical dimension is compared with the reference dimension, and the difference is calculated as the etching load deviation of the target position point.

[0104] Through this embodiment, accurate measurement of key dimensions of multiple target positions in the chip layout and effective evaluation of etching load deviation can be achieved, thereby providing strong support for subsequent optimization analysis of target etching load effects, and further improving the etching quality in the etching process.

[0105] As an optional embodiment, when the target etching load effect is a long-range etching load effect, the target position point is a characteristic position point of the first grid in different units of the chip layout, each first grid corresponds to the same position of the unit, and the reference size is a critical size of the first grid of the central unit of the chip layout;

[0106] When the target etching load effect is a short-range etching load effect, the target position point is the characteristic position point of the second grid in the same unit of the chip layout, each second grid corresponds to a different position of the unit, and the reference size is the critical size of the central grid in the chip layout unit.

[0107] In this embodiment, when the target etching load effect is a long-range etching load effect, what needs to be reflected at this time is the variation law between the etching speed and the etching area in a macroscopic range, that is, the target position point at this time must cover the entire chip layout to reflect the macroscopic law.

[0108] Therefore, the target position point at this time is the characteristic position point of the first grid in different cells of the chip layout, and each first grid corresponds to the same position of the cell. For example, the target position point can be the center point of the center grid of each cell, and the reference size is the key size of the center grid position of the center cell of the chip layout.

[0109] As an example, Figure 4 As shown, a schematic diagram of the target position point of the long-range etching load effect is provided. The chip layout includes nine units, namely m1, m2, m3, m4, m5, m6, m7, m8 and m9, and the center point of the center grid of each unit is selected as the target position point.

[0110] When the target etching load effect is a short-range etching load effect, what needs to be reflected at this time is the changing law between the etching speed and the etching area in the microscopic range, that is, the target position point at this time must cover each position in the unit of the chip layout to reflect the microscopic law.

[0111] Therefore, the target position point at this time is the characteristic position point of the second grid in the same unit of the chip layout, and each second grid corresponds to a different position of the unit. For example, the target position point can be the center point of each grid corresponding to the target line segment in the unit, and the reference size is the key size of the center grid position in the unit. Among them, the target line segment is the line connecting any vertex to the center point in the unit of the chip layout.

[0112] As an example, Figure 5 As shown, a schematic diagram of the target position point of the short-range etching load effect is provided. The center point position of each grid on the line from the lower left vertex to the center point in the unit is selected as the target position point.

[0113] Through this embodiment, the target position point and the reference size corresponding to the target etching load effect are accurately obtained, thereby providing strong support for the subsequent optimization analysis of the target etching load effect, and further improving the etching quality in the etching process.

[0114] Based on the generation method of the model file, the present application also provides a specific embodiment of the generation device of the model file.

[0115] like Figure 6 As shown, the model file generation device 600 provided in the embodiment of the present application includes a data acquisition module 610, a region division module 620, a density calculation module 630, a region determination module 640 and a file generation module 650.

[0116] A data acquisition module 610 is used to acquire target load effect data corresponding to each of a plurality of target position points in a chip layout, wherein the plurality of target position points are position points capable of measuring a target etching load effect, and the target etching load effect includes at least one of a long-range etching load effect and a short-range etching load effect;

[0117] A region division module 620 is used to obtain a plurality of region ranges corresponding to each target position point according to the coordinate position of each target position point and the range division strategy corresponding to the target etching load effect;

[0118] The density calculation module 630 is used to calculate the regional density of the area range corresponding to each target position point, and the regional density is used to characterize the proportion of the area occupied by the etching area within the area range;

[0119] The region determination module 640 is used to determine the target influence region of each target position point affected by the target etching load effect according to the target load effect data of each target position point and the region density of each corresponding region range, wherein the target influence region is the region range where the region density satisfies the preset fitting condition;

[0120] The file generation module 650 is used to generate a model file corresponding to the target etching load effect according to the target influence area corresponding to each target position point, so as to detect the etching load deviation of each chip layout according to the model file, and the etching load deviation is the deviation caused by the target etching load effect.

[0121] As an optional embodiment, the range partitioning strategy includes a minimum partitioning length, a maximum partitioning length, and an interval step length;

[0122] The area division module 620 specifically includes the following units:

[0123] An information acquisition unit, used to acquire a minimum division length, a maximum division length, and an interval step length corresponding to a target etching load effect;

[0124] A length determination unit, used to start from the minimum division length and sequentially increase the interval step length until the maximum division length is reached, thereby obtaining multiple division lengths corresponding to the target position point;

[0125] The range division unit is used to perform, for each target position point, the following operations: taking the coordinate position of the target position point as the center and dividing the target position point into a plurality of area ranges corresponding to the target position point according to each division length.

[0126] As an optional embodiment, the region determination module 640 specifically includes the following units:

[0127] A region group forming unit is used to arbitrarily select a target number of region ranges from each region range corresponding to a target position point to form a fitting region group, wherein the target number corresponds to a target etching load effect;

[0128] A density fitting unit is used to fit the regional density of each regional range in the fitting regional group corresponding to the target position point, so as to obtain fitting load effect data;

[0129] An error determination unit, used for obtaining the fitting errors of each fitting region group according to each fitting load effect data and the target load effect data of the target position point;

[0130] The region determination unit is used to determine the region range in the fitting region group with the smallest fitting error as the target affected region of the target position point affected by the target etching load effect.

[0131] As an optional embodiment, the density calculation module 630 specifically includes the following units:

[0132] An area acquisition unit, used to acquire the area of ​​the region range and the etching area of ​​the etching region within the region range;

[0133] The density determination unit is used to divide the etched area by the area of ​​the region to obtain the region density of the region range.

[0134] As an optional embodiment, the target load effect data includes a critical dimension and an etching load deviation;

[0135] The data acquisition module 610 specifically includes the following units:

[0136] A dimension acquisition unit, used to acquire key dimensions corresponding to multiple target position points in the chip layout;

[0137] The deviation determination unit is used to subtract the key dimension of each target position point from the reference dimension corresponding to the target etching load effect to obtain the etching load deviation of each target position point.

[0138] Based on the generation method of the model file, the present application also provides a specific embodiment of the generation device of the model file.

[0139] Figure 7 A schematic diagram of the hardware structure of a device for generating a model file provided in an embodiment of the present application is shown.

[0140] The device for generating a model file may include a processor 701 and a memory 702 storing computer program instructions.

[0141] Specifically, the processor 701 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0142] The memory 702 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 702 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 702 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 702 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 702 is a non-volatile solid-state memory.

[0143] The processor 701 implements any one of the model file generation methods in the above embodiments by reading and executing computer program instructions stored in the memory 702 .

[0144] In one example, the model file generation device may further include a communication interface 703 and a bus 710. Figure 7 As shown, the processor 701, the memory 702, and the communication interface 703 are connected via a bus 710 and communicate with each other.

[0145] The communication interface 703 is mainly used to implement communication between various modules, devices, layout units and / or equipment in the embodiments of the present application.

[0146] Bus 710 includes hardware, software or both, and the parts of the generating equipment of model file are coupled to each other.For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In suitable cases, bus 710 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.

[0147] In addition, in combination with the method for generating a model file in the above embodiment, the embodiment of the present application can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by a processor, any one of the methods for generating a model file in the above embodiment is implemented.

[0148] In addition, in combination with the method for generating a model file in the above-mentioned embodiment, the embodiment of the present application may provide a computer program product for implementation. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for generating a model file provided in any aspect of the above-mentioned embodiment of the present application.

[0149] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0150] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0151] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0152] Aspects of the present disclosure are described above with reference to the flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0153] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the system, module and layout unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A method for generating a model file, characterized in that: include: Acquire target load effect data corresponding to each of a plurality of target position points in a chip layout, wherein the plurality of target position points are position points capable of measuring a target etching load effect, wherein the target etching load effect includes at least one of a long-range etching load effect and a short-range etching load effect; According to the coordinate position of each of the target position points and the range division strategy corresponding to the target etching load effect, a plurality of area ranges corresponding to each of the target position points are obtained respectively; For each of the target position points, respectively calculate the area density of the area range corresponding to the target position point, the area density is used to characterize the proportion of the area occupied by the etching area within the area range; According to the target load effect data of each target position point and the corresponding regional density of each regional range, respectively determine the target influence area of ​​each target position point affected by the target etching load effect, the target influence area is the regional range where the regional density meets the preset fitting condition; According to the target impact area corresponding to each of the target position points, a model file corresponding to the target etching load effect is generated, so as to detect the etching load deviation of each chip layout according to the model file, and the etching load deviation is the deviation caused by the target etching load effect.

2. The method according to claim 1, characterized in that The range partitioning strategy includes a minimum partition length, a maximum partition length, and an interval step length; The method of obtaining a plurality of area ranges corresponding to each of the target position points according to the coordinate position of each of the target position points and the range division strategy corresponding to the target etching load effect respectively includes: Acquire the minimum division length, the maximum division length, and the interval step length corresponding to the target etching load effect; Starting from the minimum division length, the interval step length is increased in sequence until the maximum division length is reached, thereby obtaining a plurality of division lengths corresponding to the target position point; For each of the target position points, respectively perform: taking the coordinate position of the target position point as the center, dividing according to each of the division lengths to obtain a plurality of area ranges corresponding to the target position point.

3. The method according to claim 1, characterized in that The step of determining the target affected area of ​​each target position point affected by the target etching load effect according to the target load effect data of each target position point and the corresponding area density of each area range comprises: For each of the target location points, perform the following steps respectively: Randomly selecting a target number of area ranges from each of the area ranges corresponding to the target position points to form a fitting area group, wherein the target number corresponds to the target etching load effect; For each of the fitting area groups corresponding to the target position point, fitting the area density of each area range in the fitting area group is performed to obtain fitting load effect data; Obtaining a fitting error of each fitting region group according to each of the fitting load effect data and the target load effect data of the target position point; The region range in the fitting region group with the smallest fitting error is determined as a target affected region of the target position point affected by the target etching load effect.

4. The method according to claim 1, characterized in that: The step of calculating, for each of the target position points, the area density of the area range corresponding to the target position point, comprises: For each area range of each target location point, the following operations are performed respectively: Acquire the area of ​​the region range and the etching area of ​​the etching region within the region range; The etched area is divided by the area of ​​the region to obtain the region density of the region range.

5. The method according to any one of claims 1 to 4, characterized in that: The target load effect data includes critical dimensions and etching load deviation; The step of obtaining target load effect data corresponding to each of a plurality of target position points in the chip layout includes: Obtaining key dimensions corresponding to a plurality of target position points in the chip layout; The critical dimensions of each of the target positions are subtracted from the reference dimensions corresponding to the target etching load effect to obtain the etching load deviation of each of the target positions.

6. The method according to claim 5, characterized in that In the case where the target etching load effect is a long-range etching load effect, the target position point is a characteristic position point of a first grid in different units of the chip layout, each of the first grids corresponds to the same position of a unit, and the reference size is a critical size of the first grid of a central unit of the chip layout; When the target etching load effect is a short-range etching load effect, the target position point is a characteristic position point of the second grid in the same unit of the chip layout, each of the second grids corresponds to a different position of the unit, and the reference size is a critical size of the central grid in the chip layout unit.

7. A device for generating a model file, characterized in that: include: A data acquisition module, used to acquire target load effect data corresponding to each of a plurality of target position points in a chip layout, wherein the plurality of target position points are position points capable of measuring a target etching load effect, wherein the target etching load effect includes at least one of a long-range etching load effect and a short-range etching load effect; A region division module, used to obtain a plurality of region ranges corresponding to each of the target position points according to the coordinate position of each of the target position points and the range division strategy corresponding to the target etching load effect; A density calculation module, used for calculating the regional density of the regional range corresponding to each target position point, wherein the regional density is used to characterize the proportion of the area occupied by the etching region within the regional range; A region determination module, for determining, according to the target load effect data of each target position point and the region density of each corresponding region range, a target influence region of each target position point affected by the target etching load effect, wherein the target influence region is a region range where the region density satisfies a preset fitting condition; A file generation module is used to generate a model file corresponding to the target etching load effect according to the target influence area corresponding to each target position point, so as to detect the etching load deviation of each chip layout according to the model file, and the etching load deviation is the deviation caused by the target etching load effect.

8. An electronic device, characterized in that: The device comprises: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method for generating a model file according to any one of claims 1 to 6 is implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the method for generating a model file according to any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the method for generating a model file as described in any one of claims 1 to 6.

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