Active direct display panel and driving method thereof

By using the timing controller to generate clock signals and data signals by using the timing controller in the active straight display panel, and driving different row pixels at the same time during the luminous cycle, solving the problem of numbness and flickering the existing display panel, realizing more uniform and more uniform and evenly Stable display effect.

CN119360769APending Publication Date: 2025-01-24BEIJING XINNENG ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411787595.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-06
Publication Date
2025-01-24

AI Technical Summary

Technical Problem

The existing display panel has problems of pockmarks and flickering when displaying the screen, which is mainly caused by progressive scanning drivers.

Method used

It adopts an active direct display panel, including pixel unit, timing controller and driver module. The clock signal and data signal are generated by the timing controller, and the pixels are driven to emit light and the data signal is stored during the data transmission period. During the light-emitting period within a frame, pixels located in different rows are driven to emit light at the same time. The light-emitting period is longer than the data transmission period.

Benefits of technology

It increases the luminescence time of pixels within the same frame, improves the luminescence brightness of pixels, effectively avoids the problem of uneven display or flickering, and improves the display effect of active direct display panels.

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Abstract

The embodiment of the invention discloses an active direct display panel and a driving method of the active direct display panel. The active direct display panel comprises at least one pixel unit, the pixel units are arranged in an array, and each pixel unit comprises a driving module and at least one pixel; the time schedule controller is connected with the pixel units, and the time schedule controller is used for generating clock signals and data signals; in the data transmission period, the driving module is used for driving the pixels to emit light according to the clock signal and the data signal and storing the data signal; in a light-emitting period in one frame, the driving module is used for driving the pixels of the pixel units in different rows to emit light simultaneously, and the light-emitting period is larger than the data transmission period. According to the technical scheme provided by the embodiment, line-by-line scanning is not needed, the display effect of the direct display panel is improved, and the problems of pocking marks and flickering when the display panel displays a picture are solved.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the field of display technology, and in particular to an active direct display panel and a driving method of the active direct display panel. Background Art

[0002] With the development of display technology, people have higher and higher requirements for display panels. When driving the display, the existing display panels generally need to perform line-by-line scanning driving, and only one line can be lit at the same time, resulting in pitting and flickering problems when the display panel displays the picture. Summary of the invention

[0003] The embodiments of the present invention provide an active direct display panel and a driving method of the active direct display panel to solve the problem of pitting and flickering when the display panel displays images.

[0004] In order to achieve the above technical problems, the present invention adopts the following technical solutions:

[0005] An embodiment of the present invention provides an active direct display panel, including:

[0006] At least one pixel unit, the pixel units are arranged in an array, and the pixel unit includes a driving module and at least one pixel;

[0007] A timing controller is connected to the pixel unit, and is used to generate a clock signal and a data signal;

[0008] In the data transmission period, the driving module is used to drive the pixel to emit light according to the clock signal and the data signal, and store the data signal;

[0009] In a light-emitting period within a frame, the driving module is used to drive the pixels of the pixel units located in different rows to emit light simultaneously, and the light-emitting period is greater than the data transmission period.

[0010] Optional, active direct display panel, also includes:

[0011] At least one clock line, the clock line is connected between the pixel unit and the timing controller, and the clock line is used to transmit a clock signal;

[0012] Pixel units in the same row are connected to the same clock line.

[0013] Optional, active direct display panel, also includes:

[0014] At least one data line, the data line is connected between the pixel unit and the timing controller, and the data line is used to transmit a data signal;

[0015] Pixel units in the same column are connected to the same data line.

[0016] Optionally, each pixel unit includes m*n pixels, m is the number of rows of pixels, n is the number of columns of pixels, and m and n are positive integers;

[0017] m*n pixels share one clock line and one data line.

[0018] Optionally, the pixel includes:

[0019] a first light emitting element, a second light emitting element, and a third light emitting element;

[0020] The anode of the first light-emitting element, the anode of the second light-emitting element and the anode of the third light-emitting element are connected to the power supply, and the cathode of the first light-emitting element, the cathode of the second light-emitting element and the cathode of the third light-emitting element are connected to the ground terminal through the driving module;

[0021] The first light emitting element, the second light emitting element, and the third light emitting element emit different colors of light.

[0022] Optionally, the driving module includes a signal generating circuit, a current control circuit and a switch component;

[0023] The signal generating circuit is used to count the rising edge or the falling edge of the clock signal and generate a counting signal, determine the period of the PWM signal according to the counting signal, determine the pulse width of the PWM signal according to the data signal and the counting signal, and generate the PWM signal according to the period and pulse width of the PWM signal;

[0024] The current control circuit is connected to the signal generating circuit, and the current control circuit is used to generate a control signal according to the PWM signal;

[0025] The switch component is connected between the pixel and the ground terminal, the control terminal of the switch component is connected to the output terminal of the current control circuit, and the switch component is used to provide a driving signal to the pixel according to the control signal;

[0026] The brightness of the pixel is adjusted by the duty cycle of the control signal, which is the same as the duty cycle of the PWM signal.

[0027] According to another aspect of the present invention, the present embodiment provides a driving method of an active direct display panel, which is used to drive the active direct display panel, wherein the active direct display panel includes at least one pixel unit, the pixel units are arranged in an array, and the pixel unit includes a driving module and at least one pixel;

[0028] A driving method for an active direct display panel includes:

[0029] receiving a clock signal and a data signal;

[0030] In the data transmission period, the pixel is driven to emit light according to the clock signal and the data signal, and the data signal is stored;

[0031] During a light-emitting period within a frame, pixels of pixel units located in different rows are driven to emit light simultaneously according to a clock signal and a stored data signal; wherein the light-emitting period is greater than a data transmission period.

[0032] Optionally, in a data transmission period, driving the pixel to emit light according to the clock signal and the data signal, and storing the data signal, includes:

[0033] Counting the rising edge or falling edge of the clock signal and generating a counting signal;

[0034] Determine the period of the PWM signal according to the counting signal;

[0035] Determine the pulse width of the PWM signal according to the data signal and the counting signal;

[0036] Generate a PWM signal according to the period and pulse width of the PWM signal;

[0037] Generate a control signal according to the PWM signal;

[0038] A driving signal is provided to the pixel according to the control signal; wherein the luminous brightness of the pixel is adjusted by the duty cycle of the control signal, and the duty cycle of the control signal is the same as the duty cycle of the PWM signal.

[0039] Optionally, in a light-emitting period within a frame, pixels of pixel units located in different rows are driven to emit light simultaneously according to a clock signal and a stored data signal, including:

[0040] During the light-emitting period, the pixel units located in different rows generate corresponding control signals according to the clock signal and the stored data signal;

[0041] According to the control signal, the pixels connected to the pixel unit are driven to emit light respectively.

[0042] Optionally, the clock signal includes a reset phase and a clock signal phase;

[0043] The data signal includes a data flag bit and serial transmission data, the serial transmission data includes data of the first light-emitting element, data of the second light-emitting element and data of the third light-emitting element; the number of data bits of the first light-emitting element is the same as the number of data bits of the second light-emitting element and the number of data bits of the third light-emitting element;

[0044] An end mark stage is set between two adjacent frames.

[0045] The active direct display panel provided by the embodiment of the present invention is provided with a pixel unit including a driving module and at least one pixel, and a clock signal and a data signal are generated by a timing controller. In the data transmission period within a frame, the driving module drives the pixel to emit light and stores the data signal according to the clock signal and the data signal. In the light-emitting period within a frame, the driving module drives the pixels of the pixel units located in different rows to emit light at the same time. The light-emitting period is greater than the data transmission period, which increases the light-emitting time of the pixel in the same frame, better improves the light-emitting brightness of the pixel, effectively avoids the problem of uneven pixel display or flickering, and improves the display effect of the active direct display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the contents of the embodiments of the present invention and these drawings without paying any creative work.

[0047] Figure 1 is a structural schematic diagram of an active direct display panel provided by an embodiment of the present invention;

[0048] Figure 2 is a structural schematic diagram of a pixel unit of an active direct display panel provided by an embodiment of the present invention;

[0049] Figure 3 is a schematic structural diagram of another active direct display panel provided by an embodiment of the present invention;

[0050] Figure 4 is a structural schematic diagram of another active direct display panel provided by an embodiment of the present invention;

[0051] Figure 5 is a flow chart of a driving method of an active direct display panel provided by an embodiment of the present invention;

[0052] Figure 6 is a driving timing diagram of an active direct display panel provided by an embodiment of the present invention;

[0053] Figure 7 This embodiment of the present invention provides a Figure 5 Flow chart of the method for step S102 in FIG. DETAILED DESCRIPTION

[0054] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0055] Based on the above technical problems, this embodiment proposes the following solutions:

[0056] Figure 1 It is a schematic structural diagram of an active direct display panel provided by an embodiment of the present invention. Figure 2 1 is a schematic diagram of a structure of a pixel unit of an active direct display panel provided by an embodiment of the present invention. Figure 1 and Figure 2 The active direct display panel provided by the embodiment of the present invention includes at least one pixel unit 1, the pixel units 1 are arranged in an array, and the pixel unit 1 includes a driving module 11 and at least one pixel 12; a timing controller 2 is connected to the pixel unit 1, and the timing controller 2 is used to generate a clock signal and a data signal; in a data transmission period, the driving module 11 is used to drive the pixel 12 to emit light according to the clock signal and the data signal, and store the data signal; in a light-emitting period within a frame, the driving module 11 is used to drive the pixels 12 of the pixel units 1 located in different rows to emit light at the same time, and the light-emitting period is greater than the data transmission period.

[0057] Specifically, the pixel unit 1 can receive a clock signal and a data signal. The pixel unit 1 includes a driving module 11 and a pixel 12. The driving module 11 can be a driving device such as a driving chip. The driving module 11 receives the clock signal and the data signal, and converts the clock signal and the data signal into a driving signal. The pixel 12 may include a light-emitting element of a single luminous color, or a light-emitting element of two or more luminous colors. The luminous color of the light-emitting element may include red, green or blue. The light-emitting element may include an LED lamp.

[0058] The timing controller 2 may be a controller capable of generating a clock signal and a data signal, such as a single chip microcomputer or a Field Programmable Gate Array (FPGA).

[0059] In the data transmission cycle, the timing controller 2 transmits a clock signal and a data signal to the driving module 11. The clock signal can be transmitted to pixels 12 located in different columns along the row direction of the pixels 12, and the data signal can be transmitted to pixels 12 located in different rows along the column direction of the pixels 12. Alternatively, the clock signal can be transmitted to pixels 12 located in different rows along the column direction of the pixels 12, and the pixels 12 located in the same column share a clock signal. The data signal can be transmitted to pixels 12 located in different columns along the row direction of the pixels 12, and the pixels 12 located in the same row share a data signal. Since the driving module 11 and the pixel unit 1 are arranged in a one-to-one correspondence.

[0060] During the data transmission cycle, the driving module 11 can store data signals. This arrangement allows the driving module 11 to drive the pixels 12 according to the stored data signals during the light-emitting cycle. During the light-emitting cycle, the data signals do not need to be scanned row by row or column by column. Pixels 12 located in different rows or pixels 12 located in different columns can emit light according to the data signals stored in their corresponding driving modules 11, thereby increasing the light-emitting time of the pixels 12 in the same frame and improving the light-emitting brightness of the pixels 12. This arrangement can effectively avoid the problem of uneven display or flickering of the pixels 12 and improve the display effect of the active direct display panel.

[0061] The light-emitting period is set to be longer than the data transmission period, so that during the light-emitting period, the pixel unit 1 can stably drive the pixel 12 to emit light, which can effectively improve the flickering problem of the active direct display panel when displaying low grayscale images.

[0062] The active direct display panel provided in this embodiment is provided with a pixel unit 1 including a driving module 11 and at least one pixel 12, and a clock signal and a data signal are generated by a timing controller 2. In the data transmission period within a frame, the driving module 11 drives the pixel 12 to emit light and stores the data signal according to the clock signal and the data signal. In the light emission period within a frame, the driving module 11 drives the pixels 12 of the pixel units 1 located in different rows to emit light at the same time. The light emission period is greater than the data transmission period, which increases the light emission time of the pixel 12 in the same frame, and better improves the light emission brightness of the pixel 12, effectively avoiding the problem of uneven display or flickering of the pixel 12, and improving the display effect of the active direct display panel.

[0063] Optional, Figure 3 FIG. 1 is a schematic diagram of another active direct display panel provided by an embodiment of the present invention. Figures 1 to 3 The active direct display panel may further include at least one clock line 3, the clock line 3 is connected between the pixel unit 1 and the timing controller 2, and the clock line 3 is used to transmit a clock signal; the pixel units 1 in the same row are connected to the same clock line 3.

[0064] Specifically, the clock line 3 extends along the row direction of the pixel unit 1. The clock line 3 is used to transmit a clock signal. The clock line 3 includes a first clock line CLK 1, a second clock line CLK 2 to an M-1 clock line CLK M-1 and an M-th clock line CLK M, where M is the number of rows of the pixel unit 1. M is a positive integer greater than or equal to 1.

[0065] Optionally, based on the above embodiments, Figures 1 to 3 The active direct display panel also includes: at least one data line 4, the data line 4 is connected between the pixel unit 1 and the timing controller 2, and the data line 4 is used to transmit data signals; the pixel units 1 located in the same column are connected to the same data line 4.

[0066] Specifically, the data line 4 extends along the column direction of the pixel unit 1. The data line 4 is used to transmit a data signal. The data signal includes a data voltage. The data line 4 includes a first data line DATA 1, a second data line DATA 2 to an N-1th data line DATAN-1 and an Nth data line DATA N, where N is the number of columns of the pixel unit 1. N is a positive integer greater than or equal to 1.

[0067] Optionally, based on the above embodiments, continue to refer to Figure 2 Each pixel unit 1 includes m*n pixels 12, m is the number of rows of pixels 12, n is the number of columns of pixels 12, and m and n are positive integers; the m*n pixels 12 share a clock line 3 and a data line 4.

[0068] Specifically, each pixel unit 1 may include a plurality of pixels 12. The m*n pixels 12 located in the same pixel unit 1 may share a driving module 11. This arrangement, on the one hand, makes the driving efficiency of the driving module 11 higher. On the other hand, it can save the number of data lines 4 and clock lines 3, which is convenient for wiring in the active direct display panel.

[0069] It should be noted that Figure 2 and Figure 3 The case where m=2 and n=2 is exemplarily shown in FIG. 1 , and no limitation is given here. Figure 2 R1 to R4 are the connection terminals of the first light emitting element R and the driving module 11, G1 to G4 are the connection terminals of the second light emitting element G and the driving module 11, and B1 to B4 are the connection terminals of the third light emitting element G and the driving module 11. SCLK is the connection terminal of the clock line 3 and the driving module 11. DATA is the connection terminal of the data line 4 and the driving module 11.

[0070] Optionally, based on the above embodiments, continue to refer to Figure 2, the pixel 12 includes a first light-emitting element R, a second light-emitting element G and a third light-emitting element B; the anode of the first light-emitting element R, the anode of the second light-emitting element G and the anode of the third light-emitting element B are connected to the power supply VCC, and the cathode of the first light-emitting element R, the cathode of the second light-emitting element G and the cathode of the third light-emitting element B are connected to the ground terminal GND through the driving module 11; the first light-emitting element R, the second light-emitting element G and the third light-emitting element B have different light-emitting colors.

[0071] Specifically, the driving module 11 may include a switch component 113. The anodes of the first light emitting element R, the second light emitting element G, and the third light emitting element B are connected to the power supply through the driving module 11. The switch component 113 of the driving module 11 is connected between the cathodes of the first light emitting element R, the second light emitting element G, and the third light emitting element B and the ground terminal. In this way, when the driving module 11 turns on the switch component 113 according to the data signal, the power supply is connected to the first light emitting element R, the second light emitting element G, and the third light emitting element B to drive the first light emitting element R, the second light emitting element G, and the third light emitting element B to emit light.

[0072] Exemplarily, the first light emitting element R may be a red sub-pixel 12, the second light emitting element G may be a green sub-pixel 12, and the third light emitting element B may be a blue sub-pixel 12. The first light emitting element R, the second light emitting element G, and the third light emitting element B together form a pixel 12.

[0073] Optional, Figure 4 FIG. 1 is a schematic diagram of the structure of another active direct display panel provided by an embodiment of the present invention. Figure 4 The driving module 11 includes a signal generating circuit 111, a current control circuit 112 and a switch component 113; the signal generating circuit 111 is used to count the rising edge or falling edge of the clock signal and generate a counting signal, determine the period of the PWM signal according to the counting signal, and determine the pulse width of the PWM signal according to the data signal and the counting signal, and generate the PWM signal according to the period and pulse width of the PWM signal; the current control circuit 112 is connected to the signal generating circuit 111, and the current control circuit 112 is used to generate a control signal according to the PWM signal; the switch component 113 is connected between the pixel 12 and the ground terminal, the control end of the switch component 113 is connected to the output end of the current control circuit 112, and the switch component 113 is used to provide a driving signal to the pixel 12 according to the control signal; the luminous brightness of the pixel 12 is adjusted by the duty cycle of the control signal, and the duty cycle of the control signal is the same as the duty cycle of the PWM signal.

[0074] Specifically, the signal generating circuit 111 of the driving module 11 is used to count the rising edge or falling edge of the clock signal and generate a counting signal. The signal generating circuit 111 determines the period of the PWM signal according to the counting signal, and determines the pulse width of the PWM signal according to the data signal and the counting signal. The signal generating circuit 111 generates the PWM signal according to the period and pulse width of the PWM signal. The PWM signal is input to the current control circuit 112. The current control circuit 112 can generate a control signal according to the PWM signal. The control end of the switch component 113 receives the control signal output from the output end of the current control circuit 112, and provides a driving signal to the pixel 12 according to the control signal.

[0075] The control signal is a level signal. The effective level signal of the control signal can control the switch component 113 to be turned on. When the switch component 113 is turned on, the pixel 12 has a driving signal flowing through it, thereby emitting light. The duty cycle of the effective level signal of the control signal is used to adjust the light emission duration of the pixel 12, thereby adjusting the light emission brightness of the pixel 12.

[0076] By setting the duty cycle of the control signal to be the same as the duty cycle of the PWM signal, the luminous brightness and luminous duration of the pixel 12 can be adjusted by adjusting the duty cycle of the PWM signal, thereby realizing the picture display of the active direct display panel.

[0077] This embodiment provides a driving method of an active direct display panel, which is used to drive the active direct display panel. The active direct display panel includes at least one pixel unit 1 arranged in an array, and the pixel unit 1 includes a driving module 11 and at least one pixel 12. Figure 5 This is a flow chart of a driving method of an active direct display panel provided by an embodiment of the present invention. Figure 6 is a driving timing diagram of an active direct display panel provided by an embodiment of the present invention. Figure 1 , Figure 5 and Figure 6 The driving method of the active direct display panel provided in this embodiment includes:

[0078] S101. Receive a clock signal and a data signal.

[0079] Specifically, the clock signal is a pulse signal with the same period. The clock signal may have the same duty cycle in both the data transmission period and the light emission period of the same frame. The data signal may be a level signal. The data signal may be transmitted to the pixel unit 1 only in the data transmission period.

[0080] S102 . In a data transmission period, the pixel 12 is driven to emit light according to the clock signal and the data signal, and the data signal is stored.

[0081] Specifically, in the data transmission period, the pixel 12 is driven to emit light by the clock signal and the data signal. At the same time, the data signal can be stored by the driving module 11. The stored data signal can drive the pixel 12 to emit light in the subsequent light-emitting period.

[0082] S103, within a light-emitting period of a frame, according to a clock signal and a stored data signal, driving the pixels 12 of the pixel units 1 located in different rows to emit light simultaneously; wherein the light-emitting period is greater than the data transmission period.

[0083] Specifically, the driving modules 11 corresponding to the pixels 12 in different rows store data signals in the data transmission cycle. In a light-emitting cycle within a frame, the pixels 12 in the pixel units 1 in different rows can be driven to emit light simultaneously according to the clock signal and the stored data signal.

[0084] Since the light-emitting period is longer than the data transmission period, the duration of simultaneous light emission of the pixel units 1 in different rows is much longer than the data transmission period. With this arrangement, within a frame period, the pixel units 1 in different rows are almost lit at the same time, and there is no row-by-row scanning of the passive LED display panel. Only one row of pixels 12 is lit at the same time. The minimum pulse width of the active direct display panel provided in this embodiment is at least 8 times the minimum pulse width of the passive LED display panel. Therefore, the active direct display panel provided in this embodiment can effectively improve the problems of pitting and flickering at low grayscales.

[0085] Optional, Figure 7 This embodiment of the present invention provides a Figure 5 Based on the above embodiments, combined with Figures 2 to 7 , Figure 5 Step S102 in the data transmission period, driving the pixel 12 to emit light according to the clock signal and the data signal, and storing the data signal, includes:

[0086] S201, counting rising edges or falling edges of a clock signal and generating a counting signal.

[0087] Specifically, the driving module 11 may include a counter. The counter may count the rising edge or falling edge of the clock signal. The counting signal may include the number of pulses of the clock signal and the period of the clock signal.

[0088] S202: Determine the period of the PWM signal according to the counting signal.

[0089] Specifically, the period of the counting signal may be determined as the period of the PWM signal.

[0090] S203: Determine the pulse width of the PWM signal according to the data signal and the counting signal.

[0091] Specifically, the data signal includes a level signal. The data signal can be modulated according to the counting signal to determine the pulse width of the PWM signal.

[0092] S204: Generate a PWM signal according to the period and pulse width of the PWM signal.

[0093] Specifically, the driving module 11 may include a register. The register generates a PWM signal according to the determined period of the PWM signal and the pulse width of the PWM signal. In this way, the period of the PWM signal is consistent with the period of the clock signal, so that the pulse width of the PWM signal can reflect the data voltage of the data signal. The light-emitting duration of the pixel 12 can be adjusted by the different duty cycles of the PWM signal, thereby achieving the brightness corresponding to different display grayscales of the pixel 12.

[0094] S205: Generate a control signal according to the PWM signal.

[0095] Specifically, the driving module 11 may include an amplifier. The amplifier amplifies the PWM signal to generate a control signal. The duty cycle of the control signal is the same as the duty cycle of the PWM signal. The effective level signal of the control signal is used to control the switch component 113 of the driving module 11 to turn on.

[0096] S206, providing a driving signal to the pixel 12 according to the control signal; wherein the light emitting brightness of the pixel 12 is adjusted by the duty cycle of the control signal, and the duty cycle of the control signal is the same as the duty cycle of the PWM signal.

[0097] Specifically, when the control signal is transmitted to the control end of the switch component 113, the switch component 113 is turned on. When the switch component 113 is turned on, the pixel 12 is connected to the power supply, so that the power supply provides a driving current to the pixel 12 through the turned-on switch component 113. The pixel 12 emits light under the driving effect of the driving current. The light emitting brightness of the pixel 12 is adjusted by the duty cycle of the control signal.

[0098] Optional, combined Figures 2 to 7 , based on the above embodiments, Figure 5 Step S103 in which, during a light-emitting period within a frame, pixels 12 of pixel units 1 located in different rows are driven to emit light simultaneously according to a clock signal and a stored data signal, including: during a light-emitting period, pixel units 1 located in different rows generate corresponding control signals according to the clock signal and the stored data signal; and pixels 12 connected to the pixel units 1 are driven to emit light respectively according to the control signals.

[0099] Specifically, during the light-emitting period, the driving modules 11 of the pixel units 1 located in different rows transmit driving signals to the pixel units 1 connected thereto respectively. The driving signal may include a driving current. When the control signal is transmitted to the control end of the switch component 113, the switch component 113 is turned on. Since the switch component 113 is turned on, the pixel 12 is connected to the power supply, so that the power supply provides the driving current to the pixel 12 through the turned-on switch component 113. The pixels 12 located in different rows emit light simultaneously under the driving action of the driving current.

[0100] Optionally, based on the above embodiments, Figures 2 to 6 The clock signal includes a reset phase and a clock signal phase; the data signal includes a data flag bit T1 and serial transmission data T2, the serial transmission data includes data of the first light-emitting element, data of the second light-emitting element and data of the third light-emitting element; the number of data bits of the first light-emitting element is the same as the number of data bits of the second light-emitting element and the number of data bits of the third light-emitting element; an end flag phase is set between two adjacent frames (not shown in the figure).

[0101] Specifically, the reset phase reset of the clock signal is used to identify the start or end of the clock signal of a row of pixel units 1. The clock signal phase is used to transmit the clock signal to the driving module 11. The data flag T1 is used to identify the start or end of the data signal of the pixel unit 1 in the same column. The serial transmission data T2 is a data voltage. The serial transmission data T2 may include data of the first light-emitting element, data of the second light-emitting element, and data of the third light-emitting element that are set in a cycle in sequence. The number of data bits of the first light-emitting element is set to be the same as the number of data bits of the second light-emitting element and the number of data bits of the third light-emitting element, so as to facilitate setting the pulse width and duty cycle of the PWM signal. An end flag phase is set between two adjacent frames to facilitate identification of the start of the data transmission cycle and the end of the light-emitting cycle between different display frames.

[0102] The driving method of the active direct display panel provided in the present embodiment drives the pixel 12 to emit light and stores the data signal according to the clock signal and the data signal during the data transmission period within one frame by the driving module 11. During the light-emitting period within one frame, the pixels 12 of the pixel units 1 located in different rows are driven to emit light at the same time by the driving module 11. The light-emitting period is greater than the data transmission period, thereby increasing the light-emitting time of the pixel 12 within the same frame, better improving the light-emitting brightness of the pixel 12, effectively avoiding the problem of uneven display or flickering of the pixel 12, and better improving the display effect of the active direct display panel.

[0103] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An active direct display panel, characterized in that: include: At least one pixel unit, the pixel units are arranged in an array, and the pixel unit comprises a driving module and at least one pixel; A timing controller connected to the pixel unit, the timing controller is used to generate a clock signal and a data signal; In a data transmission period, the driving module is used to drive the pixel to emit light according to the clock signal and the data signal, and store the data signal; In a light-emitting period within a frame, the driving module is used to drive the pixels of the pixel units located in different rows to emit light simultaneously, and the light-emitting period is greater than the data transmission period.

2. The active direct display panel according to claim 1, characterized in that: The active direct display panel further includes: at least one clock line, the clock line being connected between the pixel unit and the timing controller, and the clock line being used to transmit a clock signal; The pixel units in the same row are connected to the same clock line.

3. The active direct display panel according to claim 2, characterized in that: The active direct display panel further includes: at least one data line, the data line being connected between the pixel unit and the timing controller, and the data line being used to transmit a data signal; The pixel units in the same column are connected to the same data line.

4. The active direct display panel according to claim 3, characterized in that: Each of the pixel units includes m*n pixels, where m is the number of rows of pixels, n is the number of columns of pixels, and m and n are positive integers; m*n pixels share one clock line and one data line.

5. The active direct display panel according to claim 1, characterized in that: The pixels include: a first light emitting element, a second light emitting element, and a third light emitting element; The anode of the first light-emitting element, the anode of the second light-emitting element, and the anode of the third light-emitting element are connected to a power source, and the cathode of the first light-emitting element, the cathode of the second light-emitting element, and the cathode of the third light-emitting element are connected to a ground terminal through the driving module; The first light emitting element, the second light emitting element, and the third light emitting element emit different colors of light.

6. The active direct display panel according to claim 1, characterized in that: The driving module includes a signal generating circuit, a current control circuit and a switch component; The signal generating circuit is used to count the rising edge or the falling edge of the clock signal and generate a counting signal, determine the period of the PWM signal according to the counting signal, determine the pulse width of the PWM signal according to the data signal and the counting signal, and generate the PWM signal according to the period and pulse width of the PWM signal; The current control circuit is connected to the signal generating circuit, and the current control circuit is used to generate a control signal according to the PWM signal; The switch component is connected between the pixel and the ground terminal, the control terminal of the switch component is connected to the output terminal of the current control circuit, and the switch component is used to provide a driving signal to the pixel according to the control signal; The light emission brightness of the pixel is adjusted by the duty cycle of the control signal, and the duty cycle of the control signal is the same as the duty cycle of the PWM signal.

7. A method for driving an active direct display panel, characterized in that: Used to drive an active direct display panel, the active direct display panel includes at least one pixel unit, the pixel units are arranged in an array, and the pixel unit includes a driving module and at least one pixel; The driving method of the active direct display panel comprises: receiving a clock signal and a data signal; In a data transmission period, driving the pixel to emit light according to the clock signal and the data signal, and storing the data signal; During a light-emitting period within a frame, pixels of the pixel units located in different rows are driven to emit light simultaneously according to the clock signal and the stored data signal; wherein the light-emitting period is greater than the data transmission period.

8. The method according to claim 7, characterized in that The method of driving the pixel to emit light according to the clock signal and the data signal during the data transmission period and storing the data signal comprises: Counting the rising edge or falling edge of the clock signal and generating a counting signal; Determine the period of the PWM signal according to the counting signal; Determining a pulse width of a PWM signal according to the data signal and the counting signal; Generate a PWM signal according to the period and pulse width of the PWM signal; generating a control signal according to the PWM signal; A driving signal is provided to the pixel according to the control signal; wherein the light emitting brightness of the pixel is adjusted by the duty cycle of the control signal, and the duty cycle of the control signal is the same as the duty cycle of the PWM signal.

9. The method according to claim 7, characterized in that: The light-emitting period within one frame, according to the clock signal and the stored data signal, drives the pixels of the pixel units located in different rows to emit light simultaneously, including: In a light-emitting period, the pixel units located in different rows generate corresponding control signals according to the clock signal and the stored data signal; According to the control signal, the pixels connected to the pixel unit are driven to emit light respectively.

10. The method according to claim 7, characterized in that The clock signal includes a reset phase and a clock signal phase; The data signal includes a data flag bit and serial transmission data, and the serial transmission data includes data of the first light-emitting element, data of the second light-emitting element, and data of the third light-emitting element; the number of data bits of the first light-emitting element is the same as the number of data bits of the second light-emitting element and the number of data bits of the third light-emitting element; An end mark stage is set between two adjacent frames.