Modularized static synchronous phase modifier and super-capacitance direct-voltage synchronous networking control method thereof

Abstract

The invention relates to a modular static synchronous phase modifier and a super-capacitance direct-voltage synchronous networking control method thereof, each phase comprises n H-bridge circuit modules and n super-capacitor clusters, and further comprises n DCDC modules, and the H-bridge circuit modules and the DCDC modules are connected in series to form a two-stage power module; the H-bridge circuit module control comprises a super-capacitance direct-voltage power synchronous loop, a virtual excitation loop, a virtual impedance and current-limiting control loop, a current inner loop and control mode selection; the DCDC module control comprises a DC voltage closed loop and a DC current closed loop. According to the invention, DC / DC conversion is added between the conventional H-bridge module and the super capacitor, so that wide-range discharge of the super capacitor is realized, and the energy utilization rate is improved; in combination with a control strategy, interface control of alternating-current reactive power and direct-current side active power is realized, the second harmonic generation power flowing into the super capacitor is completely filtered while the direct-current voltage is kept constant, and the service life of the super capacitor is greatly prolonged.

Description

Technical Field

[0001] The present invention belongs to the field of power electronics technology and phase condenser technology, and in particular, relates to a static synchronous phase condenser module-level topology and a network control method thereof based on super-capacitor direct pressure synchronization. Background Art

[0002] As the proportion of power electronic converters in the power system continues to increase, the physical form of the new power system has gradually changed from a mechanical electromagnetic system dominated by synchronous generators to a hybrid system of power semiconductors and ferromagnetic components dominated by power electronic equipment and synchronous machines. As the proportion of power electronic converter equipment in the power system increases, the system inertia will be greatly reduced, the system frequency index will deteriorate, and in severe cases, frequency stability accidents will occur. In a power grid with weak system strength and low physical inertia, the grid connection safety of new energy is seriously affected, resulting in a significant impact on the absorption capacity of new energy. Synchronous condensers have unique advantages in improving inertia support and improving the frequency and voltage characteristics of new energy, and have received widespread attention in the past decade. However, the current synchronous condensers have problems that need to be solved, such as high price, large footprint, complex system, and difficult operation and maintenance. At present, the static synchronous condenser composed of a cascaded H-bridge static VAR compensator (SVG) and super-capacitor energy storage elements combined with a grid control strategy can achieve functional replacement of synchronous condensers, with the characteristics of small footprint, simple system operation and maintenance, and relatively low cost. However, since SVG requires enough H-bridge power modules to directly support the AC side voltage, the voltage adjustment range of the DC side of the power module is narrow, that is, the discharge voltage range of the supercapacitor connected to the DC side of the module is narrow, resulting in low supercapacitor energy utilization. In order to release enough energy to support the inertia of the power grid, the static synchronous phase condenser of the conventional SVG topology is equipped with a large number of supercapacitors, which has the problem of large system volume and high cost; at the same time, the single-stage topology has low control freedom, and can only reduce the double frequency power flowing into the supercapacitor by adding a passive filter, but cannot achieve complete filtering, which will cause the supercapacitor temperature to rise and reduce its life. Summary of the invention

[0003] In order to solve the deficiencies in the prior art, the present invention provides a modular static synchronous phase condenser and a supercapacitor direct-voltage synchronous networking control method thereof, wherein a DC / DC conversion is added between a conventional H-bridge module and a supercapacitor to achieve wide-range discharge of the supercapacitor and improve energy utilization; a control strategy is combined to realize interface control of AC reactive power and DC side active power, thereby achieving complete filtering of the double frequency power flowing into the supercapacitor while maintaining a constant DC voltage, thereby greatly extending the service life of the supercapacitor.

[0004] The present invention adopts the following technical solution.

[0005] The present invention proposes a modular static synchronous condenser, each phase of which includes n H-bridge circuit modules and n supercapacitor clusters, the AC sides of each H-bridge circuit module are cascaded, and the DC sides of each H-bridge circuit module are connected to the supercapacitor cluster.

[0006] The H-bridge circuit module includes: a first bypass switch, an H-bridge circuit, a first supporting capacitor, a first voltage-equalizing resistor set, and a first DC fuse; wherein the first bypass switch is connected in parallel between the first AC end and the second AC end of the H-bridge circuit module, the first supporting capacitor and the first voltage-equalizing resistor set are connected in parallel between the DC positive electrode and the DC negative electrode of the H-bridge circuit module, and the DC fuse is connected in series to the DC positive electrode line;

[0007] The modular static synchronous condenser also includes: n DCDC modules, an H-bridge circuit module and a DCDC module connected in series to form a two-stage power module; each DCDC module includes: a second supporting capacitor, a second voltage-equalizing resistor set, m half-bridge circuits, m filter inductors, a capacitor-side main contactor, a battery-side pre-charging contactor, a pre-charging resistor, a second DC fuse, and a Hall current sensor; wherein the second supporting capacitor is connected in parallel between the DC positive pole and the DC negative pole of the H-bridge circuit module, each half-bridge circuit includes two switching devices and a diode anti-parallel to the switching device, the high-voltage DC side of each half-bridge circuit is connected to the DC positive pole and the DC negative pole of the H-bridge circuit module, the midpoint of each half-bridge circuit is connected to the first DC positive pole of the DCDC module through the filter inductor, and the second voltage-equalizing resistor set is connected in parallel between the first DC positive pole and the DC negative pole of the DCDC module; one end of the capacitor-side main contactor is connected to the DC The first DC positive pole of the DC module is connected, and the other end is connected to the second DC positive pole of the DCDC module. The main contactor on the capacitor side is used to connect and disconnect the connection between the DCDC module and the supercapacitor cluster; one end of the pre-charging resistor is connected to the first DC positive pole of the DCDC module, and the other end is connected to one end of the pre-charging contactor on the battery side, and the other end of the pre-charging contactor on the battery side is connected to the second DC positive pole of the DCDC module. The combination of the pre-charging contactor on the battery side and the pre-charging resistor is used to charge the first supporting capacitor when the H-bridge circuit module is started and to charge the second supporting capacitor when the DCDC module is started. The Hall current sensor and the second DC fuse are both connected in series to the DC negative pole of the DCDC module. The second DC fuse is used to cut off the fault current when a DC short circuit occurs on the supercapacitor cluster side. The second DC positive pole of the DCDC module is connected to the positive pole of the supercapacitor cluster, and the DC negative pole of the DCDC module is connected to the negative pole of the supercapacitor cluster.

[0008] Preferably, the number of H-bridge circuit modules, DCDC modules and supercapacitor clusters satisfies the following relationship:

[0009]

[0010] In the formula, k is the fluctuation margin of the AC bus voltage, x% is the voltage division ratio of the grid-connected reactor, U is the AC bus voltage, and U dcmin is the lower limit of DC voltage.

[0011] Preferably, the number of half-bridge circuits in the DCDC module satisfies the following relationship:

[0012]

[0013] Where P total is the total power of the converter consisting of m half-bridge circuits, and P1 is the power of the converter consisting of a single half-bridge circuit;

[0014] m is an integer greater than or equal to 3.

[0015] Preferably, in the DCDC module, when the supercapacitor cluster absorbs energy from the grid side through the two-stage power module, the switch devices of the upper bridge arms of the m half-bridge circuits are all in the PWM modulation state, and the switch devices of the lower bridge arms of the m half-bridge circuits are all turned off, and the DCDC module is a BUCK step-down circuit; when the supercapacitor cluster releases energy to the grid side through the two-stage power module, the switch devices of the lower bridge arms of the m half-bridge circuits are all in the PWM modulation state, and the switch devices of the upper bridge arms of the m half-bridge circuits are all turned off, and the DCDC module is a BOOST step-up circuit;

[0016] The duty cycle D in the PWM adjustment pulse of each switching device in the DCDC module satisfies the following relationship:

[0017] D=1-U DC2 / U DC1

[0018] Where U DC1 is the DC voltage across the second supporting capacitor, U DC2 It is the DC voltage across the second voltage-equalizing resistor set.

[0019] Preferably, the inductance of the filter inductor satisfies the following relationship:

[0020]

[0021] Where Li is the inductance of the i-th filter inductor, i=1,2,…,m; f is the switching frequency of the half-bridge circuit, and r is the ripple rate of the output current of the bridge circuit;

[0022] The capacitance of the second supporting capacitor satisfies the following relationship:

[0023]

[0024] Where C2 is the capacitance of the second supporting capacitor, V ppis the output voltage of the half-bridge circuit.

[0025] Preferably, the minimum total storage energy of all supercapacitor clusters on each phase is E s , the minimum single release energy of all supercapacitor clusters is E o , the rated working voltage of each supercapacitor cluster is U1, and the capacitor voltage of each supercapacitor cluster after discharge is U2, then the capacitance of a single supercapacitor cluster satisfies the following relationship:

[0026]

[0027] Where C is the capacitance of a single supercapacitor cluster, and n is the total number of supercapacitor clusters on each phase.

[0028] The present invention also proposes a super-capacitor direct-voltage synchronous networking control method for a modular static synchronous phase regulator, wherein the H-bridge circuit module control includes: a super-capacitor direct-voltage power synchronization loop, a virtual excitation loop, a virtual impedance and current limiting control loop, a current inner loop, and a control mode selection; the DCDC module control includes a DC voltage closed loop and a DC current closed loop.

[0029] Preferably, in the supercapacitor direct pressure power synchronization ring, the actual voltage value V of the supercapacitor cluster is dc The square of the voltage command value V dcref The difference between the squares of is taken as input, and the active power command value P is obtained after the voltage proportional integral control PI of the supercapacitor cluster. ref , active power command value P ref The actual value of active power P m The difference is fed back by inertia Angular velocity proportional control K DW The angular velocity adjustment amount Δω of the internal potential is then generated. The angular velocity adjustment amount Δω of the internal potential is equal to the rated angular velocity ω of the internal potential. n Generate the actual value of the angular velocity of the internal potential ω and convert it into the phase angle θ of the internal potential; at the same time, the reactive power command value Q ref The actual value of reactive power Q m The difference is controlled by reactive power K iQ Then, an amplitude adjustment amount ΔE of the internal potential is generated, and the amplitude adjustment amount ΔE of the internal potential and the rated value E0 of the internal potential generate an actual amplitude value E of the internal potential; the actual amplitude value E of the internal potential and the phase angle θ of the internal potential constitute an internal potential vector;

[0030] Active power command value P ref Satisfies the following relationship:

[0031]

[0032] In the formula, K PVCA , K IVCAare the proportional coefficient and integral coefficient of the voltage proportional integral control of the supercapacitor cluster, and s is the Laplace operator;

[0033] The angular velocity adjustment amount Δω of the internal potential satisfies the following relationship:

[0034]

[0035] In the formula, K DW , J are the angular velocity proportional coefficient and the synchronous machine inertia time constant, s is the Laplace operator;

[0036] The phase angle θ of the internal potential satisfies the following relationship:

[0037] θ=∫Δω+ω n dt

[0038] The actual value E of the internal potential amplitude satisfies the following relationship:

[0039]

[0040] In the formula, K iQ is the reactive power control integral coefficient.

[0041] Preferably, in the closed-loop control mode, after the inner potential vector is converted into the components Ea, Eb, Ec in the stationary coordinate system, it is used together with the H-bridge circuit module voltage Uma, Umb, Umc as the input data of the virtual impedance and current limiting control loop, and the instantaneous values ​​iaref, ibref, icref of the current command value are generated by the virtual impedance and current limiting control loop, and current limiting control and impedance optimization are realized at the same time; in the current inner loop, the difference between the instantaneous values ​​iaref, ibref, icref of the current command value and the actual current values ​​ia, ib, ic is proportional to the difference between the instantaneous values ​​iaref, ibref, icref of the current command value and the actual current values ​​ia, ib, ic After the resonance control PR, the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref are generated with the voltages Uma, Umb, and Umc of the H-bridge circuit module; in the open-loop control mode, the internal potential vector is converted into the components Ea, Eb, and Ec in the stationary coordinate system and directly used as the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref; the closed-loop control mode and the open-loop control mode are switched according to actual needs by the control mode selection; the voltage command value generates a trigger pulse signal of the switching device in the H-bridge circuit module by means of carrier phase shifting;

[0042] In the virtual impedance and current limiting control link, the H-bridge circuit module voltage Uma, Umb, and Umc are first used to generate the dq axis component U of the positive sequence voltage of the H-bridge circuit module. dp , U qp and the dq-axis component U of the negative sequence voltage of the H-bridge circuit module dn , U qn , satisfying the following relationship:

[0043]

[0044] In the formula, is the voltage phase angle of the H-bridge circuit module;

[0045] Then use the dq axis component U of the positive sequence voltage of the H bridge circuit module dp , U dq and the dq-axis component U of the negative sequence voltage of the H-bridge circuit module dn , U dn , and the actual value of the internal potential amplitude E, based on the virtual resistance R v and virtual reactance X v , generating the positive sequence current command value dq axis component I dPref ,I qPref , negative sequence current command value dq axis component I dNref ,I qNref , satisfying the following relationship:

[0046]

[0047] Positive sequence current command value dq axis component I dPref ,I qPref , negative sequence current command value dq axis component I dNref ,I qNref The three-phase positive sequence current command I is obtained through linear transformation refAP ,I refBP ,I refCP And three-phase negative sequence current command I refAN ,I refBN ,I refCN , satisfying the following relationship:

[0048]

[0049]

[0050] In the formula, θ P is the phase angle of the positive sequence internal potential, which is equal to the phase angle θ of the internal potential; θ N is the phase angle of the negative sequence internal potential, which is opposite to the phase angle θ of the internal potential;

[0051] Finally, the three-phase positive sequence current command I refAP ,I refBP ,I refCP And three-phase negative sequence current command I refAN ,I refBN ,I refCN After the corresponding addition, the phase angle of the fault current is kept constant through proportional current limiting, and the instantaneous values ​​of the three-phase current command values ​​iaref, ibref, and icref are obtained, which satisfy the following relationship:

[0052]

[0053] In the formula, K Iref is the proportional current limiting coefficient, 0<K Iref <1;

[0054] The instantaneous values ​​iaref, ibref, and icref of the three-phase current command values ​​are generated through the current inner loop to generate the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref, satisfying the following relationship:

[0055]

[0056] In the formula, k PPR , k IPR are the proportional coefficient and integral coefficient of proportional resonance control, I a ,I b ,I c are the sampling values ​​of the three-phase current of the H-bridge circuit module, I aref ,I bref ,I cref is the three-phase current command value;

[0057] The obtained three-phase modulated voltages Ua_ref, Ub_ref ​​and Uc_ref are modulated by carrier phase shift to generate pulse signals of the switching devices in the H-bridge circuit module.

[0058] Preferably, in the DC voltage closed loop, the DC voltage command value U ref The capacitor voltage sampling value U of the supercapacitor cluster after mean filtering C The difference between the DC voltage loop is used to obtain the DC current command value I ref , while the DC voltage command value U ref The sampled value U of the AC voltage of the two-stage power module ac , AC current sampling value I ac Compare to obtain the DC current feedforward value I dcp ; In the DC current closed loop, the DC voltage command value U ref , DC current feedforward value I dcp The sampled value of the DC current of the two-stage power module I dc The difference is controlled by deadbeat to generate the duty cycle adjustment value, and the duty cycle adjustment value and the duty cycle feedforward value D0 generate the duty cycle D. The duty cycle is generated by the phase-shifted carrier to generate the trigger pulse signal of the switch device of each half-bridge circuit in the DCDC module;

[0059] DC current command value I ref , satisfying the following relationship:

[0060]

[0061] In the formula, K pD , K iD They are the proportional coefficient and integral coefficient of the DC voltage loop respectively;

[0062] Among them, the DC current feedforward value I dcp Satisfies the following relationship:

[0063]

[0064] The DC current command generates a duty cycle D after deadbeat control, which satisfies the following relationship:

[0065]

[0066] Where L is the inductance of the filter inductor, ΔT is the execution cycle of the DCDC module, and K pil is the proportional coefficient of deadbeat control.

[0067] The beneficial effects of the present invention are that, compared with the prior art, conventional synchronous condensers are expensive, occupy a large area, have a complex system, and are difficult to operate and maintain; while the static synchronous condenser composed of a cascaded H-bridge static VAR compensator (SVG) and a supercapacitor energy storage element combined with a network control strategy needs to be configured with a large number of supercapacitors, which has the problem of large system volume and high cost; at the same time, the single-stage topology has low control freedom, and can only reduce the double frequency power flowing into the supercapacitor by adding a passive filter, and cannot achieve complete filtering, which will cause the supercapacitor temperature to rise and the life to decrease. The present invention adds DC / DC conversion between the conventional H-bridge module and the supercapacitor to achieve wide-range discharge of the supercapacitor to improve energy utilization; combined with the control strategy to achieve interface control of AC reactive power and DC side active power, it can achieve complete filtering of the double frequency power flowing into the supercapacitor while maintaining a constant DC voltage, greatly extending the service life of the supercapacitor; modular design is adopted, and the cost, volume, and flexible scalability have certain advantages over conventional synchronous condensers, and it is simple to maintain and has high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 This is a wiring schematic diagram of the modular static synchronous condenser proposed by the present invention;

[0069] Figure 2 A topological structure diagram of an H-bridge circuit module in a modular static synchronous condenser proposed by the present invention;

[0070] Figure 3 A topological structure diagram of a DCDC module in a modular static synchronous condenser proposed by the present invention;

[0071] Figure 4It is a control architecture diagram of the H-bridge circuit module in the modular static synchronous condenser proposed by the present invention, including an ultra-capacitive direct-pressure power synchronization ring and a virtual excitation ring;

[0072] Figure 5 It is a control architecture diagram of the H-bridge circuit module in the modular static synchronous condenser proposed by the present invention, including a virtual impedance and current limiting control loop, a current inner loop, and a control model selection;

[0073] Figure 6 It is a control architecture diagram of a DCDC module in a modular static synchronous condenser proposed in the present invention, including a DC voltage closed loop and a DC current closed loop. DETAILED DESCRIPTION

[0074] In order to make the purpose, technical scheme and advantages of the present invention clearer, the technical scheme of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. The embodiments described in this application are only embodiments of a part of the present invention, rather than all embodiments. Based on the spirit of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the protection scope of the present invention.

[0075] The existing static synchronous phase condenser composed of cascaded H-bridges and supercapacitor energy storage elements combined with a network control strategy does not contain DC / DC conversion, so a large number of supercapacitor clusters need to be configured, which leads to the problem of large system size and high cost. At the same time, the single-stage topology has low control freedom and can only reduce the double frequency power flowing into the supercapacitor by adding a passive filter, but cannot achieve complete filtering, which will cause the supercapacitor temperature to rise and reduce its life.

[0076] The present invention adds DC / DC conversion between the conventional H-bridge module and the supercapacitor cluster to achieve wide-range discharge of the supercapacitor cluster to improve energy utilization; combines control strategies to achieve interface control of AC reactive power and DC side active power, and achieves complete filtering of the double frequency power flowing into the supercapacitor while maintaining a constant DC voltage, greatly extending the service life of the supercapacitor; adopts modular design, has certain advantages in cost, volume, and flexible scalability over conventional synchronous phase regulators, and is simple to maintain and has high reliability.

[0077] like Figure 1The figure shows the wiring principle of modular static synchronous condenser connected to AC power grid. The AC side of modular static synchronous condenser is connected to high-voltage AC power grid through grid-connected reactor and AC starting circuit in sequence. The AC starting circuit includes a first circuit breaker QF1, a second circuit breaker QF2, an isolating switch QS1, and a starting resistor R. The AC starting circuit is used to realize the connection of power module to high-voltage AC power grid and soft starting of power module. The AC starting circuit also includes a first grounding switch QE1, a second grounding switch QE2, a voltage transformer TV1, and a current transformer TA1. One end of the grid-connected reactor L is connected to the power grid through the AC starting circuit, and the other end is connected to the AC side of the power module. The grid-connected reactor is used to realize the functions of filtering and limiting fault current. The grid-connected reactor is also equipped with bushing current transformers LA1-LA3.

[0078] The present invention proposes a modular static synchronous condenser with the same three-phase circuit structure. Each phase includes a two-stage power module and a supercapacitor cluster formed by connecting an H-bridge circuit module and a DCDC module in series, wherein the AC sides of the two-stage power modules on each phase are cascaded, and the DC sides of the two-stage power modules on each phase are respectively connected to the supercapacitor clusters.

[0079] Specifically, each phase includes n AC-side cascaded power modules. Figure 1 AM1, ..., AMn in the figure represent n two-stage power modules cascaded on the AC side of phase A, BM1, ..., BMn represent n two-stage power modules cascaded on the AC side of phase B, and CM1, ..., CMn represent n two-stage power modules cascaded on the AC side of phase C; each power module is a two-stage power module; Figure 1 AD1, ..., ADn represent n supercapacitor clusters of phase A, BD1, ..., BDn represent n supercapacitor clusters of phase B, and CD1, ..., CDn represent n supercapacitor clusters of phase C; a supercapacitor cluster is connected to the DC side of a two-stage power module.

[0080] Specifically, the number of two-stage power modules per phase mainly depends on the AC bus voltage of the power grid and the DC voltage of the two-stage power module. Assuming that the AC bus voltage is U, the fluctuation margin of the AC bus voltage is k, and the range of the DC voltage is U dcmin ~U dcmax , the voltage division ratio of the grid-connected reactor is x%, then the number of two-stage power modules required for each phase satisfies the following relationship:

[0081]

[0082] Where U dcmin is the lower limit of DC voltage.

[0083] like Figure 2As shown, the two-stage power module includes an H-bridge circuit module and a DCDC module; the AC side of the H-bridge circuit module is connected to the grid, the DC side of the H-bridge circuit module is connected to the high-voltage side of the DCDC module, and the low-voltage side of the DCDC module is connected to the supercapacitor cluster; the H-bridge circuit module is used to realize AC-DC conversion, and the DCDC module is used to convert and realize wide range supercapacitor voltage utilization.

[0084] Specifically, Figure 2 As shown, the H-bridge circuit module includes: a first bypass switch KM1, an H-bridge circuit, a first supporting capacitor C1, a first voltage-equalizing resistor complete set R1 and a first DC fuse FU1; wherein the first bypass switch is connected in parallel between the first AC terminal ACL and the second AC terminal ACN of the H-bridge circuit module. When a fault occurs in the two-stage power module, the first bypass switch is closed and the two-stage power module exits operation; the first supporting capacitor C1 and the first voltage-equalizing resistor complete set R1 are connected in parallel between the DC positive electrode UDC1+ and the DC The H-bridge circuit includes two half-bridge circuits S1 and S2, each half-bridge circuit includes two switching devices and a diode anti-parallel to the switching device, the AC side of the H-bridge circuit is connected to the first AC terminal ACL and the second AC terminal ACN of the H-bridge circuit module, and the DC side of the H-bridge circuit is connected to the DC positive electrode UDC1+ and the DC negative electrode UDC- of the H-bridge circuit module to realize AC to DC conversion; the DC fuse is connected in series to the DC positive line to cut off the fault current when the DC on the subsequent DCDC side is short-circuited.

[0085] Furthermore, in the H-bridge circuit module, the switching devices in the two half-bridge circuits are alternately and complementary turned on. When the switching devices of the upper bridge arm of the half-bridge circuit S1 and the switching devices of the lower bridge arm of the half-bridge circuit S2 are turned on, the switching devices of the lower bridge arm of the half-bridge circuit S1 and the switching devices of the upper bridge arm of the half-bridge circuit S2 are turned off; conversely, when the switching devices of the upper bridge arm of the half-bridge circuit S1 and the switching devices of the lower bridge arm of the half-bridge circuit S2 are turned off, the switching devices of the lower bridge arm of the half-bridge circuit S1 and the switching devices of the upper bridge arm of the half-bridge circuit S2 are turned on; thereby realizing the conversion from AC to DC.

[0086] Specifically, Figure 2As shown, the DCDC module includes: a second supporting capacitor C2, a second voltage-equalizing resistor set R2, m half-bridge circuits, m filter inductors L1-Lm, a capacitor-side main contactor KM2, a battery-side pre-charging contactor KM3, a pre-charging resistor R3, a second DC fuse FU2 and a Hall current sensor LA; wherein the second supporting capacitor C2 is connected in parallel between the DC positive electrode UDC+ and the DC negative electrode UDC- of the H-bridge circuit module; m is an integer greater than or equal to 3, and in the embodiment of the present invention, m is 3, and the DCDC module adopts Three half-bridge circuits S3, S4, and S5, each half-bridge circuit includes two switching devices and a diode anti-parallel to the switching device, the high-voltage DC side of each half-bridge circuit is connected to the DC positive pole UDC+ and the DC negative pole UDC- of the H-bridge circuit module, the midpoint of each half-bridge circuit is connected to the first DC positive pole UDC2+ of the DCDC module through a filter inductor, and the second voltage-equalizing resistor set R2 is connected in parallel between the first DC positive pole UDC2+ and the DC negative pole UDC- of the DCDC module; one of the main contactors KM2 on the capacitor side One end of the pre-charging resistor R3 is connected to the first DC positive pole UDC2+ of the DCDC module, and the other end is connected to the second DC positive pole UDC3+ of the DCDC module. The main contactor on the capacitor side is used to connect and disconnect the connection between the two-stage power module and the supercapacitor cluster; one end of the pre-charging resistor R3 is connected to the first DC positive pole UDC2+ of the DCDC module, and the other end is connected to one end of the pre-charging contactor KM3 on the battery side. The other end of the pre-charging contactor KM3 on the battery side is connected to the second DC positive pole UDC3+ of the DCDC module. The combination of the pre-charging contactor on the battery side and the pre-charging resistor is used to charge the first supporting capacitor C1 and the second supporting capacitor C2 in the two-stage power module for soft start when the two-stage power module is started; the Hall current sensor LA and the second DC fuse FU2 are both connected in series to the DC negative pole UDC- of the DCDC module, and the second DC fuse is used to cut off the fault current when a DC short circuit occurs on the supercapacitor cluster side; the second DC positive pole UDC3+ of the DCDC module is connected to the positive pole of the supercapacitor cluster, and the DC negative pole UDC- of the DCDC module is connected to the negative pole of the supercapacitor cluster.

[0087] The midpoints of the m half-bridge circuits in the DCDC module are connected in parallel to the supercapacitor cluster through m filter inductors and then through a pre-charging loop, thereby realizing DC step-down conversion from the ACDC side to the supercapacitor cluster side and step-up conversion from the supercapacitor side to the ACDC side. When a short circuit fault occurs on the supercapacitor cluster side, the fault current on the supercapacitor cluster side is blocked by controlling the switching devices in each half-bridge circuit to lock, and the fault current is quickly cut off to avoid the expansion of fault feedback.

[0088] Furthermore, in the DCDC module, when the supercapacitor cluster absorbs energy from the grid side through the two-stage power module, the switch devices of the upper bridge arms of the three half-bridge circuits S3, S4, and S5 are all in the PWM modulation state, and the switch devices of the lower bridge arms of the three half-bridge circuits S3, S4, and S5 are all turned off. At this time, the DCDC module is a BUCK step-down circuit; when the supercapacitor cluster releases energy to the grid side through the two-stage power module, the switch devices of the lower bridge arms of the three half-bridge circuits S3, S4, and S5 are all in the PWM modulation state, and the switch devices of the upper bridge arms of the three half-bridge circuits S3, S4, and S5 are all turned off. At this time, the DCDC module is a BOOST step-up circuit.

[0089] A method for determining parameters in a DCDC module of a two-stage power module includes:

[0090] In the DCDC module, the total power of the converter composed of m half-bridge circuits is P total , the power of the converter composed of a single half-bridge circuit is P1, then the number of half-bridge circuits in the DCDC module satisfies the following relationship:

[0091]

[0092] The duty cycle D in the PWM adjustment pulse of each switching device in the DCDC module satisfies the following relationship:

[0093] D=1-U DC2 U DC1

[0094] Where U DC1 is the DC voltage across the second supporting capacitor C2, U DC2 is the DC voltage across the second voltage-equalizing resistor set R2.

[0095] The inductance of the filter inductor satisfies the following relationship:

[0096]

[0097] Where Li is the inductance of the i-th filter inductor, i=1,2,…,m; f is the switching frequency of the half-bridge circuit, and r is the ripple rate of the output current and output voltage of the bridge circuit;

[0098] Therefore, the capacitance of the second support capacitor satisfies the following relationship:

[0099]

[0100] Where C2 is the capacitance of the second supporting capacitor, V pp is the output voltage of the half-bridge circuit.

[0101] Specifically, each supercapacitor cluster includes a plurality of supercapacitor modules connected in series, and each supercapacitor module includes a plurality of supercapacitor cell monomers to achieve energy storage.

[0102] The minimum total energy storage of all supercapacitor clusters on each phase is E s , the minimum single release energy of all supercapacitor clusters is E o , the rated working voltage of each supercapacitor cluster is U1, and the capacitor voltage of each supercapacitor cluster after discharge is U2, then the capacitance of a single supercapacitor cluster satisfies the following relationship:

[0103]

[0104] Where C is the capacitance of a single supercapacitor cluster, and n is the total number of supercapacitor clusters on each phase.

[0105] The modular static synchronous condenser also includes a controller, which communicates with each two-stage power module through optical fiber, collects electrical information of the power module and issues modulation instructions to achieve control and protection of the static synchronous condenser unit.

[0106] The present invention also proposes a super-capacitor direct-pressure synchronous networking control method for a modular static synchronous condenser, including independent H-bridge circuit module control and DCDC module control.

[0107] like Figure 4 and Figure 5 As shown, the H-bridge circuit module control includes: an over-capacitance direct-pressure power synchronization loop, a virtual excitation loop, a virtual impedance and current limiting control loop, a current inner loop, and a control mode selection; the H-bridge circuit module control realizes the simulation of the characteristics of a static synchronous phase condenser, and has the ability to support active inertia and reactive voltage.

[0108] Among them, in the supercapacitor direct pressure power synchronization loop, the actual voltage value V of the supercapacitor cluster is dc The square of the voltage command value V dcref The difference between the squares of is taken as input, and the active power command value P is obtained after the voltage proportional integral control PI of the supercapacitor cluster. ref , active power command value P ref The actual value of active power P m The difference is fed back by inertia Angular velocity proportional control K DW The angular velocity adjustment amount Δω of the internal potential is then generated. The angular velocity adjustment amount Δω of the internal potential is equal to the rated angular velocity ω of the internal potential. n Generate the actual value of the angular velocity of the internal potential ω and convert it into the phase angle θ of the internal potential; at the same time, the reactive power command value Q ref The actual value of reactive power Q m The difference is controlled by reactive power KiQ Then, an amplitude adjustment amount ΔE of the internal potential is generated, and the amplitude adjustment amount ΔE of the internal potential and the rated value E0 of the internal potential generate an actual amplitude value E of the internal potential; the actual amplitude value E of the internal potential and the phase angle θ of the internal potential constitute an internal potential vector;

[0109] In the embodiment, the active power command value P ref Satisfies the following relationship:

[0110]

[0111] In the formula, K PVCA , K IVCA are the proportional coefficient and integral coefficient of the voltage proportional integral control of the supercapacitor cluster, and s is the Laplace operator;

[0112] The angular velocity adjustment amount Δω of the internal potential satisfies the following relationship:

[0113]

[0114] In the formula, K DW , J are the angular velocity proportional coefficient and the synchronous machine inertia time constant, s is the Laplace operator;

[0115] The phase angle θ of the internal potential satisfies the following relationship:

[0116] θ=∫Δω+ω n dt

[0117] In the embodiment, the actual value E of the amplitude of the internal potential satisfies the following relationship:

[0118]

[0119] In the formula, K iQ is the reactive power control integral coefficient.

[0120] In the closed-loop control mode, after the internal potential vector is converted into the components Ea, Eb, and Ec in the stationary coordinate system, it is used together with the H-bridge circuit module voltage Uma, Umb, and Umc as the input data of the virtual impedance and current limiting control loop. The virtual impedance and current limiting control loop generates the instantaneous values ​​iaref, ibref, and icref of the current command value, and simultaneously realizes current limiting control and impedance optimization; in the current inner loop, the difference between the instantaneous values ​​iaref, ibref, and icref of the current command value and the actual current values ​​ia, ib, and ic is controlled by proportional resonance PR and then compared with the H-bridge circuit module voltage Um a, Umb, Umc generate three-phase modulation voltages Ua_ref, Ub_ref, Uc_ref; in the open-loop control mode, the internal potential vector is converted into components Ea, Eb, Ec in the stationary coordinate system and directly used as the three-phase modulation voltages Ua_ref, Ub_ref, Uc_ref; the closed-loop control mode and the open-loop control mode are switched by the control mode selector according to actual needs; the voltage command value generates a trigger pulse signal of the switching device in the H-bridge circuit module by means of carrier phase shifting, which can realize the simulation of the characteristics of the synchronous phase condenser and has the support capacity of active inertia and reactive voltage;

[0121] In the embodiment, in the virtual impedance and current limiting control link, the H-bridge circuit module voltages Uma, Umb, and Umc are first used to generate the dq axis component U of the positive sequence voltage of the H-bridge circuit module. dp , U qp and the dq-axis component U of the negative sequence voltage of the H-bridge circuit module dn , U qn , satisfying the following relationship:

[0122]

[0123] In the formula, is the voltage phase angle of the H-bridge circuit module.

[0124] Then use the dq axis component U of the positive sequence voltage of the H bridge circuit module dp , U dq and the dq-axis component U of the negative sequence voltage of the H-bridge circuit module dn , U dn , and the actual value of the internal potential amplitude E, based on the virtual resistance R v and virtual reactance X v , generating the positive sequence current command value dq axis component I dPref ,I qPref , negative sequence current command value dq axis component I dNref ,I qNref , satisfying the following relationship:

[0125]

[0126] Positive sequence current command value dq axis component I dPref ,I qPref , negative sequence current command value dq axis component I dNref ,I qNref The three-phase positive sequence current command I is obtained through linear transformation refAP ,I refBP ,I refCP And three-phase negative sequence current command I refAN ,I refBN ,I refCN , satisfying the following relationship:

[0127]

[0128] In the formula, θ P is the phase angle of the positive sequence internal potential, which is equal to the phase angle θ of the internal potential; θ N is the phase angle of the negative sequence internal potential, which is opposite to the phase angle θ of the internal potential;

[0129] Finally, the three-phase positive sequence current command I refAP ,I refBP ,I refCP And three-phase negative sequence current command I refAN ,I refBN ,I refCN After the corresponding addition, the phase angle of the fault current is kept constant through proportional current limiting, and the instantaneous values ​​of the three-phase current command values ​​iaref, ibref, and icref are obtained, which satisfy the following relationship:

[0130]

[0131] In the formula, K Iref is the proportional current limiting coefficient, 0<K Iref <1.

[0132] The instantaneous values ​​iaref, ibref, and icref of the three-phase current command values ​​are generated through the current inner loop to generate the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref, satisfying the following relationship:

[0133]

[0134] In the formula, k PPR , k IPR are the proportional coefficient and integral coefficient of proportional resonance control, I a ,I b ,I c are the sampling values ​​of the three-phase current of the H-bridge circuit module, I aref ,I bref ,I cref is the three-phase current command value;

[0135] The obtained three-phase modulated voltages Ua_ref, Ub_ref ​​and Uc_ref are modulated by carrier phase shift to generate pulse signals of the switching devices in the H-bridge circuit module.

[0136] like Figure 6 As shown, the DCDC module control includes a DC voltage closed loop and a DC current closed loop; wherein, in the DC voltage closed loop, the DC voltage command value U ref The capacitor voltage sampling value U of the supercapacitor cluster after mean filtering C The difference between the DC voltage loop is used to obtain the DC current command value I ref , while the DC voltage command value U ref The sampled value U of the AC voltage of the two-stage power module ac , AC current sampling value I ac Compare to obtain the DC current feedforward value I dcp ; In the DC current closed loop, the DC voltage command value U ref , DC current feedforward value I dcp The sampled value of the DC current of the two-stage power module I dc The difference is controlled by deadbeat to generate the duty cycle adjustment amount, and the duty cycle adjustment amount and the duty cycle feedforward value D0 generate the duty cycle D. The duty cycle is generated by the phase-shifted carrier to generate the trigger pulse signal of the switching device of each half-bridge circuit in the DCDC module, realizing the direct voltage tracking of the DCDC module and the suppression of the double frequency current of the supercapacitor cluster.

[0137] In the embodiment, due to the mean filtering, the capacitor voltage sampling value U C The double frequency content in is filtered out, so the DC current command value I ref It does not contain double frequency components, and can suppress the double frequency current of the supercapacitor cluster. ref , satisfying the following relationship:

[0138]

[0139] In the formula, K pD , K iD They are the proportional coefficient and integral coefficient of the DC voltage loop respectively.

[0140] Among them, the DC current feedforward value I dcp Satisfies the following relationship:

[0141]

[0142] The DC current command generates a duty cycle D after deadbeat control, which satisfies the following relationship:

[0143]

[0144] Where L is the inductance of the filter inductor, ΔT is the execution cycle of the DCDC module, and K pil is the proportional coefficient of deadbeat control.

[0145] The duty cycle is modulated by n phase-shifted carriers to generate trigger pulse signals for the switching devices of each half-bridge circuit in the DCDC module. Finally, since there is no double frequency component in the DC current command value, the control can simultaneously achieve double frequency suppression of the over-capacitance current.

[0146] The network control method for super-capacitance direct pressure synchronization of the module-level topology of the static synchronous phase condenser proposed in the present invention is a two-level control architecture, and the two-level control strategies are independent and do not interfere with each other.

[0147] The present disclosure may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0148] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples of computer-readable storage media (a non-exhaustive list) include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium is not to be interpreted as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through a wire.

[0149] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0150] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0151] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents, and any modifications or equivalent replacements that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A modular static synchronous condenser, each phase comprising n H-bridge circuit modules and n supercapacitor clusters, the AC sides of the H-bridge circuit modules are cascaded, and the DC sides of the H-bridge circuit modules are connected to the supercapacitor clusters, characterized in that: The H-bridge circuit module includes: a first bypass switch, an H-bridge circuit, a first supporting capacitor, a first voltage-equalizing resistor set, and a first DC fuse; wherein the first bypass switch is connected in parallel between the first AC end and the second AC end of the H-bridge circuit module, the first supporting capacitor and the first voltage-equalizing resistor set are connected in parallel between the DC positive electrode and the DC negative electrode of the H-bridge circuit module, and the DC fuse is connected in series to the DC positive electrode line; The modular static synchronous condenser also includes: n DCDC modules, an H-bridge circuit module and a DCDC module connected in series to form a two-stage power module; each DCDC module includes: a second supporting capacitor, a second voltage-equalizing resistor set, m half-bridge circuits, m filter inductors, a capacitor-side main contactor, a battery-side pre-charging contactor, a pre-charging resistor, a second DC fuse, and a Hall current sensor; wherein the second supporting capacitor is connected in parallel between the DC positive pole and the DC negative pole of the H-bridge circuit module, each half-bridge circuit includes two switching devices and a diode anti-parallel to the switching device, the high-voltage DC side of each half-bridge circuit is connected to the DC positive pole and the DC negative pole of the H-bridge circuit module, the midpoint of each half-bridge circuit is connected to the first DC positive pole of the DCDC module through the filter inductor, and the second voltage-equalizing resistor set is connected in parallel between the first DC positive pole and the DC negative pole of the DCDC module; one end of the capacitor-side main contactor is connected to the DC The first DC positive pole of the DC module is connected, and the other end is connected to the second DC positive pole of the DCDC module. The main contactor on the capacitor side is used to connect and disconnect the connection between the DCDC module and the supercapacitor cluster; one end of the pre-charging resistor is connected to the first DC positive pole of the DCDC module, and the other end is connected to one end of the pre-charging contactor on the battery side, and the other end of the pre-charging contactor on the battery side is connected to the second DC positive pole of the DCDC module. The combination of the pre-charging contactor on the battery side and the pre-charging resistor is used to charge the first supporting capacitor when the H-bridge circuit module is started and to charge the second supporting capacitor when the DCDC module is started. The Hall current sensor and the second DC fuse are both connected in series to the DC negative pole of the DCDC module. The second DC fuse is used to cut off the fault current when a DC short circuit occurs on the supercapacitor cluster side. The second DC positive pole of the DCDC module is connected to the positive pole of the supercapacitor cluster, and the DC negative pole of the DCDC module is connected to the negative pole of the supercapacitor cluster.

2. The modular static synchronous condenser according to claim 1, characterized in that: The number of H-bridge circuit modules, DCDC modules and supercapacitor clusters satisfies the following relationship: In the formula, k is the fluctuation margin of the AC bus voltage, xt is the voltage division ratio of the grid-connected reactor, U is the AC bus voltage, and U dcmin is the lower limit of DC voltage.

3. The modular static synchronous condenser according to claim 1, characterized in that: The number of half-bridge circuits in the DCDC module satisfies the following relationship: Where P total is the total power of the converter consisting of m half-bridge circuits, and P1 is the power of the converter consisting of a single half-bridge circuit; m is an integer greater than or equal to 3.

4. The modular static synchronous condenser according to claim 3, characterized in that: In the DCDC module, when the supercapacitor cluster absorbs energy from the grid side through the two-stage power module, the switch devices of the upper bridge arms of the m half-bridge circuits are all in the PWM modulation state, and the switch devices of the lower bridge arms of the m half-bridge circuits are all turned off. At this time, the DCDC module is a BUCK step-down circuit; when the supercapacitor cluster releases energy to the grid side through the two-stage power module, the switch devices of the lower bridge arms of the m half-bridge circuits are all in the PWM modulation state, and the switch devices of the upper bridge arms of the m half-bridge circuits are all turned off. At this time, the DCDC module is a BOOST step-up circuit; The duty cycle D in the PWM adjustment pulse of each switching device in the DCDC module satisfies the following relationship: D=1-U DC2 U DC1 Where U DC1 is the DC voltage across the second supporting capacitor, U DC2 It is the DC voltage across the second voltage-equalizing resistor set.

5. The modular static synchronous condenser according to claim 4, characterized in that: The inductance of the filter inductor satisfies the following relationship: Where Li is the inductance of the i-th filter inductor, i=1,2,…,m; f is the switching frequency of the half-bridge circuit, and r is the ripple rate of the output current of the bridge circuit; The capacitance of the second supporting capacitor satisfies the following relationship: Where C2 is the capacitance of the second supporting capacitor, V pp is the output voltage of the half-bridge circuit.

6. The modular static synchronous condenser according to claim 5, characterized in that: The minimum total energy storage of all supercapacitor clusters on each phase is E s , the minimum single release energy of all supercapacitor clusters is E o , the rated working voltage of each supercapacitor cluster is U1, and the capacitor voltage of each supercapacitor cluster after discharge is U2, then the capacitance of a single supercapacitor cluster satisfies the following relationship: Where C is the capacitance of a single supercapacitor cluster, and n is the total number of supercapacitor clusters on each phase.

7. A method for controlling super-capacity direct pressure synchronous network construction of modular static synchronous condenser, characterized in that: The H-bridge circuit module control includes: an ultra-capacitive direct-pressure power synchronization loop, a virtual excitation loop, a virtual impedance and current limiting control loop, a current inner loop, and a control mode selection; the DCDC module control includes a DC voltage closed loop and a DC current closed loop.

8. The method for controlling super-capacity direct-pressure synchronous networking of modular static synchronous condenser according to claim 7 is characterized in that: In the supercapacitor direct pressure power synchronization ring, the actual voltage value V of the supercapacitor cluster is dc The square of the voltage command value V dcref The difference between the squares of is taken as input, and the active power command value P is obtained after the voltage proportional integral control PI of the supercapacitor cluster. ref , active power command value P ref The actual value of active power P m The difference is fed back by inertia Angular velocity proportional control K DW The angular velocity adjustment amount Δω of the internal potential is then generated. The angular velocity adjustment amount Δω of the internal potential is equal to the rated angular velocity ω of the internal potential. n Generate the actual value of the angular velocity of the internal potential ω and convert it into the phase angle θ of the internal potential; at the same time, the reactive power command value Q ref The actual value of reactive power Q m The difference is controlled by reactive power K iQ Then, an amplitude adjustment amount ΔE of the internal potential is generated, and the amplitude adjustment amount ΔE of the internal potential and the rated value E0 of the internal potential generate an actual amplitude value E of the internal potential; the actual amplitude value E of the internal potential and the phase angle θ of the internal potential constitute an internal potential vector; Active power command value P ref Satisfies the following relationship: In the formula, K PVCA , K IVCA are the proportional coefficient and integral coefficient of the voltage proportional integral control of the supercapacitor cluster, and s is the Laplace operator; The angular velocity adjustment amount Δω of the internal potential satisfies the following relationship: In the formula, K DW , J are the angular velocity proportional coefficient and the synchronous machine inertia time constant, s is the Laplace operator; The phase angle θ of the internal potential satisfies the following relationship: θ=∫Δω+ω n dt The actual value E of the internal potential amplitude satisfies the following relationship: In the formula, K iQ is the reactive power control integral coefficient.

9. The method for controlling super-capacity direct-pressure synchronous networking of modular static synchronous condenser according to claim 8 is characterized in that: In the closed-loop control mode, after the internal potential vector is converted into the components Ea, Eb, and Ec in the stationary coordinate system, it is used together with the H-bridge circuit module voltage Uma, Umb, and Umc as the input data of the virtual impedance and current limiting control loop. The virtual impedance and current limiting control loop generates the instantaneous values ​​iaref, ibref, and icref of the current command value, and realizes current limiting control and impedance optimization at the same time; in the current inner loop, the difference between the instantaneous values ​​iaref, ibref, and icref of the current command value and the actual current values ​​ia, ib, and ic is proportionally resonated. After controlling PR, the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref are generated with the voltages Uma, Umb, and Umc of the H-bridge circuit module; in the open-loop control mode, the internal potential vector is converted into the components Ea, Eb, and Ec in the stationary coordinate system and directly used as the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref; the closed-loop control mode and the open-loop control mode are switched according to actual needs by the control mode selection; the voltage command value generates a trigger pulse signal of the switch device in the H-bridge circuit module by means of carrier phase shifting; In the virtual impedance and current limiting control link, the H-bridge circuit module voltage Uma, Umb, and Umc are first used to generate the dq axis component U of the positive sequence voltage of the H-bridge circuit module. dp , U qp and the dq-axis component U of the negative sequence voltage of the H-bridge circuit module dn , U qn , satisfying the following relationship: In the formula, is the voltage phase angle of the H-bridge circuit module; Then use the dq axis component U of the positive sequence voltage of the H bridge circuit module dp , U dq and the dq-axis component U of the negative sequence voltage of the H-bridge circuit module dn , U dn , and the actual value of the internal potential amplitude E, based on the virtual resistance R v and virtual reactance X v , generating the positive sequence current command value dq axis component I dPref ,I qPref , negative sequence current command value dq axis component I dNref ,I qNref , satisfying the following relationship: Positive sequence current command value dq axis component I dPref ,I qPref , negative sequence current command value dq axis component I dNref ,I qNref Obtain the three-phase positive sequence current command I through linear transformation refAP ,I refBP ,I refCP And three-phase negative sequence current command I refAN ,I refBN ,I refCN , satisfying the following relationship: In the formula, θ P is the phase angle of the positive sequence internal potential, which is equal to the phase angle θ of the internal potential; θ N is the phase angle of the negative sequence internal potential, which is opposite to the phase angle θ of the internal potential; Finally, the three-phase positive sequence current command I refAP ,I refBP ,I refCP And three-phase negative sequence current command I refAN ,I refBN ,I refCN After the corresponding addition, the phase angle of the fault current is kept constant through proportional current limiting, and the instantaneous values ​​of the three-phase current command values ​​iaref, ibref, and icref are obtained, which satisfy the following relationship: In the formula, K Iref is the proportional current limiting coefficient, 0<K Iref <1; The instantaneous values ​​iaref, ibref, and icref of the three-phase current command values ​​are generated through the current inner loop to generate the three-phase modulation voltages Ua_ref, Ub_ref, and Uc_ref, satisfying the following relationship: In the formula, k PPR , k IPR are the proportional coefficient and integral coefficient of proportional resonance control, I a ,I b ,I c are the sampling values ​​of the three-phase current of the H-bridge circuit module, I aref ,I bref ,I cref is the three-phase current command value; The obtained three-phase modulated voltages Ua_ref, Ub_ref ​​and Uc_ref are modulated by carrier phase shift to generate pulse signals of the switching devices in the H-bridge circuit module.

10. The method for controlling super-capacity direct-pressure synchronous networking of modular static synchronous condenser according to claim 7, characterized in that: In the DC voltage closed loop, the DC voltage command value U ref The capacitor voltage sampling value U of the supercapacitor cluster after mean filtering C The difference between the DC voltage loop is used to obtain the DC current command value I ref , while the DC voltage command value U ref The sampled value U of the AC voltage of the two-stage power module ac , AC current sampling value I ac Compare to obtain the DC current feedforward value I dcp ; In the DC current closed loop, the DC voltage command value U ref , DC current feedforward value I dcp The sampled value of the DC current of the two-stage power module I dc The difference is controlled by deadbeat to generate the duty cycle adjustment value, and the duty cycle adjustment value and the duty cycle feedforward value D0 generate the duty cycle D. The duty cycle is generated by the phase-shifted carrier to generate the trigger pulse signal of the switch device of each half-bridge circuit in the DCDC module; DC current command value I ref , satisfying the following relationship: In the formula, K pD , K iD They are the proportional coefficient and integral coefficient of the DC voltage loop respectively; Among them, the DC current feedforward value I dcp Satisfies the following relationship: The DC current command generates a duty cycle D after deadbeat control, which satisfies the following relationship: Where L is the inductance of the filter inductor, ΔT is the execution cycle of the DCDC module, and K pil is the proportional coefficient of deadbeat control.

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