Synchronization device and method for photon counting communication

Abstract

The invention provides a synchronization device and method for photon counting communication, and the device comprises an array single photon detection module which is used for outputting single photon pulse signals PHOTOON1, PHOTOON2,..., PHOTOONn after receiving communication photons; the gating signal module is used for outputting M gating signals; the multi-path signal counting processing module is used for counting all the single photon pulse signals according to each gating signal so as to output M total count values; the comparison module is used for screening out the maximum total count value from the M total count values; and the synchronous clock selection module is used for selecting a target gating signal corresponding to the maximum total count value from the M gating signals as a synchronous clock. The synchronization device designed by the invention is simple in structure, system resources are saved, the problem of counting loss under photon pulse signal stacking is effectively optimized, and the synchronization device is suitable for single-photon communication under a long-distance weak link when an array single-photon detector is adopted by a receiving end.

Description

Technical Field

[0001] The present invention relates to the technical field of wireless optical communication, and in particular to a synchronization device and method for photon counting communication. Background Art

[0002] As humans continue to explore, the distance of space and underwater communications is increasing. The intensity of the optical signal at the receiving end is very weak, and ordinary photodetectors can no longer meet the requirements of long-distance and high-attenuation links. Single-photon detectors have high sensitivity and can detect extremely weak optical signals. In long-distance weak-link communications, single-photon detectors with extremely high sensitivity are usually used to replace traditional photodiodes.

[0003] Due to the limited detection area and angle of a single detector, the communication distance and data transmission rate of the system are also greatly limited. In addition, the pulse sequence output by the actual single-photon detector is not completely ideal, and there are factors such as limited counting rate and dead time. In order to solve the problems of severe attenuation of the channel to the optical signal and the non-ideal photon detection of the receiving end detector itself, and further improve the transmission distance and transmission rate of the communication system, the structure of multi-channel array detectors is gradually applied to single-photon wireless optical communication systems.

[0004] The single-photon detector in the single-photon communication system outputs a discrete electrical pulse signal, so the way it extracts communication signals and the synchronization clock signal at the receiving end is different from that of the traditional wireless optical communication system. In the communication system using a single single-photon detector at the receiving end, the method of extracting the synchronization clock based on photon counting can be applied to communication scenarios such as underwater wireless optical communication and deep space optical communication; however, when the receiving end uses an array single-photon detector, the counting accuracy of the method of extracting the rising edge count of the array single-photon signal based on the system clock is limited by the system clock, which will miss effective signal photons, resulting in the inability to fully utilize the advantages of the array detector, and lead to inaccurate extraction of the synchronization signal, thereby suppressing the communication effect of the system. Summary of the invention

[0005] The purpose of the present invention is to provide a synchronization device and method for photon counting communication, aiming to solve the problem that traditional photon counting communication methods fail to give full play to the advantages of array detectors due to missing effective signal photons, and cause inaccurate extraction of synchronization signals, thereby inhibiting the communication effect of the system.

[0006] In a first aspect, the present invention provides a synchronization device for photon counting communication, the device comprising:

[0007] An array single-photon detection module is used to output single-photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn after receiving communication photons;

[0008] A gate control signal module, used for outputting M gate control signals;

[0009] A multi-channel signal counting processing module, whose input end is electrically connected to the output end of the array single-photon detection module and the gate signal module respectively, and is used to count all single-photon pulse signals according to each gate signal to output M total value;

[0010] A comparison module, whose input end is electrically connected to the output end of the multi-channel signal counting processing module, and is used to filter out the maximum total value from the M total values;

[0011] The synchronous clock selection module has an input end electrically connected to the output end of the gating signal module and the comparison module respectively, and is used to select a target gating signal corresponding to the maximum total value from the M gating signals as the synchronous clock.

[0012] Furthermore, the multi-channel signal counting processing module includes a rising edge extraction unit, a rising edge counting unit, a phase-locked loop clock unit, a phase shift clock unit, an arrival time pulse width measurement unit, a compensation counting unit, and an addition execution unit, wherein:

[0013] The n output terminals r1, r2, r3, ... rn of the rising edge extraction unit are all electrically connected to the input terminal of the rising edge counting unit;

[0014] The input end of the addition execution unit is electrically connected to the output ends of the rising edge counting unit and the compensation counting unit respectively;

[0015] The output end of the phase-locked loop clock unit is electrically connected to the input ends of the rising edge extraction unit and the phase-shift clock unit respectively;

[0016] The output end of the arrival time pulse width measurement unit is electrically connected to the input end of the compensation counting unit, and the input end of the arrival time pulse width measurement unit is electrically connected to the output ends of the phase shift clock unit and the array single photon detection module respectively.

[0017] Further, the arrival time pulse width measurement unit has n-1 output terminals, and the arrival time pulse width measurement unit includes n-1 groups of measurement components, and any of the measurement components includes an AND gate array F, an adder U, an adder U', a counter array U1, a multiplier U2, and a subtractor U3, wherein:

[0018] The output end of the AND gate array F is electrically connected to the input end of the adder U, the output end of the adder U is electrically connected to the enable end of the counter array U1, the output ends of the phase-shifted clock unit are electrically connected to the system clock signal clk of the counter array U1, the output end of the counter array U1 is electrically connected to the input end of the adder U', the output end of the adder U' is electrically connected to the input end of the multiplier U2, and the output end of the multiplier U2 is electrically connected to the input end of the subtractor U3.

[0019] The M output terminals of the M enabled addition execution units are all electrically connected to the input terminal of the comparison module.

[0020] Further,

[0021] The AND gate array in the first group of measurement elements performs AND operation on the PHOTON1 signal and the PHOTON2 signal to obtain an overlapping pulse width signal N. 11 ;

[0022] The AND gate array in the second group of measurement elements performs AND operation on the PHOTON1 signal, the PHOTON2 signal and the PHOTON3 signal respectively to obtain the overlapped pulse width signal N 21 、N 22 ;

[0023] The gate array in the n-1th group of measurement elements is the PHOTON1 signal, the PHOTON2 signal, ..., the PHOTON(n-1) signal and the PHOTONn signal respectively, to obtain the overlapping pulse width signal N (n-1)1 、N (n-1)2 ,...,N (n-1)(n-1) .

[0024] Furthermore, the duty cycle of each of the gated signals is 50%, the period is twice the time slot width of the modulation signal, and the phase difference between two adjacent signals is 2π / M.

[0025] Furthermore, the phase-locked loop clock unit is used to divide the frequency of a high-frequency clock;

[0026] The rising edge extraction unit is used to extract the rising edge of n array single photon pulse signals according to the high-frequency clock, and output rising edge signals r1, r2, ..., rn;

[0027] The rising edge counting unit is used to count n rising edge signals to obtain a basic counting value H corresponding to the Mth gate control signal. M ;

[0028] The phase-shift clock unit is used to shift the phase of the high-frequency clock to obtain k clock signals with a phase shift of 2π / k;

[0029] The arrival time pulse width measurement unit is used to measure the arrival time intervals of adjacent single photon pulse signals according to a phase-shifted clock signal.

[0030] Further,

[0031] n-1 groups of AND gate arrays are used to extract overlapping pulse width signals from single photon pulse signals respectively;

[0032] n-1 groups of adders U are used to add each group of all overlapping pulse width signals output by the array to obtain n-1 groups of relatively overlapping pulse signals M (n-1) :

[0033]

[0034] The n-1 counter arrays U1 are used to respectively use the corresponding n-1th group of relatively overlapping pulse signals as counting enable. The k in the n-1th counter array U1 n-1 The counter array uses the k outputs of the phase-shifted clock unit. n-1 The clock signal is the counting clock, and the k corresponding to the n-1th group of counter array U1 is obtained. n-1 A first count value;

[0035] The n-1 group of adders U' are used to respectively add all the first count values ​​of the corresponding n-1 group of counter arrays to obtain the second count value L of the relatively overlapping pulse signal corresponding to the n-1 group of adders. n-1 ;

[0036] The n-1 group of multipliers U2 are used to respectively convert the corresponding n-1 group of second count values ​​L n-1 Multiply by the count clock width, and divide by k n-1 , get n-1 groups of pulse overlap width S n-1 ;

[0037] The n-1 group of subtractors U3 are used to respectively separate the single photon signal pulse width from the n-1 group of pulse overlap width S n-1 Perform subtraction operation to obtain the arrival time interval T of n-1 groups of single photon array signals n-1 , the arrival time interval T n-1 Corresponding to the nth arriving single photon pulse signal.

[0038] Furthermore, the compensation counting unit is used to determine the arrival time interval T n-1 Is it less than the counting clock width?

[0039] If the arrival time interval T n-1 If it is smaller than the counting clock width, the first compensation counting value is output;

[0040] If the arrival time interval Tn-1 is greater than or equal to the counting clock width, then outputs a second compensation counting value;

[0041] The addition execution unit is used to add the basic count value H M The total value O corresponding to the Mth gating signal is obtained by adding all the compensation count values ​​under the Mth gating signal. M .

[0042] In a second aspect, the present invention provides a synchronization method for photon counting communication, the method comprising:

[0043] After receiving the communication photon, it outputs single photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn;

[0044] Output M gated signals;

[0045] Counting all the single-photon pulse signals respectively according to each of the gating signals to output M total count values;

[0046] Filter out the maximum total value from the M total values;

[0047] A target gating signal corresponding to the maximum total value is selected from the M gating signals as a synchronization clock.

[0048] Compared with the prior art, the present invention has the following advantages:

[0049] 1. The present invention proposes a new device for photon counting communication, which uses a phase-locked loop to divide a high-frequency clock to extract the rising edge count of the array photon pulse signal in the basic counting, and uses a phase-shifted clock to measure the arrival time pulse width in the compensation counting part, and performs compensation counting according to the arrival time interval, thereby effectively optimizing the counting loss problem under the stacking of photon pulse signals, and does not need to use an additional TDC chip to record the arrival time. It saves system resources while meeting high-precision counting requirements, and can be applied to single-photon communication under long-distance weak links when the receiving end uses an array single-photon detector. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 A schematic diagram of the structure of a synchronization device for photon counting communication proposed in one embodiment of the present invention;

[0051] Figure 2 Schematic diagram of the method for extracting synchronization signals for array single photon counting;

[0052] Figure 3 A timing diagram of a synchronous counting method for photon counting communication;

[0053] Figure 4Schematic diagram of the compensation counting of array single-photon signals.

[0054] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0056] See also Figure 1 , shown is a synchronization device for photon counting communication proposed in an embodiment of the present application, the device comprising:

[0057] The array single photon detection module is used to output single photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn after receiving the communication photon; please refer to Figure 2 After the modulated optical signal is transmitted through a long-distance channel, it presents a single-photon state. The array single-photon detector receives the single photon after channel attenuation and outputs multiple discrete single-photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn.

[0058] A gate control signal module, used for outputting M gate control signals;

[0059] The multi-channel signal counting processing module has its input end electrically connected to the output end of the array single-photon detection module and the gated signal module, and is used to count all single-photon pulse signals according to each gated signal to output M total value. It should be pointed out that the multi-channel signal counting processing module in the present device will count all single-photon pulse signals according to each gated signal, that is, each gated signal module will output a total value, thereby obtaining M total value.

[0060] A comparison module, whose input end is electrically connected to the output end of the multi-channel signal counting processing module, is used to screen out the maximum total value from the M total values;

[0061] The synchronous clock selection module has an input end electrically connected to the output end of the gate signal module and the comparison module respectively, and is used to select a target gate signal corresponding to the maximum total value from the M gate signals as the synchronous clock.

[0062] In summary, according to the above-mentioned synchronization device for photon counting communication, by counting all single-photon pulse signals based on each gating signal, a total value corresponding to each gating signal can be obtained, and then M total values ​​are obtained. Then the comparison module in the synchronization device selects the largest total value from them, and then locks the gating signal corresponding to the maximum total value, that is, the target gating signal, and then uses the target gating signal as the synchronization clock. The synchronization device designed by the present invention has a simple structure, saves system resources, and effectively optimizes the problem of counting loss under photon pulse signal stacking. It is suitable for single-photon communication under long-distance weak links when the receiving end uses an array single-photon detector.

[0063] In addition, in some embodiments, in order to improve the accuracy of signal counting, the multi-channel signal counting processing module includes a rising edge extraction unit, a rising edge counting unit, a phase-locked loop clock unit, a phase shift clock unit, an arrival time pulse width measurement unit, a compensation counting unit, and an addition execution unit, wherein:

[0064] The n output terminals r1, r2, r3, ..., rn of the rising edge extraction unit are all electrically connected to the input terminal of the rising edge counting unit;

[0065] The input end of the addition execution unit is electrically connected to the output ends of the rising edge counting unit and the compensation counting unit respectively;

[0066] The output end of the phase-locked loop clock unit is electrically connected to the input ends of the rising edge extraction unit and the phase-shift clock unit respectively;

[0067] The output end of the arrival time pulse width measurement unit is electrically connected to the input end of the compensation counting unit, and the input end of the arrival time pulse width measurement unit is electrically connected to the output ends of the phase shift clock unit and the array single photon detection module respectively;

[0068] Specifically, the arrival time pulse width measurement unit has n-1 output terminals, and the arrival time pulse width measurement unit includes n-1 groups of measurement components, and any measurement component includes an AND gate array F, an adder U, an adder U', a counter array U1, a multiplier U2, and a subtractor U3, wherein:

[0069] The output end of the AND gate array F is electrically connected to the input end of the adder U, the output end of the adder U is electrically connected to the enable end of the counter array U1, the output ends of the phase-shifted clock unit are electrically connected to the system clock signal clk of the counter array U1, the output end of the counter array U1 is electrically connected to the input end of the adder U', the output end of the adder U' is electrically connected to the input end of the multiplier U2, and the output end of the multiplier U2 is electrically connected to the input end of the subtractor U3.

[0070] The M output terminals of the M enabled addition execution units are all electrically connected to the input terminals of the comparison module.

[0071] It should be pointed out that the electrical connection methods between the above-mentioned structures actually refer to the signal flow direction between each structure. For example, the input end of the multi-channel signal counting processing module is electrically connected to the output ends of the array single-photon detection module and the gated signal module respectively, which means that the single-photon pulse signal output by the array single-photon detection module and the M gated signals output by the gated signal module are all sent to the multi-channel signal counting processing module.

[0072] In some embodiments, the M gating signals output by the gating signal module are substantially square wave signals with a duty cycle of 50%, a period of twice the time slot width of the modulation signal, and a phase difference of 2π / M between two adjacent signals.

[0073] In some embodiments, the rising edge extraction unit is used to extract the rising edge of n array single-photon pulse signals according to a high-frequency clock, and output rising edge signals r1, r2, ..., rn; it should be noted that since the multi-channel signal counting processing module will count all single-photon pulse signals according to each gating signal, the rising edge extraction unit in each signal counting processing module will extract the rising edge of the n array single-photon pulse signals, that is, each gating signal corresponds to a group of rising edge signals r1, r2, ..., rn.

[0074] The rising edge counting unit is used to count n rising edge signals to obtain a basic count value H corresponding to the Mth gate signal. M In this step, the rising edge counting unit is used to count the rising edge signals of each group, and then each gating signal corresponds to a basic count value H M .

[0075] See also Figure 3, extract the rising edge counting part in the multi-channel signal counting processing module. After the array single-photon pulse signal enters the rising edge extraction module, the phase-locked loop divides the high-frequency clock signal. The high-frequency clock width should be narrower than the single-photon pulse width. Under this clock, the register and the AND gate logic circuit are used to obtain the rising edge of each single-photon pulse signal. When using an array detector, two or even more single-photon pulses from different channels may arrive within the same clock time. At this time, the rising edge counter can only record a single-photon pulse value. The basic count value of the array single-photon signal can be obtained by extracting the rising edge counting part.

[0076] The phase-shift clock unit is used to shift the phase of the high-frequency clock to obtain k clock signals with a phase shift of 2π / k;

[0077] The arrival time pulse width measurement unit is used to measure the arrival time intervals of adjacent single-photon pulse signals according to the phase-shifted clock signal. It should be noted that the adjacent single-photon pulse signals in this step refer to the single-photon pulse signals that arrive adjacently, and the single-photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn emitted by the array single-photon detection module 1 to n do not mean that PHOTON1 and PHOTON2 arrive one after another. In this application, the single-photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn 1 to n do not include a limitation on the order of arrival, but are only for illustrating that there are n single-photon pulse signals.

[0078] In some embodiments, for the count of the missing valid arrival photon signal, the present invention also introduces a compensation counting part, such as Figure 4 As shown, the specific process is as follows:

[0079] n-1 groups of AND gate arrays are used to extract overlapping pulse width signals from single photon pulse signals respectively;

[0080] Exemplarily, the overlapping pulse width signal extracted by the first group of AND gate arrays is the AND of the PHOTON1 signal and the PHOTON2 signal, that is, the overlapping pulse width signal N is obtained. 11 ;

[0081] The overlapping pulse width signals extracted by the second group of AND gate arrays are the PHOTON1 signal, the PHOTON2 signal and the PHOTON3 signal, respectively, to obtain the overlapping pulse width signal N 21 、N 22 ;

[0082] The overlapping pulse width signals extracted by the n-1th group of AND gate arrays are PHOTON1 signal, PHOTON2 signal, ..., PHOTON(n-1) signal and PHOTONn signal, respectively, to obtain the overlapping pulse width signal N (n-1)1 、N(n-1)2 ,...,N (n-1)(n-1) .

[0083] n-1 groups of adders U are used to add each group of all overlapping pulse width signals output by the array to obtain n-1 groups of relatively overlapping pulse signals M (n-1) :

[0084]

[0085] Exemplarily, the relatively overlapping pulse signal obtained by the first group of adders U is the overlapping pulse width signal N 11 The second adder U is used to add the overlapping pulse width signal N 21 、N 22 Add them together to get M 2 , the n-1th group of adders U is used to add N (n-1)1 、N (n-1)2 ,...,N (n-1)(n-1) Add.

[0086] The n-1 counter arrays U1 are used to respectively use the corresponding n-1th group of relatively overlapping pulse signals as counting enable. The k in the n-1th counter array U1 n-1 The counter array uses the k outputs of the phase-shifted clock unit. n-1 The clock signal is the counting clock, and the k corresponding to the n-1th group of counter array U1 is obtained. n-1 The first count value; it should be noted that the first group of counter arrays U1 has k 1 The second counter array U1 has k 2 There are k counter arrays in the n-1th counter array U1. n-1 counter arrays, each of which outputs a first count value, namely k n-1 The counter array outputs k n-1 count values. In this embodiment, k 1 , k 2 , ..., k n-1 The values ​​can be equal or unequal.

[0087] The n-1 group of adders U' are used to respectively add all the first count values ​​of the corresponding n-1 group of counter arrays to obtain the second count value L of the relatively overlapping pulse signal corresponding to the n-1 group of adders. n-1 ; Exemplarily, the first group of adders U 'is used to add k in the first group of counter arrays 1 Add the first count values ​​to get L 1 The second adder U' is used to add the k in the second counter array 2 Add the first count values ​​to get L2 The n-1th adder U' is used to add the k n-1 Add the first count values ​​to get L n-1 .

[0088] The n-1 group of multipliers U2 are used to respectively convert the corresponding n-1 group of second count values ​​L n-1 Multiply by the count clock width, and divide by k n-1 , get n-1 groups of pulse overlap width S n-1 It should be noted that the first group of multipliers U2 is used to convert L 1 Multiply by the count clock width, and divide by k 1 , get S 1 ; The second group of multipliers U2 is used to convert L 2 Multiply by the count clock width, and then in k 2 , get S 2 ; The n-1th group of multipliers U2 is used to convert L n-1 Multiply by the count clock width, and then in k n-1 , get S n-1 .

[0089] The n-1 group of subtractors U3 are used to respectively separate the single photon signal pulse width from the n-1 group of pulse overlap width S n-1 Perform subtraction operation to obtain the arrival time interval T of n-1 groups of single photon array signals n-1 , the arrival time interval T n-1 The calculation formula for the nth arriving single photon pulse signal pair is as follows:

[0090] T n-1 =ɑ-S n-1

[0091] Wherein, ɑ represents the pulse width of single-photon signal.

[0092] It should be noted that, in some embodiments, the pulse width of the single photon signal is determined by the characteristics of the array single photon detector and is a fixed value, usually 40ns, 20ns, 10ns, etc. The counting clock width is the clock cycle value output by the phase-shift clock module, which can be obtained by dividing the system clock, usually 20ns, 10ns, etc.

[0093] In addition, in some embodiments, the compensation counting unit is used to determine the arrival time interval T n-1 Is it less than the counting clock width?

[0094] If the arrival time interval T n-1 If it is smaller than the counting clock width, the first compensation counting value is output;

[0095] If the arrival time interval T n-1is greater than or equal to the counting clock width, then outputs a second compensation counting value;

[0096] That is to say, for each group of single-photon array signal arrival time intervals, the compensation counting unit will make a judgment once, and then obtain n-1 compensation counting values, and each compensation counting value determines whether it is the first compensation counting value or the second compensation counting value according to the judgment result.

[0097] The addition execution unit is used to convert the basic count value H M The total value O corresponding to the Mth gating signal is obtained by adding all the compensation count values ​​under the Mth gating signal. M It should be noted that, as mentioned above, each gate signal will determine the arrival time interval T of n-1 groups of single photon array signals. n-1 Therefore, the addition execution unit is used to convert the basic count value H of each way M , and all the compensation count values ​​under the gating signal are added together to obtain the total value under each gating signal.

[0098] In summary, the synchronization device for photon counting communication of the present invention includes an array single-photon detector, a gated signal module, a multi-channel signal counting processing module, a comparison module and a synchronous clock selection module, wherein the multi-signal counting processing module mainly includes three parts, namely a phase-locked loop clock, a basic count and a compensation count. In the basic count, a phase-locked loop is used to divide a high-frequency clock to extract the rising edge count of the array photon pulse signal. In the compensation count part, a phase-shifted clock is used to measure the arrival time pulse width, and the compensation count is performed according to the arrival time interval. The different total values ​​under M enable signals are input into the comparison module, and the synchronous clock is selected based on the maximum value in the comparator. The present invention has a simple design structure, saves system resources, and effectively optimizes the problem of counting loss under the stacking of photon pulse signals. It is suitable for single-photon communication under long-distance weak links when the receiving end uses an array single-photon detector.

[0099] In addition, an embodiment of the present invention further provides a synchronization method for photon counting communication, the method comprising steps S101 to S105, wherein:

[0100] Step S101: after receiving the communication photon, outputting single photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn;

[0101] Step S102: outputting M gating signals;

[0102] Step S103: counting all single-photon pulse signals according to each of the gate control signals to output M total count values;

[0103] Step S104: Filter out the maximum total value from the M total values;

[0104] Step S105: selecting a target gating signal corresponding to the maximum total value from the M gating signals as a synchronization clock.

[0105] In some optional embodiments, the step of counting all single-photon pulse signals according to each of the gating signals to output M total count values ​​comprises:

[0106] Divide the frequency to produce a high-frequency clock;

[0107] Extract the rising edge of n array single photon pulse signals according to the high-frequency clock, and output rising edge signals r1, r2, ..., rn;

[0108] Count n rising edge signals to obtain the basic count value H corresponding to the Mth gate signal M ;

[0109] Phase shifting is performed on the high frequency clock to obtain k clock signals with a phase shift of 2π / k;

[0110] The arrival time intervals of adjacent single-photon pulse signals are measured according to a phase-shifted clock signal.

[0111] In some optional embodiments, the step of measuring the time intervals of arrival of adjacent single-photon pulse signals according to the phase-shifted clock signal comprises:

[0112] Extracting overlapping pulse width signals from single photon pulse signals respectively;

[0113] Add each group of all overlapping pulse width signals output by the array to obtain n-1 groups of relatively overlapping pulse signals M (n-1) :

[0114]

[0115] The corresponding n-1th group of relatively overlapping pulse signals are respectively used as counting enable, and the k in the n-1th group of counter array U1 n-1 The counter array uses the k outputs of the phase-shifted clock unit. n-1 The clock signal is the counting clock, and the k corresponding to the n-1th group of counter array U1 is obtained. n-1 A first count value;

[0116] All the first count values ​​of the corresponding n-1th group of counter arrays are added together to obtain the second count value L of the relatively overlapping pulse signal corresponding to the n-1th group of adders. n-1 ;

[0117] The corresponding n-1th group of second count values ​​L n-1 Multiply by the count clock width, and divide by k n-1 , get n-1 groups of pulse overlap width S n-1 ;

[0118] The single photon signal pulse width and the n-1th group pulse overlap width S n-1 Perform subtraction operation to obtain the arrival time interval T of n-1 groups of single photon array signals n-1 , the arrival time interval T n-1 Corresponding to the nth arriving single photon pulse signal.

[0119] In some optional embodiments, the step of counting all single-photon pulse signals according to each of the gating signals to output M total count values ​​further includes:

[0120] Determine the arrival time interval T n-1 Is it less than the counting clock width?

[0121] If the arrival time interval T n-1 If it is smaller than the counting clock width, the first compensation counting value is output;

[0122] If the arrival time interval T n-1 is greater than or equal to the counting clock width, then outputs a second compensation counting value;

[0123] The basic count value H M The total value O corresponding to the Mth gating signal is obtained by adding all the compensation count values ​​under the Mth gating signal. M .

[0124] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. A synchronization device for photon counting communication, characterized in that: The device comprises: An array single-photon detection module is used to output single-photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn after receiving communication photons; A gate control signal module, used for outputting M gate control signals; A multi-channel signal counting processing module, whose input end is electrically connected to the output end of the array single-photon detection module and the gate signal module respectively, and is used to count all single-photon pulse signals according to each gate signal to output M total value; A comparison module, whose input end is electrically connected to the output end of the multi-channel signal counting processing module, and is used to filter out the maximum total value from the M total values; The synchronous clock selection module has an input end electrically connected to the output end of the gating signal module and the comparison module respectively, and is used to select a target gating signal corresponding to the maximum total value from the M gating signals as the synchronous clock.

2. The synchronization device for photon counting communication according to claim 1, characterized in that: The multi-channel signal counting processing module includes a rising edge extraction unit, a rising edge counting unit, a phase-locked loop clock unit, a phase shift clock unit, an arrival time pulse width measurement unit, a compensation counting unit, and an addition execution unit, wherein: The n output terminals r1, r2, r3, ... rn of the rising edge extraction unit are all electrically connected to the input terminal of the rising edge counting unit; The input end of the addition execution unit is electrically connected to the output ends of the rising edge counting unit and the compensation counting unit respectively; The output end of the phase-locked loop clock unit is electrically connected to the input ends of the rising edge extraction unit and the phase-shift clock unit respectively; The output end of the arrival time pulse width measurement unit is electrically connected to the input end of the compensation counting unit, and the input end of the arrival time pulse width measurement unit is electrically connected to the output ends of the phase shift clock unit and the array single photon detection module respectively.

3. The synchronization device for photon counting communication according to claim 2, characterized in that: The arrival time pulse width measurement unit has n-1 output terminals, and includes n-1 groups of measurement components, any of which includes an AND gate array F, an adder U, an adder U', a counter array U1, a multiplier U2, and a subtractor U3, wherein: The output end of the AND gate array F is electrically connected to the input end of the adder U, the output end of the adder U is electrically connected to the enable end of the counter array U1, the output ends of the phase-shifted clock unit are electrically connected to the system clock signal clk of the counter array U1, the output end of the counter array U1 is electrically connected to the input end of the adder U', the output end of the adder U' is electrically connected to the input end of the multiplier U2, and the output end of the multiplier U2 is electrically connected to the input end of the subtractor U3. The M output terminals of the M enabled addition execution units are all electrically connected to the input terminal of the comparison module.

4. The synchronization device for photon counting communication according to claim 3, characterized in that: The AND gate array in the first group of measurement elements performs AND operation on the PHOTON1 signal and the PHOTON2 signal to obtain an overlapping pulse width signal N. 11 ; The AND gate array in the second group of measurement elements performs AND operation on the PHOTON1 signal, the PHOTON2 signal and the PHOTON3 signal respectively to obtain the overlapped pulse width signal N 21 、N 22 ; The gate array in the n-1th group of measurement elements is the PHOTON1 signal, the PHOTON2 signal, ..., the PHOTON(n-1) signal and the PHOTONn signal respectively, to obtain the overlapping pulse width signal N (n-1)1 、N (n-1)2 ,...,N (n-1)(n-1) .

5. The synchronization device for photon counting communication according to claim 1, characterized in that: The duty cycle of each of the gated signals is 50%, the period is twice the time slot width of the modulation signal, and the phase difference between two adjacent signals is 2π / M.

6. The synchronization device for photon counting communication according to claim 4, characterized in that: The phase-locked loop clock unit is used to divide the frequency to produce a high-frequency clock; The rising edge extraction unit is used to extract the rising edge of n array single photon pulse signals according to the high-frequency clock, and output rising edge signals r1, r2, ..., rn; The rising edge counting unit is used to count n rising edge signals to obtain a basic counting value H corresponding to the Mth gate control signal. M ; The phase-shift clock unit is used to shift the phase of the high-frequency clock to obtain k clock signals with a phase shift of 2π / k; The arrival time pulse width measurement unit is used to measure the arrival time intervals of adjacent single photon pulse signals according to a phase-shifted clock signal.

7. The synchronization device for photon counting communication according to claim 6, characterized in that: n-1 groups of AND gate arrays are used to extract overlapping pulse width signals from single photon pulse signals respectively; n-1 groups of adders U are used to add each group of all overlapping pulse width signals output by the array to obtain n-1 groups of relatively overlapping pulse signals M (n-1) : The n-1 counter arrays U1 are used to respectively use the corresponding n-1th group of relatively overlapping pulse signals as counting enable. The k in the n-1th counter array U1 n-1 The counter array uses the k outputs of the phase-shifted clock unit. n-1 The clock signal is the counting clock, and the k corresponding to the n-1th group of counter array U1 is obtained. n-1 A first count value; The n-1 group of adders U' are used to respectively add all the first count values ​​of the corresponding n-1 group of counter arrays to obtain the second count value L of the relatively overlapping pulse signal corresponding to the n-1 group of adders. n-1 ; The n-1 group of multipliers U2 are used to respectively convert the corresponding n-1 group of second count values ​​L n-1 Multiply by the count clock width, and divide by k n-1 , get n-1 groups of pulse overlap width S n-1 ; The n-1 group of subtractors U3 are used to respectively separate the single photon signal pulse width from the n-1 group of pulse overlap width S n-1 Perform subtraction operation to obtain the arrival time interval T of n-1 groups of single photon array signals n-1 , the arrival time interval T n-1 Corresponding to the nth arriving single photon pulse signal.

8. The synchronization device for photon counting communication according to claim 7, characterized in that: The compensation counting unit is used to determine the arrival time interval T n-1 Is it less than the counting clock width? If the arrival time interval T n-1 If it is smaller than the counting clock width, the first compensation counting value is output; If the arrival time interval T n-1 is greater than or equal to the counting clock width, then outputs a second compensation counting value; The addition execution unit is used to add the basic count value H M The total value O corresponding to the Mth gating signal is obtained by adding all the compensation count values ​​under the Mth gating signal. M .

9. A synchronization method for photon counting communication, characterized in that: The method comprises: After receiving the communication photon, it outputs single photon pulse signals PHOTON1, PHOTON2, ..., PHOTONn; Output M gated signals; Counting all the single-photon pulse signals respectively according to each of the gating signals to output M total count values; Filter out the maximum total value from the M total values; A target gating signal corresponding to the maximum total value is selected from the M gating signals as a synchronization clock.

10. The synchronization method for photon counting communication according to claim 9, characterized in that: The step of counting all the single-photon pulse signals according to each of the gating signals to output M total count values ​​comprises: Divide the frequency to produce a high-frequency clock; Extract the rising edge of n array single photon pulse signals according to the high-frequency clock, and output rising edge signals r1, r2, ..., rn; Count n rising edge signals to obtain the basic count value H corresponding to the Mth gate signal M ; Phase shifting is performed on the high frequency clock to obtain k clock signals with a phase shift of 2π / k; The arrival time intervals of adjacent single-photon pulse signals are measured according to a phase-shifted clock signal.

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